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target/arm: Implement GCSPOPM

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Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20251008215613.300150-50-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2025-10-08 14:55:49 -07:00 • committed by Peter Maydell
parent 3afe6037e7
commit 0982f58db6
3 changed files with 28 additions and 0 deletions
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3
target/arm/cpregs-gcs.c
View file

@ -100,6 +100,9 @@ static const ARMCPRegInfo gcs_reginfo[] = {
.opc0 = 1, .opc1 = 3, .crn = 7, .crm = 7, .opc2 = 0,
.access = PL0_W, .accessfn = access_gcspushm,
.fgt = FGT_NGCSPUSHM_EL1, .type = ARM_CP_GCSPUSHM },
{ .name = "GCSPOPM", .state = ARM_CP_STATE_AA64,
.opc0 = 1, .opc1 = 3, .crn = 7, .crm = 7, .opc2 = 1,
.access = PL0_R, .type = ARM_CP_GCSPOPM },
};
void define_gcs_cpregs(ARMCPU *cpu)

1
target/arm/cpregs.h
View file

@ -49,6 +49,7 @@ enum {
ARM_CP_DC_GZVA = 0x0007,
/* Special: gcs instructions */
ARM_CP_GCSPUSHM = 0x0008,
ARM_CP_GCSPOPM = 0x0009,
/* Flag: reads produce resetvalue; writes ignored. */
ARM_CP_CONST = 1 << 4,

24
target/arm/tcg/translate-a64.c
View file

@ -2521,6 +2521,24 @@ static void gen_sysreg_undef(DisasContext *s, bool isread,
gen_exception_insn(s, 0, EXCP_UDEF, syndrome);
}
static void gen_gcspopm(DisasContext *s, int rt)
{
TCGv_i64 gcspr = cpu_gcspr[s->current_el];
int mmuidx = core_gcs_mem_index(s->mmu_idx);
MemOp mop = finalize_memop(s, MO_64 | MO_ALIGN);
TCGv_i64 value = tcg_temp_new_i64();
TCGLabel *fail_label =
delay_exception(s, EXCP_UDEF, syn_gcs_data_check(GCS_IT_GCSPOPM, rt));
/* The value at top-of-stack must have low 2 bits clear. */
tcg_gen_qemu_ld_i64(value, clean_data_tbi(s, gcspr), mmuidx, mop);
tcg_gen_brcondi_i64(TCG_COND_TSTNE, value, 3, fail_label);
/* Complete the pop and return the value. */
tcg_gen_addi_i64(gcspr, gcspr, 8);
tcg_gen_mov_i64(cpu_reg(s, rt), value);
}
/*
* Look up @key, returning the cpreg, which must exist.
* Additionally, the new cpreg must also be accessible.
@ -2832,6 +2850,12 @@ static void handle_sys(DisasContext *s, bool isread,
gen_add_gcs_record(s, cpu_reg(s, rt));
}
return;
case ARM_CP_GCSPOPM:
/* Note that X[rt] is unchanged if !GCSEnabled. */
if (s->gcs_en) {
gen_gcspopm(s, rt);
}
return;
default:
g_assert_not_reached();
}