vfio queue:
* Fixed regression introduced by the `use-legacy-x86-rom` property * Fixed regressions on IGD passthrough in legacy mode * Fixed region mappings of sub-page BARs after CPR * Removed build of SEV on 32-bit hosts -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmiIaXIACgkQUaNDx8/7 7KHEUw//S/9+Aw7sHI0dLvYLLxMUfoDHY2B7nx/o3EgDMc3we4L19+t9d2RTxsc0 QLz1wufhWn4gGIrb46fwqaU1ggu9cHi0o0E57cU+ZeADe/H9YRdFQ1q88yUzBARd /exYAMV9L9NejzA/gvJDr2pZgf5ZZGY8H2MoiYw21z5nGJXlCS+1kXah7rZPHRcu NEPw9jqab78jvHoFK1L1EaRCPN/qTaU8XGCFguDP0icFZCGnu4pIMHHQC6Btcjft 2k5FDkQ9bzYqpq9W0KLimREBCnhmvBnCVSG/KTf/gsU222anGGgS8+80OABG7xrZ 6LjFsBor2vKRhZ1JsL21BANg7M9iLPe3CB8KOgNdWl+RIkNfbUvt/tOqlAQgw9EI JN7g9Ru1B0JVg18SHkTQ6/5eiWxnYRZvQA3R0BJXF23f2qqUtCm9VsQFUfYppc92 Ci/hEtCXej8HoiJFK4gUHLYKRtk4DGbpiWgx1FYLid0ks5I+31m6x/PUMSvUbJez oeKv5oCjvl3ORGrjpiDSA2O3gIEiMSru6jejN0RKEeRpSWOMcEsGPL7nySJaZElR PrR/Cw+n4brTTIwUw7VnpeJnQ+XQbxD6wEzcDB7ZZ+gVs7BvmMT2LeDHzhPcaJuf vDsTSss+YBSDCC8TCmcWPGOQB5SHPRNO/5aMPyYLulfa+VnHQmY= =kKby -----END PGP SIGNATURE----- Merge tag 'pull-vfio-20250729' of https://github.com/legoater/qemu into staging vfio queue: * Fixed regression introduced by the `use-legacy-x86-rom` property * Fixed regressions on IGD passthrough in legacy mode * Fixed region mappings of sub-page BARs after CPR * Removed build of SEV on 32-bit hosts # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmiIaXIACgkQUaNDx8/7 # 7KHEUw//S/9+Aw7sHI0dLvYLLxMUfoDHY2B7nx/o3EgDMc3we4L19+t9d2RTxsc0 # QLz1wufhWn4gGIrb46fwqaU1ggu9cHi0o0E57cU+ZeADe/H9YRdFQ1q88yUzBARd # /exYAMV9L9NejzA/gvJDr2pZgf5ZZGY8H2MoiYw21z5nGJXlCS+1kXah7rZPHRcu # NEPw9jqab78jvHoFK1L1EaRCPN/qTaU8XGCFguDP0icFZCGnu4pIMHHQC6Btcjft # 2k5FDkQ9bzYqpq9W0KLimREBCnhmvBnCVSG/KTf/gsU222anGGgS8+80OABG7xrZ # 6LjFsBor2vKRhZ1JsL21BANg7M9iLPe3CB8KOgNdWl+RIkNfbUvt/tOqlAQgw9EI # JN7g9Ru1B0JVg18SHkTQ6/5eiWxnYRZvQA3R0BJXF23f2qqUtCm9VsQFUfYppc92 # Ci/hEtCXej8HoiJFK4gUHLYKRtk4DGbpiWgx1FYLid0ks5I+31m6x/PUMSvUbJez # oeKv5oCjvl3ORGrjpiDSA2O3gIEiMSru6jejN0RKEeRpSWOMcEsGPL7nySJaZElR # PrR/Cw+n4brTTIwUw7VnpeJnQ+XQbxD6wEzcDB7ZZ+gVs7BvmMT2LeDHzhPcaJuf # vDsTSss+YBSDCC8TCmcWPGOQB5SHPRNO/5aMPyYLulfa+VnHQmY= # =kKby # -----END PGP SIGNATURE----- # gpg: Signature made Tue 29 Jul 2025 02:25:54 EDT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full] # gpg: aka "Cédric Le Goater <clg@kaod.org>" [full] # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-vfio-20250729' of https://github.com/legoater/qemu: vfio/igd: Fix VGA regions are not exposed in legacy mode vfio/igd: Require host VGA decode for legacy mode vfio: fix sub-page bar after cpr i386: Build SEV only for 64-bit target hw/i386: Fix 'use-legacy-x86-rom' property compatibility Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
commit
0ae375ab08
11 changed files with 48 additions and 17 deletions
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@ -48,6 +48,7 @@ Intel document [1] shows how to dump VBIOS to file. For UEFI Option ROM, see
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QEMU also provides a "Legacy" mode that implicitly enables full functionality
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on IGD, it is automatically enabled when
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* IGD generation is 6 to 9 (Sandy Bridge to Comet Lake)
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* IGD claims VGA cycles on host (IGD is VGA controller on host)
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* Machine type is i440fx
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* IGD is assigned to guest BDF 00:02.0
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* ROM BAR or romfile is present
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@ -41,7 +41,7 @@ GlobalProperty hw_compat_10_0[] = {
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{ "scsi-hd", "dpofua", "off" },
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{ "vfio-pci", "x-migration-load-config-after-iter", "off" },
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{ "ramfb", "use-legacy-x86-rom", "true"},
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{ "vfio-pci", "use-legacy-x86-rom", "true" },
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{ "vfio-pci-nohotplug", "use-legacy-x86-rom", "true" },
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};
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const size_t hw_compat_10_0_len = G_N_ELEMENTS(hw_compat_10_0);
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@ -4,7 +4,7 @@ config X86_FW_OVMF
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config SEV
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bool
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select X86_FW_OVMF
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depends on KVM
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depends on KVM && X86_64
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config SGX
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bool
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@ -635,7 +635,7 @@ GlobalProperty microvm_properties[] = {
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*/
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{ "pcie-root-port", "io-reserve", "0" },
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{ TYPE_RAMFB_DEVICE, "use-legacy-x86-rom", "true" },
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{ TYPE_VFIO_PCI, "use-legacy-x86-rom", "true" },
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{ TYPE_VFIO_PCI_NOHOTPLUG, "use-legacy-x86-rom", "true" },
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};
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static void microvm_class_init(ObjectClass *oc, const void *data)
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@ -80,7 +80,7 @@ static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
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static GlobalProperty pc_piix_compat_defaults[] = {
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{ TYPE_RAMFB_DEVICE, "use-legacy-x86-rom", "true" },
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{ TYPE_VFIO_PCI, "use-legacy-x86-rom", "true" },
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{ TYPE_VFIO_PCI_NOHOTPLUG, "use-legacy-x86-rom", "true" },
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};
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static const size_t pc_piix_compat_defaults_len =
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G_N_ELEMENTS(pc_piix_compat_defaults);
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@ -69,7 +69,7 @@
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static GlobalProperty pc_q35_compat_defaults[] = {
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{ TYPE_VIRTIO_IOMMU_PCI, "aw-bits", "39" },
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{ TYPE_RAMFB_DEVICE, "use-legacy-x86-rom", "true" },
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{ TYPE_VFIO_PCI, "use-legacy-x86-rom", "true" },
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{ TYPE_VFIO_PCI_NOHOTPLUG, "use-legacy-x86-rom", "true" },
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};
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static const size_t pc_q35_compat_defaults_len =
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G_N_ELEMENTS(pc_q35_compat_defaults);
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@ -116,6 +116,8 @@ static int vfio_cpr_pci_post_load(void *opaque, int version_id)
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PCIDevice *pdev = &vdev->pdev;
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int nr_vectors;
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vfio_sub_page_bar_update_mappings(vdev);
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if (msix_enabled(pdev)) {
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vfio_pci_msix_set_notifiers(vdev);
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nr_vectors = vdev->msix->entries;
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@ -113,6 +113,7 @@ static int igd_gen(VFIOPCIDevice *vdev)
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#define IGD_BDSM 0x5c /* Base Data of Stolen Memory */
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#define IGD_BDSM_GEN11 0xc0 /* Base Data of Stolen Memory of gen 11 and later */
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#define IGD_GMCH_VGA_DISABLE BIT(1)
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#define IGD_GMCH_GEN6_GMS_SHIFT 3 /* SNB_GMCH in i915 */
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#define IGD_GMCH_GEN6_GMS_MASK 0x1f
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#define IGD_GMCH_GEN8_GMS_SHIFT 8 /* BDW_GMCH in i915 */
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@ -533,12 +534,14 @@ static bool vfio_pci_igd_config_quirk(VFIOPCIDevice *vdev, Error **errp)
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/*
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* For backward compatibility, enable legacy mode when
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* - Device geneation is 6 to 9 (including both)
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* - IGD claims VGA cycles on host
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* - Machine type is i440fx (pc_piix)
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* - IGD device is at guest BDF 00:02.0
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* - Not manually disabled by x-igd-legacy-mode=off
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*/
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if ((vdev->igd_legacy_mode != ON_OFF_AUTO_OFF) &&
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(gen >= 6 && gen <= 9) &&
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!(gmch & IGD_GMCH_VGA_DISABLE) &&
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!strcmp(MACHINE_GET_CLASS(qdev_get_machine())->family, "pc_piix") &&
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(&vdev->pdev == pci_find_device(pci_device_root_bus(&vdev->pdev),
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0, PCI_DEVFN(0x2, 0)))) {
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@ -568,14 +571,16 @@ static bool vfio_pci_igd_config_quirk(VFIOPCIDevice *vdev, Error **errp)
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}
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/*
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* If IGD VGA Disable is clear (expected) and VGA is not already
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* enabled, try to enable it. Probably shouldn't be using legacy mode
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* without VGA, but also no point in us enabling VGA if disabled in
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* hardware.
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* If VGA is not already enabled, try to enable it. We shouldn't be
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* using legacy mode without VGA.
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*/
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if (!(gmch & 0x2) && !vdev->vga && !vfio_populate_vga(vdev, &err)) {
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error_setg(&err, "Unable to enable VGA access");
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goto error;
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if (!vdev->vga) {
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if (vfio_populate_vga(vdev, &err)) {
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vfio_pci_config_register_vga(vdev);
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} else {
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error_setg(&err, "Unable to enable VGA access");
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goto error;
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}
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}
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/* Enable OpRegion and LPC bridge quirk */
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@ -49,8 +49,6 @@
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#include "vfio-migration-internal.h"
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#include "vfio-helpers.h"
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#define TYPE_VFIO_PCI_NOHOTPLUG "vfio-pci-nohotplug"
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/* Protected by BQL */
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static KVMRouteChange vfio_route_change;
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@ -2826,6 +2824,20 @@ static int vfio_pci_load_config(VFIODevice *vbasedev, QEMUFile *f)
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return ret;
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}
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void vfio_sub_page_bar_update_mappings(VFIOPCIDevice *vdev)
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{
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PCIDevice *pdev = &vdev->pdev;
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int page_size = qemu_real_host_page_size();
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int bar;
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for (bar = 0; bar < PCI_ROM_SLOT; bar++) {
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PCIIORegion *r = &pdev->io_regions[bar];
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if (r->addr != PCI_BAR_UNMAPPED && r->size > 0 && r->size < page_size) {
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vfio_sub_page_bar_update_mapping(pdev, bar);
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}
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}
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}
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static VFIODeviceOps vfio_pci_ops = {
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.vfio_compute_needs_reset = vfio_pci_compute_needs_reset,
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.vfio_hot_reset_multi = vfio_pci_hot_reset_multi,
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@ -3150,6 +3162,15 @@ static void vfio_unregister_req_notifier(VFIOPCIDevice *vdev)
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vdev->req_enabled = false;
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}
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void vfio_pci_config_register_vga(VFIOPCIDevice *vdev)
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{
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assert(vdev->vga != NULL);
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pci_register_vga(&vdev->pdev, &vdev->vga->region[QEMU_PCI_VGA_MEM].mem,
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&vdev->vga->region[QEMU_PCI_VGA_IO_LO].mem,
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&vdev->vga->region[QEMU_PCI_VGA_IO_HI].mem);
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}
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bool vfio_pci_config_setup(VFIOPCIDevice *vdev, Error **errp)
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{
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PCIDevice *pdev = &vdev->pdev;
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@ -3271,9 +3292,7 @@ bool vfio_pci_config_setup(VFIOPCIDevice *vdev, Error **errp)
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vfio_bars_register(vdev);
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if (vdev->vga && vfio_is_vga(vdev)) {
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pci_register_vga(&vdev->pdev, &vdev->vga->region[QEMU_PCI_VGA_MEM].mem,
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&vdev->vga->region[QEMU_PCI_VGA_IO_LO].mem,
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&vdev->vga->region[QEMU_PCI_VGA_IO_HI].mem);
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vfio_pci_config_register_vga(vdev);
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}
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return true;
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@ -219,6 +219,7 @@ void vfio_pci_write_config(PCIDevice *pdev,
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uint64_t vfio_vga_read(void *opaque, hwaddr addr, unsigned size);
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void vfio_vga_write(void *opaque, hwaddr addr, uint64_t data, unsigned size);
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void vfio_sub_page_bar_update_mappings(VFIOPCIDevice *vdev);
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bool vfio_opt_rom_in_denylist(VFIOPCIDevice *vdev);
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bool vfio_config_quirk_setup(VFIOPCIDevice *vdev, Error **errp);
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void vfio_vga_quirk_setup(VFIOPCIDevice *vdev);
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@ -252,6 +253,7 @@ extern const VMStateDescription vfio_display_vmstate;
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void vfio_pci_bars_exit(VFIOPCIDevice *vdev);
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bool vfio_pci_add_capabilities(VFIOPCIDevice *vdev, Error **errp);
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void vfio_pci_config_register_vga(VFIOPCIDevice *vdev);
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bool vfio_pci_config_setup(VFIOPCIDevice *vdev, Error **errp);
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bool vfio_pci_interrupt_setup(VFIOPCIDevice *vdev, Error **errp);
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void vfio_pci_intx_eoi(VFIODevice *vbasedev);
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@ -18,4 +18,6 @@
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#define TYPE_VFIO_PCI "vfio-pci"
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/* TYPE_VFIO_PCI shares struct VFIOPCIDevice. */
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#define TYPE_VFIO_PCI_NOHOTPLUG "vfio-pci-nohotplug"
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#endif /* HW_VFIO_VFIO_TYPES_H */
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