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target/microblaze: div: Break out raise_divzero()

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Break out raise_divzero() and take the opportunity to rename
and reorder function args to better match with spec and
pseudo code.

No functional change.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
This commit is contained in:
Edgar E. Iglesias 2025-08-24 22:55:56 +02:00
parent a04c5ba543
commit 0e46b4d1f1
2 changed files with 18 additions and 28 deletions
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34
target/microblaze/op_helper.c
View file

@ -69,38 +69,36 @@ void helper_raise_exception(CPUMBState *env, uint32_t index)
cpu_loop_exit(cs);
}
static bool check_divz(CPUMBState *env, uint32_t b, uintptr_t ra)
/* Raises ESR_EC_DIVZERO if exceptions are enabled. */
static void raise_divzero(CPUMBState *env, uint32_t esr, uintptr_t unwind_pc)
{
if (unlikely(b == 0)) {
env->msr |= MSR_DZ;
env->msr |= MSR_DZ;
if ((env->msr & MSR_EE) &&
env_archcpu(env)->cfg.div_zero_exception) {
CPUState *cs = env_cpu(env);
if ((env->msr & MSR_EE) && env_archcpu(env)->cfg.div_zero_exception) {
CPUState *cs = env_cpu(env);
env->esr = ESR_EC_DIVZERO;
cs->exception_index = EXCP_HW_EXCP;
cpu_loop_exit_restore(cs, ra);
}
return false;
env->esr = esr;
cs->exception_index = EXCP_HW_EXCP;
cpu_loop_exit_restore(cs, unwind_pc);
}
return true;
}
uint32_t helper_divs(CPUMBState *env, uint32_t a, uint32_t b)
uint32_t helper_divs(CPUMBState *env, uint32_t ra, uint32_t rb)
{
if (!check_divz(env, b, GETPC())) {
if (!ra) {
raise_divzero(env, ESR_EC_DIVZERO, GETPC());
return 0;
}
return (int32_t)a / (int32_t)b;
return (int32_t)rb / (int32_t)ra;
}
uint32_t helper_divu(CPUMBState *env, uint32_t a, uint32_t b)
uint32_t helper_divu(CPUMBState *env, uint32_t ra, uint32_t rb)
{
if (!check_divz(env, b, GETPC())) {
if (!ra) {
raise_divzero(env, ESR_EC_DIVZERO, GETPC());
return 0;
}
return a / b;
return rb / ra;
}
/* raise FPU exception. */

12
target/microblaze/translate.c
View file

@ -450,16 +450,8 @@ DO_TYPEA0_CFG(flt, use_fpu >= 2, true, gen_flt)
DO_TYPEA0_CFG(fint, use_fpu >= 2, true, gen_fint)
DO_TYPEA0_CFG(fsqrt, use_fpu >= 2, true, gen_fsqrt)
/* Does not use ENV_WRAPPER3, because arguments are swapped as well. */
static void gen_idiv(TCGv_i32 out, TCGv_i32 ina, TCGv_i32 inb)
{
gen_helper_divs(out, tcg_env, inb, ina);
}
static void gen_idivu(TCGv_i32 out, TCGv_i32 ina, TCGv_i32 inb)
{
gen_helper_divu(out, tcg_env, inb, ina);
}
ENV_WRAPPER3(gen_idiv, gen_helper_divs)
ENV_WRAPPER3(gen_idivu, gen_helper_divu)
DO_TYPEA_CFG(idiv, use_div, true, gen_idiv)
DO_TYPEA_CFG(idivu, use_div, true, gen_idivu)