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docs/system/arm/xlnx-versal-virt: update supported devices

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Update the list of supported devices in the Versal SoCs.

Signed-off-by: Luc Michel <luc.michel@amd.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250926070806.292065-45-luc.michel@amd.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Luc Michel 2025-09-26 09:08:02 +02:00 • committed by Peter Maydell
parent e2e9b9e129
commit 0ec8c4296d
1 changed files with 5 additions and 2 deletions
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7
docs/system/arm/xlnx-versal-virt.rst
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@ -23,11 +23,11 @@ limitations. Currently, we support the following cores and devices:
Implemented CPU cores:
- 2 ACPUs (ARM Cortex-A72)
- 2 ACPUs (ARM Cortex-A72) with their GICv3 and ITS
- 2 RCPUs (ARM Cortex-R5F) with their GICv2
Implemented devices:
- Interrupt controller (ARM GICv3)
- 2 UARTs (ARM PL011)
- An RTC (Versal built-in)
- 2 GEMs (Cadence MACB Ethernet MACs)
@ -39,6 +39,9 @@ Implemented devices:
- BBRAM (36 bytes of Battery-backed RAM)
- eFUSE (3072 bytes of one-time field-programmable bit array)
- 2 CANFDs
- USB controller
- OSPI controller
- TRNG controller
QEMU does not yet model any other devices, including the PL and the AI Engine.