From 0ed93f4c05896145434adbce5fa328643260dd2e Mon Sep 17 00:00:00 2001 From: Ani Sinha Date: Fri, 18 Sep 2020 14:11:09 +0530 Subject: [PATCH] tests/acpi: update golden master DSDT binary table blobs for q35 In the previously applied commit ("piix4: don't reserve hw resources when hotplug is off globally"), we make changes to the ACPI DSDT tables such that some ACPI code are not generated when bsel is absent. Since as of this point in time, in q35 machines, we do not use bsel for pci buses, we need to update the DSDT table blobs. This patch updates the DSDT golden master tables for q35 machines. At the same time, we clear bios-tables-test-allowed-diff.h for future changes which update tables. Following is a typical diff between the q35 acpi DSDT table blobs: @@ -1,30 +1,30 @@ /* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20180105 (64-bit version) * Copyright (c) 2000 - 2018 Intel Corporation * * Disassembling to symbolic ASL+ operators * - * Disassembly of tests/data/acpi/q35/DSDT, Tue Sep 15 18:52:47 2020 + * Disassembly of /tmp/aml-3O0DR0, Tue Sep 15 18:52:47 2020 * * Original Table Header: * Signature "DSDT" - * Length 0x00001DFE (7678) + * Length 0x00001DF6 (7670) * Revision 0x01 **** 32-bit table (V1), no 64-bit math support - * Checksum 0xAC + * Checksum 0x17 * OEM ID "BOCHS " * OEM Table ID "BXPCDSDT" * OEM Revision 0x00000001 (1) * Compiler ID "BXPC" * Compiler Version 0x00000001 (1) */ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001) { Scope (\) { OperationRegion (DBG, SystemIO, 0x0402, One) Field (DBG, ByteAcc, NoLock, Preserve) { DBGB, 8 } @@ -3113,24 +3113,20 @@ Name (_ADR, 0x00010000) // _ADR: Address Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State { Return (Zero) } Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State { Return (Zero) } Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State { Return (Zero) } } - - Method (PCNT, 0, NotSerialized) - { - } } } } Signed-off-by: Ani Sinha Acked-by: Igor Mammedov Message-Id: <20200918084111.15339-12-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/.vhost-user-test.c.swo | Bin 0 -> 16384 bytes tests/Makefile.include.orig | 1012 +++++ tests/Makefile.orig | 569 +++ tests/bios-tables-test.c.orig | 925 +++++ tests/data/acpi/diff-aml.sh | 0 tests/data/acpi/disassemle-aml.py | 21 + tests/data/acpi/microvm/APIC.dsl | 56 + tests/data/acpi/microvm/DSDT.dsl | 121 + tests/data/acpi/microvm/FACP.dsl | 196 + tests/data/acpi/pc/APIC.acpihmat.dsl | 112 + tests/data/acpi/pc/APIC.bridge | Bin 0 -> 120 bytes tests/data/acpi/pc/APIC.bridge.dsl | 104 + tests/data/acpi/pc/APIC.cphp.dsl | 146 + tests/data/acpi/pc/APIC.dimmpxm.dsl | 129 + tests/data/acpi/pc/APIC.dsl | 104 + tests/data/acpi/pc/APIC.hpbridge | Bin 0 -> 120 bytes tests/data/acpi/pc/APIC.ipmikcs | Bin 0 -> 120 bytes tests/data/acpi/pc/APIC.ipmikcs.dsl | 104 + tests/data/acpi/pc/APIC.memhp | Bin 0 -> 120 bytes tests/data/acpi/pc/APIC.memhp.dsl | 104 + tests/data/acpi/pc/APIC.numamem | Bin 0 -> 120 bytes tests/data/acpi/pc/APIC.numamem.dsl | 104 + tests/data/acpi/pc/APIC.roothp | Bin 0 -> 120 bytes tests/data/acpi/pc/DSDT.acpihmat.dsl | 1619 ++++++++ tests/data/acpi/pc/DSDT.bridge.dsl | 1800 +++++++++ tests/data/acpi/pc/DSDT.cphp.dsl | 1466 +++++++ tests/data/acpi/pc/DSDT.dimmpxm.dsl | 1719 ++++++++ tests/data/acpi/pc/DSDT.dsl | 1407 +++++++ tests/data/acpi/pc/DSDT.hpbridge | Bin 4895 -> 5021 bytes tests/data/acpi/pc/DSDT.ipmikcs.dsl | 1337 +++++++ tests/data/acpi/pc/DSDT.memhp.dsl | 1625 ++++++++ tests/data/acpi/pc/DSDT.numamem.dsl | 1321 ++++++ tests/data/acpi/pc/DSDT.roothp | Bin 5130 -> 5256 bytes tests/data/acpi/pc/FACP.acpihmat | Bin 0 -> 116 bytes tests/data/acpi/pc/FACP.acpihmat.dsl | 99 + tests/data/acpi/pc/FACP.bridge | Bin 0 -> 116 bytes tests/data/acpi/pc/FACP.bridge.dsl | 99 + tests/data/acpi/pc/FACP.cphp | Bin 0 -> 116 bytes tests/data/acpi/pc/FACP.cphp.dsl | 99 + tests/data/acpi/pc/FACP.dimmpxm | Bin 0 -> 116 bytes tests/data/acpi/pc/FACP.dimmpxm.dsl | 99 + tests/data/acpi/pc/FACP.dsl | 99 + tests/data/acpi/pc/FACP.hpbridge | Bin 0 -> 116 bytes tests/data/acpi/pc/FACP.ipmikcs | Bin 0 -> 116 bytes tests/data/acpi/pc/FACP.ipmikcs.dsl | 99 + tests/data/acpi/pc/FACP.memhp | Bin 0 -> 116 bytes tests/data/acpi/pc/FACP.memhp.dsl | 99 + tests/data/acpi/pc/FACP.numamem | Bin 0 -> 116 bytes tests/data/acpi/pc/FACP.numamem.dsl | 99 + tests/data/acpi/pc/FACP.roothp | Bin 0 -> 116 bytes tests/data/acpi/pc/FACS.acpihmat | Bin 0 -> 64 bytes tests/data/acpi/pc/FACS.acpihmat.dsl | 32 + tests/data/acpi/pc/FACS.bridge | Bin 0 -> 64 bytes tests/data/acpi/pc/FACS.bridge.dsl | 32 + tests/data/acpi/pc/FACS.cphp | Bin 0 -> 64 bytes tests/data/acpi/pc/FACS.cphp.dsl | 32 + tests/data/acpi/pc/FACS.dimmpxm | Bin 0 -> 64 bytes tests/data/acpi/pc/FACS.dimmpxm.dsl | 32 + tests/data/acpi/pc/FACS.dsl | 32 + tests/data/acpi/pc/FACS.hpbridge | Bin 0 -> 64 bytes tests/data/acpi/pc/FACS.ipmikcs | Bin 0 -> 64 bytes tests/data/acpi/pc/FACS.ipmikcs.dsl | 32 + tests/data/acpi/pc/FACS.memhp | Bin 0 -> 64 bytes tests/data/acpi/pc/FACS.memhp.dsl | 32 + tests/data/acpi/pc/FACS.numamem | Bin 0 -> 64 bytes tests/data/acpi/pc/FACS.numamem.dsl | 32 + tests/data/acpi/pc/FACS.roothp | Bin 0 -> 64 bytes tests/data/acpi/pc/HMAT.acpihmat.dsl | 132 + tests/data/acpi/pc/HMAT.dsl | 132 + tests/data/acpi/pc/HPET.acpihmat | Bin 0 -> 56 bytes tests/data/acpi/pc/HPET.acpihmat.dsl | 43 + tests/data/acpi/pc/HPET.bridge | Bin 0 -> 56 bytes tests/data/acpi/pc/HPET.bridge.dsl | 43 + tests/data/acpi/pc/HPET.cphp | Bin 0 -> 56 bytes tests/data/acpi/pc/HPET.cphp.dsl | 43 + tests/data/acpi/pc/HPET.dimmpxm | Bin 0 -> 56 bytes tests/data/acpi/pc/HPET.dimmpxm.dsl | 43 + tests/data/acpi/pc/HPET.dsl | 43 + tests/data/acpi/pc/HPET.hpbridge | Bin 0 -> 56 bytes tests/data/acpi/pc/HPET.ipmikcs | Bin 0 -> 56 bytes tests/data/acpi/pc/HPET.ipmikcs.dsl | 43 + tests/data/acpi/pc/HPET.memhp | Bin 0 -> 56 bytes tests/data/acpi/pc/HPET.memhp.dsl | 43 + tests/data/acpi/pc/HPET.numamem | Bin 0 -> 56 bytes tests/data/acpi/pc/HPET.numamem.dsl | 43 + tests/data/acpi/pc/HPET.roothp | Bin 0 -> 56 bytes tests/data/acpi/pc/NFIT.dimmpxm.dsl | 115 + tests/data/acpi/pc/NFIT.dsl | 115 + tests/data/acpi/pc/SLIT.cphp.dsl | 31 + tests/data/acpi/pc/SLIT.dsl | 31 + tests/data/acpi/pc/SLIT.memhp.dsl | 31 + tests/data/acpi/pc/SRAT.acpihmat.dsl | 137 + tests/data/acpi/pc/SRAT.cphp.dsl | 168 + tests/data/acpi/pc/SRAT.dimmpxm.dsl | 194 + tests/data/acpi/pc/SRAT.dsl | 108 + tests/data/acpi/pc/SRAT.memhp.dsl | 125 + tests/data/acpi/pc/SRAT.numamem.dsl | 108 + tests/data/acpi/pc/SSDT.dsl | 205 + tests/data/acpi/pc/WAET.acpihmat | Bin 0 -> 40 bytes tests/data/acpi/pc/WAET.acpihmat.dsl | 31 + tests/data/acpi/pc/WAET.bridge | Bin 0 -> 40 bytes tests/data/acpi/pc/WAET.bridge.dsl | 31 + tests/data/acpi/pc/WAET.cphp | Bin 0 -> 40 bytes tests/data/acpi/pc/WAET.cphp.dsl | 31 + tests/data/acpi/pc/WAET.dimmpxm | Bin 0 -> 40 bytes tests/data/acpi/pc/WAET.dimmpxm.dsl | 31 + tests/data/acpi/pc/WAET.dsl | 31 + tests/data/acpi/pc/WAET.hpbridge | Bin 0 -> 40 bytes tests/data/acpi/pc/WAET.ipmikcs | Bin 0 -> 40 bytes tests/data/acpi/pc/WAET.ipmikcs.dsl | 31 + tests/data/acpi/pc/WAET.memhp | Bin 0 -> 40 bytes tests/data/acpi/pc/WAET.memhp.dsl | 31 + tests/data/acpi/pc/WAET.numamem | Bin 0 -> 40 bytes tests/data/acpi/pc/WAET.numamem.dsl | 31 + tests/data/acpi/pc/WAET.roothp | Bin 0 -> 40 bytes tests/data/acpi/q35/APIC.acpihmat.dsl | 112 + tests/data/acpi/q35/APIC.bridge | Bin 0 -> 120 bytes tests/data/acpi/q35/APIC.bridge.dsl | 104 + tests/data/acpi/q35/APIC.cphp.dsl | 146 + tests/data/acpi/q35/APIC.dimmpxm.dsl | 129 + tests/data/acpi/q35/APIC.dsl | 104 + tests/data/acpi/q35/APIC.ipmibt | Bin 0 -> 120 bytes tests/data/acpi/q35/APIC.ipmibt.dsl | 104 + tests/data/acpi/q35/APIC.memhp | Bin 0 -> 120 bytes tests/data/acpi/q35/APIC.memhp.dsl | 104 + tests/data/acpi/q35/APIC.mmio64 | Bin 0 -> 120 bytes tests/data/acpi/q35/APIC.mmio64.dsl | 104 + tests/data/acpi/q35/APIC.numamem | Bin 0 -> 120 bytes tests/data/acpi/q35/APIC.numamem.dsl | 104 + tests/data/acpi/q35/APIC.tis | Bin 0 -> 120 bytes tests/data/acpi/q35/APIC.tis.dsl | 104 + tests/data/acpi/q35/DSDT | Bin 7804 -> 7796 bytes tests/data/acpi/q35/DSDT.acpihmat | Bin 9129 -> 9121 bytes tests/data/acpi/q35/DSDT.acpihmat.dsl | 3436 ++++++++++++++++ tests/data/acpi/q35/DSDT.bridge | Bin 7821 -> 7814 bytes tests/data/acpi/q35/DSDT.bridge.dsl | 3141 +++++++++++++++ tests/data/acpi/q35/DSDT.cphp | Bin 8268 -> 8260 bytes tests/data/acpi/q35/DSDT.cphp.dsl | 3283 +++++++++++++++ tests/data/acpi/q35/DSDT.dimmpxm | Bin 9458 -> 9450 bytes tests/data/acpi/q35/DSDT.dimmpxm.dsl | 3535 +++++++++++++++++ tests/data/acpi/q35/DSDT.dsl | 3351 ++++++++++++++++ tests/data/acpi/q35/DSDT.ipmibt | Bin 7879 -> 7871 bytes tests/data/acpi/q35/DSDT.ipmibt.dsl | 3156 +++++++++++++++ tests/data/acpi/q35/DSDT.memhp | Bin 9163 -> 9155 bytes tests/data/acpi/q35/DSDT.memhp.dsl | 3442 ++++++++++++++++ tests/data/acpi/q35/DSDT.mmio64 | Bin 8934 -> 8927 bytes tests/data/acpi/q35/DSDT.mmio64.dsl | 3377 ++++++++++++++++ tests/data/acpi/q35/DSDT.numamem | Bin 7810 -> 7802 bytes tests/data/acpi/q35/DSDT.numamem.dsl | 3138 +++++++++++++++ tests/data/acpi/q35/DSDT.tis | Bin 8409 -> 8402 bytes tests/data/acpi/q35/DSDT.tis.dsl | 3321 ++++++++++++++++ tests/data/acpi/q35/FACP.acpihmat | Bin 0 -> 244 bytes tests/data/acpi/q35/FACP.acpihmat.dsl | 179 + tests/data/acpi/q35/FACP.bridge | Bin 0 -> 244 bytes tests/data/acpi/q35/FACP.bridge.dsl | 179 + tests/data/acpi/q35/FACP.cphp | Bin 0 -> 244 bytes tests/data/acpi/q35/FACP.cphp.dsl | 179 + tests/data/acpi/q35/FACP.dimmpxm | Bin 0 -> 244 bytes tests/data/acpi/q35/FACP.dimmpxm.dsl | 179 + tests/data/acpi/q35/FACP.dsl | 179 + tests/data/acpi/q35/FACP.ipmibt | Bin 0 -> 244 bytes tests/data/acpi/q35/FACP.ipmibt.dsl | 179 + tests/data/acpi/q35/FACP.memhp | Bin 0 -> 244 bytes tests/data/acpi/q35/FACP.memhp.dsl | 179 + tests/data/acpi/q35/FACP.mmio64 | Bin 0 -> 244 bytes tests/data/acpi/q35/FACP.mmio64.dsl | 179 + tests/data/acpi/q35/FACP.numamem | Bin 0 -> 244 bytes tests/data/acpi/q35/FACP.numamem.dsl | 179 + tests/data/acpi/q35/FACP.tis | Bin 0 -> 244 bytes tests/data/acpi/q35/FACP.tis.dsl | 179 + tests/data/acpi/q35/FACS.acpihmat | Bin 0 -> 64 bytes tests/data/acpi/q35/FACS.acpihmat.dsl | 32 + tests/data/acpi/q35/FACS.bridge | Bin 0 -> 64 bytes tests/data/acpi/q35/FACS.bridge.dsl | 32 + tests/data/acpi/q35/FACS.cphp | Bin 0 -> 64 bytes tests/data/acpi/q35/FACS.cphp.dsl | 32 + tests/data/acpi/q35/FACS.dimmpxm | Bin 0 -> 64 bytes tests/data/acpi/q35/FACS.dimmpxm.dsl | 32 + tests/data/acpi/q35/FACS.dsl | 32 + tests/data/acpi/q35/FACS.ipmibt | Bin 0 -> 64 bytes tests/data/acpi/q35/FACS.ipmibt.dsl | 32 + tests/data/acpi/q35/FACS.memhp | Bin 0 -> 64 bytes tests/data/acpi/q35/FACS.memhp.dsl | 32 + tests/data/acpi/q35/FACS.mmio64 | Bin 0 -> 64 bytes tests/data/acpi/q35/FACS.mmio64.dsl | 32 + tests/data/acpi/q35/FACS.numamem | Bin 0 -> 64 bytes tests/data/acpi/q35/FACS.numamem.dsl | 32 + tests/data/acpi/q35/FACS.tis | Bin 0 -> 64 bytes tests/data/acpi/q35/FACS.tis.dsl | 32 + tests/data/acpi/q35/HMAT.acpihmat.dsl | 132 + tests/data/acpi/q35/HMAT.dsl | 132 + tests/data/acpi/q35/HPET.acpihmat | Bin 0 -> 56 bytes tests/data/acpi/q35/HPET.acpihmat.dsl | 43 + tests/data/acpi/q35/HPET.bridge | Bin 0 -> 56 bytes tests/data/acpi/q35/HPET.bridge.dsl | 43 + tests/data/acpi/q35/HPET.cphp | Bin 0 -> 56 bytes tests/data/acpi/q35/HPET.cphp.dsl | 43 + tests/data/acpi/q35/HPET.dimmpxm | Bin 0 -> 56 bytes tests/data/acpi/q35/HPET.dimmpxm.dsl | 43 + tests/data/acpi/q35/HPET.dsl | 43 + tests/data/acpi/q35/HPET.ipmibt | Bin 0 -> 56 bytes tests/data/acpi/q35/HPET.ipmibt.dsl | 43 + tests/data/acpi/q35/HPET.memhp | Bin 0 -> 56 bytes tests/data/acpi/q35/HPET.memhp.dsl | 43 + tests/data/acpi/q35/HPET.mmio64 | Bin 0 -> 56 bytes tests/data/acpi/q35/HPET.mmio64.dsl | 43 + tests/data/acpi/q35/HPET.numamem | Bin 0 -> 56 bytes tests/data/acpi/q35/HPET.numamem.dsl | 43 + tests/data/acpi/q35/HPET.tis | Bin 0 -> 56 bytes tests/data/acpi/q35/HPET.tis.dsl | 43 + tests/data/acpi/q35/MCFG.acpihmat | Bin 0 -> 60 bytes tests/data/acpi/q35/MCFG.acpihmat.dsl | 36 + tests/data/acpi/q35/MCFG.bridge | Bin 0 -> 60 bytes tests/data/acpi/q35/MCFG.bridge.dsl | 36 + tests/data/acpi/q35/MCFG.cphp | Bin 0 -> 60 bytes tests/data/acpi/q35/MCFG.cphp.dsl | 36 + tests/data/acpi/q35/MCFG.dimmpxm | Bin 0 -> 60 bytes tests/data/acpi/q35/MCFG.dimmpxm.dsl | 36 + tests/data/acpi/q35/MCFG.dsl | 36 + tests/data/acpi/q35/MCFG.ipmibt | Bin 0 -> 60 bytes tests/data/acpi/q35/MCFG.ipmibt.dsl | 36 + tests/data/acpi/q35/MCFG.memhp | Bin 0 -> 60 bytes tests/data/acpi/q35/MCFG.memhp.dsl | 36 + tests/data/acpi/q35/MCFG.mmio64 | Bin 0 -> 60 bytes tests/data/acpi/q35/MCFG.mmio64.dsl | 36 + tests/data/acpi/q35/MCFG.numamem | Bin 0 -> 60 bytes tests/data/acpi/q35/MCFG.numamem.dsl | 36 + tests/data/acpi/q35/MCFG.tis | Bin 0 -> 60 bytes tests/data/acpi/q35/MCFG.tis.dsl | 36 + tests/data/acpi/q35/NFIT.dimmpxm.dsl | 115 + tests/data/acpi/q35/NFIT.dsl | 115 + tests/data/acpi/q35/SLIT.cphp.dsl | 31 + tests/data/acpi/q35/SLIT.dsl | 31 + tests/data/acpi/q35/SLIT.memhp.dsl | 31 + tests/data/acpi/q35/SRAT.acpihmat.dsl | 137 + tests/data/acpi/q35/SRAT.cphp.dsl | 168 + tests/data/acpi/q35/SRAT.dimmpxm.dsl | 194 + tests/data/acpi/q35/SRAT.dsl | 108 + tests/data/acpi/q35/SRAT.memhp.dsl | 125 + tests/data/acpi/q35/SRAT.mmio64.dsl | 108 + tests/data/acpi/q35/SRAT.numamem.dsl | 108 + tests/data/acpi/q35/SSDT.dsl | 205 + tests/data/acpi/q35/TPM2.dsl | 38 + tests/data/acpi/q35/TPM2.tis.dsl | 38 + tests/data/acpi/q35/WAET.acpihmat | Bin 0 -> 40 bytes tests/data/acpi/q35/WAET.acpihmat.dsl | 31 + tests/data/acpi/q35/WAET.bridge | Bin 0 -> 40 bytes tests/data/acpi/q35/WAET.bridge.dsl | 31 + tests/data/acpi/q35/WAET.cphp | Bin 0 -> 40 bytes tests/data/acpi/q35/WAET.cphp.dsl | 31 + tests/data/acpi/q35/WAET.dimmpxm | Bin 0 -> 40 bytes tests/data/acpi/q35/WAET.dimmpxm.dsl | 31 + tests/data/acpi/q35/WAET.dsl | 31 + tests/data/acpi/q35/WAET.ipmibt | Bin 0 -> 40 bytes tests/data/acpi/q35/WAET.ipmibt.dsl | 31 + tests/data/acpi/q35/WAET.memhp | Bin 0 -> 40 bytes tests/data/acpi/q35/WAET.memhp.dsl | 31 + tests/data/acpi/q35/WAET.mmio64 | Bin 0 -> 40 bytes tests/data/acpi/q35/WAET.mmio64.dsl | 31 + tests/data/acpi/q35/WAET.numamem | Bin 0 -> 40 bytes tests/data/acpi/q35/WAET.numamem.dsl | 31 + tests/data/acpi/q35/WAET.tis | Bin 0 -> 40 bytes tests/data/acpi/q35/WAET.tis.dsl | 31 + tests/data/acpi/virt/APIC.dsl | 78 + tests/data/acpi/virt/APIC.memhp.dsl | 78 + tests/data/acpi/virt/APIC.numamem.dsl | 78 + tests/data/acpi/virt/DSDT.dsl | 1906 +++++++++ tests/data/acpi/virt/DSDT.memhp.dsl | 2215 +++++++++++ tests/data/acpi/virt/DSDT.numamem.dsl | 1906 +++++++++ tests/data/acpi/virt/FACP.dsl | 196 + tests/data/acpi/virt/FACP.memhp.dsl | 196 + tests/data/acpi/virt/FACP.numamem.dsl | 196 + tests/data/acpi/virt/GTDT.dsl | 61 + tests/data/acpi/virt/GTDT.memhp.dsl | 61 + tests/data/acpi/virt/GTDT.numamem.dsl | 61 + tests/data/acpi/virt/MCFG.dsl | 36 + tests/data/acpi/virt/MCFG.memhp.dsl | 36 + tests/data/acpi/virt/MCFG.numamem.dsl | 36 + tests/data/acpi/virt/NFIT.dsl | 103 + tests/data/acpi/virt/NFIT.memhp.dsl | 103 + tests/data/acpi/virt/SLIT.dsl | 31 + tests/data/acpi/virt/SLIT.memhp.dsl | 31 + tests/data/acpi/virt/SPCR.dsl | 57 + tests/data/acpi/virt/SPCR.memhp.dsl | 57 + tests/data/acpi/virt/SPCR.numamem.dsl | 57 + tests/data/acpi/virt/SRAT.dsl | 57 + tests/data/acpi/virt/SRAT.memhp.dsl | 107 + tests/data/acpi/virt/SRAT.numamem.dsl | 57 + tests/data/acpi/virt/SSDT.dsl | 205 + .../bios-tables-test.x86_64.iso.raw | Bin 0 -> 425984 bytes tests/libqtest.c.orig | 1106 ++++++ tests/qemu-iotests/core.12067 | Bin 0 -> 22716416 bytes tests/qtest/bios-tables-test-allowed-diff.h | 10 - .../bios-tables-test-allowed-diff.h.orig | 18 + .../qtest/bios-tables-test-allowed-diff.h.rej | 9 + tests/qtest/bios-tables-test.c.orig | 1200 ++++++ tests/qtest/bios-tables-test.c.rej | 22 + tests/test-qapi-event.c | 198 + tests/test-qmp-introspect.c | 58 + tests/test-qmp-marshal.c | 383 ++ tests/vhost-user-bridge | Bin 0 -> 83120 bytes tests/vhost-user-bridge.c.orig | 1432 +++++++ tests/vhost-user-test.c.orig | 364 ++ 303 files changed, 71489 insertions(+), 10 deletions(-) create mode 100644 tests/.vhost-user-test.c.swo create mode 100644 tests/Makefile.include.orig create mode 100644 tests/Makefile.orig create mode 100644 tests/bios-tables-test.c.orig create mode 100644 tests/data/acpi/diff-aml.sh create mode 100644 tests/data/acpi/disassemle-aml.py create mode 100644 tests/data/acpi/microvm/APIC.dsl create mode 100644 tests/data/acpi/microvm/DSDT.dsl create mode 100644 tests/data/acpi/microvm/FACP.dsl create mode 100644 tests/data/acpi/pc/APIC.acpihmat.dsl create mode 100644 tests/data/acpi/pc/APIC.bridge create mode 100644 tests/data/acpi/pc/APIC.bridge.dsl create mode 100644 tests/data/acpi/pc/APIC.cphp.dsl create mode 100644 tests/data/acpi/pc/APIC.dimmpxm.dsl create mode 100644 tests/data/acpi/pc/APIC.dsl create mode 100644 tests/data/acpi/pc/APIC.hpbridge create mode 100644 tests/data/acpi/pc/APIC.ipmikcs create mode 100644 tests/data/acpi/pc/APIC.ipmikcs.dsl create mode 100644 tests/data/acpi/pc/APIC.memhp create mode 100644 tests/data/acpi/pc/APIC.memhp.dsl create mode 100644 tests/data/acpi/pc/APIC.numamem create mode 100644 tests/data/acpi/pc/APIC.numamem.dsl create mode 100644 tests/data/acpi/pc/APIC.roothp create mode 100644 tests/data/acpi/pc/DSDT.acpihmat.dsl create mode 100644 tests/data/acpi/pc/DSDT.bridge.dsl create mode 100644 tests/data/acpi/pc/DSDT.cphp.dsl create mode 100644 tests/data/acpi/pc/DSDT.dimmpxm.dsl create mode 100644 tests/data/acpi/pc/DSDT.dsl create mode 100644 tests/data/acpi/pc/DSDT.ipmikcs.dsl create mode 100644 tests/data/acpi/pc/DSDT.memhp.dsl create mode 100644 tests/data/acpi/pc/DSDT.numamem.dsl create mode 100644 tests/data/acpi/pc/FACP.acpihmat create mode 100644 tests/data/acpi/pc/FACP.acpihmat.dsl create mode 100644 tests/data/acpi/pc/FACP.bridge create mode 100644 tests/data/acpi/pc/FACP.bridge.dsl create mode 100644 tests/data/acpi/pc/FACP.cphp create mode 100644 tests/data/acpi/pc/FACP.cphp.dsl create mode 100644 tests/data/acpi/pc/FACP.dimmpxm create mode 100644 tests/data/acpi/pc/FACP.dimmpxm.dsl create mode 100644 tests/data/acpi/pc/FACP.dsl create mode 100644 tests/data/acpi/pc/FACP.hpbridge create mode 100644 tests/data/acpi/pc/FACP.ipmikcs create mode 100644 tests/data/acpi/pc/FACP.ipmikcs.dsl create mode 100644 tests/data/acpi/pc/FACP.memhp create mode 100644 tests/data/acpi/pc/FACP.memhp.dsl create mode 100644 tests/data/acpi/pc/FACP.numamem create mode 100644 tests/data/acpi/pc/FACP.numamem.dsl create mode 100644 tests/data/acpi/pc/FACP.roothp create mode 100644 tests/data/acpi/pc/FACS.acpihmat create mode 100644 tests/data/acpi/pc/FACS.acpihmat.dsl create mode 100644 tests/data/acpi/pc/FACS.bridge create mode 100644 tests/data/acpi/pc/FACS.bridge.dsl create mode 100644 tests/data/acpi/pc/FACS.cphp create mode 100644 tests/data/acpi/pc/FACS.cphp.dsl create mode 100644 tests/data/acpi/pc/FACS.dimmpxm create mode 100644 tests/data/acpi/pc/FACS.dimmpxm.dsl create mode 100644 tests/data/acpi/pc/FACS.dsl create mode 100644 tests/data/acpi/pc/FACS.hpbridge create mode 100644 tests/data/acpi/pc/FACS.ipmikcs create mode 100644 tests/data/acpi/pc/FACS.ipmikcs.dsl create mode 100644 tests/data/acpi/pc/FACS.memhp create mode 100644 tests/data/acpi/pc/FACS.memhp.dsl create mode 100644 tests/data/acpi/pc/FACS.numamem create mode 100644 tests/data/acpi/pc/FACS.numamem.dsl create mode 100644 tests/data/acpi/pc/FACS.roothp create mode 100644 tests/data/acpi/pc/HMAT.acpihmat.dsl create mode 100644 tests/data/acpi/pc/HMAT.dsl create mode 100644 tests/data/acpi/pc/HPET.acpihmat create mode 100644 tests/data/acpi/pc/HPET.acpihmat.dsl create mode 100644 tests/data/acpi/pc/HPET.bridge create mode 100644 tests/data/acpi/pc/HPET.bridge.dsl create mode 100644 tests/data/acpi/pc/HPET.cphp create mode 100644 tests/data/acpi/pc/HPET.cphp.dsl create mode 100644 tests/data/acpi/pc/HPET.dimmpxm create mode 100644 tests/data/acpi/pc/HPET.dimmpxm.dsl create mode 100644 tests/data/acpi/pc/HPET.dsl create mode 100644 tests/data/acpi/pc/HPET.hpbridge create mode 100644 tests/data/acpi/pc/HPET.ipmikcs create mode 100644 tests/data/acpi/pc/HPET.ipmikcs.dsl create mode 100644 tests/data/acpi/pc/HPET.memhp create mode 100644 tests/data/acpi/pc/HPET.memhp.dsl create mode 100644 tests/data/acpi/pc/HPET.numamem create mode 100644 tests/data/acpi/pc/HPET.numamem.dsl create mode 100644 tests/data/acpi/pc/HPET.roothp create mode 100644 tests/data/acpi/pc/NFIT.dimmpxm.dsl create mode 100644 tests/data/acpi/pc/NFIT.dsl create mode 100644 tests/data/acpi/pc/SLIT.cphp.dsl create mode 100644 tests/data/acpi/pc/SLIT.dsl create mode 100644 tests/data/acpi/pc/SLIT.memhp.dsl create mode 100644 tests/data/acpi/pc/SRAT.acpihmat.dsl create mode 100644 tests/data/acpi/pc/SRAT.cphp.dsl create mode 100644 tests/data/acpi/pc/SRAT.dimmpxm.dsl create mode 100644 tests/data/acpi/pc/SRAT.dsl create mode 100644 tests/data/acpi/pc/SRAT.memhp.dsl create mode 100644 tests/data/acpi/pc/SRAT.numamem.dsl create mode 100644 tests/data/acpi/pc/SSDT.dsl create mode 100644 tests/data/acpi/pc/WAET.acpihmat create mode 100644 tests/data/acpi/pc/WAET.acpihmat.dsl create mode 100644 tests/data/acpi/pc/WAET.bridge create mode 100644 tests/data/acpi/pc/WAET.bridge.dsl create mode 100644 tests/data/acpi/pc/WAET.cphp create mode 100644 tests/data/acpi/pc/WAET.cphp.dsl create mode 100644 tests/data/acpi/pc/WAET.dimmpxm create mode 100644 tests/data/acpi/pc/WAET.dimmpxm.dsl create mode 100644 tests/data/acpi/pc/WAET.dsl create mode 100644 tests/data/acpi/pc/WAET.hpbridge create mode 100644 tests/data/acpi/pc/WAET.ipmikcs create mode 100644 tests/data/acpi/pc/WAET.ipmikcs.dsl create mode 100644 tests/data/acpi/pc/WAET.memhp create mode 100644 tests/data/acpi/pc/WAET.memhp.dsl create mode 100644 tests/data/acpi/pc/WAET.numamem create mode 100644 tests/data/acpi/pc/WAET.numamem.dsl create mode 100644 tests/data/acpi/pc/WAET.roothp create mode 100644 tests/data/acpi/q35/APIC.acpihmat.dsl create mode 100644 tests/data/acpi/q35/APIC.bridge create mode 100644 tests/data/acpi/q35/APIC.bridge.dsl create mode 100644 tests/data/acpi/q35/APIC.cphp.dsl create mode 100644 tests/data/acpi/q35/APIC.dimmpxm.dsl create mode 100644 tests/data/acpi/q35/APIC.dsl create mode 100644 tests/data/acpi/q35/APIC.ipmibt create mode 100644 tests/data/acpi/q35/APIC.ipmibt.dsl create mode 100644 tests/data/acpi/q35/APIC.memhp create mode 100644 tests/data/acpi/q35/APIC.memhp.dsl create mode 100644 tests/data/acpi/q35/APIC.mmio64 create mode 100644 tests/data/acpi/q35/APIC.mmio64.dsl create mode 100644 tests/data/acpi/q35/APIC.numamem create mode 100644 tests/data/acpi/q35/APIC.numamem.dsl create mode 100644 tests/data/acpi/q35/APIC.tis create mode 100644 tests/data/acpi/q35/APIC.tis.dsl create mode 100644 tests/data/acpi/q35/DSDT.acpihmat.dsl create mode 100644 tests/data/acpi/q35/DSDT.bridge.dsl create mode 100644 tests/data/acpi/q35/DSDT.cphp.dsl create mode 100644 tests/data/acpi/q35/DSDT.dimmpxm.dsl create mode 100644 tests/data/acpi/q35/DSDT.dsl create mode 100644 tests/data/acpi/q35/DSDT.ipmibt.dsl create mode 100644 tests/data/acpi/q35/DSDT.memhp.dsl create mode 100644 tests/data/acpi/q35/DSDT.mmio64.dsl create mode 100644 tests/data/acpi/q35/DSDT.numamem.dsl create mode 100644 tests/data/acpi/q35/DSDT.tis.dsl create mode 100644 tests/data/acpi/q35/FACP.acpihmat create mode 100644 tests/data/acpi/q35/FACP.acpihmat.dsl create mode 100644 tests/data/acpi/q35/FACP.bridge create mode 100644 tests/data/acpi/q35/FACP.bridge.dsl create mode 100644 tests/data/acpi/q35/FACP.cphp create mode 100644 tests/data/acpi/q35/FACP.cphp.dsl create mode 100644 tests/data/acpi/q35/FACP.dimmpxm create mode 100644 tests/data/acpi/q35/FACP.dimmpxm.dsl create mode 100644 tests/data/acpi/q35/FACP.dsl create mode 100644 tests/data/acpi/q35/FACP.ipmibt create mode 100644 tests/data/acpi/q35/FACP.ipmibt.dsl create mode 100644 tests/data/acpi/q35/FACP.memhp create mode 100644 tests/data/acpi/q35/FACP.memhp.dsl create mode 100644 tests/data/acpi/q35/FACP.mmio64 create mode 100644 tests/data/acpi/q35/FACP.mmio64.dsl create mode 100644 tests/data/acpi/q35/FACP.numamem create mode 100644 tests/data/acpi/q35/FACP.numamem.dsl create mode 100644 tests/data/acpi/q35/FACP.tis create mode 100644 tests/data/acpi/q35/FACP.tis.dsl create mode 100644 tests/data/acpi/q35/FACS.acpihmat create mode 100644 tests/data/acpi/q35/FACS.acpihmat.dsl create mode 100644 tests/data/acpi/q35/FACS.bridge create mode 100644 tests/data/acpi/q35/FACS.bridge.dsl create mode 100644 tests/data/acpi/q35/FACS.cphp create mode 100644 tests/data/acpi/q35/FACS.cphp.dsl create mode 100644 tests/data/acpi/q35/FACS.dimmpxm create mode 100644 tests/data/acpi/q35/FACS.dimmpxm.dsl create mode 100644 tests/data/acpi/q35/FACS.dsl create mode 100644 tests/data/acpi/q35/FACS.ipmibt create mode 100644 tests/data/acpi/q35/FACS.ipmibt.dsl create mode 100644 tests/data/acpi/q35/FACS.memhp create mode 100644 tests/data/acpi/q35/FACS.memhp.dsl create mode 100644 tests/data/acpi/q35/FACS.mmio64 create mode 100644 tests/data/acpi/q35/FACS.mmio64.dsl create mode 100644 tests/data/acpi/q35/FACS.numamem create mode 100644 tests/data/acpi/q35/FACS.numamem.dsl create mode 100644 tests/data/acpi/q35/FACS.tis create mode 100644 tests/data/acpi/q35/FACS.tis.dsl create mode 100644 tests/data/acpi/q35/HMAT.acpihmat.dsl create mode 100644 tests/data/acpi/q35/HMAT.dsl create mode 100644 tests/data/acpi/q35/HPET.acpihmat create mode 100644 tests/data/acpi/q35/HPET.acpihmat.dsl create mode 100644 tests/data/acpi/q35/HPET.bridge create mode 100644 tests/data/acpi/q35/HPET.bridge.dsl create mode 100644 tests/data/acpi/q35/HPET.cphp create mode 100644 tests/data/acpi/q35/HPET.cphp.dsl create mode 100644 tests/data/acpi/q35/HPET.dimmpxm create mode 100644 tests/data/acpi/q35/HPET.dimmpxm.dsl create mode 100644 tests/data/acpi/q35/HPET.dsl create mode 100644 tests/data/acpi/q35/HPET.ipmibt create mode 100644 tests/data/acpi/q35/HPET.ipmibt.dsl create mode 100644 tests/data/acpi/q35/HPET.memhp create mode 100644 tests/data/acpi/q35/HPET.memhp.dsl create mode 100644 tests/data/acpi/q35/HPET.mmio64 create mode 100644 tests/data/acpi/q35/HPET.mmio64.dsl create mode 100644 tests/data/acpi/q35/HPET.numamem create mode 100644 tests/data/acpi/q35/HPET.numamem.dsl create mode 100644 tests/data/acpi/q35/HPET.tis create mode 100644 tests/data/acpi/q35/HPET.tis.dsl create mode 100644 tests/data/acpi/q35/MCFG.acpihmat create mode 100644 tests/data/acpi/q35/MCFG.acpihmat.dsl create mode 100644 tests/data/acpi/q35/MCFG.bridge create mode 100644 tests/data/acpi/q35/MCFG.bridge.dsl create mode 100644 tests/data/acpi/q35/MCFG.cphp create mode 100644 tests/data/acpi/q35/MCFG.cphp.dsl create mode 100644 tests/data/acpi/q35/MCFG.dimmpxm create mode 100644 tests/data/acpi/q35/MCFG.dimmpxm.dsl create mode 100644 tests/data/acpi/q35/MCFG.dsl create mode 100644 tests/data/acpi/q35/MCFG.ipmibt create mode 100644 tests/data/acpi/q35/MCFG.ipmibt.dsl create mode 100644 tests/data/acpi/q35/MCFG.memhp create mode 100644 tests/data/acpi/q35/MCFG.memhp.dsl create mode 100644 tests/data/acpi/q35/MCFG.mmio64 create mode 100644 tests/data/acpi/q35/MCFG.mmio64.dsl create mode 100644 tests/data/acpi/q35/MCFG.numamem create mode 100644 tests/data/acpi/q35/MCFG.numamem.dsl create mode 100644 tests/data/acpi/q35/MCFG.tis create mode 100644 tests/data/acpi/q35/MCFG.tis.dsl create mode 100644 tests/data/acpi/q35/NFIT.dimmpxm.dsl create mode 100644 tests/data/acpi/q35/NFIT.dsl create mode 100644 tests/data/acpi/q35/SLIT.cphp.dsl create mode 100644 tests/data/acpi/q35/SLIT.dsl create mode 100644 tests/data/acpi/q35/SLIT.memhp.dsl create mode 100644 tests/data/acpi/q35/SRAT.acpihmat.dsl create mode 100644 tests/data/acpi/q35/SRAT.cphp.dsl create mode 100644 tests/data/acpi/q35/SRAT.dimmpxm.dsl create mode 100644 tests/data/acpi/q35/SRAT.dsl create mode 100644 tests/data/acpi/q35/SRAT.memhp.dsl create mode 100644 tests/data/acpi/q35/SRAT.mmio64.dsl create mode 100644 tests/data/acpi/q35/SRAT.numamem.dsl create mode 100644 tests/data/acpi/q35/SSDT.dsl create mode 100644 tests/data/acpi/q35/TPM2.dsl create mode 100644 tests/data/acpi/q35/TPM2.tis.dsl create mode 100644 tests/data/acpi/q35/WAET.acpihmat create mode 100644 tests/data/acpi/q35/WAET.acpihmat.dsl create mode 100644 tests/data/acpi/q35/WAET.bridge create mode 100644 tests/data/acpi/q35/WAET.bridge.dsl create mode 100644 tests/data/acpi/q35/WAET.cphp create mode 100644 tests/data/acpi/q35/WAET.cphp.dsl create mode 100644 tests/data/acpi/q35/WAET.dimmpxm create mode 100644 tests/data/acpi/q35/WAET.dimmpxm.dsl create mode 100644 tests/data/acpi/q35/WAET.dsl create mode 100644 tests/data/acpi/q35/WAET.ipmibt create mode 100644 tests/data/acpi/q35/WAET.ipmibt.dsl create mode 100644 tests/data/acpi/q35/WAET.memhp create mode 100644 tests/data/acpi/q35/WAET.memhp.dsl create mode 100644 tests/data/acpi/q35/WAET.mmio64 create mode 100644 tests/data/acpi/q35/WAET.mmio64.dsl create mode 100644 tests/data/acpi/q35/WAET.numamem create mode 100644 tests/data/acpi/q35/WAET.numamem.dsl create mode 100644 tests/data/acpi/q35/WAET.tis create mode 100644 tests/data/acpi/q35/WAET.tis.dsl create mode 100644 tests/data/acpi/virt/APIC.dsl create mode 100644 tests/data/acpi/virt/APIC.memhp.dsl create mode 100644 tests/data/acpi/virt/APIC.numamem.dsl create mode 100644 tests/data/acpi/virt/DSDT.dsl create mode 100644 tests/data/acpi/virt/DSDT.memhp.dsl create mode 100644 tests/data/acpi/virt/DSDT.numamem.dsl create mode 100644 tests/data/acpi/virt/FACP.dsl create mode 100644 tests/data/acpi/virt/FACP.memhp.dsl create mode 100644 tests/data/acpi/virt/FACP.numamem.dsl create mode 100644 tests/data/acpi/virt/GTDT.dsl create mode 100644 tests/data/acpi/virt/GTDT.memhp.dsl create mode 100644 tests/data/acpi/virt/GTDT.numamem.dsl create mode 100644 tests/data/acpi/virt/MCFG.dsl create mode 100644 tests/data/acpi/virt/MCFG.memhp.dsl create mode 100644 tests/data/acpi/virt/MCFG.numamem.dsl create mode 100644 tests/data/acpi/virt/NFIT.dsl create mode 100644 tests/data/acpi/virt/NFIT.memhp.dsl create mode 100644 tests/data/acpi/virt/SLIT.dsl create mode 100644 tests/data/acpi/virt/SLIT.memhp.dsl create mode 100644 tests/data/acpi/virt/SPCR.dsl create mode 100644 tests/data/acpi/virt/SPCR.memhp.dsl create mode 100644 tests/data/acpi/virt/SPCR.numamem.dsl create mode 100644 tests/data/acpi/virt/SRAT.dsl create mode 100644 tests/data/acpi/virt/SRAT.memhp.dsl create mode 100644 tests/data/acpi/virt/SRAT.numamem.dsl create mode 100644 tests/data/acpi/virt/SSDT.dsl create mode 100644 tests/data/uefi-boot-images/bios-tables-test.x86_64.iso.raw create mode 100644 tests/libqtest.c.orig create mode 100644 tests/qemu-iotests/core.12067 create mode 100644 tests/qtest/bios-tables-test-allowed-diff.h.orig create mode 100644 tests/qtest/bios-tables-test-allowed-diff.h.rej create mode 100644 tests/qtest/bios-tables-test.c.orig create mode 100644 tests/qtest/bios-tables-test.c.rej create mode 100644 tests/test-qapi-event.c create mode 100644 tests/test-qmp-introspect.c create mode 100644 tests/test-qmp-marshal.c create mode 100755 tests/vhost-user-bridge create mode 100644 tests/vhost-user-bridge.c.orig create mode 100644 tests/vhost-user-test.c.orig diff --git a/tests/.vhost-user-test.c.swo b/tests/.vhost-user-test.c.swo new file mode 100644 index 0000000000000000000000000000000000000000..5545d2bef350c4c4197c70c9789465cfee8f84ce GIT binary patch literal 16384 zcmYc?2=nw+FxN9-U|?VnU|_JVniYPZA%elxkAWe#xCA6h5SNrDXX_QEreq|R=q2ap z;#99+oSds)n3`LvUy@o}QmkK=kzZV*TUwl2qze+zOU9{lRAMv)Mniz|5a4AnHZn8- znWLjZg_F#qb9z-v^cFgE|N%&kPk$ zg3@!)&Epuo?-Aj{9dAj!|bAOY6M z!0?}sf#D?|1H%PA28JDc3=H%57#Ldl7#Onn7#K477#ITh7#OVi7#OVh7#M{47#KeC zGBB*+Wnfs!%fPUNmw};~mw_Rjmw_RHmw_Rkmw~~Mmx19C4+Fzo9tMUa9tH+69tMW( z+zbrcxEUCVxfvMjxEUC1xfvKlxEUCPxfvJ^b1^U+;$mQ!&Beeli;IDwfQx~_jf;W7 zm5YHvor{4%jf;VSjf;WdEhhuR8BPX<)tn3ry_^gTxtt6P-kb~!TAU0F+?)&yFF6<( zj&U$BEaG5bsN-N@h~i*iFymlg5awWDc)`xVu$P^IVLCelLkl|tLjgMjLq0nLg9keU zgBCjjg8(}N!)G=IhMQ~*3h%)sz~nStRVGXuj`W(I~W%nS@I%nS^{%nS_5%nS@) znHU(pFflM}Vq##}$i%?V!oBX7~G1wdkvm42a;E2WQ)*#mapGcV1AU&Y;Y-3}D-K~&hk5H~*P+<&BjPTeAf}{!s zXzH+LD5)$+O-W5tfW`t`At;ShgHi%q#0M6sAcup4I5#)3AU;1WtvIy=5&@_(pyZ9) z0#G_ZwE&VnASS_Wg$M?vrh@{z2uu}6Lo&OstFM0$D0m{`{eoQGJ^lTHVOba2^5rUQLAx~zXKfIT@?%}3=Iqnu-D1(gcuJ} z9_-=k=AvMTtq^y^k`j$E48>BKfO4b-0|RoCMZqn|-&Y}{T)!-{s3bEVX^E*`vI0>p z8>AM7N2t4Nh>w$7aJ;XhyQeeAIt2vfspX8t?1x=O5zl z=jj|D;_2(kpq!be;O^t;6z}Ze>g)|`9%~rsC>UAjC>UsB7~&4r7attp=ocUC>g@05 zf*L>??(y!Pej#Qi@y`B!!6A-*AsV1;YG7cXsR_1C5r=hVVC(d?z|MiU$CLAO3ld8* zlQMHMODYw>tszhwi9tCtFFB_)B~`(uxUyKkEUj2C!wyL>Co`|K0+Ini5(pWk;>u#s zB5(+$m!X6y1xgsG65wUykaSXvMW!e*FFh5Dcz!`iW_}*3L{4T>A$Yxc1}J`Do=^hY zkYAjVS^!ec0P>=O7K4J8LU3v-xVh-;9}wy3=dJ)s848(sV6l??0^OX{veX=fl+2>k zAU^}c z2|fmf$$Sh9*?bHPUVID;7JLj0W_%0``g{xwdVCBFe0&THJbVlcpLiJ-fngap1H(*i28L#C28LR028J4L28J+h z1_m>31_o1Z1_mB(28MH73=Gq_7#OBP#|!eg7#IS$7#OU$7#J+M7#Lo0GB9l9WMJsz zWMBy5WMEL{WMFv4!N72zgMr~5be!NQ2LrG6rh z#i>Ol@yWRbnRz7|MX4n^3bwYOCJdxY4bg|%Gy?NVatqRmbwEQZsYONkMH;C^MS1z4 zfiYFS9rU+=j_W%_#sk zXFw(?B<7_kq+}KsB$gy+C_pV$D9$e}N=_{XwWYvu1`gKZ)S|M~qWH9;)Km=!8)~(_ zmO^q)YGPh#0bBzj4#7<}h>MD$>OtXM4Du4#Y)D8$qpqklPXiRv(B?NNz##@CrliED zmF6XDC_$R0;D(TXQEGC2US4W)iINVu!4wY{fLaAI011Qr0ap`WT$)r+l%Jeh409P# zcIhLuDd~XP<)CpsXMaC8Pxp8a$KZHyBRx3ODImz-*)=#gKEyRRBpB>fe8%TyrWYla zq{2J`s@+gIl_w&XbM;B!YAlKye%omWa@N5C^*s~u?T89 z$0z5eKy4{juvLKAR9uo+RHA_-4RL;IZYfB)f~^8*#0S=sLL>&TDoCnSum$BtNMg-P zEe9uK9R-LS*!`f)prZgvu29?cwG@g?oK?_*Bs~;u;I3hCNn%N=f)*&Zf;?r-P|X0c7L@QcKn#etA!chO7NwUV zMj{~54$b|b$`Bg7&|oVmN-TiY&IO=aIt5f1gS>*Q08#vDfQ-;lFhJDZAhozLq;N@3 zEs0MoO3u)LRo&?jw}K1%)F8`4JCb58H%#!%D{Gxc! zR9bO7xQI+m(J0nYFoNoVt4K>J)_`T-^!Ut_9PliK2HZXI$w@j2Fa^cBc3=|~Y!wV3 Zjw;r*OG_z^2aV~%#XzMatg-`@c>oXbv339e literal 0 HcmV?d00001 diff --git a/tests/Makefile.include.orig b/tests/Makefile.include.orig new file mode 100644 index 0000000000..ba82235bd4 --- /dev/null +++ b/tests/Makefile.include.orig @@ -0,0 +1,1012 @@ + +.PHONY: check-help +check-help: + @echo "Regression testing targets:" + @echo + @echo " $(MAKE) check Run all tests" + @echo " $(MAKE) check-qtest-TARGET Run qtest tests for given target" + @echo " $(MAKE) check-qtest Run qtest tests" + @echo " $(MAKE) check-unit Run qobject tests" + @echo " $(MAKE) check-speed Run qobject speed tests" + @echo " $(MAKE) check-qapi-schema Run QAPI schema tests" + @echo " $(MAKE) check-block Run block tests" + @echo " $(MAKE) check-tcg Run TCG tests" + @echo " $(MAKE) check-acceptance Run all acceptance (functional) tests" + @echo " $(MAKE) check-report.html Generates an HTML test report" + @echo " $(MAKE) check-venv Creates a Python venv for tests" + @echo " $(MAKE) check-clean Clean the tests" + @echo + @echo "Please note that HTML reports do not regenerate if the unit tests" + @echo "has not changed." + @echo + @echo "The variable SPEED can be set to control the gtester speed setting." + @echo "Default options are -k and (for $(MAKE) V=1) --verbose; they can be" + @echo "changed with variable GTESTER_OPTIONS." + +ifneq ($(wildcard config-host.mak),) +export SRC_PATH + +# TODO don't duplicate $(SRC_PATH)/Makefile's qapi-py here +qapi-py = $(SRC_PATH)/scripts/qapi/commands.py \ +$(SRC_PATH)/scripts/qapi/events.py \ +$(SRC_PATH)/scripts/qapi/introspect.py \ +$(SRC_PATH)/scripts/qapi/types.py \ +$(SRC_PATH)/scripts/qapi/visit.py \ +$(SRC_PATH)/scripts/qapi/common.py \ +$(SRC_PATH)/scripts/qapi/doc.py \ +$(SRC_PATH)/scripts/qapi-gen.py + +# Get the list of all supported sysemu targets +SYSEMU_TARGET_LIST := $(subst -softmmu.mak,,$(notdir \ + $(wildcard $(SRC_PATH)/default-configs/*-softmmu.mak))) + +check-unit-y += tests/check-qdict$(EXESUF) +check-unit-y += tests/check-block-qdict$(EXESUF) +check-unit-y += tests/test-char$(EXESUF) +check-unit-y += tests/check-qnum$(EXESUF) +check-unit-y += tests/check-qstring$(EXESUF) +check-unit-y += tests/check-qlist$(EXESUF) +check-unit-y += tests/check-qnull$(EXESUF) +check-unit-y += tests/check-qobject$(EXESUF) +check-unit-y += tests/check-qjson$(EXESUF) +check-unit-y += tests/check-qlit$(EXESUF) +check-unit-y += tests/test-qobject-output-visitor$(EXESUF) +check-unit-y += tests/test-clone-visitor$(EXESUF) +check-unit-y += tests/test-qobject-input-visitor$(EXESUF) +check-unit-y += tests/test-qmp-cmds$(EXESUF) +check-unit-y += tests/test-string-input-visitor$(EXESUF) +check-unit-y += tests/test-string-output-visitor$(EXESUF) +check-unit-y += tests/test-qmp-event$(EXESUF) +check-unit-y += tests/test-opts-visitor$(EXESUF) +check-unit-y += tests/test-coroutine$(EXESUF) +check-unit-y += tests/test-visitor-serialization$(EXESUF) +check-unit-y += tests/test-iov$(EXESUF) +check-unit-y += tests/test-aio$(EXESUF) +check-unit-y += tests/test-aio-multithread$(EXESUF) +check-unit-y += tests/test-throttle$(EXESUF) +check-unit-y += tests/test-thread-pool$(EXESUF) +check-unit-y += tests/test-hbitmap$(EXESUF) +check-unit-y += tests/test-bdrv-drain$(EXESUF) +check-unit-y += tests/test-blockjob$(EXESUF) +check-unit-y += tests/test-blockjob-txn$(EXESUF) +check-unit-y += tests/test-block-backend$(EXESUF) +check-unit-y += tests/test-image-locking$(EXESUF) +check-unit-y += tests/test-x86-cpuid$(EXESUF) +# all code tested by test-x86-cpuid is inside topology.h +ifeq ($(CONFIG_SOFTMMU),y) +check-unit-y += tests/test-xbzrle$(EXESUF) +check-unit-$(CONFIG_POSIX) += tests/test-vmstate$(EXESUF) +endif +check-unit-y += tests/test-cutils$(EXESUF) +check-unit-y += tests/test-shift128$(EXESUF) +check-unit-y += tests/test-mul64$(EXESUF) +check-unit-y += tests/test-int128$(EXESUF) +# all code tested by test-int128 is inside int128.h +check-unit-y += tests/rcutorture$(EXESUF) +check-unit-y += tests/test-rcu-list$(EXESUF) +check-unit-y += tests/test-rcu-simpleq$(EXESUF) +check-unit-y += tests/test-rcu-tailq$(EXESUF) +check-unit-y += tests/test-qdist$(EXESUF) +check-unit-y += tests/test-qht$(EXESUF) +# FIXME: {test-qht-par + gprof} often break on Travis CI +check-unit-$(call lnot,$(CONFIG_GPROF)) += tests/test-qht-par$(EXESUF) +check-unit-y += tests/test-bitops$(EXESUF) +check-unit-y += tests/test-bitcnt$(EXESUF) +check-unit-y += tests/test-qdev-global-props$(EXESUF) +check-unit-y += tests/check-qom-interface$(EXESUF) +check-unit-y += tests/check-qom-proplist$(EXESUF) +check-unit-y += tests/test-qemu-opts$(EXESUF) +check-unit-y += tests/test-keyval$(EXESUF) +check-unit-y += tests/test-write-threshold$(EXESUF) +check-unit-y += tests/test-crypto-hash$(EXESUF) +check-speed-y += tests/benchmark-crypto-hash$(EXESUF) +check-unit-y += tests/test-crypto-hmac$(EXESUF) +check-speed-y += tests/benchmark-crypto-hmac$(EXESUF) +check-unit-y += tests/test-crypto-cipher$(EXESUF) +check-speed-y += tests/benchmark-crypto-cipher$(EXESUF) +check-unit-y += tests/test-crypto-secret$(EXESUF) +check-unit-$(CONFIG_GNUTLS) += tests/test-crypto-tlscredsx509$(EXESUF) +check-unit-$(CONFIG_GNUTLS) += tests/test-crypto-tlssession$(EXESUF) +ifneq (,$(findstring qemu-ga,$(TOOLS))) +check-unit-$(CONFIG_LINUX) += tests/test-qga$(EXESUF) +endif +check-unit-y += tests/test-timed-average$(EXESUF) +check-unit-y += tests/test-util-sockets$(EXESUF) +check-unit-y += tests/test-io-task$(EXESUF) +check-unit-y += tests/test-io-channel-socket$(EXESUF) +check-unit-y += tests/test-io-channel-file$(EXESUF) +check-unit-$(CONFIG_GNUTLS) += tests/test-io-channel-tls$(EXESUF) +check-unit-y += tests/test-io-channel-command$(EXESUF) +check-unit-y += tests/test-io-channel-buffer$(EXESUF) +check-unit-y += tests/test-base64$(EXESUF) +check-unit-$(if $(CONFIG_NETTLE),y,$(CONFIG_GCRYPT)) += tests/test-crypto-pbkdf$(EXESUF) +check-unit-y += tests/test-crypto-ivgen$(EXESUF) +check-unit-y += tests/test-crypto-afsplit$(EXESUF) +check-unit-y += tests/test-crypto-xts$(EXESUF) +check-unit-y += tests/test-crypto-block$(EXESUF) +check-unit-y += tests/test-logging$(EXESUF) +check-unit-$(CONFIG_REPLICATION) += tests/test-replication$(EXESUF) +check-unit-y += tests/test-bufferiszero$(EXESUF) +check-unit-y += tests/test-uuid$(EXESUF) +check-unit-y += tests/ptimer-test$(EXESUF) +check-unit-y += tests/test-qapi-util$(EXESUF) + +check-block-$(CONFIG_POSIX) += tests/qemu-iotests-quick.sh + +# All QTests for now are POSIX-only, but the dependencies are +# really in libqtest, not in the testcases themselves. + +check-qtest-generic-y += tests/qmp-test$(EXESUF) +check-qtest-generic-y += tests/qmp-cmd-test$(EXESUF) + +check-qtest-generic-y += tests/device-introspect-test$(EXESUF) +check-qtest-generic-y += tests/cdrom-test$(EXESUF) + +check-qtest-ipack-y += tests/ipoctal232-test$(EXESUF) + +check-qtest-virtioserial-y += tests/virtio-console-test$(EXESUF) + +check-qtest-virtio-y += tests/virtio-net-test$(EXESUF) +check-qtest-virtio-$(CONFIG_VIRTIO_BALLOON) += tests/virtio-balloon-test$(EXESUF) +check-qtest-virtio-y += tests/virtio-blk-test$(EXESUF) +check-qtest-virtio-$(CONFIG_VIRTIO_RNG) += tests/virtio-rng-test$(EXESUF) +check-qtest-virtio-$(CONFIG_VIRTIO_SCSI) += tests/virtio-scsi-test$(EXESUF) +ifeq ($(CONFIG_VIRTIO)$(CONFIG_VIRTFS)$(CONFIG_PCI),yyy) +check-qtest-virtio-$(CONFIG_VIRTIO_9P) += tests/virtio-9p-test$(EXESUF) +endif +check-qtest-virtio-y += tests/virtio-serial-test$(EXESUF) +check-qtest-virtio-y += $(check-qtest-virtioserial-y) + +check-qtest-pci-y += tests/e1000-test$(EXESUF) +check-qtest-pci-y += tests/e1000e-test$(EXESUF) +check-qtest-pci-$(CONFIG_RTL8139_PCI) += tests/rtl8139-test$(EXESUF) +check-qtest-pci-$(CONFIG_PCNET_PCI) += tests/pcnet-test$(EXESUF) +check-qtest-pci-$(CONFIG_EEPRO100_PCI) += tests/eepro100-test$(EXESUF) +check-qtest-pci-$(CONFIG_NE2000_PCI) += tests/ne2000-test$(EXESUF) +check-qtest-pci-$(CONFIG_NVME_PCI) += tests/nvme-test$(EXESUF) +check-qtest-pci-$(CONFIG_AC97) += tests/ac97-test$(EXESUF) +check-qtest-pci-$(CONFIG_ES1370) += tests/es1370-test$(EXESUF) +check-qtest-pci-y += $(check-qtest-virtio-y) +check-qtest-pci-$(CONFIG_IPACK) += tests/tpci200-test$(EXESUF) +check-qtest-pci-$(CONFIG_IPACK) += $(check-qtest-ipack-y) +check-qtest-pci-y += tests/display-vga-test$(EXESUF) +check-qtest-pci-$(CONFIG_HDA) += tests/intel-hda-test$(EXESUF) +check-qtest-pci-$(CONFIG_IVSHMEM_DEVICE) += tests/ivshmem-test$(EXESUF) +check-qtest-pci-y += tests/megasas-test$(EXESUF) + +check-qtest-i386-$(CONFIG_ISA_TESTDEV) = tests/endianness-test$(EXESUF) +check-qtest-i386-y += tests/fdc-test$(EXESUF) +check-qtest-i386-y += tests/ide-test$(EXESUF) +check-qtest-i386-y += tests/ahci-test$(EXESUF) +check-qtest-i386-y += tests/hd-geo-test$(EXESUF) +check-qtest-i386-y += tests/boot-order-test$(EXESUF) +check-qtest-i386-y += tests/bios-tables-test$(EXESUF) +check-qtest-i386-$(CONFIG_SGA) += tests/boot-serial-test$(EXESUF) +check-qtest-i386-$(CONFIG_SLIRP) += tests/pxe-test$(EXESUF) +check-qtest-i386-y += tests/rtc-test$(EXESUF) +check-qtest-i386-y += tests/ipmi-kcs-test$(EXESUF) +check-qtest-i386-y += tests/ipmi-bt-test$(EXESUF) +check-qtest-i386-y += tests/i440fx-test$(EXESUF) +check-qtest-i386-y += tests/fw_cfg-test$(EXESUF) +check-qtest-i386-y += tests/drive_del-test$(EXESUF) +check-qtest-i386-$(CONFIG_WDT_IB700) += tests/wdt_ib700-test$(EXESUF) +check-qtest-i386-y += tests/tco-test$(EXESUF) +check-qtest-i386-y += $(check-qtest-pci-y) +check-qtest-i386-$(CONFIG_VMXNET3_PCI) += tests/vmxnet3-test$(EXESUF) +check-qtest-i386-$(CONFIG_PVPANIC) += tests/pvpanic-test$(EXESUF) +check-qtest-i386-$(CONFIG_I82801B11) += tests/i82801b11-test$(EXESUF) +check-qtest-i386-$(CONFIG_IOH3420) += tests/ioh3420-test$(EXESUF) +check-qtest-i386-$(CONFIG_USB_OHCI) += tests/usb-hcd-ohci-test$(EXESUF) +check-qtest-i386-$(CONFIG_USB_UHCI) += tests/usb-hcd-uhci-test$(EXESUF) +ifeq ($(CONFIG_USB_ECHI)$(CONFIG_USB_UHCI),yy) +check-qtest-i386-y += tests/usb-hcd-ehci-test$(EXESUF) +endif +check-qtest-i386-$(CONFIG_USB_XHCI_NEC) += tests/usb-hcd-xhci-test$(EXESUF) +check-qtest-i386-y += tests/cpu-plug-test$(EXESUF) +check-qtest-i386-y += tests/q35-test$(EXESUF) +check-qtest-i386-y += tests/vmgenid-test$(EXESUF) +check-qtest-i386-$(CONFIG_VHOST_USER_NET_TEST_i386) += tests/vhost-user-test$(EXESUF) +ifeq ($(CONFIG_VHOST_USER_NET_TEST_i386),) +check-qtest-x86_64-$(CONFIG_VHOST_USER_NET_TEST_x86_64) += tests/vhost-user-test$(EXESUF) +endif +check-qtest-i386-$(CONFIG_TPM_CRB) += tests/tpm-crb-swtpm-test$(EXESUF) +check-qtest-i386-$(CONFIG_TPM_CRB) += tests/tpm-crb-test$(EXESUF) +check-qtest-i386-$(CONFIG_TPM_TIS) += tests/tpm-tis-swtpm-test$(EXESUF) +check-qtest-i386-$(CONFIG_TPM_TIS) += tests/tpm-tis-test$(EXESUF) +check-qtest-i386-$(CONFIG_SLIRP) += tests/test-netfilter$(EXESUF) +check-qtest-i386-$(CONFIG_POSIX) += tests/test-filter-mirror$(EXESUF) +check-qtest-i386-$(CONFIG_RTL8139_PCI) += tests/test-filter-redirector$(EXESUF) +check-qtest-i386-y += tests/migration-test$(EXESUF) +check-qtest-i386-y += tests/test-x86-cpuid-compat$(EXESUF) +check-qtest-i386-y += tests/numa-test$(EXESUF) +check-qtest-x86_64-y += $(check-qtest-i386-y) +check-qtest-x86_64-$(CONFIG_SDHCI) += tests/sdhci-test$(EXESUF) + +check-qtest-alpha-y += tests/boot-serial-test$(EXESUF) +check-qtest-alpha-$(CONFIG_VGA) += tests/display-vga-test$(EXESUF) + +check-qtest-hppa-y += tests/boot-serial-test$(EXESUF) +check-qtest-hppa-$(CONFIG_VGA) += tests/display-vga-test$(EXESUF) + +check-qtest-m68k-y = tests/boot-serial-test$(EXESUF) + +check-qtest-microblaze-y += tests/boot-serial-test$(EXESUF) + +check-qtest-mips-$(CONFIG_ISA_TESTDEV) = tests/endianness-test$(EXESUF) +check-qtest-mips-$(CONFIG_VGA) += tests/display-vga-test$(EXESUF) + +check-qtest-mips64-$(CONFIG_ISA_TESTDEV) = tests/endianness-test$(EXESUF) +check-qtest-mips64-$(CONFIG_VGA) += tests/display-vga-test$(EXESUF) + +check-qtest-mips64el-$(CONFIG_ISA_TESTDEV) = tests/endianness-test$(EXESUF) +check-qtest-mips64el-$(CONFIG_VGA) += tests/display-vga-test$(EXESUF) + +check-qtest-moxie-y += tests/boot-serial-test$(EXESUF) + +check-qtest-ppc-$(CONFIG_ISA_TESTDEV) = tests/endianness-test$(EXESUF) +check-qtest-ppc-y += tests/boot-order-test$(EXESUF) +check-qtest-ppc-y += tests/prom-env-test$(EXESUF) +check-qtest-ppc-y += tests/drive_del-test$(EXESUF) +check-qtest-ppc-y += tests/boot-serial-test$(EXESUF) +check-qtest-ppc-y += tests/m48t59-test$(EXESUF) + +check-qtest-ppc64-y += $(check-qtest-ppc-y) +check-qtest-ppc64-y += tests/spapr-phb-test$(EXESUF) +check-qtest-ppc64-y += tests/pnv-xscom-test$(EXESUF) +check-qtest-ppc64-y += tests/migration-test$(EXESUF) +check-qtest-ppc64-y += tests/rtas-test$(EXESUF) +check-qtest-ppc64-$(CONFIG_SLIRP) += tests/pxe-test$(EXESUF) +check-qtest-ppc64-$(CONFIG_USB_OHCI) += tests/usb-hcd-ohci-test$(EXESUF) +check-qtest-ppc64-$(CONFIG_USB_UHCI) += tests/usb-hcd-uhci-test$(EXESUF) +check-qtest-ppc64-$(CONFIG_USB_XHCI_NEC) += tests/usb-hcd-xhci-test$(EXESUF) +check-qtest-ppc64-y += $(check-qtest-virtio-y) +check-qtest-ppc64-$(CONFIG_SLIRP) += tests/test-netfilter$(EXESUF) +check-qtest-ppc64-$(CONFIG_POSIX) += tests/test-filter-mirror$(EXESUF) +check-qtest-ppc64-$(CONFIG_RTL8139_PCI) += tests/test-filter-redirector$(EXESUF) +check-qtest-ppc64-y += tests/display-vga-test$(EXESUF) +check-qtest-ppc64-y += tests/numa-test$(EXESUF) +check-qtest-ppc64-$(CONFIG_IVSHMEM_DEVICE) += tests/ivshmem-test$(EXESUF) +check-qtest-ppc64-y += tests/cpu-plug-test$(EXESUF) + +check-qtest-sh4-$(CONFIG_ISA_TESTDEV) = tests/endianness-test$(EXESUF) + +check-qtest-sh4eb-$(CONFIG_ISA_TESTDEV) = tests/endianness-test$(EXESUF) + +check-qtest-sparc-y += tests/prom-env-test$(EXESUF) +check-qtest-sparc-y += tests/m48t59-test$(EXESUF) +check-qtest-sparc-y += tests/boot-serial-test$(EXESUF) + +check-qtest-sparc64-$(CONFIG_ISA_TESTDEV) = tests/endianness-test$(EXESUF) +check-qtest-sparc64-y += tests/prom-env-test$(EXESUF) +check-qtest-sparc64-y += tests/boot-serial-test$(EXESUF) + +check-qtest-arm-y += tests/tmp105-test$(EXESUF) +check-qtest-arm-y += tests/pca9552-test$(EXESUF) +check-qtest-arm-y += tests/ds1338-test$(EXESUF) +check-qtest-arm-y += tests/microbit-test$(EXESUF) +check-qtest-arm-y += tests/m25p80-test$(EXESUF) +check-qtest-arm-y += tests/virtio-blk-test$(EXESUF) +check-qtest-arm-y += tests/test-arm-mptimer$(EXESUF) +check-qtest-arm-y += tests/boot-serial-test$(EXESUF) +check-qtest-arm-$(CONFIG_SDHCI) += tests/sdhci-test$(EXESUF) +check-qtest-arm-y += tests/hexloader-test$(EXESUF) + +check-qtest-aarch64-y = tests/numa-test$(EXESUF) +check-qtest-aarch64-$(CONFIG_SDHCI) += tests/sdhci-test$(EXESUF) +check-qtest-aarch64-y += tests/boot-serial-test$(EXESUF) +check-qtest-aarch64-y += tests/migration-test$(EXESUF) + +check-qtest-microblazeel-y += $(check-qtest-microblaze-y) + +check-qtest-xtensaeb-y += $(check-qtest-xtensa-y) + +check-qtest-s390x-y = tests/boot-serial-test$(EXESUF) +check-qtest-s390x-$(CONFIG_SLIRP) += tests/pxe-test$(EXESUF) +check-qtest-s390x-$(CONFIG_SLIRP) += tests/test-netfilter$(EXESUF) +check-qtest-s390x-$(CONFIG_POSIX) += tests/test-filter-mirror$(EXESUF) +check-qtest-s390x-$(CONFIG_POSIX) += tests/test-filter-redirector$(EXESUF) +check-qtest-s390x-y += tests/drive_del-test$(EXESUF) +check-qtest-s390x-y += tests/virtio-ccw-test$(EXESUF) +check-qtest-s390x-y += tests/cpu-plug-test$(EXESUF) +check-qtest-s390x-y += tests/migration-test$(EXESUF) + +check-qtest-generic-y += tests/machine-none-test$(EXESUF) +check-qtest-generic-y += tests/qom-test$(EXESUF) +check-qtest-generic-y += tests/test-hmp$(EXESUF) + +qapi-schema += alternate-any.json +qapi-schema += alternate-array.json +qapi-schema += alternate-base.json +qapi-schema += alternate-clash.json +qapi-schema += alternate-conflict-dict.json +qapi-schema += alternate-conflict-enum-bool.json +qapi-schema += alternate-conflict-enum-int.json +qapi-schema += alternate-conflict-string.json +qapi-schema += alternate-conflict-bool-string.json +qapi-schema += alternate-conflict-num-string.json +qapi-schema += alternate-empty.json +qapi-schema += alternate-invalid-dict.json +qapi-schema += alternate-nested.json +qapi-schema += alternate-unknown.json +qapi-schema += args-alternate.json +qapi-schema += args-any.json +qapi-schema += args-array-empty.json +qapi-schema += args-array-unknown.json +qapi-schema += args-bad-boxed.json +qapi-schema += args-boxed-anon.json +qapi-schema += args-boxed-empty.json +qapi-schema += args-boxed-string.json +qapi-schema += args-int.json +qapi-schema += args-invalid.json +qapi-schema += args-member-array-bad.json +qapi-schema += args-member-case.json +qapi-schema += args-member-unknown.json +qapi-schema += args-name-clash.json +qapi-schema += args-union.json +qapi-schema += args-unknown.json +qapi-schema += bad-base.json +qapi-schema += bad-data.json +qapi-schema += bad-ident.json +qapi-schema += bad-if.json +qapi-schema += bad-if-empty.json +qapi-schema += bad-if-empty-list.json +qapi-schema += bad-if-list.json +qapi-schema += bad-type-bool.json +qapi-schema += bad-type-dict.json +qapi-schema += bad-type-int.json +qapi-schema += base-cycle-direct.json +qapi-schema += base-cycle-indirect.json +qapi-schema += command-int.json +qapi-schema += comments.json +qapi-schema += doc-bad-alternate-member.json +qapi-schema += doc-bad-command-arg.json +qapi-schema += doc-bad-section.json +qapi-schema += doc-bad-symbol.json +qapi-schema += doc-bad-union-member.json +qapi-schema += doc-before-include.json +qapi-schema += doc-before-pragma.json +qapi-schema += doc-duplicated-arg.json +qapi-schema += doc-duplicated-return.json +qapi-schema += doc-duplicated-since.json +qapi-schema += doc-empty-arg.json +qapi-schema += doc-empty-section.json +qapi-schema += doc-empty-symbol.json +qapi-schema += doc-good.json +qapi-schema += doc-interleaved-section.json +qapi-schema += doc-invalid-end.json +qapi-schema += doc-invalid-end2.json +qapi-schema += doc-invalid-return.json +qapi-schema += doc-invalid-section.json +qapi-schema += doc-invalid-start.json +qapi-schema += doc-missing-colon.json +qapi-schema += doc-missing-expr.json +qapi-schema += doc-missing-space.json +qapi-schema += doc-missing.json +qapi-schema += doc-no-symbol.json +qapi-schema += double-data.json +qapi-schema += double-type.json +qapi-schema += duplicate-key.json +qapi-schema += empty.json +qapi-schema += enum-bad-member.json +qapi-schema += enum-bad-name.json +qapi-schema += enum-bad-prefix.json +qapi-schema += enum-clash-member.json +qapi-schema += enum-dict-member-unknown.json +qapi-schema += enum-if-invalid.json +qapi-schema += enum-int-member.json +qapi-schema += enum-member-case.json +qapi-schema += enum-missing-data.json +qapi-schema += enum-wrong-data.json +qapi-schema += escape-outside-string.json +qapi-schema += escape-too-big.json +qapi-schema += escape-too-short.json +qapi-schema += event-boxed-empty.json +qapi-schema += event-case.json +qapi-schema += event-member-invalid-dict.json +qapi-schema += event-nest-struct.json +qapi-schema += flat-union-array-branch.json +qapi-schema += flat-union-bad-base.json +qapi-schema += flat-union-bad-discriminator.json +qapi-schema += flat-union-base-any.json +qapi-schema += flat-union-base-union.json +qapi-schema += flat-union-clash-member.json +qapi-schema += flat-union-empty.json +qapi-schema += flat-union-inline.json +qapi-schema += flat-union-inline-invalid-dict.json +qapi-schema += flat-union-int-branch.json +qapi-schema += flat-union-invalid-branch-key.json +qapi-schema += flat-union-invalid-discriminator.json +qapi-schema += flat-union-invalid-if-discriminator.json +qapi-schema += flat-union-no-base.json +qapi-schema += flat-union-optional-discriminator.json +qapi-schema += flat-union-string-discriminator.json +qapi-schema += funny-char.json +qapi-schema += ident-with-escape.json +qapi-schema += include-before-err.json +qapi-schema += include-cycle.json +qapi-schema += include-extra-junk.json +qapi-schema += include-format-err.json +qapi-schema += include-nested-err.json +qapi-schema += include-no-file.json +qapi-schema += include-non-file.json +qapi-schema += include-relpath.json +qapi-schema += include-repetition.json +qapi-schema += include-self-cycle.json +qapi-schema += include-simple.json +qapi-schema += indented-expr.json +qapi-schema += leading-comma-list.json +qapi-schema += leading-comma-object.json +qapi-schema += missing-colon.json +qapi-schema += missing-comma-list.json +qapi-schema += missing-comma-object.json +qapi-schema += missing-type.json +qapi-schema += nested-struct-data.json +qapi-schema += nested-struct-data-invalid-dict.json +qapi-schema += non-objects.json +qapi-schema += oob-test.json +qapi-schema += allow-preconfig-test.json +qapi-schema += pragma-doc-required-crap.json +qapi-schema += pragma-extra-junk.json +qapi-schema += pragma-name-case-whitelist-crap.json +qapi-schema += pragma-non-dict.json +qapi-schema += pragma-returns-whitelist-crap.json +qapi-schema += qapi-schema-test.json +qapi-schema += quoted-structural-chars.json +qapi-schema += redefined-builtin.json +qapi-schema += redefined-command.json +qapi-schema += redefined-event.json +qapi-schema += redefined-type.json +qapi-schema += reserved-command-q.json +qapi-schema += reserved-enum-q.json +qapi-schema += reserved-member-has.json +qapi-schema += reserved-member-q.json +qapi-schema += reserved-member-u.json +qapi-schema += reserved-member-underscore.json +qapi-schema += reserved-type-kind.json +qapi-schema += reserved-type-list.json +qapi-schema += returns-alternate.json +qapi-schema += returns-array-bad.json +qapi-schema += returns-dict.json +qapi-schema += returns-unknown.json +qapi-schema += returns-whitelist.json +qapi-schema += struct-base-clash-deep.json +qapi-schema += struct-base-clash.json +qapi-schema += struct-data-invalid.json +qapi-schema += struct-member-invalid-dict.json +qapi-schema += struct-member-invalid.json +qapi-schema += trailing-comma-list.json +qapi-schema += trailing-comma-object.json +qapi-schema += type-bypass-bad-gen.json +qapi-schema += unclosed-list.json +qapi-schema += unclosed-object.json +qapi-schema += unclosed-string.json +qapi-schema += unicode-str.json +qapi-schema += union-base-empty.json +qapi-schema += union-base-no-discriminator.json +qapi-schema += union-branch-case.json +qapi-schema += union-branch-invalid-dict.json +qapi-schema += union-clash-branches.json +qapi-schema += union-empty.json +qapi-schema += union-invalid-base.json +qapi-schema += union-optional-branch.json +qapi-schema += union-unknown.json +qapi-schema += unknown-escape.json +qapi-schema += unknown-expr-key.json + + +check-qapi-schema-y := $(addprefix tests/qapi-schema/, $(qapi-schema)) + +GENERATED_FILES += tests/test-qapi-types.h tests/test-qapi-visit.h \ + tests/test-qapi-commands.h tests/test-qapi-events.h \ + tests/test-qapi-introspect.h + +test-obj-y = tests/check-qnum.o tests/check-qstring.o tests/check-qdict.o \ + tests/check-qlist.o tests/check-qnull.o tests/check-qobject.o \ + tests/check-qjson.o tests/check-qlit.o \ + tests/check-block-qtest.o \ + tests/test-coroutine.o tests/test-string-output-visitor.o \ + tests/test-string-input-visitor.o tests/test-qobject-output-visitor.o \ + tests/test-clone-visitor.o \ + tests/test-qobject-input-visitor.o \ + tests/test-qmp-cmds.o tests/test-visitor-serialization.o \ + tests/test-x86-cpuid.o tests/test-mul64.o tests/test-int128.o \ + tests/test-opts-visitor.o tests/test-qmp-event.o \ + tests/rcutorture.o tests/test-rcu-list.o \ + tests/test-rcu-simpleq.o \ + tests/test-rcu-tailq.o \ + tests/test-qdist.o tests/test-shift128.o \ + tests/test-qht.o tests/qht-bench.o tests/test-qht-par.o \ + tests/atomic_add-bench.o tests/atomic64-bench.o + +$(test-obj-y): QEMU_INCLUDES += -Itests +QEMU_CFLAGS += -I$(SRC_PATH)/tests + + +# Deps that are common to various different sets of tests below +test-util-obj-y = libqemuutil.a +test-qom-obj-y = $(qom-obj-y) $(test-util-obj-y) +test-qapi-obj-y = tests/test-qapi-visit.o tests/test-qapi-types.o \ + tests/test-qapi-events.o tests/test-qapi-introspect.o \ + $(test-qom-obj-y) +benchmark-crypto-obj-y = $(crypto-obj-y) $(test-qom-obj-y) +test-crypto-obj-y = $(crypto-obj-y) $(test-qom-obj-y) +test-io-obj-y = $(io-obj-y) $(test-crypto-obj-y) +test-block-obj-y = $(block-obj-y) $(test-io-obj-y) tests/iothread.o + +tests/check-qnum$(EXESUF): tests/check-qnum.o $(test-util-obj-y) +tests/check-qstring$(EXESUF): tests/check-qstring.o $(test-util-obj-y) +tests/check-qdict$(EXESUF): tests/check-qdict.o $(test-util-obj-y) +tests/check-block-qdict$(EXESUF): tests/check-block-qdict.o $(test-util-obj-y) +tests/check-qlist$(EXESUF): tests/check-qlist.o $(test-util-obj-y) +tests/check-qnull$(EXESUF): tests/check-qnull.o $(test-util-obj-y) +tests/check-qobject$(EXESUF): tests/check-qobject.o $(test-util-obj-y) +tests/check-qjson$(EXESUF): tests/check-qjson.o $(test-util-obj-y) +tests/check-qlit$(EXESUF): tests/check-qlit.o $(test-util-obj-y) +tests/check-qom-interface$(EXESUF): tests/check-qom-interface.o $(test-qom-obj-y) +tests/check-qom-proplist$(EXESUF): tests/check-qom-proplist.o $(test-qom-obj-y) + +tests/test-char$(EXESUF): tests/test-char.o $(test-util-obj-y) $(qtest-obj-y) $(test-io-obj-y) $(chardev-obj-y) +tests/test-coroutine$(EXESUF): tests/test-coroutine.o $(test-block-obj-y) +tests/test-aio$(EXESUF): tests/test-aio.o $(test-block-obj-y) +tests/test-aio-multithread$(EXESUF): tests/test-aio-multithread.o $(test-block-obj-y) +tests/test-throttle$(EXESUF): tests/test-throttle.o $(test-block-obj-y) +tests/test-bdrv-drain$(EXESUF): tests/test-bdrv-drain.o $(test-block-obj-y) $(test-util-obj-y) +tests/test-blockjob$(EXESUF): tests/test-blockjob.o $(test-block-obj-y) $(test-util-obj-y) +tests/test-blockjob-txn$(EXESUF): tests/test-blockjob-txn.o $(test-block-obj-y) $(test-util-obj-y) +tests/test-block-backend$(EXESUF): tests/test-block-backend.o $(test-block-obj-y) $(test-util-obj-y) +tests/test-image-locking$(EXESUF): tests/test-image-locking.o $(test-block-obj-y) $(test-util-obj-y) +tests/test-thread-pool$(EXESUF): tests/test-thread-pool.o $(test-block-obj-y) +tests/test-iov$(EXESUF): tests/test-iov.o $(test-util-obj-y) +tests/test-hbitmap$(EXESUF): tests/test-hbitmap.o $(test-util-obj-y) $(test-crypto-obj-y) +tests/test-x86-cpuid$(EXESUF): tests/test-x86-cpuid.o +tests/test-xbzrle$(EXESUF): tests/test-xbzrle.o migration/xbzrle.o migration/page_cache.o $(test-util-obj-y) +tests/test-cutils$(EXESUF): tests/test-cutils.o util/cutils.o $(test-util-obj-y) +tests/test-int128$(EXESUF): tests/test-int128.o +tests/rcutorture$(EXESUF): tests/rcutorture.o $(test-util-obj-y) +tests/test-rcu-list$(EXESUF): tests/test-rcu-list.o $(test-util-obj-y) +tests/test-rcu-simpleq$(EXESUF): tests/test-rcu-simpleq.o $(test-util-obj-y) +tests/test-rcu-tailq$(EXESUF): tests/test-rcu-tailq.o $(test-util-obj-y) +tests/test-qdist$(EXESUF): tests/test-qdist.o $(test-util-obj-y) +tests/test-qht$(EXESUF): tests/test-qht.o $(test-util-obj-y) +tests/test-qht-par$(EXESUF): tests/test-qht-par.o tests/qht-bench$(EXESUF) $(test-util-obj-y) +tests/qht-bench$(EXESUF): tests/qht-bench.o $(test-util-obj-y) +tests/test-bufferiszero$(EXESUF): tests/test-bufferiszero.o $(test-util-obj-y) +tests/atomic_add-bench$(EXESUF): tests/atomic_add-bench.o $(test-util-obj-y) +tests/atomic64-bench$(EXESUF): tests/atomic64-bench.o $(test-util-obj-y) + +tests/fp/%: + $(MAKE) -C $(dir $@) $(notdir $@) + +tests/test-qdev-global-props$(EXESUF): tests/test-qdev-global-props.o \ + hw/core/qdev.o hw/core/qdev-properties.o hw/core/hotplug.o\ + hw/core/bus.o \ + hw/core/irq.o \ + hw/core/fw-path-provider.o \ + hw/core/reset.o \ + $(test-qapi-obj-y) +tests/test-vmstate$(EXESUF): tests/test-vmstate.o \ + migration/vmstate.o migration/vmstate-types.o migration/qemu-file.o \ + migration/qemu-file-channel.o migration/qjson.o \ + $(test-io-obj-y) +tests/test-timed-average$(EXESUF): tests/test-timed-average.o $(test-util-obj-y) +tests/test-base64$(EXESUF): tests/test-base64.o $(test-util-obj-y) +tests/ptimer-test$(EXESUF): tests/ptimer-test.o tests/ptimer-test-stubs.o hw/core/ptimer.o + +tests/test-logging$(EXESUF): tests/test-logging.o $(test-util-obj-y) + +tests/test-replication$(EXESUF): tests/test-replication.o $(test-util-obj-y) \ + $(test-block-obj-y) + +tests/test-qapi-types.c tests/test-qapi-types.h \ +tests/test-qapi-visit.c tests/test-qapi-visit.h \ +tests/test-qapi-commands.h tests/test-qapi-commands.c \ +tests/test-qapi-events.c tests/test-qapi-events.h \ +tests/test-qapi-introspect.c tests/test-qapi-introspect.h: \ +tests/test-qapi-gen-timestamp ; +tests/test-qapi-gen-timestamp: $(SRC_PATH)/tests/qapi-schema/qapi-schema-test.json $(qapi-py) + $(call quiet-command,$(PYTHON) $(SRC_PATH)/scripts/qapi-gen.py \ + -o tests -p "test-" $<, \ + "GEN","$(@:%-timestamp=%)") + @>$@ + +tests/qapi-schema/doc-good.test.texi: $(SRC_PATH)/tests/qapi-schema/doc-good.json $(qapi-py) + $(call quiet-command,$(PYTHON) $(SRC_PATH)/scripts/qapi-gen.py \ + -o tests/qapi-schema -p "doc-good-" $<, \ + "GEN","$@") + @mv tests/qapi-schema/doc-good-qapi-doc.texi $@ + @rm -f tests/qapi-schema/doc-good-qapi-*.[ch] tests/qapi-schema/doc-good-qmp-*.[ch] + +tests/test-string-output-visitor$(EXESUF): tests/test-string-output-visitor.o $(test-qapi-obj-y) +tests/test-string-input-visitor$(EXESUF): tests/test-string-input-visitor.o $(test-qapi-obj-y) +tests/test-qmp-event$(EXESUF): tests/test-qmp-event.o $(test-qapi-obj-y) +tests/test-qobject-output-visitor$(EXESUF): tests/test-qobject-output-visitor.o $(test-qapi-obj-y) +tests/test-clone-visitor$(EXESUF): tests/test-clone-visitor.o $(test-qapi-obj-y) +tests/test-qobject-input-visitor$(EXESUF): tests/test-qobject-input-visitor.o $(test-qapi-obj-y) +tests/test-qmp-cmds$(EXESUF): tests/test-qmp-cmds.o tests/test-qapi-commands.o $(test-qapi-obj-y) +tests/test-visitor-serialization$(EXESUF): tests/test-visitor-serialization.o $(test-qapi-obj-y) +tests/test-opts-visitor$(EXESUF): tests/test-opts-visitor.o $(test-qapi-obj-y) + +tests/test-shift128$(EXESUF): tests/test-shift128.o $(test-util-obj-y) +tests/test-mul64$(EXESUF): tests/test-mul64.o $(test-util-obj-y) +tests/test-bitops$(EXESUF): tests/test-bitops.o $(test-util-obj-y) +tests/test-bitcnt$(EXESUF): tests/test-bitcnt.o $(test-util-obj-y) +tests/test-crypto-hash$(EXESUF): tests/test-crypto-hash.o $(test-crypto-obj-y) +tests/benchmark-crypto-hash$(EXESUF): tests/benchmark-crypto-hash.o $(test-crypto-obj-y) +tests/test-crypto-hmac$(EXESUF): tests/test-crypto-hmac.o $(test-crypto-obj-y) +tests/benchmark-crypto-hmac$(EXESUF): tests/benchmark-crypto-hmac.o $(test-crypto-obj-y) +tests/test-crypto-cipher$(EXESUF): tests/test-crypto-cipher.o $(test-crypto-obj-y) +tests/benchmark-crypto-cipher$(EXESUF): tests/benchmark-crypto-cipher.o $(test-crypto-obj-y) +tests/test-crypto-secret$(EXESUF): tests/test-crypto-secret.o $(test-crypto-obj-y) +tests/test-crypto-xts$(EXESUF): tests/test-crypto-xts.o $(test-crypto-obj-y) + +tests/crypto-tls-x509-helpers.o-cflags := $(TASN1_CFLAGS) +tests/crypto-tls-x509-helpers.o-libs := $(TASN1_LIBS) +tests/pkix_asn1_tab.o-cflags := $(TASN1_CFLAGS) + +tests/test-crypto-tlscredsx509.o-cflags := $(TASN1_CFLAGS) +tests/test-crypto-tlscredsx509$(EXESUF): tests/test-crypto-tlscredsx509.o \ + tests/crypto-tls-x509-helpers.o tests/pkix_asn1_tab.o $(test-crypto-obj-y) + +tests/test-crypto-tlssession.o-cflags := $(TASN1_CFLAGS) +tests/test-crypto-tlssession$(EXESUF): tests/test-crypto-tlssession.o \ + tests/crypto-tls-x509-helpers.o tests/pkix_asn1_tab.o \ + tests/crypto-tls-psk-helpers.o \ + $(test-crypto-obj-y) +tests/test-util-sockets$(EXESUF): tests/test-util-sockets.o \ + tests/socket-helpers.o $(test-util-obj-y) +tests/test-io-task$(EXESUF): tests/test-io-task.o $(test-io-obj-y) +tests/test-io-channel-socket$(EXESUF): tests/test-io-channel-socket.o \ + tests/io-channel-helpers.o tests/socket-helpers.o $(test-io-obj-y) +tests/tpm-crb-swtpm-test$(EXESUF): tests/tpm-crb-swtpm-test.o tests/tpm-emu.o \ + tests/tpm-util.o tests/tpm-tests.o $(test-io-obj-y) +tests/tpm-crb-test$(EXESUF): tests/tpm-crb-test.o tests/tpm-emu.o $(test-io-obj-y) +tests/tpm-tis-swtpm-test$(EXESUF): tests/tpm-tis-swtpm-test.o tests/tpm-emu.o \ + tests/tpm-util.o tests/tpm-tests.o $(test-io-obj-y) +tests/tpm-tis-test$(EXESUF): tests/tpm-tis-test.o tests/tpm-emu.o $(test-io-obj-y) +tests/test-io-channel-file$(EXESUF): tests/test-io-channel-file.o \ + tests/io-channel-helpers.o $(test-io-obj-y) +tests/test-io-channel-tls$(EXESUF): tests/test-io-channel-tls.o \ + tests/crypto-tls-x509-helpers.o tests/pkix_asn1_tab.o \ + tests/io-channel-helpers.o $(test-io-obj-y) +tests/test-io-channel-command$(EXESUF): tests/test-io-channel-command.o \ + tests/io-channel-helpers.o $(test-io-obj-y) +tests/test-io-channel-buffer$(EXESUF): tests/test-io-channel-buffer.o \ + tests/io-channel-helpers.o $(test-io-obj-y) +tests/test-crypto-pbkdf$(EXESUF): tests/test-crypto-pbkdf.o $(test-crypto-obj-y) +tests/test-crypto-ivgen$(EXESUF): tests/test-crypto-ivgen.o $(test-crypto-obj-y) +tests/test-crypto-afsplit$(EXESUF): tests/test-crypto-afsplit.o $(test-crypto-obj-y) +tests/test-crypto-block$(EXESUF): tests/test-crypto-block.o $(test-crypto-obj-y) + +libqos-obj-y = tests/libqos/pci.o tests/libqos/fw_cfg.o tests/libqos/malloc.o +libqos-obj-y += tests/libqos/i2c.o tests/libqos/libqos.o +libqos-spapr-obj-y = $(libqos-obj-y) tests/libqos/malloc-spapr.o +libqos-spapr-obj-y += tests/libqos/libqos-spapr.o +libqos-spapr-obj-y += tests/libqos/rtas.o +libqos-spapr-obj-y += tests/libqos/pci-spapr.o +libqos-pc-obj-y = $(libqos-obj-y) tests/libqos/pci-pc.o +libqos-pc-obj-y += tests/libqos/malloc-pc.o tests/libqos/libqos-pc.o +libqos-pc-obj-y += tests/libqos/ahci.o +libqos-omap-obj-y = $(libqos-obj-y) tests/libqos/i2c-omap.o +libqos-imx-obj-y = $(libqos-obj-y) tests/libqos/i2c-imx.o +libqos-usb-obj-y = $(libqos-spapr-obj-y) $(libqos-pc-obj-y) tests/libqos/usb.o +libqos-virtio-obj-y = $(libqos-spapr-obj-y) $(libqos-pc-obj-y) tests/libqos/virtio.o tests/libqos/virtio-pci.o tests/libqos/virtio-mmio.o tests/libqos/malloc-generic.o + +tests/qmp-test$(EXESUF): tests/qmp-test.o +tests/qmp-cmd-test$(EXESUF): tests/qmp-cmd-test.o +tests/device-introspect-test$(EXESUF): tests/device-introspect-test.o +tests/rtc-test$(EXESUF): tests/rtc-test.o +tests/m48t59-test$(EXESUF): tests/m48t59-test.o +tests/hexloader-test$(EXESUF): tests/hexloader-test.o +tests/endianness-test$(EXESUF): tests/endianness-test.o +tests/spapr-phb-test$(EXESUF): tests/spapr-phb-test.o $(libqos-obj-y) +tests/prom-env-test$(EXESUF): tests/prom-env-test.o $(libqos-obj-y) +tests/rtas-test$(EXESUF): tests/rtas-test.o $(libqos-spapr-obj-y) +tests/fdc-test$(EXESUF): tests/fdc-test.o +tests/ide-test$(EXESUF): tests/ide-test.o $(libqos-pc-obj-y) +tests/ahci-test$(EXESUF): tests/ahci-test.o $(libqos-pc-obj-y) +tests/ipmi-kcs-test$(EXESUF): tests/ipmi-kcs-test.o +tests/ipmi-bt-test$(EXESUF): tests/ipmi-bt-test.o +tests/hd-geo-test$(EXESUF): tests/hd-geo-test.o +tests/boot-order-test$(EXESUF): tests/boot-order-test.o $(libqos-obj-y) +tests/boot-serial-test$(EXESUF): tests/boot-serial-test.o $(libqos-obj-y) +tests/bios-tables-test$(EXESUF): tests/bios-tables-test.o \ + tests/boot-sector.o tests/acpi-utils.o $(libqos-obj-y) +tests/pxe-test$(EXESUF): tests/pxe-test.o tests/boot-sector.o $(libqos-obj-y) +tests/tmp105-test$(EXESUF): tests/tmp105-test.o $(libqos-omap-obj-y) +tests/pca9552-test$(EXESUF): tests/pca9552-test.o $(libqos-omap-obj-y) +tests/ds1338-test$(EXESUF): tests/ds1338-test.o $(libqos-imx-obj-y) +tests/microbit-test$(EXESUF): tests/microbit-test.o +tests/m25p80-test$(EXESUF): tests/m25p80-test.o +tests/i440fx-test$(EXESUF): tests/i440fx-test.o $(libqos-pc-obj-y) +tests/q35-test$(EXESUF): tests/q35-test.o $(libqos-pc-obj-y) +tests/fw_cfg-test$(EXESUF): tests/fw_cfg-test.o $(libqos-pc-obj-y) +tests/e1000-test$(EXESUF): tests/e1000-test.o +tests/e1000e-test$(EXESUF): tests/e1000e-test.o $(libqos-pc-obj-y) +tests/rtl8139-test$(EXESUF): tests/rtl8139-test.o $(libqos-pc-obj-y) +tests/pcnet-test$(EXESUF): tests/pcnet-test.o +tests/pnv-xscom-test$(EXESUF): tests/pnv-xscom-test.o +tests/eepro100-test$(EXESUF): tests/eepro100-test.o +tests/vmxnet3-test$(EXESUF): tests/vmxnet3-test.o +tests/ne2000-test$(EXESUF): tests/ne2000-test.o +tests/wdt_ib700-test$(EXESUF): tests/wdt_ib700-test.o +tests/tco-test$(EXESUF): tests/tco-test.o $(libqos-pc-obj-y) +tests/virtio-balloon-test$(EXESUF): tests/virtio-balloon-test.o $(libqos-virtio-obj-y) +tests/virtio-blk-test$(EXESUF): tests/virtio-blk-test.o $(libqos-virtio-obj-y) +tests/virtio-ccw-test$(EXESUF): tests/virtio-ccw-test.o +tests/virtio-net-test$(EXESUF): tests/virtio-net-test.o $(libqos-pc-obj-y) $(libqos-virtio-obj-y) +tests/virtio-rng-test$(EXESUF): tests/virtio-rng-test.o $(libqos-pc-obj-y) +tests/virtio-scsi-test$(EXESUF): tests/virtio-scsi-test.o $(libqos-virtio-obj-y) +tests/virtio-9p-test$(EXESUF): tests/virtio-9p-test.o $(libqos-virtio-obj-y) +tests/virtio-serial-test$(EXESUF): tests/virtio-serial-test.o $(libqos-virtio-obj-y) +tests/virtio-console-test$(EXESUF): tests/virtio-console-test.o $(libqos-virtio-obj-y) +tests/tpci200-test$(EXESUF): tests/tpci200-test.o +tests/display-vga-test$(EXESUF): tests/display-vga-test.o +tests/ipoctal232-test$(EXESUF): tests/ipoctal232-test.o +tests/qom-test$(EXESUF): tests/qom-test.o +tests/test-hmp$(EXESUF): tests/test-hmp.o +tests/machine-none-test$(EXESUF): tests/machine-none-test.o +tests/drive_del-test$(EXESUF): tests/drive_del-test.o $(libqos-virtio-obj-y) +tests/qdev-monitor-test$(EXESUF): tests/qdev-monitor-test.o $(libqos-pc-obj-y) +tests/nvme-test$(EXESUF): tests/nvme-test.o $(libqos-pc-obj-y) +tests/pvpanic-test$(EXESUF): tests/pvpanic-test.o +tests/i82801b11-test$(EXESUF): tests/i82801b11-test.o +tests/ac97-test$(EXESUF): tests/ac97-test.o +tests/es1370-test$(EXESUF): tests/es1370-test.o +tests/intel-hda-test$(EXESUF): tests/intel-hda-test.o +tests/ioh3420-test$(EXESUF): tests/ioh3420-test.o +tests/usb-hcd-ohci-test$(EXESUF): tests/usb-hcd-ohci-test.o $(libqos-usb-obj-y) +tests/usb-hcd-uhci-test$(EXESUF): tests/usb-hcd-uhci-test.o $(libqos-usb-obj-y) +tests/usb-hcd-ehci-test$(EXESUF): tests/usb-hcd-ehci-test.o $(libqos-usb-obj-y) +tests/usb-hcd-xhci-test$(EXESUF): tests/usb-hcd-xhci-test.o $(libqos-usb-obj-y) +tests/cpu-plug-test$(EXESUF): tests/cpu-plug-test.o +tests/migration-test$(EXESUF): tests/migration-test.o +tests/vhost-user-test$(EXESUF): tests/vhost-user-test.o $(test-util-obj-y) \ + $(qtest-obj-y) $(test-io-obj-y) $(libqos-virtio-obj-y) $(libqos-pc-obj-y) \ + $(chardev-obj-y) +tests/qemu-iotests/socket_scm_helper$(EXESUF): tests/qemu-iotests/socket_scm_helper.o +tests/test-qemu-opts$(EXESUF): tests/test-qemu-opts.o $(test-util-obj-y) +tests/test-keyval$(EXESUF): tests/test-keyval.o $(test-util-obj-y) $(test-qapi-obj-y) +tests/test-write-threshold$(EXESUF): tests/test-write-threshold.o $(test-block-obj-y) +tests/test-netfilter$(EXESUF): tests/test-netfilter.o $(qtest-obj-y) +tests/test-filter-mirror$(EXESUF): tests/test-filter-mirror.o $(qtest-obj-y) +tests/test-filter-redirector$(EXESUF): tests/test-filter-redirector.o $(qtest-obj-y) +tests/test-x86-cpuid-compat$(EXESUF): tests/test-x86-cpuid-compat.o $(qtest-obj-y) +tests/ivshmem-test$(EXESUF): tests/ivshmem-test.o contrib/ivshmem-server/ivshmem-server.o $(libqos-pc-obj-y) $(libqos-spapr-obj-y) +tests/megasas-test$(EXESUF): tests/megasas-test.o $(libqos-spapr-obj-y) $(libqos-pc-obj-y) +tests/vhost-user-bridge$(EXESUF): tests/vhost-user-bridge.o $(test-util-obj-y) libvhost-user.a +tests/test-uuid$(EXESUF): tests/test-uuid.o $(test-util-obj-y) +tests/test-arm-mptimer$(EXESUF): tests/test-arm-mptimer.o +tests/test-qapi-util$(EXESUF): tests/test-qapi-util.o $(test-util-obj-y) +tests/numa-test$(EXESUF): tests/numa-test.o +tests/vmgenid-test$(EXESUF): tests/vmgenid-test.o tests/boot-sector.o tests/acpi-utils.o +tests/sdhci-test$(EXESUF): tests/sdhci-test.o $(libqos-pc-obj-y) +tests/cdrom-test$(EXESUF): tests/cdrom-test.o tests/boot-sector.o $(libqos-obj-y) + +tests/migration/stress$(EXESUF): tests/migration/stress.o + $(call quiet-command, $(LINKPROG) -static -O3 $(PTHREAD_LIB) -o $@ $< ,"LINK","$(TARGET_DIR)$@") + +INITRD_WORK_DIR=tests/migration/initrd + +tests/migration/initrd-stress.img: tests/migration/stress$(EXESUF) + mkdir -p $(INITRD_WORK_DIR) + cp $< $(INITRD_WORK_DIR)/init + (cd $(INITRD_WORK_DIR) && (find | cpio --quiet -o -H newc | gzip -9)) > $@ + rm $(INITRD_WORK_DIR)/init + rmdir $(INITRD_WORK_DIR) + +ifeq ($(CONFIG_POSIX),y) +LIBS += -lutil +endif + +# QTest rules + +TARGETS=$(patsubst %-softmmu,%, $(filter %-softmmu,$(TARGET_DIRS))) +ifeq ($(CONFIG_POSIX),y) +QTEST_TARGETS = $(TARGETS) +check-qtest-y=$(foreach TARGET,$(TARGETS), $(check-qtest-$(TARGET)-y)) +check-qtest-y += $(check-qtest-generic-y) +else +QTEST_TARGETS = +endif + +qtest-obj-y = tests/libqtest.o $(test-util-obj-y) +$(check-qtest-y): $(qtest-obj-y) + +tests/test-qga$(EXESUF): qemu-ga$(EXESUF) +tests/test-qga$(EXESUF): tests/test-qga.o $(qtest-obj-y) + +SPEED = quick + +# gtester tests, possibly with verbose output +# do_test_tap runs all tests, even if some of them fail, while do_test_human +# stops at the first failure unless -k is given on the command line + +define do_test_human_k + $(quiet-@)rc=0; $(foreach COMMAND, $1, \ + $(call quiet-command-run, \ + export MALLOC_PERTURB_=$${MALLOC_PERTURB_:-$$(( $${RANDOM:-0} % 255 + 1))} $2; \ + $(COMMAND) -m=$(SPEED) -k --tap < /dev/null \ + | ./scripts/tap-driver.pl --test-name="$(notdir $(COMMAND))" $(if $(V),, --show-failures-only) \ + || rc=$$?;, "TEST", "$@: $(COMMAND)")) exit $$rc +endef +define do_test_human_no_k + $(foreach COMMAND, $1, \ + $(call quiet-command, \ + MALLOC_PERTURB_=$${MALLOC_PERTURB_:-$$(( $${RANDOM:-0} % 255 + 1))} $2 \ + $(COMMAND) -m=$(SPEED) -k --tap < /dev/null \ + | ./scripts/tap-driver.pl --test-name="$(notdir $(COMMAND))" $(if $(V),, --show-failures-only), \ + "TEST", "$@: $(COMMAND)") +) +endef +do_test_human = \ + $(if $(findstring k, $(MAKEFLAGS)), $(do_test_human_k), $(do_test_human_no_k)) + +define do_test_tap + $(call quiet-command, \ + { export MALLOC_PERTURB_=$${MALLOC_PERTURB_:-$$(( $${RANDOM:-0} % 255 + 1))} $2; \ + $(foreach COMMAND, $1, \ + $(COMMAND) -m=$(SPEED) -k --tap < /dev/null \ + | sed "s/^[a-z][a-z]* [0-9]* /&$(notdir $(COMMAND)) /" || true; ) } \ + | ./scripts/tap-merge.pl | tee "$@" \ + | ./scripts/tap-driver.pl $(if $(V),, --show-failures-only), \ + "TAP","$@") +endef + +.PHONY: $(patsubst %, check-qtest-%, $(QTEST_TARGETS)) +$(patsubst %, check-qtest-%, $(QTEST_TARGETS)): check-qtest-%: subdir-%-softmmu $(check-qtest-y) + $(call do_test_human,$(check-qtest-$*-y) $(check-qtest-generic-y), \ + QTEST_QEMU_BINARY=$*-softmmu/qemu-system-$* \ + QTEST_QEMU_IMG=qemu-img$(EXESUF)) + +check-unit: $(check-unit-y) + $(call do_test_human, $^) + +check-speed: $(check-speed-y) + $(call do_test_human, $^) + +# gtester tests with TAP output + +$(patsubst %, check-report-qtest-%.tap, $(QTEST_TARGETS)): check-report-qtest-%.tap: $(check-qtest-y) + $(call do_test_tap, $(check-qtest-$*-y) $(check-qtest-generic-y), \ + QTEST_QEMU_BINARY=$*-softmmu/qemu-system-$* \ + QTEST_QEMU_IMG=qemu-img$(EXESUF)) + +check-report-unit.tap: $(check-unit-y) + $(call do_test_tap,$^) + +# Reports and overall runs + +check-report.tap: $(patsubst %,check-report-qtest-%.tap, $(QTEST_TARGETS)) check-report-unit.tap + $(call quiet-command,./scripts/tap-merge.py $^ > $@,"GEN","$@") + +# Per guest TCG tests + +LINUX_USER_TARGETS=$(filter %-linux-user,$(TARGET_DIRS)) +BUILD_TCG_TARGET_RULES=$(patsubst %,build-tcg-tests-%, $(LINUX_USER_TARGETS)) +CLEAN_TCG_TARGET_RULES=$(patsubst %,clean-tcg-tests-%, $(LINUX_USER_TARGETS)) +RUN_TCG_TARGET_RULES=$(patsubst %,run-tcg-tests-%, $(LINUX_USER_TARGETS)) + +ifeq ($(HAVE_USER_DOCKER),y) +# Probe for the Docker Builds needed for each build +$(foreach PROBE_TARGET,$(TARGET_DIRS), \ + $(eval -include $(SRC_PATH)/tests/tcg/Makefile.probe) \ + $(if $(DOCKER_PREREQ), \ + $(eval build-tcg-tests-$(PROBE_TARGET): $(DOCKER_PREREQ)))) +endif + +build-tcg-tests-%: + $(call quiet-command,$(MAKE) $(SUBDIR_MAKEFLAGS) -C $* V="$(V)" \ + SKIP_DOCKER_BUILD=1 TARGET_DIR="$*/" guest-tests, \ + "BUILD", "TCG tests for $*") + +run-tcg-tests-%: % build-tcg-tests-% + $(call quiet-command,$(MAKE) $(SUBDIR_MAKEFLAGS) -C $* V="$(V)" \ + SKIP_DOCKER_BUILD=1 TARGET_DIR="$*/" run-guest-tests, \ + "RUN", "TCG tests for $*") + +clean-tcg-tests-%: + $(call quiet-command,$(MAKE) $(SUBDIR_MAKEFLAGS) -C $* V="$(V)" TARGET_DIR="$*/" clean-guest-tests,) + +.PHONY: build-tcg +build-tcg: $(BUILD_TCG_TARGET_RULES) + +.PHONY: check-tcg +check-tcg: $(RUN_TCG_TARGET_RULES) + +.PHONY: clean-tcg +clean-tcg: $(CLEAN_TCG_TARGET_RULES) + +# Other tests + +QEMU_IOTESTS_HELPERS-$(call land,$(CONFIG_SOFTMMU),$(CONFIG_LINUX)) = tests/qemu-iotests/socket_scm_helper$(EXESUF) + +.PHONY: check-tests/qemu-iotests-quick.sh +check-tests/qemu-iotests-quick.sh: tests/qemu-iotests-quick.sh qemu-img$(EXESUF) qemu-io$(EXESUF) $(QEMU_IOTESTS_HELPERS-y) + $< + +.PHONY: $(patsubst %, check-%, $(check-qapi-schema-y)) +$(patsubst %, check-%, $(check-qapi-schema-y)): check-%.json: $(SRC_PATH)/%.json + $(call quiet-command, PYTHONPATH=$(SRC_PATH)/scripts \ + $(PYTHON) $(SRC_PATH)/tests/qapi-schema/test-qapi.py \ + $^ >$*.test.out 2>$*.test.err; \ + echo $$? >$*.test.exit, \ + "TEST","$*.out") + @# Sanitize error messages (make them independent of build directory) + @perl -p -e 's|\Q$(SRC_PATH)\E/||g' $*.test.err | diff -u $(SRC_PATH)/$*.err - + @diff -u $(SRC_PATH)/$*.out $*.test.out + @diff -u $(SRC_PATH)/$*.exit $*.test.exit + +.PHONY: check-tests/qapi-schema/doc-good.texi +check-tests/qapi-schema/doc-good.texi: tests/qapi-schema/doc-good.test.texi + @diff -u $(SRC_PATH)/tests/qapi-schema/doc-good.texi $< + +.PHONY: check-decodetree +check-decodetree: + $(call quiet-command, \ + cd $(SRC_PATH)/tests/decode && \ + ./check.sh "$(PYTHON)" "$(SRC_PATH)/scripts/decodetree.py", \ + TEST, decodetree.py) + +# Python venv for running tests + +.PHONY: check-venv check-acceptance + +TESTS_VENV_DIR=$(BUILD_DIR)/tests/venv +TESTS_VENV_REQ=$(SRC_PATH)/tests/requirements.txt +TESTS_RESULTS_DIR=$(BUILD_DIR)/tests/results +# Controls the output generated by Avocado when running tests. +# Any number of command separated loggers are accepted. For more +# information please refer to "avocado --help". +AVOCADO_SHOW=none + +PYTHON3 = $(shell $(PYTHON) -c 'import sys; print(1 if sys.version_info >= (3, 0) else 0)') +ifeq ($(PYTHON3), 1) +$(TESTS_VENV_DIR): $(TESTS_VENV_REQ) + $(call quiet-command, \ + $(PYTHON) -m venv --system-site-packages $@, \ + VENV, $@) + $(call quiet-command, \ + $(TESTS_VENV_DIR)/bin/python -m pip -q install -r $(TESTS_VENV_REQ), \ + PIP, $(TESTS_VENV_REQ)) + $(call quiet-command, touch $@) +else +$(TESTS_VENV_DIR): + $(error "venv directory for tests requires Python 3") +endif + +$(TESTS_RESULTS_DIR): + $(call quiet-command, mkdir -p $@, \ + MKDIR, $@) + +check-venv: $(TESTS_VENV_DIR) + +check-acceptance: check-venv $(TESTS_RESULTS_DIR) + $(call quiet-command, \ + $(TESTS_VENV_DIR)/bin/python -m avocado \ + --show=$(AVOCADO_SHOW) run --job-results-dir=$(TESTS_RESULTS_DIR) \ + --failfast=on $(SRC_PATH)/tests/acceptance, \ + "AVOCADO", "tests/acceptance") + +# Consolidated targets + +.PHONY: check-qapi-schema check-qtest check-unit check check-clean +check-qapi-schema: $(patsubst %,check-%, $(check-qapi-schema-y)) check-tests/qapi-schema/doc-good.texi +check-qtest: $(patsubst %,check-qtest-%, $(QTEST_TARGETS)) +check-block: $(patsubst %,check-%, $(check-block-y)) +check: check-qapi-schema check-unit check-qtest check-decodetree +check-clean: + rm -rf $(check-unit-y) tests/*.o $(QEMU_IOTESTS_HELPERS-y) + rm -rf $(sort $(foreach target,$(SYSEMU_TARGET_LIST), $(check-qtest-$(target)-y)) $(check-qtest-generic-y)) + rm -f tests/test-qapi-gen-timestamp + rm -rf $(TESTS_VENV_DIR) $(TESTS_RESULTS_DIR) + +clean: check-clean + +# Build the help program automatically + +all: $(QEMU_IOTESTS_HELPERS-y) + +-include $(wildcard tests/*.d) +-include $(wildcard tests/libqos/*.d) + +endif diff --git a/tests/Makefile.orig b/tests/Makefile.orig new file mode 100644 index 0000000000..e6474ba31b --- /dev/null +++ b/tests/Makefile.orig @@ -0,0 +1,569 @@ +export SRC_PATH + +qapi-py = $(SRC_PATH)/scripts/qapi.py $(SRC_PATH)/scripts/ordereddict.py + +# Get the list of all supported sysemu targets +SYSEMU_TARGET_LIST := $(subst -softmmu.mak,,$(notdir \ + $(wildcard $(SRC_PATH)/default-configs/*-softmmu.mak))) + +check-unit-y = tests/check-qdict$(EXESUF) +gcov-files-check-qdict-y = qobject/qdict.c +check-unit-y += tests/check-qfloat$(EXESUF) +gcov-files-check-qfloat-y = qobject/qfloat.c +check-unit-y += tests/check-qint$(EXESUF) +gcov-files-check-qint-y = qobject/qint.c +check-unit-y += tests/check-qstring$(EXESUF) +gcov-files-check-qstring-y = qobject/qstring.c +check-unit-y += tests/check-qlist$(EXESUF) +gcov-files-check-qlist-y = qobject/qlist.c +check-unit-y += tests/check-qjson$(EXESUF) +gcov-files-check-qjson-y = qobject/qjson.c +check-unit-y += tests/test-qmp-output-visitor$(EXESUF) +gcov-files-test-qmp-output-visitor-y = qapi/qmp-output-visitor.c +check-unit-y += tests/test-qmp-input-visitor$(EXESUF) +gcov-files-test-qmp-input-visitor-y = qapi/qmp-input-visitor.c +check-unit-y += tests/test-qmp-input-strict$(EXESUF) +check-unit-y += tests/test-qmp-commands$(EXESUF) +gcov-files-test-qmp-commands-y = qapi/qmp-dispatch.c +check-unit-y += tests/test-string-input-visitor$(EXESUF) +gcov-files-test-string-input-visitor-y = qapi/string-input-visitor.c +check-unit-y += tests/test-string-output-visitor$(EXESUF) +gcov-files-test-string-output-visitor-y = qapi/string-output-visitor.c +check-unit-y += tests/test-qmp-event$(EXESUF) +gcov-files-test-qmp-event-y += qapi/qmp-event.c +check-unit-y += tests/test-opts-visitor$(EXESUF) +gcov-files-test-opts-visitor-y = qapi/opts-visitor.c +check-unit-y += tests/test-coroutine$(EXESUF) +gcov-files-test-coroutine-y = coroutine-$(CONFIG_COROUTINE_BACKEND).c +check-unit-y += tests/test-visitor-serialization$(EXESUF) +check-unit-y += tests/test-iov$(EXESUF) +gcov-files-test-iov-y = util/iov.c +check-unit-y += tests/test-aio$(EXESUF) +check-unit-$(CONFIG_POSIX) += tests/test-rfifolock$(EXESUF) +check-unit-y += tests/test-throttle$(EXESUF) +gcov-files-test-aio-$(CONFIG_WIN32) = aio-win32.c +gcov-files-test-aio-$(CONFIG_POSIX) = aio-posix.c +check-unit-y += tests/test-thread-pool$(EXESUF) +gcov-files-test-thread-pool-y = thread-pool.c +gcov-files-test-hbitmap-y = util/hbitmap.c +check-unit-y += tests/test-hbitmap$(EXESUF) +check-unit-y += tests/test-x86-cpuid$(EXESUF) +# all code tested by test-x86-cpuid is inside topology.h +gcov-files-test-x86-cpuid-y = +ifeq ($(CONFIG_SOFTMMU),y) +check-unit-y += tests/test-xbzrle$(EXESUF) +gcov-files-test-xbzrle-y = migration/xbzrle.c +check-unit-$(CONFIG_POSIX) += tests/test-vmstate$(EXESUF) +endif +check-unit-y += tests/test-cutils$(EXESUF) +gcov-files-test-cutils-y += util/cutils.c +check-unit-y += tests/test-mul64$(EXESUF) +gcov-files-test-mul64-y = util/host-utils.c +check-unit-y += tests/test-int128$(EXESUF) +# all code tested by test-int128 is inside int128.h +gcov-files-test-int128-y = +check-unit-y += tests/rcutorture$(EXESUF) +gcov-files-rcutorture-y = util/rcu.c +check-unit-y += tests/test-rcu-list$(EXESUF) +gcov-files-test-rcu-list-y = util/rcu.c +check-unit-y += tests/test-bitops$(EXESUF) +check-unit-$(CONFIG_HAS_GLIB_SUBPROCESS_TESTS) += tests/test-qdev-global-props$(EXESUF) +check-unit-y += tests/check-qom-interface$(EXESUF) +gcov-files-check-qom-interface-y = qom/object.c +check-unit-y += tests/check-qom-proplist$(EXESUF) +gcov-files-check-qom-proplist-y = qom/object.c +check-unit-y += tests/test-qemu-opts$(EXESUF) +gcov-files-test-qemu-opts-y = qom/test-qemu-opts.c +check-unit-y += tests/test-write-threshold$(EXESUF) +gcov-files-test-write-threshold-y = block/write-threshold.c +check-unit-$(CONFIG_GNUTLS_HASH) += tests/test-crypto-hash$(EXESUF) +check-unit-y += tests/test-crypto-cipher$(EXESUF) +check-unit-$(CONFIG_GNUTLS) += tests/test-crypto-tlscredsx509$(EXESUF) +check-unit-$(CONFIG_GNUTLS) += tests/test-crypto-tlssession$(EXESUF) + +check-block-$(CONFIG_POSIX) += tests/qemu-iotests-quick.sh + +# All QTests for now are POSIX-only, but the dependencies are +# really in libqtest, not in the testcases themselves. + +gcov-files-ipack-y += hw/ipack/ipack.c +check-qtest-ipack-y += tests/ipoctal232-test$(EXESUF) +gcov-files-ipack-y += hw/char/ipoctal232.c + +check-qtest-virtioserial-y += tests/virtio-console-test$(EXESUF) +gcov-files-virtioserial-y += hw/char/virtio-console.c + +gcov-files-virtio-y += i386-softmmu/hw/virtio/virtio.c +check-qtest-virtio-y += tests/virtio-net-test$(EXESUF) +gcov-files-virtio-y += i386-softmmu/hw/net/virtio-net.c +check-qtest-virtio-y += tests/virtio-balloon-test$(EXESUF) +gcov-files-virtio-y += i386-softmmu/hw/virtio/virtio-balloon.c +check-qtest-virtio-y += tests/virtio-blk-test$(EXESUF) +gcov-files-virtio-y += i386-softmmu/hw/block/virtio-blk.c +check-qtest-virtio-y += tests/virtio-rng-test$(EXESUF) +gcov-files-virtio-y += hw/virtio/virtio-rng.c +check-qtest-virtio-y += tests/virtio-scsi-test$(EXESUF) +gcov-files-virtio-y += i386-softmmu/hw/scsi/virtio-scsi.c +ifeq ($(CONFIG_VIRTIO)$(CONFIG_VIRTFS)$(CONFIG_PCI),yyy) +check-qtest-virtio-y += tests/virtio-9p-test$(EXESUF) +gcov-files-virtio-y += hw/9pfs/virtio-9p.c +gcov-files-virtio-y += i386-softmmu/hw/9pfs/virtio-9p-device.c +endif +check-qtest-virtio-y += tests/virtio-serial-test$(EXESUF) +gcov-files-virtio-y += i386-softmmu/hw/char/virtio-serial-bus.c +check-qtest-virtio-y += $(check-qtest-virtioserial-y) +gcov-files-virtio-y += $(gcov-files-virtioserial-y) + +check-qtest-pci-y += tests/e1000-test$(EXESUF) +gcov-files-pci-y += hw/net/e1000.c +check-qtest-pci-y += tests/rtl8139-test$(EXESUF) +gcov-files-pci-y += hw/net/rtl8139.c +check-qtest-pci-y += tests/pcnet-test$(EXESUF) +gcov-files-pci-y += hw/net/pcnet.c +gcov-files-pci-y += hw/net/pcnet-pci.c +check-qtest-pci-y += tests/eepro100-test$(EXESUF) +gcov-files-pci-y += hw/net/eepro100.c +check-qtest-pci-y += tests/ne2000-test$(EXESUF) +gcov-files-pci-y += hw/net/ne2000.c +check-qtest-pci-y += tests/nvme-test$(EXESUF) +gcov-files-pci-y += hw/block/nvme.c +check-qtest-pci-y += tests/ac97-test$(EXESUF) +gcov-files-pci-y += hw/audio/ac97.c +check-qtest-pci-y += tests/es1370-test$(EXESUF) +gcov-files-pci-y += hw/audio/es1370.c +check-qtest-pci-y += $(check-qtest-virtio-y) +gcov-files-pci-y += $(gcov-files-virtio-y) hw/virtio/virtio-pci.c +check-qtest-pci-y += tests/tpci200-test$(EXESUF) +gcov-files-pci-y += hw/ipack/tpci200.c +check-qtest-pci-y += $(check-qtest-ipack-y) +gcov-files-pci-y += $(gcov-files-ipack-y) +check-qtest-pci-y += tests/display-vga-test$(EXESUF) +gcov-files-pci-y += hw/display/vga.c +gcov-files-pci-y += hw/display/cirrus_vga.c +gcov-files-pci-y += hw/display/vga-pci.c +gcov-files-pci-y += hw/display/virtio-gpu.c +gcov-files-pci-y += hw/display/virtio-gpu-pci.c +gcov-files-pci-$(CONFIG_VIRTIO_VGA) += hw/display/virtio-vga.c +check-qtest-pci-y += tests/intel-hda-test$(EXESUF) +gcov-files-pci-y += hw/audio/intel-hda.c hw/audio/hda-codec.c + +check-qtest-i386-y = tests/endianness-test$(EXESUF) +check-qtest-i386-y += tests/fdc-test$(EXESUF) +gcov-files-i386-y = hw/block/fdc.c +check-qtest-i386-y += tests/ide-test$(EXESUF) +check-qtest-i386-y += tests/ahci-test$(EXESUF) +check-qtest-i386-y += tests/hd-geo-test$(EXESUF) +gcov-files-i386-y += hw/block/hd-geometry.c +check-qtest-i386-y += tests/boot-order-test$(EXESUF) +check-qtest-i386-y += tests/bios-tables-test$(EXESUF) +check-qtest-i386-y += tests/rtc-test$(EXESUF) +check-qtest-i386-y += tests/i440fx-test$(EXESUF) +check-qtest-i386-y += tests/fw_cfg-test$(EXESUF) +check-qtest-i386-y += tests/drive_del-test$(EXESUF) +check-qtest-i386-y += tests/wdt_ib700-test$(EXESUF) +check-qtest-i386-y += tests/tco-test$(EXESUF) +gcov-files-i386-y += hw/watchdog/watchdog.c hw/watchdog/wdt_ib700.c +check-qtest-i386-y += $(check-qtest-pci-y) +gcov-files-i386-y += $(gcov-files-pci-y) +check-qtest-i386-y += tests/vmxnet3-test$(EXESUF) +gcov-files-i386-y += hw/net/vmxnet3.c +gcov-files-i386-y += hw/net/vmxnet_rx_pkt.c +gcov-files-i386-y += hw/net/vmxnet_tx_pkt.c +check-qtest-i386-y += tests/pvpanic-test$(EXESUF) +gcov-files-i386-y += i386-softmmu/hw/misc/pvpanic.c +check-qtest-i386-y += tests/i82801b11-test$(EXESUF) +gcov-files-i386-y += hw/pci-bridge/i82801b11.c +check-qtest-i386-y += tests/ioh3420-test$(EXESUF) +gcov-files-i386-y += hw/pci-bridge/ioh3420.c +check-qtest-i386-y += tests/usb-hcd-ohci-test$(EXESUF) +gcov-files-i386-y += hw/usb/hcd-ohci.c +check-qtest-i386-y += tests/usb-hcd-uhci-test$(EXESUF) +gcov-files-i386-y += hw/usb/hcd-uhci.c +check-qtest-i386-y += tests/usb-hcd-ehci-test$(EXESUF) +gcov-files-i386-y += hw/usb/hcd-ehci.c +gcov-files-i386-y += hw/usb/dev-hid.c +gcov-files-i386-y += hw/usb/dev-storage.c +check-qtest-i386-y += tests/usb-hcd-xhci-test$(EXESUF) +gcov-files-i386-y += hw/usb/hcd-xhci.c +check-qtest-i386-y += tests/pc-cpu-test$(EXESUF) +check-qtest-i386-y += tests/q35-test$(EXESUF) +gcov-files-i386-y += hw/pci-host/q35.c +ifeq ($(CONFIG_VHOST_NET),y) +check-qtest-i386-$(CONFIG_LINUX) += tests/vhost-user-test$(EXESUF) +endif +check-qtest-x86_64-y = $(check-qtest-i386-y) +gcov-files-i386-y += i386-softmmu/hw/timer/mc146818rtc.c +gcov-files-x86_64-y = $(subst i386-softmmu/,x86_64-softmmu/,$(gcov-files-i386-y)) +check-qtest-mips-y = tests/endianness-test$(EXESUF) +check-qtest-mips64-y = tests/endianness-test$(EXESUF) +check-qtest-mips64el-y = tests/endianness-test$(EXESUF) +check-qtest-ppc-y = tests/endianness-test$(EXESUF) +check-qtest-ppc64-y = tests/endianness-test$(EXESUF) +check-qtest-sh4-y = tests/endianness-test$(EXESUF) +check-qtest-sh4eb-y = tests/endianness-test$(EXESUF) +check-qtest-sparc64-y = tests/endianness-test$(EXESUF) +#check-qtest-sparc-y = tests/m48t59-test$(EXESUF) +#check-qtest-sparc64-y += tests/m48t59-test$(EXESUF) +gcov-files-sparc-y += hw/timer/m48t59.c +gcov-files-sparc64-y += hw/timer/m48t59.c +check-qtest-arm-y = tests/tmp105-test$(EXESUF) +check-qtest-arm-y = tests/ds1338-test$(EXESUF) +gcov-files-arm-y += hw/misc/tmp105.c +check-qtest-arm-y += tests/virtio-blk-test$(EXESUF) +gcov-files-arm-y += arm-softmmu/hw/block/virtio-blk.c +check-qtest-ppc-y += tests/boot-order-test$(EXESUF) +check-qtest-ppc64-y += tests/boot-order-test$(EXESUF) +check-qtest-ppc64-y += tests/spapr-phb-test$(EXESUF) +gcov-files-ppc64-y += ppc64-softmmu/hw/ppc/spapr_pci.c +check-qtest-microblazeel-y = $(check-qtest-microblaze-y) +check-qtest-xtensaeb-y = $(check-qtest-xtensa-y) + +# qom-test works for all sysemu architectures: +$(foreach target,$(SYSEMU_TARGET_LIST), \ + $(if $(findstring tests/qom-test$(EXESUF), $(check-qtest-$(target)-y)),, \ + $(eval check-qtest-$(target)-y += tests/qom-test$(EXESUF)))) + +check-qapi-schema-y := $(addprefix tests/qapi-schema/, \ + comments.json empty.json enum-empty.json enum-missing-data.json \ + enum-wrong-data.json enum-int-member.json enum-dict-member.json \ + enum-clash-member.json enum-max-member.json enum-union-clash.json \ + enum-bad-name.json enum-bad-prefix.json \ + funny-char.json indented-expr.json \ + missing-type.json bad-ident.json ident-with-escape.json \ + escape-outside-string.json unknown-escape.json \ + escape-too-short.json escape-too-big.json unicode-str.json \ + double-type.json bad-base.json bad-type-bool.json bad-type-int.json \ + bad-type-dict.json double-data.json unknown-expr-key.json \ + redefined-type.json redefined-command.json redefined-builtin.json \ + redefined-event.json command-int.json bad-data.json event-max.json \ + type-bypass-bad-gen.json \ + args-invalid.json \ + args-array-empty.json args-array-unknown.json args-int.json \ + args-unknown.json args-member-unknown.json args-member-array.json \ + args-member-array-bad.json args-alternate.json args-union.json \ + args-any.json \ + returns-array-bad.json returns-int.json returns-dict.json \ + returns-unknown.json returns-alternate.json returns-whitelist.json \ + missing-colon.json missing-comma-list.json missing-comma-object.json \ + struct-data-invalid.json struct-member-invalid.json \ + nested-struct-data.json non-objects.json \ + qapi-schema-test.json quoted-structural-chars.json \ + leading-comma-list.json leading-comma-object.json \ + trailing-comma-list.json trailing-comma-object.json \ + unclosed-list.json unclosed-object.json unclosed-string.json \ + duplicate-key.json union-invalid-base.json union-bad-branch.json \ + union-optional-branch.json union-unknown.json union-max.json \ + flat-union-optional-discriminator.json flat-union-no-base.json \ + flat-union-invalid-discriminator.json flat-union-inline.json \ + flat-union-invalid-branch-key.json flat-union-reverse-define.json \ + flat-union-string-discriminator.json union-base-no-discriminator.json \ + flat-union-bad-discriminator.json flat-union-bad-base.json \ + flat-union-base-any.json \ + flat-union-array-branch.json flat-union-int-branch.json \ + flat-union-base-union.json flat-union-branch-clash.json \ + alternate-nested.json alternate-unknown.json alternate-clash.json \ + alternate-good.json alternate-base.json alternate-array.json \ + alternate-conflict-string.json alternate-conflict-dict.json \ + include-simple.json include-relpath.json include-format-err.json \ + include-non-file.json include-no-file.json include-before-err.json \ + include-nested-err.json include-self-cycle.json include-cycle.json \ + include-repetition.json event-nest-struct.json event-case.json \ + struct-base-clash.json struct-base-clash-deep.json ) + +GENERATED_HEADERS += tests/test-qapi-types.h tests/test-qapi-visit.h \ + tests/test-qmp-commands.h tests/test-qapi-event.h \ + tests/test-qmp-introspect.h + +test-obj-y = tests/check-qint.o tests/check-qstring.o tests/check-qdict.o \ + tests/check-qlist.o tests/check-qfloat.o tests/check-qjson.o \ + tests/test-coroutine.o tests/test-string-output-visitor.o \ + tests/test-string-input-visitor.o tests/test-qmp-output-visitor.o \ + tests/test-qmp-input-visitor.o tests/test-qmp-input-strict.o \ + tests/test-qmp-commands.o tests/test-visitor-serialization.o \ + tests/test-x86-cpuid.o tests/test-mul64.o tests/test-int128.o \ + tests/test-opts-visitor.o tests/test-qmp-event.o \ + tests/rcutorture.o tests/test-rcu-list.o + +$(test-obj-y): QEMU_INCLUDES += -Itests +QEMU_CFLAGS += -I$(SRC_PATH)/tests + + +# Deps that are common to various different sets of tests below +test-util-obj-y = libqemuutil.a libqemustub.a +test-qom-obj-y = $(qom-obj-y) $(test-util-obj-y) +test-qapi-obj-y = tests/test-qapi-visit.o tests/test-qapi-types.o \ + tests/test-qapi-event.o tests/test-qmp-introspect.o \ + $(test-qom-obj-y) +test-crypto-obj-y = $(crypto-obj-y) $(test-qom-obj-y) +test-block-obj-y = $(block-obj-y) $(test-crypto-obj-y) + +tests/check-qint$(EXESUF): tests/check-qint.o $(test-util-obj-y) +tests/check-qstring$(EXESUF): tests/check-qstring.o $(test-util-obj-y) +tests/check-qdict$(EXESUF): tests/check-qdict.o $(test-util-obj-y) +tests/check-qlist$(EXESUF): tests/check-qlist.o $(test-util-obj-y) +tests/check-qfloat$(EXESUF): tests/check-qfloat.o $(test-util-obj-y) +tests/check-qjson$(EXESUF): tests/check-qjson.o $(test-util-obj-y) +tests/check-qom-interface$(EXESUF): tests/check-qom-interface.o $(test-qom-obj-y) +tests/check-qom-proplist$(EXESUF): tests/check-qom-proplist.o $(test-qom-obj-y) +tests/test-coroutine$(EXESUF): tests/test-coroutine.o $(test-block-obj-y) +tests/test-aio$(EXESUF): tests/test-aio.o $(test-block-obj-y) +tests/test-rfifolock$(EXESUF): tests/test-rfifolock.o $(test-util-obj-y) +tests/test-throttle$(EXESUF): tests/test-throttle.o $(test-block-obj-y) +tests/test-thread-pool$(EXESUF): tests/test-thread-pool.o $(test-block-obj-y) +tests/test-iov$(EXESUF): tests/test-iov.o $(test-util-obj-y) +tests/test-hbitmap$(EXESUF): tests/test-hbitmap.o $(test-util-obj-y) +tests/test-x86-cpuid$(EXESUF): tests/test-x86-cpuid.o +tests/test-xbzrle$(EXESUF): tests/test-xbzrle.o migration/xbzrle.o page_cache.o $(test-util-obj-y) +tests/test-cutils$(EXESUF): tests/test-cutils.o util/cutils.o +tests/test-int128$(EXESUF): tests/test-int128.o +tests/rcutorture$(EXESUF): tests/rcutorture.o $(test-util-obj-y) +tests/test-rcu-list$(EXESUF): tests/test-rcu-list.o $(test-util-obj-y) + +tests/test-qdev-global-props$(EXESUF): tests/test-qdev-global-props.o \ + hw/core/qdev.o hw/core/qdev-properties.o hw/core/hotplug.o\ + hw/core/irq.o \ + hw/core/fw-path-provider.o \ + $(test-qapi-obj-y) +tests/test-vmstate$(EXESUF): tests/test-vmstate.o \ + migration/vmstate.o migration/qemu-file.o migration/qemu-file-buf.o \ + migration/qemu-file-unix.o qjson.o \ + $(test-qom-obj-y) + +tests/test-qapi-types.c tests/test-qapi-types.h :\ +$(SRC_PATH)/tests/qapi-schema/qapi-schema-test.json $(SRC_PATH)/scripts/qapi-types.py $(qapi-py) + $(call quiet-command,$(PYTHON) $(SRC_PATH)/scripts/qapi-types.py \ + $(gen-out-type) -o tests -p "test-" $<, \ + " GEN $@") +tests/test-qapi-visit.c tests/test-qapi-visit.h :\ +$(SRC_PATH)/tests/qapi-schema/qapi-schema-test.json $(SRC_PATH)/scripts/qapi-visit.py $(qapi-py) + $(call quiet-command,$(PYTHON) $(SRC_PATH)/scripts/qapi-visit.py \ + $(gen-out-type) -o tests -p "test-" $<, \ + " GEN $@") +tests/test-qmp-commands.h tests/test-qmp-marshal.c :\ +$(SRC_PATH)/tests/qapi-schema/qapi-schema-test.json $(SRC_PATH)/scripts/qapi-commands.py $(qapi-py) + $(call quiet-command,$(PYTHON) $(SRC_PATH)/scripts/qapi-commands.py \ + $(gen-out-type) -o tests -p "test-" $<, \ + " GEN $@") +tests/test-qapi-event.c tests/test-qapi-event.h :\ +$(SRC_PATH)/tests/qapi-schema/qapi-schema-test.json $(SRC_PATH)/scripts/qapi-event.py $(qapi-py) + $(call quiet-command,$(PYTHON) $(SRC_PATH)/scripts/qapi-event.py \ + $(gen-out-type) -o tests -p "test-" $<, \ + " GEN $@") +tests/test-qmp-introspect.c tests/test-qmp-introspect.h :\ +$(SRC_PATH)/tests/qapi-schema/qapi-schema-test.json $(SRC_PATH)/scripts/qapi-introspect.py $(qapi-py) + $(call quiet-command,$(PYTHON) $(SRC_PATH)/scripts/qapi-introspect.py \ + $(gen-out-type) -o tests -p "test-" $<, \ + " GEN $@") + +tests/test-string-output-visitor$(EXESUF): tests/test-string-output-visitor.o $(test-qapi-obj-y) +tests/test-string-input-visitor$(EXESUF): tests/test-string-input-visitor.o $(test-qapi-obj-y) +tests/test-qmp-event$(EXESUF): tests/test-qmp-event.o $(test-qapi-obj-y) +tests/test-qmp-output-visitor$(EXESUF): tests/test-qmp-output-visitor.o $(test-qapi-obj-y) +tests/test-qmp-input-visitor$(EXESUF): tests/test-qmp-input-visitor.o $(test-qapi-obj-y) +tests/test-qmp-input-strict$(EXESUF): tests/test-qmp-input-strict.o $(test-qapi-obj-y) +tests/test-qmp-commands$(EXESUF): tests/test-qmp-commands.o tests/test-qmp-marshal.o $(test-qapi-obj-y) +tests/test-visitor-serialization$(EXESUF): tests/test-visitor-serialization.o $(test-qapi-obj-y) +tests/test-opts-visitor$(EXESUF): tests/test-opts-visitor.o $(test-qapi-obj-y) + +tests/test-mul64$(EXESUF): tests/test-mul64.o $(test-util-obj-y) +tests/test-bitops$(EXESUF): tests/test-bitops.o $(test-util-obj-y) +tests/test-crypto-hash$(EXESUF): tests/test-crypto-hash.o $(test-crypto-obj-y) +tests/test-crypto-cipher$(EXESUF): tests/test-crypto-cipher.o $(test-crypto-obj-y) +tests/test-crypto-tlscredsx509$(EXESUF): tests/test-crypto-tlscredsx509.o \ + tests/crypto-tls-x509-helpers.o tests/pkix_asn1_tab.o $(test-crypto-obj-y) +tests/test-crypto-tlssession$(EXESUF): tests/test-crypto-tlssession.o \ + tests/crypto-tls-x509-helpers.o tests/pkix_asn1_tab.o $(test-crypto-obj-y) + +libqos-obj-y = tests/libqos/pci.o tests/libqos/fw_cfg.o tests/libqos/malloc.o +libqos-obj-y += tests/libqos/i2c.o tests/libqos/libqos.o +libqos-pc-obj-y = $(libqos-obj-y) tests/libqos/pci-pc.o +libqos-pc-obj-y += tests/libqos/malloc-pc.o tests/libqos/libqos-pc.o +libqos-pc-obj-y += tests/libqos/ahci.o +libqos-omap-obj-y = $(libqos-obj-y) tests/libqos/i2c-omap.o +libqos-imx-obj-y = $(libqos-obj-y) tests/libqos/i2c-imx.o +libqos-usb-obj-y = $(libqos-pc-obj-y) tests/libqos/usb.o +libqos-virtio-obj-y = $(libqos-pc-obj-y) tests/libqos/virtio.o tests/libqos/virtio-pci.o tests/libqos/virtio-mmio.o tests/libqos/malloc-generic.o + +tests/rtc-test$(EXESUF): tests/rtc-test.o +tests/m48t59-test$(EXESUF): tests/m48t59-test.o +tests/endianness-test$(EXESUF): tests/endianness-test.o +tests/spapr-phb-test$(EXESUF): tests/spapr-phb-test.o $(libqos-obj-y) +tests/fdc-test$(EXESUF): tests/fdc-test.o +tests/ide-test$(EXESUF): tests/ide-test.o $(libqos-pc-obj-y) +tests/ahci-test$(EXESUF): tests/ahci-test.o $(libqos-pc-obj-y) +tests/hd-geo-test$(EXESUF): tests/hd-geo-test.o +tests/boot-order-test$(EXESUF): tests/boot-order-test.o $(libqos-obj-y) +tests/bios-tables-test$(EXESUF): tests/bios-tables-test.o $(libqos-obj-y) +tests/tmp105-test$(EXESUF): tests/tmp105-test.o $(libqos-omap-obj-y) +tests/ds1338-test$(EXESUF): tests/ds1338-test.o $(libqos-imx-obj-y) +tests/i440fx-test$(EXESUF): tests/i440fx-test.o $(libqos-pc-obj-y) +tests/q35-test$(EXESUF): tests/q35-test.o $(libqos-pc-obj-y) +tests/fw_cfg-test$(EXESUF): tests/fw_cfg-test.o $(libqos-pc-obj-y) +tests/e1000-test$(EXESUF): tests/e1000-test.o +tests/rtl8139-test$(EXESUF): tests/rtl8139-test.o $(libqos-pc-obj-y) +tests/pcnet-test$(EXESUF): tests/pcnet-test.o +tests/eepro100-test$(EXESUF): tests/eepro100-test.o +tests/vmxnet3-test$(EXESUF): tests/vmxnet3-test.o +tests/ne2000-test$(EXESUF): tests/ne2000-test.o +tests/wdt_ib700-test$(EXESUF): tests/wdt_ib700-test.o +tests/tco-test$(EXESUF): tests/tco-test.o $(libqos-pc-obj-y) +tests/virtio-balloon-test$(EXESUF): tests/virtio-balloon-test.o +tests/virtio-blk-test$(EXESUF): tests/virtio-blk-test.o $(libqos-virtio-obj-y) +tests/virtio-net-test$(EXESUF): tests/virtio-net-test.o $(libqos-pc-obj-y) $(libqos-virtio-obj-y) +tests/virtio-rng-test$(EXESUF): tests/virtio-rng-test.o $(libqos-pc-obj-y) +tests/virtio-scsi-test$(EXESUF): tests/virtio-scsi-test.o $(libqos-virtio-obj-y) +tests/virtio-9p-test$(EXESUF): tests/virtio-9p-test.o +tests/virtio-serial-test$(EXESUF): tests/virtio-serial-test.o +tests/virtio-console-test$(EXESUF): tests/virtio-console-test.o +tests/tpci200-test$(EXESUF): tests/tpci200-test.o +tests/display-vga-test$(EXESUF): tests/display-vga-test.o +tests/ipoctal232-test$(EXESUF): tests/ipoctal232-test.o +tests/qom-test$(EXESUF): tests/qom-test.o +tests/drive_del-test$(EXESUF): tests/drive_del-test.o $(libqos-pc-obj-y) +tests/qdev-monitor-test$(EXESUF): tests/qdev-monitor-test.o $(libqos-pc-obj-y) +tests/nvme-test$(EXESUF): tests/nvme-test.o +tests/pvpanic-test$(EXESUF): tests/pvpanic-test.o +tests/i82801b11-test$(EXESUF): tests/i82801b11-test.o +tests/ac97-test$(EXESUF): tests/ac97-test.o +tests/es1370-test$(EXESUF): tests/es1370-test.o +tests/intel-hda-test$(EXESUF): tests/intel-hda-test.o +tests/ioh3420-test$(EXESUF): tests/ioh3420-test.o +tests/usb-hcd-ohci-test$(EXESUF): tests/usb-hcd-ohci-test.o $(libqos-usb-obj-y) +tests/usb-hcd-uhci-test$(EXESUF): tests/usb-hcd-uhci-test.o $(libqos-usb-obj-y) +tests/usb-hcd-ehci-test$(EXESUF): tests/usb-hcd-ehci-test.o $(libqos-usb-obj-y) +tests/usb-hcd-xhci-test$(EXESUF): tests/usb-hcd-xhci-test.o $(libqos-usb-obj-y) +tests/pc-cpu-test$(EXESUF): tests/pc-cpu-test.o +tests/vhost-user-test$(EXESUF): tests/vhost-user-test.o qemu-char.o qemu-timer.o $(qtest-obj-y) +tests/qemu-iotests/socket_scm_helper$(EXESUF): tests/qemu-iotests/socket_scm_helper.o +tests/test-qemu-opts$(EXESUF): tests/test-qemu-opts.o $(test-util-obj-y) +tests/test-write-threshold$(EXESUF): tests/test-write-threshold.o $(test-block-obj-y) + +ifeq ($(CONFIG_POSIX),y) +LIBS += -lutil +endif +LIBS += $(TEST_LIBS) +CFLAGS += $(TEST_CFLAGS) + +# QTest rules + +TARGETS=$(patsubst %-softmmu,%, $(filter %-softmmu,$(TARGET_DIRS))) +ifeq ($(CONFIG_POSIX),y) +QTEST_TARGETS=$(foreach TARGET,$(TARGETS), $(if $(check-qtest-$(TARGET)-y), $(TARGET),)) +check-qtest-y=$(foreach TARGET,$(TARGETS), $(check-qtest-$(TARGET)-y)) +endif + +qtest-obj-y = tests/libqtest.o $(test-util-obj-y) +$(check-qtest-y): $(qtest-obj-y) + +.PHONY: check-help +check-help: + @echo "Regression testing targets:" + @echo + @echo " make check Run all tests" + @echo " make check-qtest-TARGET Run qtest tests for given target" + @echo " make check-qtest Run qtest tests" + @echo " make check-unit Run qobject tests" + @echo " make check-qapi-schema Run QAPI schema tests" + @echo " make check-block Run block tests" + @echo " make check-report.html Generates an HTML test report" + @echo " make check-clean Clean the tests" + @echo + @echo "Please note that HTML reports do not regenerate if the unit tests" + @echo "has not changed." + @echo + @echo "The variable SPEED can be set to control the gtester speed setting." + @echo "Default options are -k and (for make V=1) --verbose; they can be" + @echo "changed with variable GTESTER_OPTIONS." + +SPEED = quick +GTESTER_OPTIONS = -k $(if $(V),--verbose,-q) +GCOV_OPTIONS = -n $(if $(V),-f,) + +# gtester tests, possibly with verbose output + +.PHONY: $(patsubst %, check-qtest-%, $(QTEST_TARGETS)) +$(patsubst %, check-qtest-%, $(QTEST_TARGETS)): check-qtest-%: $(check-qtest-y) + $(if $(CONFIG_GCOV),@rm -f *.gcda */*.gcda */*/*.gcda */*/*/*.gcda,) + $(call quiet-command,QTEST_QEMU_BINARY=$*-softmmu/qemu-system-$* \ + QTEST_QEMU_IMG=qemu-img$(EXESUF) \ + MALLOC_PERTURB_=$${MALLOC_PERTURB_:-$$((RANDOM % 255 + 1))} \ + gtester $(GTESTER_OPTIONS) -m=$(SPEED) $(check-qtest-$*-y),"GTESTER $@") + $(if $(CONFIG_GCOV),@for f in $(gcov-files-$*-y); do \ + echo Gcov report for $$f:;\ + $(GCOV) $(GCOV_OPTIONS) $$f -o `dirname $$f`; \ + done,) + +.PHONY: $(patsubst %, check-%, $(check-unit-y)) +$(patsubst %, check-%, $(check-unit-y)): check-%: % + $(if $(CONFIG_GCOV),@rm -f *.gcda */*.gcda */*/*.gcda */*/*/*.gcda,) + $(call quiet-command, \ + MALLOC_PERTURB_=$${MALLOC_PERTURB_:-$$((RANDOM % 255 + 1))} \ + gtester $(GTESTER_OPTIONS) -m=$(SPEED) $*,"GTESTER $*") + $(if $(CONFIG_GCOV),@for f in $(gcov-files-$(subst tests/,,$*)-y); do \ + echo Gcov report for $$f:;\ + $(GCOV) $(GCOV_OPTIONS) $$f -o `dirname $$f`; \ + done,) + +# gtester tests with XML output + +$(patsubst %, check-report-qtest-%.xml, $(QTEST_TARGETS)): check-report-qtest-%.xml: $(check-qtest-y) + $(call quiet-command,QTEST_QEMU_BINARY=$*-softmmu/qemu-system-$* \ + QTEST_QEMU_IMG=qemu-img$(EXESUF) \ + gtester -q $(GTESTER_OPTIONS) -o $@ -m=$(SPEED) $(check-qtest-$*-y),"GTESTER $@") + +check-report-unit.xml: $(check-unit-y) + $(call quiet-command,gtester -q $(GTESTER_OPTIONS) -o $@ -m=$(SPEED) $^, "GTESTER $@") + +# Reports and overall runs + +check-report.xml: $(patsubst %,check-report-qtest-%.xml, $(QTEST_TARGETS)) check-report-unit.xml + $(call quiet-command,$(SRC_PATH)/scripts/gtester-cat $^ > $@, " GEN $@") + +check-report.html: check-report.xml + $(call quiet-command,gtester-report $< > $@, " GEN $@") + + +# Other tests + +QEMU_IOTESTS_HELPERS-$(CONFIG_LINUX) = tests/qemu-iotests/socket_scm_helper$(EXESUF) + +.PHONY: check-tests/qemu-iotests-quick.sh +check-tests/qemu-iotests-quick.sh: tests/qemu-iotests-quick.sh qemu-img$(EXESUF) qemu-io$(EXESUF) $(QEMU_IOTESTS_HELPERS-y) + $< + +.PHONY: check-tests/test-qapi.py +check-tests/test-qapi.py: tests/test-qapi.py + +.PHONY: $(patsubst %, check-%, $(check-qapi-schema-y)) +$(patsubst %, check-%, $(check-qapi-schema-y)): check-%.json: $(SRC_PATH)/%.json + $(call quiet-command, PYTHONPATH=$(SRC_PATH)/scripts \ + $(PYTHON) $(SRC_PATH)/tests/qapi-schema/test-qapi.py \ + $^ >$*.test.out 2>$*.test.err; \ + echo $$? >$*.test.exit, \ + " TEST $*.out") + @diff -q $(SRC_PATH)/$*.out $*.test.out + @# Sanitize error messages (make them independent of build directory) + @perl -p -e 's|\Q$(SRC_PATH)\E/||g' $*.test.err | diff -q $(SRC_PATH)/$*.err - + @diff -q $(SRC_PATH)/$*.exit $*.test.exit + +# Consolidated targets + +.PHONY: check-qapi-schema check-qtest check-unit check check-clean +check-qapi-schema: $(patsubst %,check-%, $(check-qapi-schema-y)) +check-qtest: $(patsubst %,check-qtest-%, $(QTEST_TARGETS)) +check-unit: $(patsubst %,check-%, $(check-unit-y)) +check-block: $(patsubst %,check-%, $(check-block-y)) +check: check-qapi-schema check-unit check-qtest +check-clean: + $(MAKE) -C tests/tcg clean + rm -rf $(check-unit-y) tests/*.o $(QEMU_IOTESTS_HELPERS-y) + rm -rf $(sort $(foreach target,$(SYSEMU_TARGET_LIST), $(check-qtest-$(target)-y))) + +clean: check-clean + +# Build the help program automatically + +all: $(QEMU_IOTESTS_HELPERS-y) + +-include $(wildcard tests/*.d) +-include $(wildcard tests/libqos/*.d) diff --git a/tests/bios-tables-test.c.orig b/tests/bios-tables-test.c.orig new file mode 100644 index 0000000000..d455b2abfc --- /dev/null +++ b/tests/bios-tables-test.c.orig @@ -0,0 +1,925 @@ +/* + * Boot order test cases. + * + * Copyright (c) 2013 Red Hat Inc. + * + * Authors: + * Michael S. Tsirkin , + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#include "qemu/osdep.h" +#include +#include "qemu-common.h" +#include "hw/firmware/smbios.h" +#include "qemu/bitmap.h" +#include "acpi-utils.h" +#include "boot-sector.h" + +#define MACHINE_PC "pc" +#define MACHINE_Q35 "q35" + +#define ACPI_REBUILD_EXPECTED_AML "TEST_ACPI_REBUILD_AML" + +typedef struct { + const char *machine; + const char *variant; + uint32_t rsdp_addr; + uint8_t rsdp_table[36 /* ACPI 2.0+ RSDP size */]; + AcpiRsdtDescriptorRev1 rsdt_table; + uint32_t dsdt_addr; + uint32_t facs_addr; + AcpiFacsDescriptorRev1 facs_table; + uint32_t *rsdt_tables_addr; + int rsdt_tables_nr; + GArray *tables; + uint32_t smbios_ep_addr; + struct smbios_21_entry_point smbios_ep_table; + uint8_t *required_struct_types; + int required_struct_types_len; + QTestState *qts; +} test_data; + +static char disk[] = "tests/acpi-test-disk-XXXXXX"; +static const char *data_dir = "tests/data/acpi"; +#ifdef CONFIG_IASL +static const char *iasl = stringify(CONFIG_IASL); +#else +static const char *iasl; +#endif + +static void free_test_data(test_data *data) +{ + AcpiSdtTable *temp; + int i; + + g_free(data->rsdt_tables_addr); + + for (i = 0; i < data->tables->len; ++i) { + temp = &g_array_index(data->tables, AcpiSdtTable, i); + g_free(temp->aml); + if (temp->aml_file && + !temp->tmp_files_retain && + g_strstr_len(temp->aml_file, -1, "aml-")) { + unlink(temp->aml_file); + } + g_free(temp->aml_file); + g_free(temp->asl); + if (temp->asl_file && + !temp->tmp_files_retain) { + unlink(temp->asl_file); + } + g_free(temp->asl_file); + } + + g_array_free(data->tables, true); +} + +static void test_acpi_rsdp_address(test_data *data) +{ + uint32_t off = acpi_find_rsdp_address(data->qts); + g_assert_cmphex(off, <, 0x100000); + data->rsdp_addr = off; +} + +static void test_acpi_rsdp_table(test_data *data) +{ + uint8_t *rsdp_table = data->rsdp_table, revision; + uint32_t addr = data->rsdp_addr; + + acpi_parse_rsdp_table(data->qts, addr, rsdp_table); + revision = rsdp_table[15 /* Revision offset */]; + + switch (revision) { + case 0: /* ACPI 1.0 RSDP */ + /* With rev 1, checksum is only for the first 20 bytes */ + g_assert(!acpi_calc_checksum(rsdp_table, 20)); + break; + case 2: /* ACPI 2.0+ RSDP */ + /* With revision 2, we have 2 checksums */ + g_assert(!acpi_calc_checksum(rsdp_table, 20)); + g_assert(!acpi_calc_checksum(rsdp_table, 36)); + break; + default: + g_assert_not_reached(); + } +} + +static void test_acpi_rsdt_table(test_data *data) +{ + AcpiRsdtDescriptorRev1 *rsdt_table = &data->rsdt_table; + uint32_t addr = acpi_get_rsdt_address(data->rsdp_table); + uint32_t *tables; + int tables_nr; + uint8_t checksum; + uint32_t rsdt_table_length; + + /* read the header */ + ACPI_READ_TABLE_HEADER(data->qts, rsdt_table, addr); + ACPI_ASSERT_CMP(rsdt_table->signature, "RSDT"); + + rsdt_table_length = le32_to_cpu(rsdt_table->length); + + /* compute the table entries in rsdt */ + tables_nr = (rsdt_table_length - sizeof(AcpiRsdtDescriptorRev1)) / + sizeof(uint32_t); + g_assert(tables_nr > 0); + + /* get the addresses of the tables pointed by rsdt */ + tables = g_new0(uint32_t, tables_nr); + ACPI_READ_ARRAY_PTR(data->qts, tables, tables_nr, addr); + + checksum = acpi_calc_checksum((uint8_t *)rsdt_table, rsdt_table_length) + + acpi_calc_checksum((uint8_t *)tables, + tables_nr * sizeof(uint32_t)); + g_assert(!checksum); + + /* SSDT tables after FADT */ + data->rsdt_tables_addr = tables; + data->rsdt_tables_nr = tables_nr; +} + +static void fadt_fetch_facs_and_dsdt_ptrs(test_data *data) +{ + uint32_t addr; + AcpiTableHeader hdr; + + /* FADT table comes first */ + addr = le32_to_cpu(data->rsdt_tables_addr[0]); + ACPI_READ_TABLE_HEADER(data->qts, &hdr, addr); + ACPI_ASSERT_CMP(hdr.signature, "FACP"); + + ACPI_READ_FIELD(data->qts, data->facs_addr, addr); + ACPI_READ_FIELD(data->qts, data->dsdt_addr, addr); +} + +static void sanitize_fadt_ptrs(test_data *data) +{ + /* fixup pointers in FADT */ + int i; + + for (i = 0; i < data->tables->len; i++) { + AcpiSdtTable *sdt = &g_array_index(data->tables, AcpiSdtTable, i); + + if (memcmp(&sdt->header.signature, "FACP", 4)) { + continue; + } + + /* check original FADT checksum before sanitizing table */ + g_assert(!(uint8_t)( + acpi_calc_checksum((uint8_t *)sdt, sizeof(AcpiTableHeader)) + + acpi_calc_checksum((uint8_t *)sdt->aml, sdt->aml_len) + )); + + /* sdt->aml field offset := spec offset - header size */ + memset(sdt->aml + 0, 0, 4); /* sanitize FIRMWARE_CTRL(36) ptr */ + memset(sdt->aml + 4, 0, 4); /* sanitize DSDT(40) ptr */ + if (sdt->header.revision >= 3) { + memset(sdt->aml + 96, 0, 8); /* sanitize X_FIRMWARE_CTRL(132) ptr */ + memset(sdt->aml + 104, 0, 8); /* sanitize X_DSDT(140) ptr */ + } + + /* update checksum */ + sdt->header.checksum = 0; + sdt->header.checksum -= + acpi_calc_checksum((uint8_t *)sdt, sizeof(AcpiTableHeader)) + + acpi_calc_checksum((uint8_t *)sdt->aml, sdt->aml_len); + break; + } +} + +static void test_acpi_facs_table(test_data *data) +{ + AcpiFacsDescriptorRev1 *facs_table = &data->facs_table; + uint32_t addr = le32_to_cpu(data->facs_addr); + + ACPI_READ_FIELD(data->qts, facs_table->signature, addr); + ACPI_READ_FIELD(data->qts, facs_table->length, addr); + ACPI_READ_FIELD(data->qts, facs_table->hardware_signature, addr); + ACPI_READ_FIELD(data->qts, facs_table->firmware_waking_vector, addr); + ACPI_READ_FIELD(data->qts, facs_table->global_lock, addr); + ACPI_READ_FIELD(data->qts, facs_table->flags, addr); + ACPI_READ_ARRAY(data->qts, facs_table->resverved3, addr); + + ACPI_ASSERT_CMP(facs_table->signature, "FACS"); +} + +/** fetch_table + * load ACPI table at @addr into table descriptor @sdt_table + * and check that header checksum matches actual one. + */ +static void fetch_table(QTestState *qts, AcpiSdtTable *sdt_table, uint32_t addr) +{ + uint8_t checksum; + + memset(sdt_table, 0, sizeof(*sdt_table)); + ACPI_READ_TABLE_HEADER(qts, &sdt_table->header, addr); + + sdt_table->aml_len = le32_to_cpu(sdt_table->header.length) + - sizeof(AcpiTableHeader); + sdt_table->aml = g_malloc0(sdt_table->aml_len); + ACPI_READ_ARRAY_PTR(qts, sdt_table->aml, sdt_table->aml_len, addr); + + checksum = acpi_calc_checksum((uint8_t *)sdt_table, + sizeof(AcpiTableHeader)) + + acpi_calc_checksum((uint8_t *)sdt_table->aml, + sdt_table->aml_len); + g_assert(!checksum); +} + +static void test_acpi_dsdt_table(test_data *data) +{ + AcpiSdtTable dsdt_table; + uint32_t addr = le32_to_cpu(data->dsdt_addr); + + fetch_table(data->qts, &dsdt_table, addr); + ACPI_ASSERT_CMP(dsdt_table.header.signature, "DSDT"); + + /* Since DSDT isn't in RSDT, add DSDT to ASL test tables list manually */ + g_array_append_val(data->tables, dsdt_table); +} + +/* Load all tables and add to test list directly RSDT referenced tables */ +static void fetch_rsdt_referenced_tables(test_data *data) +{ + int tables_nr = data->rsdt_tables_nr; + int i; + + for (i = 0; i < tables_nr; i++) { + AcpiSdtTable ssdt_table; + uint32_t addr; + + addr = le32_to_cpu(data->rsdt_tables_addr[i]); + fetch_table(data->qts, &ssdt_table, addr); + + /* Add table to ASL test tables list */ + g_array_append_val(data->tables, ssdt_table); + } +} + +static void dump_aml_files(test_data *data, bool rebuild) +{ + AcpiSdtTable *sdt; + GError *error = NULL; + gchar *aml_file = NULL; + gint fd; + ssize_t ret; + int i; + + for (i = 0; i < data->tables->len; ++i) { + const char *ext = data->variant ? data->variant : ""; + sdt = &g_array_index(data->tables, AcpiSdtTable, i); + g_assert(sdt->aml); + + if (rebuild) { + aml_file = g_strdup_printf("%s/%s/%.4s%s", data_dir, data->machine, + (gchar *)&sdt->header.signature, ext); + fd = g_open(aml_file, O_WRONLY|O_TRUNC|O_CREAT, + S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP|S_IROTH); + } else { + fd = g_file_open_tmp("aml-XXXXXX", &sdt->aml_file, &error); + g_assert_no_error(error); + } + g_assert(fd >= 0); + + ret = qemu_write_full(fd, sdt, sizeof(AcpiTableHeader)); + g_assert(ret == sizeof(AcpiTableHeader)); + ret = qemu_write_full(fd, sdt->aml, sdt->aml_len); + g_assert(ret == sdt->aml_len); + + close(fd); + + g_free(aml_file); + } +} + +static bool compare_signature(AcpiSdtTable *sdt, const char *signature) +{ + return !memcmp(&sdt->header.signature, signature, 4); +} + +static bool load_asl(GArray *sdts, AcpiSdtTable *sdt) +{ + AcpiSdtTable *temp; + GError *error = NULL; + GString *command_line = g_string_new(iasl); + gint fd; + gchar *out, *out_err; + gboolean ret; + int i; + + fd = g_file_open_tmp("asl-XXXXXX.dsl", &sdt->asl_file, &error); + g_assert_no_error(error); + close(fd); + + /* build command line */ + g_string_append_printf(command_line, " -p %s ", sdt->asl_file); + if (compare_signature(sdt, "DSDT") || + compare_signature(sdt, "SSDT")) { + for (i = 0; i < sdts->len; ++i) { + temp = &g_array_index(sdts, AcpiSdtTable, i); + if (compare_signature(temp, "DSDT") || + compare_signature(temp, "SSDT")) { + g_string_append_printf(command_line, "-e %s ", temp->aml_file); + } + } + } + g_string_append_printf(command_line, "-d %s", sdt->aml_file); + + /* pass 'out' and 'out_err' in order to be redirected */ + ret = g_spawn_command_line_sync(command_line->str, &out, &out_err, NULL, &error); + g_assert_no_error(error); + if (ret) { + ret = g_file_get_contents(sdt->asl_file, &sdt->asl, + &sdt->asl_len, &error); + g_assert(ret); + g_assert_no_error(error); + ret = (sdt->asl_len > 0); + } + + g_free(out); + g_free(out_err); + g_string_free(command_line, true); + + return !ret; +} + +#define COMMENT_END "*/" +#define DEF_BLOCK "DefinitionBlock (" +#define BLOCK_NAME_END "," + +static GString *normalize_asl(gchar *asl_code) +{ + GString *asl = g_string_new(asl_code); + gchar *comment, *block_name; + + /* strip comments (different generation days) */ + comment = g_strstr_len(asl->str, asl->len, COMMENT_END); + if (comment) { + comment += strlen(COMMENT_END); + while (*comment == '\n') { + comment++; + } + asl = g_string_erase(asl, 0, comment - asl->str); + } + + /* strip def block name (it has file path in it) */ + if (g_str_has_prefix(asl->str, DEF_BLOCK)) { + block_name = g_strstr_len(asl->str, asl->len, BLOCK_NAME_END); + g_assert(block_name); + asl = g_string_erase(asl, 0, + block_name + sizeof(BLOCK_NAME_END) - asl->str); + } + + return asl; +} + +static GArray *load_expected_aml(test_data *data) +{ + int i; + AcpiSdtTable *sdt; + GError *error = NULL; + gboolean ret; + + GArray *exp_tables = g_array_new(false, true, sizeof(AcpiSdtTable)); + if (getenv("V")) { + fputc('\n', stderr); + } + for (i = 0; i < data->tables->len; ++i) { + AcpiSdtTable exp_sdt; + gchar *aml_file = NULL; + const char *ext = data->variant ? data->variant : ""; + + sdt = &g_array_index(data->tables, AcpiSdtTable, i); + + memset(&exp_sdt, 0, sizeof(exp_sdt)); + exp_sdt.header.signature = sdt->header.signature; + +try_again: + aml_file = g_strdup_printf("%s/%s/%.4s%s", data_dir, data->machine, + (gchar *)&sdt->header.signature, ext); + if (getenv("V")) { + fprintf(stderr, "Looking for expected file '%s'\n", aml_file); + } + if (g_file_test(aml_file, G_FILE_TEST_EXISTS)) { + exp_sdt.aml_file = aml_file; + } else if (*ext != '\0') { + /* try fallback to generic (extension less) expected file */ + ext = ""; + g_free(aml_file); + goto try_again; + } + g_assert(exp_sdt.aml_file); + if (getenv("V")) { + fprintf(stderr, "Using expected file '%s'\n", aml_file); + } + ret = g_file_get_contents(aml_file, &exp_sdt.aml, + &exp_sdt.aml_len, &error); + g_assert(ret); + g_assert_no_error(error); + g_assert(exp_sdt.aml); + g_assert(exp_sdt.aml_len); + + g_array_append_val(exp_tables, exp_sdt); + } + + return exp_tables; +} + +/* test the list of tables in @data->tables against reference tables */ +static void test_acpi_asl(test_data *data) +{ + int i; + AcpiSdtTable *sdt, *exp_sdt; + test_data exp_data; + gboolean exp_err, err; + + memset(&exp_data, 0, sizeof(exp_data)); + exp_data.tables = load_expected_aml(data); + dump_aml_files(data, false); + for (i = 0; i < data->tables->len; ++i) { + GString *asl, *exp_asl; + + sdt = &g_array_index(data->tables, AcpiSdtTable, i); + exp_sdt = &g_array_index(exp_data.tables, AcpiSdtTable, i); + + err = load_asl(data->tables, sdt); + asl = normalize_asl(sdt->asl); + + exp_err = load_asl(exp_data.tables, exp_sdt); + exp_asl = normalize_asl(exp_sdt->asl); + + /* TODO: check for warnings */ + g_assert(!err || exp_err); + + if (g_strcmp0(asl->str, exp_asl->str)) { + if (exp_err) { + fprintf(stderr, + "Warning! iasl couldn't parse the expected aml\n"); + } else { + uint32_t signature = cpu_to_le32(exp_sdt->header.signature); + sdt->tmp_files_retain = true; + exp_sdt->tmp_files_retain = true; + fprintf(stderr, + "acpi-test: Warning! %.4s mismatch. " + "Actual [asl:%s, aml:%s], Expected [asl:%s, aml:%s].\n", + (gchar *)&signature, + sdt->asl_file, sdt->aml_file, + exp_sdt->asl_file, exp_sdt->aml_file); + if (getenv("V")) { + const char *diff_cmd = getenv("DIFF"); + if (diff_cmd) { + int ret G_GNUC_UNUSED; + char *diff = g_strdup_printf("%s %s %s", diff_cmd, + exp_sdt->asl_file, sdt->asl_file); + ret = system(diff) ; + g_free(diff); + } else { + fprintf(stderr, "acpi-test: Warning. not showing " + "difference since no diff utility is specified. " + "Set 'DIFF' environment variable to a preferred " + "diff utility and run 'make V=1 check' again to " + "see ASL difference."); + } + } + } + } + g_string_free(asl, true); + g_string_free(exp_asl, true); + } + + free_test_data(&exp_data); +} + +static bool smbios_ep_table_ok(test_data *data) +{ + struct smbios_21_entry_point *ep_table = &data->smbios_ep_table; + uint32_t addr = data->smbios_ep_addr; + + ACPI_READ_ARRAY(data->qts, ep_table->anchor_string, addr); + if (memcmp(ep_table->anchor_string, "_SM_", 4)) { + return false; + } + ACPI_READ_FIELD(data->qts, ep_table->checksum, addr); + ACPI_READ_FIELD(data->qts, ep_table->length, addr); + ACPI_READ_FIELD(data->qts, ep_table->smbios_major_version, addr); + ACPI_READ_FIELD(data->qts, ep_table->smbios_minor_version, addr); + ACPI_READ_FIELD(data->qts, ep_table->max_structure_size, addr); + ACPI_READ_FIELD(data->qts, ep_table->entry_point_revision, addr); + ACPI_READ_ARRAY(data->qts, ep_table->formatted_area, addr); + ACPI_READ_ARRAY(data->qts, ep_table->intermediate_anchor_string, addr); + if (memcmp(ep_table->intermediate_anchor_string, "_DMI_", 5)) { + return false; + } + ACPI_READ_FIELD(data->qts, ep_table->intermediate_checksum, addr); + ACPI_READ_FIELD(data->qts, ep_table->structure_table_length, addr); + if (ep_table->structure_table_length == 0) { + return false; + } + ACPI_READ_FIELD(data->qts, ep_table->structure_table_address, addr); + ACPI_READ_FIELD(data->qts, ep_table->number_of_structures, addr); + if (ep_table->number_of_structures == 0) { + return false; + } + ACPI_READ_FIELD(data->qts, ep_table->smbios_bcd_revision, addr); + if (acpi_calc_checksum((uint8_t *)ep_table, sizeof *ep_table) || + acpi_calc_checksum((uint8_t *)ep_table + 0x10, + sizeof *ep_table - 0x10)) { + return false; + } + return true; +} + +static void test_smbios_entry_point(test_data *data) +{ + uint32_t off; + + /* find smbios entry point structure */ + for (off = 0xf0000; off < 0x100000; off += 0x10) { + uint8_t sig[] = "_SM_"; + int i; + + for (i = 0; i < sizeof sig - 1; ++i) { + sig[i] = qtest_readb(data->qts, off + i); + } + + if (!memcmp(sig, "_SM_", sizeof sig)) { + /* signature match, but is this a valid entry point? */ + data->smbios_ep_addr = off; + if (smbios_ep_table_ok(data)) { + break; + } + } + } + + g_assert_cmphex(off, <, 0x100000); +} + +static inline bool smbios_single_instance(uint8_t type) +{ + switch (type) { + case 0: + case 1: + case 2: + case 3: + case 16: + case 32: + case 127: + return true; + default: + return false; + } +} + +static void test_smbios_structs(test_data *data) +{ + DECLARE_BITMAP(struct_bitmap, SMBIOS_MAX_TYPE+1) = { 0 }; + struct smbios_21_entry_point *ep_table = &data->smbios_ep_table; + uint32_t addr = le32_to_cpu(ep_table->structure_table_address); + int i, len, max_len = 0; + uint8_t type, prv, crt; + + /* walk the smbios tables */ + for (i = 0; i < le16_to_cpu(ep_table->number_of_structures); i++) { + + /* grab type and formatted area length from struct header */ + type = qtest_readb(data->qts, addr); + g_assert_cmpuint(type, <=, SMBIOS_MAX_TYPE); + len = qtest_readb(data->qts, addr + 1); + + /* single-instance structs must not have been encountered before */ + if (smbios_single_instance(type)) { + g_assert(!test_bit(type, struct_bitmap)); + } + set_bit(type, struct_bitmap); + + /* seek to end of unformatted string area of this struct ("\0\0") */ + prv = crt = 1; + while (prv || crt) { + prv = crt; + crt = qtest_readb(data->qts, addr + len); + len++; + } + + /* keep track of max. struct size */ + if (max_len < len) { + max_len = len; + g_assert_cmpuint(max_len, <=, ep_table->max_structure_size); + } + + /* start of next structure */ + addr += len; + } + + /* total table length and max struct size must match entry point values */ + g_assert_cmpuint(le16_to_cpu(ep_table->structure_table_length), ==, + addr - le32_to_cpu(ep_table->structure_table_address)); + g_assert_cmpuint(le16_to_cpu(ep_table->max_structure_size), ==, max_len); + + /* required struct types must all be present */ + for (i = 0; i < data->required_struct_types_len; i++) { + g_assert(test_bit(data->required_struct_types[i], struct_bitmap)); + } +} + +static void test_acpi_one(const char *params, test_data *data) +{ + char *args; + + /* Disable kernel irqchip to be able to override apic irq0. */ + args = g_strdup_printf("-machine %s,accel=%s,kernel-irqchip=off " + "-net none -display none %s " + "-drive id=hd0,if=none,file=%s,format=raw " + "-device ide-hd,drive=hd0 ", + data->machine, "kvm:tcg", + params ? params : "", disk); + + data->qts = qtest_init(args); + + boot_sector_test(data->qts); + + data->tables = g_array_new(false, true, sizeof(AcpiSdtTable)); + test_acpi_rsdp_address(data); + test_acpi_rsdp_table(data); + test_acpi_rsdt_table(data); + fadt_fetch_facs_and_dsdt_ptrs(data); + test_acpi_facs_table(data); + test_acpi_dsdt_table(data); + fetch_rsdt_referenced_tables(data); + + sanitize_fadt_ptrs(data); + + if (iasl) { + if (getenv(ACPI_REBUILD_EXPECTED_AML)) { + dump_aml_files(data, true); + } else { + test_acpi_asl(data); + } + } + + test_smbios_entry_point(data); + test_smbios_structs(data); + + assert(!global_qtest); + qtest_quit(data->qts); + g_free(args); +} + +static uint8_t base_required_struct_types[] = { + 0, 1, 3, 4, 16, 17, 19, 32, 127 +}; + +static void test_acpi_piix4_tcg(void) +{ + test_data data; + + /* Supplying -machine accel argument overrides the default (qtest). + * This is to make guest actually run. + */ + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_PC; + data.required_struct_types = base_required_struct_types; + data.required_struct_types_len = ARRAY_SIZE(base_required_struct_types); + test_acpi_one(NULL, &data); + free_test_data(&data); +} + +static void test_acpi_piix4_tcg_bridge(void) +{ + test_data data; + + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_PC; + data.variant = ".bridge"; + data.required_struct_types = base_required_struct_types; + data.required_struct_types_len = ARRAY_SIZE(base_required_struct_types); + test_acpi_one("-device pci-bridge,chassis_nr=1", &data); + free_test_data(&data); +} + +static void test_acpi_q35_tcg(void) +{ + test_data data; + + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_Q35; + data.required_struct_types = base_required_struct_types; + data.required_struct_types_len = ARRAY_SIZE(base_required_struct_types); + test_acpi_one(NULL, &data); + free_test_data(&data); +} + +static void test_acpi_q35_tcg_bridge(void) +{ + test_data data; + + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_Q35; + data.variant = ".bridge"; + data.required_struct_types = base_required_struct_types; + data.required_struct_types_len = ARRAY_SIZE(base_required_struct_types); + test_acpi_one("-device pci-bridge,chassis_nr=1", + &data); + free_test_data(&data); +} + +static void test_acpi_q35_tcg_mmio64(void) +{ + test_data data = { + .machine = MACHINE_Q35, + .variant = ".mmio64", + .required_struct_types = base_required_struct_types, + .required_struct_types_len = ARRAY_SIZE(base_required_struct_types) + }; + + test_acpi_one("-m 128M,slots=1,maxmem=2G " + "-device pci-testdev,membar=2G", + &data); + free_test_data(&data); +} + +static void test_acpi_piix4_tcg_cphp(void) +{ + test_data data; + + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_PC; + data.variant = ".cphp"; + test_acpi_one("-smp 2,cores=3,sockets=2,maxcpus=6" + " -numa node -numa node" + " -numa dist,src=0,dst=1,val=21", + &data); + free_test_data(&data); +} + +static void test_acpi_q35_tcg_cphp(void) +{ + test_data data; + + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_Q35; + data.variant = ".cphp"; + test_acpi_one(" -smp 2,cores=3,sockets=2,maxcpus=6" + " -numa node -numa node" + " -numa dist,src=0,dst=1,val=21", + &data); + free_test_data(&data); +} + +static uint8_t ipmi_required_struct_types[] = { + 0, 1, 3, 4, 16, 17, 19, 32, 38, 127 +}; + +static void test_acpi_q35_tcg_ipmi(void) +{ + test_data data; + + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_Q35; + data.variant = ".ipmibt"; + data.required_struct_types = ipmi_required_struct_types; + data.required_struct_types_len = ARRAY_SIZE(ipmi_required_struct_types); + test_acpi_one("-device ipmi-bmc-sim,id=bmc0" + " -device isa-ipmi-bt,bmc=bmc0", + &data); + free_test_data(&data); +} + +static void test_acpi_piix4_tcg_ipmi(void) +{ + test_data data; + + /* Supplying -machine accel argument overrides the default (qtest). + * This is to make guest actually run. + */ + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_PC; + data.variant = ".ipmikcs"; + data.required_struct_types = ipmi_required_struct_types; + data.required_struct_types_len = ARRAY_SIZE(ipmi_required_struct_types); + test_acpi_one("-device ipmi-bmc-sim,id=bmc0" + " -device isa-ipmi-kcs,irq=0,bmc=bmc0", + &data); + free_test_data(&data); +} + +static void test_acpi_q35_tcg_memhp(void) +{ + test_data data; + + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_Q35; + data.variant = ".memhp"; + test_acpi_one(" -m 128,slots=3,maxmem=1G" + " -numa node -numa node" + " -numa dist,src=0,dst=1,val=21", + &data); + free_test_data(&data); +} + +static void test_acpi_piix4_tcg_memhp(void) +{ + test_data data; + + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_PC; + data.variant = ".memhp"; + test_acpi_one(" -m 128,slots=3,maxmem=1G" + " -numa node -numa node" + " -numa dist,src=0,dst=1,val=21", + &data); + free_test_data(&data); +} + +static void test_acpi_q35_tcg_numamem(void) +{ + test_data data; + + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_Q35; + data.variant = ".numamem"; + test_acpi_one(" -numa node -numa node,mem=128", &data); + free_test_data(&data); +} + +static void test_acpi_piix4_tcg_numamem(void) +{ + test_data data; + + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_PC; + data.variant = ".numamem"; + test_acpi_one(" -numa node -numa node,mem=128", &data); + free_test_data(&data); +} + +static void test_acpi_tcg_dimm_pxm(const char *machine) +{ + test_data data; + + memset(&data, 0, sizeof(data)); + data.machine = machine; + data.variant = ".dimmpxm"; + test_acpi_one(" -machine nvdimm=on,nvdimm-persistence=cpu" + " -smp 4,sockets=4" + " -m 128M,slots=3,maxmem=1G" + " -numa node,mem=32M,nodeid=0" + " -numa node,mem=32M,nodeid=1" + " -numa node,mem=32M,nodeid=2" + " -numa node,mem=32M,nodeid=3" + " -numa cpu,node-id=0,socket-id=0" + " -numa cpu,node-id=1,socket-id=1" + " -numa cpu,node-id=2,socket-id=2" + " -numa cpu,node-id=3,socket-id=3" + " -object memory-backend-ram,id=ram0,size=128M" + " -object memory-backend-ram,id=nvm0,size=128M" + " -device pc-dimm,id=dimm0,memdev=ram0,node=1" + " -device nvdimm,id=dimm1,memdev=nvm0,node=2", + &data); + free_test_data(&data); +} + +static void test_acpi_q35_tcg_dimm_pxm(void) +{ + test_acpi_tcg_dimm_pxm(MACHINE_Q35); +} + +static void test_acpi_piix4_tcg_dimm_pxm(void) +{ + test_acpi_tcg_dimm_pxm(MACHINE_PC); +} + +int main(int argc, char *argv[]) +{ + const char *arch = qtest_get_arch(); + int ret; + + ret = boot_sector_init(disk); + if(ret) + return ret; + + g_test_init(&argc, &argv, NULL); + + if (strcmp(arch, "i386") == 0 || strcmp(arch, "x86_64") == 0) { + qtest_add_func("acpi/piix4", test_acpi_piix4_tcg); + qtest_add_func("acpi/piix4/bridge", test_acpi_piix4_tcg_bridge); + qtest_add_func("acpi/q35", test_acpi_q35_tcg); + qtest_add_func("acpi/q35/bridge", test_acpi_q35_tcg_bridge); + qtest_add_func("acpi/q35/mmio64", test_acpi_q35_tcg_mmio64); + qtest_add_func("acpi/piix4/ipmi", test_acpi_piix4_tcg_ipmi); + qtest_add_func("acpi/q35/ipmi", test_acpi_q35_tcg_ipmi); + qtest_add_func("acpi/piix4/cpuhp", test_acpi_piix4_tcg_cphp); + qtest_add_func("acpi/q35/cpuhp", test_acpi_q35_tcg_cphp); + qtest_add_func("acpi/piix4/memhp", test_acpi_piix4_tcg_memhp); + qtest_add_func("acpi/q35/memhp", test_acpi_q35_tcg_memhp); + qtest_add_func("acpi/piix4/numamem", test_acpi_piix4_tcg_numamem); + qtest_add_func("acpi/q35/numamem", test_acpi_q35_tcg_numamem); + qtest_add_func("acpi/piix4/dimmpxm", test_acpi_piix4_tcg_dimm_pxm); + qtest_add_func("acpi/q35/dimmpxm", test_acpi_q35_tcg_dimm_pxm); + } + ret = g_test_run(); + boot_sector_cleanup(disk); + return ret; +} diff --git a/tests/data/acpi/diff-aml.sh b/tests/data/acpi/diff-aml.sh new file mode 100644 index 0000000000..e69de29bb2 diff --git a/tests/data/acpi/disassemle-aml.py b/tests/data/acpi/disassemle-aml.py new file mode 100644 index 0000000000..0398fada63 --- /dev/null +++ b/tests/data/acpi/disassemle-aml.py @@ -0,0 +1,21 @@ +#!/usr/bin/python + +import os, re +root = "tests/data/acpi" +for machine in os.listdir(root): + machine_root = os.path.join(root, machine) + if not os.path.isdir(machine_root): + continue + files = os.listdir(machine_root): + for file in files: + if file.endswith(".dsl"): + continue + extension_prefix = "^[^.]*\." + if re.match(extension_prefix, file): + variant = re.sub(extension_prefix, "", file) + + +for dirpath, dirnames, filenames in os.walk("tests/data/acpi"): + for file in files: + if file.endswith(".txt"): + print(os.path.join(root, file)) diff --git a/tests/data/acpi/microvm/APIC.dsl b/tests/data/acpi/microvm/APIC.dsl new file mode 100644 index 0000000000..02f56dce43 --- /dev/null +++ b/tests/data/acpi/microvm/APIC.dsl @@ -0,0 +1,56 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/microvm/APIC, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 00000046 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : D7 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 01 [I/O APIC] +[035h 0053 1] Length : 0C +[036h 0054 1] I/O Apic ID : 00 +[037h 0055 1] Reserved : 00 +[038h 0056 4] Address : FEC00000 +[03Ch 0060 4] Interrupt : 00000000 + +[040h 0064 1] Subtable Type : 04 [Local APIC NMI] +[041h 0065 1] Length : 06 +[042h 0066 1] Processor ID : FF +[043h 0067 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[045h 0069 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 70 (0x46) + + 0000: 41 50 49 43 46 00 00 00 01 D7 42 4F 43 48 53 20 // APICF.....BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 // ................ + 0040: 04 06 FF 00 00 01 // ...... diff --git a/tests/data/acpi/microvm/DSDT.dsl b/tests/data/acpi/microvm/DSDT.dsl new file mode 100644 index 0000000000..fd53f08128 --- /dev/null +++ b/tests/data/acpi/microvm/DSDT.dsl @@ -0,0 +1,121 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/microvm/DSDT, Mon Sep 28 17:24:38 2020 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x0000016D (365) + * Revision 0x02 + * Checksum 0x62 + * OEM ID "BOCHS " + * OEM Table ID "BXPCDSDT" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001) +{ + Scope (_SB) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (GED) + { + Name (_HID, "ACPI0013" /* Generic Event Device */) // _HID: Hardware ID + Name (_UID, "GED") // _UID: Unique ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000009, + } + }) + OperationRegion (EREG, SystemMemory, 0xFEA00000, 0x04) + Field (EREG, DWordAcc, NoLock, WriteAsZeros) + { + ESEL, 32 + } + + Method (_EVT, 1, Serialized) // _EVT: Event + { + Local0 = ESEL /* \_SB_.GED_.ESEL */ + If (((Local0 & 0x02) == 0x02)) + { + Notify (PWRB, 0x80) // Status Change + } + } + } + + Device (PWRB) + { + Name (_HID, "PNP0C0C" /* Power Button Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + } + + Device (VR07) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x07) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0xFEB00E00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000017, + } + }) + } + } + + Scope (\) + { + Name (_S5, Package (0x04) // _S5_: S5 System State + { + 0x05, + Zero, + Zero, + Zero + }) + } +} + diff --git a/tests/data/acpi/microvm/FACP.dsl b/tests/data/acpi/microvm/FACP.dsl new file mode 100644 index 0000000000..4cf780caec --- /dev/null +++ b/tests/data/acpi/microvm/FACP.dsl @@ -0,0 +1,196 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/microvm/FACP, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [FACP] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)] +[004h 0004 4] Table Length : 0000010C +[008h 0008 1] Revision : 05 +[009h 0009 1] Checksum : 7E +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCFACP" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] FACS Address : 00000000 +[028h 0040 4] DSDT Address : 00000000 +[02Ch 0044 1] Model : 00 +[02Dh 0045 1] PM Profile : 00 [Unspecified] +[02Eh 0046 2] SCI Interrupt : 0000 +[030h 0048 4] SMI Command Port : 00000000 +[034h 0052 1] ACPI Enable Value : 00 +[035h 0053 1] ACPI Disable Value : 00 +[036h 0054 1] S4BIOS Command : 00 +[037h 0055 1] P-State Control : 00 +[038h 0056 4] PM1A Event Block Address : 00000000 +[03Ch 0060 4] PM1B Event Block Address : 00000000 +[040h 0064 4] PM1A Control Block Address : 00000000 +[044h 0068 4] PM1B Control Block Address : 00000000 +[048h 0072 4] PM2 Control Block Address : 00000000 +[04Ch 0076 4] PM Timer Block Address : 00000000 +[050h 0080 4] GPE0 Block Address : 00000000 +[054h 0084 4] GPE1 Block Address : 00000000 +[058h 0088 1] PM1 Event Block Length : 00 +[059h 0089 1] PM1 Control Block Length : 00 +[05Ah 0090 1] PM2 Control Block Length : 00 +[05Bh 0091 1] PM Timer Block Length : 00 +[05Ch 0092 1] GPE0 Block Length : 00 +[05Dh 0093 1] GPE1 Block Length : 00 +[05Eh 0094 1] GPE1 Base Offset : 00 +[05Fh 0095 1] _CST Support : 00 +[060h 0096 2] C2 Latency : 0000 +[062h 0098 2] C3 Latency : 0000 +[064h 0100 2] CPU Cache Size : 0000 +[066h 0102 2] Cache Flush Stride : 0000 +[068h 0104 1] Duty Cycle Offset : 00 +[069h 0105 1] Duty Cycle Width : 00 +[06Ah 0106 1] RTC Day Alarm Index : 00 +[06Bh 0107 1] RTC Month Alarm Index : 00 +[06Ch 0108 1] RTC Century Index : 00 +[06Dh 0109 2] Boot Flags (decoded below) : 0000 + Legacy Devices Supported (V2) : 0 + 8042 Present on ports 60/64 (V2) : 0 + VGA Not Present (V4) : 0 + MSI Not Supported (V4) : 0 + PCIe ASPM Not Supported (V4) : 0 + CMOS RTC Not Present (V5) : 0 +[06Fh 0111 1] Reserved : 00 +[070h 0112 4] Flags (decoded below) : 00100400 + WBINVD instruction is operational (V1) : 0 + WBINVD flushes all caches (V1) : 0 + All CPUs support C1 (V1) : 0 + C2 works on MP system (V1) : 0 + Control Method Power Button (V1) : 0 + Control Method Sleep Button (V1) : 0 + RTC wake not in fixed reg space (V1) : 0 + RTC can wake system from S4 (V1) : 0 + 32-bit PM Timer (V1) : 0 + Docking Supported (V1) : 0 + Reset Register Supported (V2) : 1 + Sealed Case (V3) : 0 + Headless - No Video (V3) : 0 + Use native instr after SLP_TYPx (V3) : 0 + PCIEXP_WAK Bits Supported (V4) : 0 + Use Platform Timer (V4) : 0 + RTC_STS valid on S4 wake (V4) : 0 + Remote Power-on capable (V4) : 0 + Use APIC Cluster Model (V4) : 0 + Use APIC Physical Destination Mode (V4) : 0 + Hardware Reduced (V5) : 1 + Low Power S0 Idle (V5) : 0 + +[074h 0116 12] Reset Register : [Generic Address Structure] +[074h 0116 1] Space ID : 00 [SystemMemory] +[075h 0117 1] Bit Width : 08 +[076h 0118 1] Bit Offset : 00 +[077h 0119 1] Encoded Access Width : 00 [Undefined/Legacy] +[078h 0120 8] Address : 00000000FEA00202 + +[080h 0128 1] Value to cause reset : 42 +[081h 0129 2] ARM Flags (decoded below) : 0000 + PSCI Compliant : 0 + Must use HVC for PSCI : 0 + +[083h 0131 1] FADT Minor Revision : 00 +[084h 0132 8] FACS Address : 0000000000000000 +[08Ch 0140 8] DSDT Address : 0000000000000000 +[094h 0148 12] PM1A Event Block : [Generic Address Structure] +[094h 0148 1] Space ID : 00 [SystemMemory] +[095h 0149 1] Bit Width : 00 +[096h 0150 1] Bit Offset : 00 +[097h 0151 1] Encoded Access Width : 00 [Undefined/Legacy] +[098h 0152 8] Address : 0000000000000000 + +[0A0h 0160 12] PM1B Event Block : [Generic Address Structure] +[0A0h 0160 1] Space ID : 00 [SystemMemory] +[0A1h 0161 1] Bit Width : 00 +[0A2h 0162 1] Bit Offset : 00 +[0A3h 0163 1] Encoded Access Width : 00 [Undefined/Legacy] +[0A4h 0164 8] Address : 0000000000000000 + +[0ACh 0172 12] PM1A Control Block : [Generic Address Structure] +[0ACh 0172 1] Space ID : 00 [SystemMemory] +[0ADh 0173 1] Bit Width : 00 +[0AEh 0174 1] Bit Offset : 00 +[0AFh 0175 1] Encoded Access Width : 00 [Undefined/Legacy] +[0B0h 0176 8] Address : 0000000000000000 + +[0B8h 0184 12] PM1B Control Block : [Generic Address Structure] +[0B8h 0184 1] Space ID : 00 [SystemMemory] +[0B9h 0185 1] Bit Width : 00 +[0BAh 0186 1] Bit Offset : 00 +[0BBh 0187 1] Encoded Access Width : 00 [Undefined/Legacy] +[0BCh 0188 8] Address : 0000000000000000 + +[0C4h 0196 12] PM2 Control Block : [Generic Address Structure] +[0C4h 0196 1] Space ID : 00 [SystemMemory] +[0C5h 0197 1] Bit Width : 00 +[0C6h 0198 1] Bit Offset : 00 +[0C7h 0199 1] Encoded Access Width : 00 [Undefined/Legacy] +[0C8h 0200 8] Address : 0000000000000000 + +[0D0h 0208 12] PM Timer Block : [Generic Address Structure] +[0D0h 0208 1] Space ID : 00 [SystemMemory] +[0D1h 0209 1] Bit Width : 00 +[0D2h 0210 1] Bit Offset : 00 +[0D3h 0211 1] Encoded Access Width : 00 [Undefined/Legacy] +[0D4h 0212 8] Address : 0000000000000000 + +[0DCh 0220 12] GPE0 Block : [Generic Address Structure] +[0DCh 0220 1] Space ID : 00 [SystemMemory] +[0DDh 0221 1] Bit Width : 00 +[0DEh 0222 1] Bit Offset : 00 +[0DFh 0223 1] Encoded Access Width : 00 [Undefined/Legacy] +[0E0h 0224 8] Address : 0000000000000000 + +[0E8h 0232 12] GPE1 Block : [Generic Address Structure] +[0E8h 0232 1] Space ID : 00 [SystemMemory] +[0E9h 0233 1] Bit Width : 00 +[0EAh 0234 1] Bit Offset : 00 +[0EBh 0235 1] Encoded Access Width : 00 [Undefined/Legacy] +[0ECh 0236 8] Address : 0000000000000000 + + +[0F4h 0244 12] Sleep Control Register : [Generic Address Structure] +[0F4h 0244 1] Space ID : 00 [SystemMemory] +[0F5h 0245 1] Bit Width : 08 +[0F6h 0246 1] Bit Offset : 00 +[0F7h 0247 1] Encoded Access Width : 00 [Undefined/Legacy] +[0F8h 0248 8] Address : 00000000FEA00200 + +[100h 0256 12] Sleep Status Register : [Generic Address Structure] +[100h 0256 1] Space ID : 00 [SystemMemory] +[101h 0257 1] Bit Width : 08 +[102h 0258 1] Bit Offset : 00 +[103h 0259 1] Encoded Access Width : 00 [Undefined/Legacy] +[104h 0260 8] Address : 00000000FEA00201 + +/**** ACPI table terminates in the middle of a data structure! (dump table) */ + +Raw Table Data: Length 268 (0x10C) + + 0000: 46 41 43 50 0C 01 00 00 05 7E 42 4F 43 48 53 20 // FACP.....~BOCHS + 0010: 42 58 50 43 46 41 43 50 01 00 00 00 42 58 50 43 // BXPCFACP....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0070: 00 04 10 00 00 08 00 00 02 02 A0 FE 00 00 00 00 // ................ + 0080: 42 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // B............... + 0090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00E0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00F0: 00 00 00 00 00 08 00 00 00 02 A0 FE 00 00 00 00 // ................ + 0100: 00 08 00 00 01 02 A0 FE 00 00 00 00 // ............ diff --git a/tests/data/acpi/pc/APIC.acpihmat.dsl b/tests/data/acpi/pc/APIC.acpihmat.dsl new file mode 100644 index 0000000000..15155cac55 --- /dev/null +++ b/tests/data/acpi/pc/APIC.acpihmat.dsl @@ -0,0 +1,112 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/APIC.acpihmat, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 00000080 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : DA +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 00 [Processor Local APIC] +[035h 0053 1] Length : 08 +[036h 0054 1] Processor ID : 01 +[037h 0055 1] Local Apic ID : 01 +[038h 0056 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[03Ch 0060 1] Subtable Type : 01 [I/O APIC] +[03Dh 0061 1] Length : 0C +[03Eh 0062 1] I/O Apic ID : 00 +[03Fh 0063 1] Reserved : 00 +[040h 0064 4] Address : FEC00000 +[044h 0068 4] Interrupt : 00000000 + +[048h 0072 1] Subtable Type : 02 [Interrupt Source Override] +[049h 0073 1] Length : 0A +[04Ah 0074 1] Bus : 00 +[04Bh 0075 1] Source : 00 +[04Ch 0076 4] Interrupt : 00000002 +[050h 0080 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[052h 0082 1] Subtable Type : 02 [Interrupt Source Override] +[053h 0083 1] Length : 0A +[054h 0084 1] Bus : 00 +[055h 0085 1] Source : 05 +[056h 0086 4] Interrupt : 00000005 +[05Ah 0090 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[05Ch 0092 1] Subtable Type : 02 [Interrupt Source Override] +[05Dh 0093 1] Length : 0A +[05Eh 0094 1] Bus : 00 +[05Fh 0095 1] Source : 09 +[060h 0096 4] Interrupt : 00000009 +[064h 0100 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[066h 0102 1] Subtable Type : 02 [Interrupt Source Override] +[067h 0103 1] Length : 0A +[068h 0104 1] Bus : 00 +[069h 0105 1] Source : 0A +[06Ah 0106 4] Interrupt : 0000000A +[06Eh 0110 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[070h 0112 1] Subtable Type : 02 [Interrupt Source Override] +[071h 0113 1] Length : 0A +[072h 0114 1] Bus : 00 +[073h 0115 1] Source : 0B +[074h 0116 4] Interrupt : 0000000B +[078h 0120 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[07Ah 0122 1] Subtable Type : 04 [Local APIC NMI] +[07Bh 0123 1] Length : 06 +[07Ch 0124 1] Processor ID : FF +[07Dh 0125 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[07Fh 0127 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 128 (0x80) + + 0000: 41 50 49 43 80 00 00 00 01 DA 42 4F 43 48 53 20 // APIC......BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 00 08 01 01 01 00 00 00 01 0C 00 00 // ................ + 0040: 00 00 C0 FE 00 00 00 00 02 0A 00 00 02 00 00 00 // ................ + 0050: 00 00 02 0A 00 05 05 00 00 00 0D 00 02 0A 00 09 // ................ + 0060: 09 00 00 00 0D 00 02 0A 00 0A 0A 00 00 00 0D 00 // ................ + 0070: 02 0A 00 0B 0B 00 00 00 0D 00 04 06 FF 00 00 01 // ................ diff --git a/tests/data/acpi/pc/APIC.bridge b/tests/data/acpi/pc/APIC.bridge new file mode 100644 index 0000000000000000000000000000000000000000..84509e0ae4cabeb5ead3e42a4edfa50abddbc17d GIT binary patch literal 120 zcmZ<^@N}+VU|?W;>*Vk35v<@85#S6GV`N}p0I@+d1H*%VV48!00Yo$MFfcGM9QX$! onYb7jm_Q5$CN2h6Rt5$JUJ#3u6UO4=g0Z-{!7LWG{|pR_06i!T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/APIC.bridge.dsl b/tests/data/acpi/pc/APIC.bridge.dsl new file mode 100644 index 0000000000..2828370063 --- /dev/null +++ b/tests/data/acpi/pc/APIC.bridge.dsl @@ -0,0 +1,104 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/APIC.bridge, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 00000078 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : ED +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 01 [I/O APIC] +[035h 0053 1] Length : 0C +[036h 0054 1] I/O Apic ID : 00 +[037h 0055 1] Reserved : 00 +[038h 0056 4] Address : FEC00000 +[03Ch 0060 4] Interrupt : 00000000 + +[040h 0064 1] Subtable Type : 02 [Interrupt Source Override] +[041h 0065 1] Length : 0A +[042h 0066 1] Bus : 00 +[043h 0067 1] Source : 00 +[044h 0068 4] Interrupt : 00000002 +[048h 0072 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[04Ah 0074 1] Subtable Type : 02 [Interrupt Source Override] +[04Bh 0075 1] Length : 0A +[04Ch 0076 1] Bus : 00 +[04Dh 0077 1] Source : 05 +[04Eh 0078 4] Interrupt : 00000005 +[052h 0082 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[054h 0084 1] Subtable Type : 02 [Interrupt Source Override] +[055h 0085 1] Length : 0A +[056h 0086 1] Bus : 00 +[057h 0087 1] Source : 09 +[058h 0088 4] Interrupt : 00000009 +[05Ch 0092 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[05Eh 0094 1] Subtable Type : 02 [Interrupt Source Override] +[05Fh 0095 1] Length : 0A +[060h 0096 1] Bus : 00 +[061h 0097 1] Source : 0A +[062h 0098 4] Interrupt : 0000000A +[066h 0102 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[068h 0104 1] Subtable Type : 02 [Interrupt Source Override] +[069h 0105 1] Length : 0A +[06Ah 0106 1] Bus : 00 +[06Bh 0107 1] Source : 0B +[06Ch 0108 4] Interrupt : 0000000B +[070h 0112 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[072h 0114 1] Subtable Type : 04 [Local APIC NMI] +[073h 0115 1] Length : 06 +[074h 0116 1] Processor ID : FF +[075h 0117 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[077h 0119 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 120 (0x78) + + 0000: 41 50 49 43 78 00 00 00 01 ED 42 4F 43 48 53 20 // APICx.....BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 // ................ + 0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00 // ................ + 0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A // ................ + 0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00 // ................ + 0070: 0D 00 04 06 FF 00 00 01 // ........ diff --git a/tests/data/acpi/pc/APIC.cphp.dsl b/tests/data/acpi/pc/APIC.cphp.dsl new file mode 100644 index 0000000000..b4b043229a --- /dev/null +++ b/tests/data/acpi/pc/APIC.cphp.dsl @@ -0,0 +1,146 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/APIC.cphp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 000000A0 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 7B +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 00 [Processor Local APIC] +[035h 0053 1] Length : 08 +[036h 0054 1] Processor ID : 01 +[037h 0055 1] Local Apic ID : 01 +[038h 0056 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[03Ch 0060 1] Subtable Type : 00 [Processor Local APIC] +[03Dh 0061 1] Length : 08 +[03Eh 0062 1] Processor ID : 02 +[03Fh 0063 1] Local Apic ID : 02 +[040h 0064 4] Flags (decoded below) : 00000000 + Processor Enabled : 0 + Runtime Online Capable : 0 + +[044h 0068 1] Subtable Type : 00 [Processor Local APIC] +[045h 0069 1] Length : 08 +[046h 0070 1] Processor ID : 03 +[047h 0071 1] Local Apic ID : 04 +[048h 0072 4] Flags (decoded below) : 00000000 + Processor Enabled : 0 + Runtime Online Capable : 0 + +[04Ch 0076 1] Subtable Type : 00 [Processor Local APIC] +[04Dh 0077 1] Length : 08 +[04Eh 0078 1] Processor ID : 04 +[04Fh 0079 1] Local Apic ID : 05 +[050h 0080 4] Flags (decoded below) : 00000000 + Processor Enabled : 0 + Runtime Online Capable : 0 + +[054h 0084 1] Subtable Type : 00 [Processor Local APIC] +[055h 0085 1] Length : 08 +[056h 0086 1] Processor ID : 05 +[057h 0087 1] Local Apic ID : 06 +[058h 0088 4] Flags (decoded below) : 00000000 + Processor Enabled : 0 + Runtime Online Capable : 0 + +[05Ch 0092 1] Subtable Type : 01 [I/O APIC] +[05Dh 0093 1] Length : 0C +[05Eh 0094 1] I/O Apic ID : 00 +[05Fh 0095 1] Reserved : 00 +[060h 0096 4] Address : FEC00000 +[064h 0100 4] Interrupt : 00000000 + +[068h 0104 1] Subtable Type : 02 [Interrupt Source Override] +[069h 0105 1] Length : 0A +[06Ah 0106 1] Bus : 00 +[06Bh 0107 1] Source : 00 +[06Ch 0108 4] Interrupt : 00000002 +[070h 0112 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[072h 0114 1] Subtable Type : 02 [Interrupt Source Override] +[073h 0115 1] Length : 0A +[074h 0116 1] Bus : 00 +[075h 0117 1] Source : 05 +[076h 0118 4] Interrupt : 00000005 +[07Ah 0122 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[07Ch 0124 1] Subtable Type : 02 [Interrupt Source Override] +[07Dh 0125 1] Length : 0A +[07Eh 0126 1] Bus : 00 +[07Fh 0127 1] Source : 09 +[080h 0128 4] Interrupt : 00000009 +[084h 0132 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[086h 0134 1] Subtable Type : 02 [Interrupt Source Override] +[087h 0135 1] Length : 0A +[088h 0136 1] Bus : 00 +[089h 0137 1] Source : 0A +[08Ah 0138 4] Interrupt : 0000000A +[08Eh 0142 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[090h 0144 1] Subtable Type : 02 [Interrupt Source Override] +[091h 0145 1] Length : 0A +[092h 0146 1] Bus : 00 +[093h 0147 1] Source : 0B +[094h 0148 4] Interrupt : 0000000B +[098h 0152 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[09Ah 0154 1] Subtable Type : 04 [Local APIC NMI] +[09Bh 0155 1] Length : 06 +[09Ch 0156 1] Processor ID : FF +[09Dh 0157 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[09Fh 0159 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 160 (0xA0) + + 0000: 41 50 49 43 A0 00 00 00 01 7B 42 4F 43 48 53 20 // APIC.....{BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 00 08 01 01 01 00 00 00 00 08 02 02 // ................ + 0040: 00 00 00 00 00 08 03 04 00 00 00 00 00 08 04 05 // ................ + 0050: 00 00 00 00 00 08 05 06 00 00 00 00 01 0C 00 00 // ................ + 0060: 00 00 C0 FE 00 00 00 00 02 0A 00 00 02 00 00 00 // ................ + 0070: 00 00 02 0A 00 05 05 00 00 00 0D 00 02 0A 00 09 // ................ + 0080: 09 00 00 00 0D 00 02 0A 00 0A 0A 00 00 00 0D 00 // ................ + 0090: 02 0A 00 0B 0B 00 00 00 0D 00 04 06 FF 00 00 01 // ................ diff --git a/tests/data/acpi/pc/APIC.dimmpxm.dsl b/tests/data/acpi/pc/APIC.dimmpxm.dsl new file mode 100644 index 0000000000..adabdcc603 --- /dev/null +++ b/tests/data/acpi/pc/APIC.dimmpxm.dsl @@ -0,0 +1,129 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/APIC.dimmpxm, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 00000090 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : AE +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 00 [Processor Local APIC] +[035h 0053 1] Length : 08 +[036h 0054 1] Processor ID : 01 +[037h 0055 1] Local Apic ID : 01 +[038h 0056 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[03Ch 0060 1] Subtable Type : 00 [Processor Local APIC] +[03Dh 0061 1] Length : 08 +[03Eh 0062 1] Processor ID : 02 +[03Fh 0063 1] Local Apic ID : 02 +[040h 0064 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[044h 0068 1] Subtable Type : 00 [Processor Local APIC] +[045h 0069 1] Length : 08 +[046h 0070 1] Processor ID : 03 +[047h 0071 1] Local Apic ID : 03 +[048h 0072 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[04Ch 0076 1] Subtable Type : 01 [I/O APIC] +[04Dh 0077 1] Length : 0C +[04Eh 0078 1] I/O Apic ID : 00 +[04Fh 0079 1] Reserved : 00 +[050h 0080 4] Address : FEC00000 +[054h 0084 4] Interrupt : 00000000 + +[058h 0088 1] Subtable Type : 02 [Interrupt Source Override] +[059h 0089 1] Length : 0A +[05Ah 0090 1] Bus : 00 +[05Bh 0091 1] Source : 00 +[05Ch 0092 4] Interrupt : 00000002 +[060h 0096 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[062h 0098 1] Subtable Type : 02 [Interrupt Source Override] +[063h 0099 1] Length : 0A +[064h 0100 1] Bus : 00 +[065h 0101 1] Source : 05 +[066h 0102 4] Interrupt : 00000005 +[06Ah 0106 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[06Ch 0108 1] Subtable Type : 02 [Interrupt Source Override] +[06Dh 0109 1] Length : 0A +[06Eh 0110 1] Bus : 00 +[06Fh 0111 1] Source : 09 +[070h 0112 4] Interrupt : 00000009 +[074h 0116 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[076h 0118 1] Subtable Type : 02 [Interrupt Source Override] +[077h 0119 1] Length : 0A +[078h 0120 1] Bus : 00 +[079h 0121 1] Source : 0A +[07Ah 0122 4] Interrupt : 0000000A +[07Eh 0126 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[080h 0128 1] Subtable Type : 02 [Interrupt Source Override] +[081h 0129 1] Length : 0A +[082h 0130 1] Bus : 00 +[083h 0131 1] Source : 0B +[084h 0132 4] Interrupt : 0000000B +[088h 0136 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[08Ah 0138 1] Subtable Type : 04 [Local APIC NMI] +[08Bh 0139 1] Length : 06 +[08Ch 0140 1] Processor ID : FF +[08Dh 0141 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[08Fh 0143 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 144 (0x90) + + 0000: 41 50 49 43 90 00 00 00 01 AE 42 4F 43 48 53 20 // APIC......BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 00 08 01 01 01 00 00 00 00 08 02 02 // ................ + 0040: 01 00 00 00 00 08 03 03 01 00 00 00 01 0C 00 00 // ................ + 0050: 00 00 C0 FE 00 00 00 00 02 0A 00 00 02 00 00 00 // ................ + 0060: 00 00 02 0A 00 05 05 00 00 00 0D 00 02 0A 00 09 // ................ + 0070: 09 00 00 00 0D 00 02 0A 00 0A 0A 00 00 00 0D 00 // ................ + 0080: 02 0A 00 0B 0B 00 00 00 0D 00 04 06 FF 00 00 01 // ................ diff --git a/tests/data/acpi/pc/APIC.dsl b/tests/data/acpi/pc/APIC.dsl new file mode 100644 index 0000000000..d9516fc1f2 --- /dev/null +++ b/tests/data/acpi/pc/APIC.dsl @@ -0,0 +1,104 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/APIC.roothp, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 00000078 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : ED +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 01 [I/O APIC] +[035h 0053 1] Length : 0C +[036h 0054 1] I/O Apic ID : 00 +[037h 0055 1] Reserved : 00 +[038h 0056 4] Address : FEC00000 +[03Ch 0060 4] Interrupt : 00000000 + +[040h 0064 1] Subtable Type : 02 [Interrupt Source Override] +[041h 0065 1] Length : 0A +[042h 0066 1] Bus : 00 +[043h 0067 1] Source : 00 +[044h 0068 4] Interrupt : 00000002 +[048h 0072 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[04Ah 0074 1] Subtable Type : 02 [Interrupt Source Override] +[04Bh 0075 1] Length : 0A +[04Ch 0076 1] Bus : 00 +[04Dh 0077 1] Source : 05 +[04Eh 0078 4] Interrupt : 00000005 +[052h 0082 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[054h 0084 1] Subtable Type : 02 [Interrupt Source Override] +[055h 0085 1] Length : 0A +[056h 0086 1] Bus : 00 +[057h 0087 1] Source : 09 +[058h 0088 4] Interrupt : 00000009 +[05Ch 0092 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[05Eh 0094 1] Subtable Type : 02 [Interrupt Source Override] +[05Fh 0095 1] Length : 0A +[060h 0096 1] Bus : 00 +[061h 0097 1] Source : 0A +[062h 0098 4] Interrupt : 0000000A +[066h 0102 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[068h 0104 1] Subtable Type : 02 [Interrupt Source Override] +[069h 0105 1] Length : 0A +[06Ah 0106 1] Bus : 00 +[06Bh 0107 1] Source : 0B +[06Ch 0108 4] Interrupt : 0000000B +[070h 0112 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[072h 0114 1] Subtable Type : 04 [Local APIC NMI] +[073h 0115 1] Length : 06 +[074h 0116 1] Processor ID : FF +[075h 0117 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[077h 0119 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 120 (0x78) + + 0000: 41 50 49 43 78 00 00 00 01 ED 42 4F 43 48 53 20 // APICx.....BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 // ................ + 0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00 // ................ + 0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A // ................ + 0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00 // ................ + 0070: 0D 00 04 06 FF 00 00 01 // ........ diff --git a/tests/data/acpi/pc/APIC.hpbridge b/tests/data/acpi/pc/APIC.hpbridge new file mode 100644 index 0000000000000000000000000000000000000000..84509e0ae4cabeb5ead3e42a4edfa50abddbc17d GIT binary patch literal 120 zcmZ<^@N}+VU|?W;>*Vk35v<@85#S6GV`N}p0I@+d1H*%VV48!00Yo$MFfcGM9QX$! onYb7jm_Q5$CN2h6Rt5$JUJ#3u6UO4=g0Z-{!7LWG{|pR_06i!T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/APIC.ipmikcs b/tests/data/acpi/pc/APIC.ipmikcs new file mode 100644 index 0000000000000000000000000000000000000000..84509e0ae4cabeb5ead3e42a4edfa50abddbc17d GIT binary patch literal 120 zcmZ<^@N}+VU|?W;>*Vk35v<@85#S6GV`N}p0I@+d1H*%VV48!00Yo$MFfcGM9QX$! onYb7jm_Q5$CN2h6Rt5$JUJ#3u6UO4=g0Z-{!7LWG{|pR_06i!T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/APIC.ipmikcs.dsl b/tests/data/acpi/pc/APIC.ipmikcs.dsl new file mode 100644 index 0000000000..28198bed68 --- /dev/null +++ b/tests/data/acpi/pc/APIC.ipmikcs.dsl @@ -0,0 +1,104 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/APIC.ipmikcs, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 00000078 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : ED +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 01 [I/O APIC] +[035h 0053 1] Length : 0C +[036h 0054 1] I/O Apic ID : 00 +[037h 0055 1] Reserved : 00 +[038h 0056 4] Address : FEC00000 +[03Ch 0060 4] Interrupt : 00000000 + +[040h 0064 1] Subtable Type : 02 [Interrupt Source Override] +[041h 0065 1] Length : 0A +[042h 0066 1] Bus : 00 +[043h 0067 1] Source : 00 +[044h 0068 4] Interrupt : 00000002 +[048h 0072 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[04Ah 0074 1] Subtable Type : 02 [Interrupt Source Override] +[04Bh 0075 1] Length : 0A +[04Ch 0076 1] Bus : 00 +[04Dh 0077 1] Source : 05 +[04Eh 0078 4] Interrupt : 00000005 +[052h 0082 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[054h 0084 1] Subtable Type : 02 [Interrupt Source Override] +[055h 0085 1] Length : 0A +[056h 0086 1] Bus : 00 +[057h 0087 1] Source : 09 +[058h 0088 4] Interrupt : 00000009 +[05Ch 0092 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[05Eh 0094 1] Subtable Type : 02 [Interrupt Source Override] +[05Fh 0095 1] Length : 0A +[060h 0096 1] Bus : 00 +[061h 0097 1] Source : 0A +[062h 0098 4] Interrupt : 0000000A +[066h 0102 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[068h 0104 1] Subtable Type : 02 [Interrupt Source Override] +[069h 0105 1] Length : 0A +[06Ah 0106 1] Bus : 00 +[06Bh 0107 1] Source : 0B +[06Ch 0108 4] Interrupt : 0000000B +[070h 0112 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[072h 0114 1] Subtable Type : 04 [Local APIC NMI] +[073h 0115 1] Length : 06 +[074h 0116 1] Processor ID : FF +[075h 0117 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[077h 0119 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 120 (0x78) + + 0000: 41 50 49 43 78 00 00 00 01 ED 42 4F 43 48 53 20 // APICx.....BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 // ................ + 0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00 // ................ + 0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A // ................ + 0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00 // ................ + 0070: 0D 00 04 06 FF 00 00 01 // ........ diff --git a/tests/data/acpi/pc/APIC.memhp b/tests/data/acpi/pc/APIC.memhp new file mode 100644 index 0000000000000000000000000000000000000000..84509e0ae4cabeb5ead3e42a4edfa50abddbc17d GIT binary patch literal 120 zcmZ<^@N}+VU|?W;>*Vk35v<@85#S6GV`N}p0I@+d1H*%VV48!00Yo$MFfcGM9QX$! onYb7jm_Q5$CN2h6Rt5$JUJ#3u6UO4=g0Z-{!7LWG{|pR_06i!T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/APIC.memhp.dsl b/tests/data/acpi/pc/APIC.memhp.dsl new file mode 100644 index 0000000000..b8449c0bde --- /dev/null +++ b/tests/data/acpi/pc/APIC.memhp.dsl @@ -0,0 +1,104 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/APIC.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 00000078 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : ED +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 01 [I/O APIC] +[035h 0053 1] Length : 0C +[036h 0054 1] I/O Apic ID : 00 +[037h 0055 1] Reserved : 00 +[038h 0056 4] Address : FEC00000 +[03Ch 0060 4] Interrupt : 00000000 + +[040h 0064 1] Subtable Type : 02 [Interrupt Source Override] +[041h 0065 1] Length : 0A +[042h 0066 1] Bus : 00 +[043h 0067 1] Source : 00 +[044h 0068 4] Interrupt : 00000002 +[048h 0072 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[04Ah 0074 1] Subtable Type : 02 [Interrupt Source Override] +[04Bh 0075 1] Length : 0A +[04Ch 0076 1] Bus : 00 +[04Dh 0077 1] Source : 05 +[04Eh 0078 4] Interrupt : 00000005 +[052h 0082 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[054h 0084 1] Subtable Type : 02 [Interrupt Source Override] +[055h 0085 1] Length : 0A +[056h 0086 1] Bus : 00 +[057h 0087 1] Source : 09 +[058h 0088 4] Interrupt : 00000009 +[05Ch 0092 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[05Eh 0094 1] Subtable Type : 02 [Interrupt Source Override] +[05Fh 0095 1] Length : 0A +[060h 0096 1] Bus : 00 +[061h 0097 1] Source : 0A +[062h 0098 4] Interrupt : 0000000A +[066h 0102 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[068h 0104 1] Subtable Type : 02 [Interrupt Source Override] +[069h 0105 1] Length : 0A +[06Ah 0106 1] Bus : 00 +[06Bh 0107 1] Source : 0B +[06Ch 0108 4] Interrupt : 0000000B +[070h 0112 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[072h 0114 1] Subtable Type : 04 [Local APIC NMI] +[073h 0115 1] Length : 06 +[074h 0116 1] Processor ID : FF +[075h 0117 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[077h 0119 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 120 (0x78) + + 0000: 41 50 49 43 78 00 00 00 01 ED 42 4F 43 48 53 20 // APICx.....BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 // ................ + 0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00 // ................ + 0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A // ................ + 0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00 // ................ + 0070: 0D 00 04 06 FF 00 00 01 // ........ diff --git a/tests/data/acpi/pc/APIC.numamem b/tests/data/acpi/pc/APIC.numamem new file mode 100644 index 0000000000000000000000000000000000000000..84509e0ae4cabeb5ead3e42a4edfa50abddbc17d GIT binary patch literal 120 zcmZ<^@N}+VU|?W;>*Vk35v<@85#S6GV`N}p0I@+d1H*%VV48!00Yo$MFfcGM9QX$! onYb7jm_Q5$CN2h6Rt5$JUJ#3u6UO4=g0Z-{!7LWG{|pR_06i!T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/APIC.numamem.dsl b/tests/data/acpi/pc/APIC.numamem.dsl new file mode 100644 index 0000000000..d75e4283d1 --- /dev/null +++ b/tests/data/acpi/pc/APIC.numamem.dsl @@ -0,0 +1,104 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/APIC.numamem, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 00000078 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : ED +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 01 [I/O APIC] +[035h 0053 1] Length : 0C +[036h 0054 1] I/O Apic ID : 00 +[037h 0055 1] Reserved : 00 +[038h 0056 4] Address : FEC00000 +[03Ch 0060 4] Interrupt : 00000000 + +[040h 0064 1] Subtable Type : 02 [Interrupt Source Override] +[041h 0065 1] Length : 0A +[042h 0066 1] Bus : 00 +[043h 0067 1] Source : 00 +[044h 0068 4] Interrupt : 00000002 +[048h 0072 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[04Ah 0074 1] Subtable Type : 02 [Interrupt Source Override] +[04Bh 0075 1] Length : 0A +[04Ch 0076 1] Bus : 00 +[04Dh 0077 1] Source : 05 +[04Eh 0078 4] Interrupt : 00000005 +[052h 0082 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[054h 0084 1] Subtable Type : 02 [Interrupt Source Override] +[055h 0085 1] Length : 0A +[056h 0086 1] Bus : 00 +[057h 0087 1] Source : 09 +[058h 0088 4] Interrupt : 00000009 +[05Ch 0092 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[05Eh 0094 1] Subtable Type : 02 [Interrupt Source Override] +[05Fh 0095 1] Length : 0A +[060h 0096 1] Bus : 00 +[061h 0097 1] Source : 0A +[062h 0098 4] Interrupt : 0000000A +[066h 0102 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[068h 0104 1] Subtable Type : 02 [Interrupt Source Override] +[069h 0105 1] Length : 0A +[06Ah 0106 1] Bus : 00 +[06Bh 0107 1] Source : 0B +[06Ch 0108 4] Interrupt : 0000000B +[070h 0112 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[072h 0114 1] Subtable Type : 04 [Local APIC NMI] +[073h 0115 1] Length : 06 +[074h 0116 1] Processor ID : FF +[075h 0117 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[077h 0119 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 120 (0x78) + + 0000: 41 50 49 43 78 00 00 00 01 ED 42 4F 43 48 53 20 // APICx.....BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 // ................ + 0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00 // ................ + 0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A // ................ + 0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00 // ................ + 0070: 0D 00 04 06 FF 00 00 01 // ........ diff --git a/tests/data/acpi/pc/APIC.roothp b/tests/data/acpi/pc/APIC.roothp new file mode 100644 index 0000000000000000000000000000000000000000..84509e0ae4cabeb5ead3e42a4edfa50abddbc17d GIT binary patch literal 120 zcmZ<^@N}+VU|?W;>*Vk35v<@85#S6GV`N}p0I@+d1H*%VV48!00Yo$MFfcGM9QX$! onYb7jm_Q5$CN2h6Rt5$JUJ#3u6UO4=g0Z-{!7LWG{|pR_06i!T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/DSDT.acpihmat.dsl b/tests/data/acpi/pc/DSDT.acpihmat.dsl new file mode 100644 index 0000000000..b2a4b1bd7f --- /dev/null +++ b/tests/data/acpi/pc/DSDT.acpihmat.dsl @@ -0,0 +1,1619 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/pc/DSDT.acpihmat, Tue Aug 4 11:14:15 2020 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x00001872 (6258) + * Revision 0x01 **** 32-bit table (V1), no 64-bit math support + * Checksum 0x8E + * OEM ID "BOCHS " + * OEM Table ID "BXPCDSDT" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001) +{ + Scope (\) + { + OperationRegion (DBG, SystemIO, 0x0402, One) + Field (DBG, ByteAcc, NoLock, Preserve) + { + DBGB, 8 + } + + Method (DBUG, 1, NotSerialized) + { + ToHexString (Arg0, Local0) + ToBuffer (Local0, Local0) + Local1 = (SizeOf (Local0) - One) + Local2 = Zero + While ((Local2 < Local1)) + { + DBGB = DerefOf (Local0 [Local2]) + Local2++ + } + + DBGB = 0x0A + } + } + + Scope (_SB) + { + Device (PCI0) + { + Name (_HID, EisaId ("PNP0A03") /* PCI Bus */) // _HID: Hardware ID + Name (_ADR, Zero) // _ADR: Address + Name (_UID, Zero) // _UID: Unique ID + } + } + + Scope (_SB) + { + Device (HPET) + { + Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + OperationRegion (HPTM, SystemMemory, 0xFED00000, 0x0400) + Field (HPTM, DWordAcc, Lock, Preserve) + { + VEND, 32, + PRD, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Local0 = VEND /* \_SB_.HPET.VEND */ + Local1 = PRD /* \_SB_.HPET.PRD_ */ + Local0 >>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x00010000) // _ADR: Address + OperationRegion (P40C, PCI_Config, 0x60, 0x04) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (FDC0) + { + Name (_HID, EisaId ("PNP0700")) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F2, // Range Minimum + 0x03F2, // Range Maximum + 0x00, // Alignment + 0x04, // Length + ) + IO (Decode16, + 0x03F7, // Range Minimum + 0x03F7, // Range Maximum + 0x00, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {6} + DMA (Compatibility, NotBusMaster, Transfer8, ) + {2} + }) + Device (FLPA) + { + Name (_ADR, Zero) // _ADR: Address + Name (_FDI, Package (0x10) // _FDI: Floppy Drive Information + { + Zero, + 0x05, + 0x4F, + 0x30, + One, + 0xAF, + 0x02, + 0x25, + 0x02, + 0x12, + 0x1B, + 0xFF, + 0x6C, + 0xF6, + 0x0F, + 0x08 + }) + } + + Name (_FDE, Buffer (0x14) // _FDE: Floppy Disk Enumerate + { + /* 0000 */ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0010 */ 0x02, 0x00, 0x00, 0x00 // .... + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Scope (_SB.PCI0) + { + OperationRegion (PCST, SystemIO, 0xAE00, 0x08) + Field (PCST, DWordAcc, NoLock, WriteAsZeros) + { + PCIU, 32, + PCID, 32 + } + + OperationRegion (SEJ, SystemIO, 0xAE08, 0x04) + Field (SEJ, DWordAcc, NoLock, WriteAsZeros) + { + B0EJ, 32 + } + + OperationRegion (BNMR, SystemIO, 0xAE10, 0x04) + Field (BNMR, DWordAcc, NoLock, WriteAsZeros) + { + BNUM, 32 + } + + Mutex (BLCK, 0x00) + Method (PCEJ, 2, NotSerialized) + { + Acquire (BLCK, 0xFFFF) + BNUM = Arg0 + B0EJ = (One << Arg1) + Release (BLCK) + Return (Zero) + } + } + + Scope (_SB) + { + Scope (PCI0) + { + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + Local0 = Package (0x80){} + Local1 = Zero + While ((Local1 < 0x80)) + { + Local2 = (Local1 >> 0x02) + Local3 = ((Local1 + Local2) & 0x03) + If ((Local3 == Zero)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKD, + Zero + } + } + + If ((Local3 == One)) + { + If ((Local1 == 0x04)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKS, + Zero + } + } + Else + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKA, + Zero + } + } + } + + If ((Local3 == 0x02)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKB, + Zero + } + } + + If ((Local3 == 0x03)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKC, + Zero + } + } + + Local4 [Zero] = ((Local2 << 0x10) | 0xFFFF) + Local4 [One] = (Local1 & 0x03) + Local0 [Local1] = Local4 + Local1++ + } + + Return (Local0) + } + } + + Field (PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) + { + PRQ0, 8, + PRQ1, 8, + PRQ2, 8, + PRQ3, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + If ((Arg0 < 0x80)) + { + PRRI = Arg0 + } + + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ0)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ0 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ0)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ0 = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ1)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ1 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ1)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ1 = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ2)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ2 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ2)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ2 = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ3)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ3 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ3)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ3 = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKS) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000009, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (_PRS) /* \_SB_.LNKS._PRS */ + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAF00, // Range Minimum + 0xAF00, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0xAF00, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + + If ((Arg0 == One)) + { + Notify (C001, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Local0 = One + While ((Local0 == One)) + { + Local0 = Zero + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CINS == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, One) + \_SB.PCI0.PRES.CINS = One + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + + Name (_PXM, Zero) // _PXM: Device Proximity + } + + Processor (C001, 0x01, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (One)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (One) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (One, Arg0, Arg1, Arg2) + } + + Name (_PXM, Zero) // _PXM: Device Proximity + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Device (\_SB.PCI0.MHPD) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "Memory hotplug resources") // _UID: Unique ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0A00, // Range Minimum + 0x0A00, // Range Maximum + 0x00, // Alignment + 0x18, // Length + ) + }) + OperationRegion (HPMR, SystemIO, 0x0A00, 0x18) + } + + Device (\_SB.MHPC) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "DIMM devices") // _UID: Unique ID + Name (MDNR, 0x02) + Field (\_SB.PCI0.MHPD.HPMR, DWordAcc, NoLock, Preserve) + { + MRBL, 32, + MRBH, 32, + MRLL, 32, + MRLH, 32, + MPX, 32 + } + + Field (\_SB.PCI0.MHPD.HPMR, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x14), + MES, 1, + MINS, 1, + MRMV, 1, + MEJ, 1 + } + + Field (\_SB.PCI0.MHPD.HPMR, DWordAcc, NoLock, Preserve) + { + MSEL, 32, + MOEV, 32, + MOSC, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If ((MDNR == Zero)) + { + Return (Zero) + } + + Return (0x0B) + } + + Mutex (MLCK, 0x00) + Method (MSCN, 0, NotSerialized) + { + If ((MDNR == Zero)) + { + Return (Zero) + } + + Local0 = Zero + Acquire (MLCK, 0xFFFF) + While ((Local0 < MDNR)) + { + MSEL = Local0 + If ((MINS == One)) + { + MTFY (Local0, One) + MINS = One + } + ElseIf ((MRMV == One)) + { + MTFY (Local0, 0x03) + MRMV = One + } + + Local0 += One + } + + Release (MLCK) + Return (One) + } + + Method (MRST, 1, NotSerialized) + { + Local0 = Zero + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + If ((MES == One)) + { + Local0 = 0x0F + } + + Release (MLCK) + Return (Local0) + } + + Method (MCRS, 1, Serialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + Name (MR64, ResourceTemplate () + { + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000000000000, // Range Minimum + 0xFFFFFFFFFFFFFFFE, // Range Maximum + 0x0000000000000000, // Translation Offset + 0xFFFFFFFFFFFFFFFF, // Length + ,, _Y01, AddressRangeMemory, TypeStatic) + }) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._MIN, MINL) // _MIN: Minimum Base Address + CreateDWordField (MR64, 0x12, MINH) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._LEN, LENL) // _LEN: Length + CreateDWordField (MR64, 0x2A, LENH) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._MAX, MAXL) // _MAX: Maximum Base Address + CreateDWordField (MR64, 0x1A, MAXH) + MINH = MRBH /* \_SB_.MHPC.MRBH */ + MINL = MRBL /* \_SB_.MHPC.MRBL */ + LENH = MRLH /* \_SB_.MHPC.MRLH */ + LENL = MRLL /* \_SB_.MHPC.MRLL */ + MAXL = (MINL + LENL) /* \_SB_.MHPC.MCRS.LENL */ + MAXH = (MINH + LENH) /* \_SB_.MHPC.MCRS.LENH */ + If ((MAXL < MINL)) + { + MAXH += One + } + + If ((MAXL < One)) + { + MAXH -= One + } + + MAXL -= One + If ((MAXH == Zero)) + { + Name (MR32, ResourceTemplate () + { + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x00000000, // Range Minimum + 0xFFFFFFFE, // Range Maximum + 0x00000000, // Translation Offset + 0xFFFFFFFF, // Length + ,, _Y02, AddressRangeMemory, TypeStatic) + }) + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._MIN, MIN) // _MIN: Minimum Base Address + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._MAX, MAX) // _MAX: Maximum Base Address + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._LEN, LEN) // _LEN: Length + MIN = MINL /* \_SB_.MHPC.MCRS.MINL */ + MAX = MAXL /* \_SB_.MHPC.MCRS.MAXL */ + LEN = LENL /* \_SB_.MHPC.MCRS.LENL */ + Release (MLCK) + Return (MR32) /* \_SB_.MHPC.MCRS.MR32 */ + } + + Release (MLCK) + Return (MR64) /* \_SB_.MHPC.MCRS.MR64 */ + } + + Method (MPXM, 1, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + Local0 = MPX /* \_SB_.MHPC.MPX_ */ + Release (MLCK) + Return (Local0) + } + + Method (MOST, 4, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + MOEV = Arg1 + MOSC = Arg2 + Release (MLCK) + } + + Method (MEJ0, 2, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + MEJ = One + Release (MLCK) + } + + Device (MP00) + { + Name (_UID, "0x00") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Device (MP01) + { + Name (_UID, "0x01") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Method (MTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (MP00, Arg1) + } + + If ((Arg0 == One)) + { + Notify (MP01, Arg1) + } + } + } + + Method (\_GPE._E03, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.MHPC.MSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + Acquire (\_SB.PCI0.BLCK, 0xFFFF) + \_SB.PCI0.PCNT () + Release (\_SB.PCI0.BLCK) + } + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xF6C00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x00000001C0000000, // Range Minimum + 0x000000023FFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000080000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAFE0, // Range Minimum + 0xAFE0, // Range Maximum + 0x01, // Alignment + 0x04, // Length + ) + }) + } + + Device (PHPR) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "PCI Hotplug resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAE00, // Range Minimum + 0xAE00, // Range Maximum + 0x01, // Alignment + 0x14, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Name (BSEL, Zero) + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S10) + { + Name (_ADR, 0x00020000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Device (S18) + { + Name (_SUN, 0x03) // _SUN: Slot User Number + Name (_ADR, 0x00030000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S20) + { + Name (_SUN, 0x04) // _SUN: Slot User Number + Name (_ADR, 0x00040000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S28) + { + Name (_SUN, 0x05) // _SUN: Slot User Number + Name (_ADR, 0x00050000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S30) + { + Name (_SUN, 0x06) // _SUN: Slot User Number + Name (_ADR, 0x00060000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S38) + { + Name (_SUN, 0x07) // _SUN: Slot User Number + Name (_ADR, 0x00070000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S40) + { + Name (_SUN, 0x08) // _SUN: Slot User Number + Name (_ADR, 0x00080000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S48) + { + Name (_SUN, 0x09) // _SUN: Slot User Number + Name (_ADR, 0x00090000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S50) + { + Name (_SUN, 0x0A) // _SUN: Slot User Number + Name (_ADR, 0x000A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S58) + { + Name (_SUN, 0x0B) // _SUN: Slot User Number + Name (_ADR, 0x000B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S60) + { + Name (_SUN, 0x0C) // _SUN: Slot User Number + Name (_ADR, 0x000C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S68) + { + Name (_SUN, 0x0D) // _SUN: Slot User Number + Name (_ADR, 0x000D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S70) + { + Name (_SUN, 0x0E) // _SUN: Slot User Number + Name (_ADR, 0x000E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S78) + { + Name (_SUN, 0x0F) // _SUN: Slot User Number + Name (_ADR, 0x000F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S80) + { + Name (_SUN, 0x10) // _SUN: Slot User Number + Name (_ADR, 0x00100000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S88) + { + Name (_SUN, 0x11) // _SUN: Slot User Number + Name (_ADR, 0x00110000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S90) + { + Name (_SUN, 0x12) // _SUN: Slot User Number + Name (_ADR, 0x00120000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S98) + { + Name (_SUN, 0x13) // _SUN: Slot User Number + Name (_ADR, 0x00130000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA0) + { + Name (_SUN, 0x14) // _SUN: Slot User Number + Name (_ADR, 0x00140000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA8) + { + Name (_SUN, 0x15) // _SUN: Slot User Number + Name (_ADR, 0x00150000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB0) + { + Name (_SUN, 0x16) // _SUN: Slot User Number + Name (_ADR, 0x00160000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB8) + { + Name (_SUN, 0x17) // _SUN: Slot User Number + Name (_ADR, 0x00170000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC0) + { + Name (_SUN, 0x18) // _SUN: Slot User Number + Name (_ADR, 0x00180000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC8) + { + Name (_SUN, 0x19) // _SUN: Slot User Number + Name (_ADR, 0x00190000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD0) + { + Name (_SUN, 0x1A) // _SUN: Slot User Number + Name (_ADR, 0x001A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD8) + { + Name (_SUN, 0x1B) // _SUN: Slot User Number + Name (_ADR, 0x001B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE0) + { + Name (_SUN, 0x1C) // _SUN: Slot User Number + Name (_ADR, 0x001C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE8) + { + Name (_SUN, 0x1D) // _SUN: Slot User Number + Name (_ADR, 0x001D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF0) + { + Name (_SUN, 0x1E) // _SUN: Slot User Number + Name (_ADR, 0x001E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF8) + { + Name (_SUN, 0x1F) // _SUN: Slot User Number + Name (_ADR, 0x001F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Method (DVNT, 2, NotSerialized) + { + If ((Arg0 & 0x08)) + { + Notify (S18, Arg1) + } + + If ((Arg0 & 0x10)) + { + Notify (S20, Arg1) + } + + If ((Arg0 & 0x20)) + { + Notify (S28, Arg1) + } + + If ((Arg0 & 0x40)) + { + Notify (S30, Arg1) + } + + If ((Arg0 & 0x80)) + { + Notify (S38, Arg1) + } + + If ((Arg0 & 0x0100)) + { + Notify (S40, Arg1) + } + + If ((Arg0 & 0x0200)) + { + Notify (S48, Arg1) + } + + If ((Arg0 & 0x0400)) + { + Notify (S50, Arg1) + } + + If ((Arg0 & 0x0800)) + { + Notify (S58, Arg1) + } + + If ((Arg0 & 0x1000)) + { + Notify (S60, Arg1) + } + + If ((Arg0 & 0x2000)) + { + Notify (S68, Arg1) + } + + If ((Arg0 & 0x4000)) + { + Notify (S70, Arg1) + } + + If ((Arg0 & 0x8000)) + { + Notify (S78, Arg1) + } + + If ((Arg0 & 0x00010000)) + { + Notify (S80, Arg1) + } + + If ((Arg0 & 0x00020000)) + { + Notify (S88, Arg1) + } + + If ((Arg0 & 0x00040000)) + { + Notify (S90, Arg1) + } + + If ((Arg0 & 0x00080000)) + { + Notify (S98, Arg1) + } + + If ((Arg0 & 0x00100000)) + { + Notify (SA0, Arg1) + } + + If ((Arg0 & 0x00200000)) + { + Notify (SA8, Arg1) + } + + If ((Arg0 & 0x00400000)) + { + Notify (SB0, Arg1) + } + + If ((Arg0 & 0x00800000)) + { + Notify (SB8, Arg1) + } + + If ((Arg0 & 0x01000000)) + { + Notify (SC0, Arg1) + } + + If ((Arg0 & 0x02000000)) + { + Notify (SC8, Arg1) + } + + If ((Arg0 & 0x04000000)) + { + Notify (SD0, Arg1) + } + + If ((Arg0 & 0x08000000)) + { + Notify (SD8, Arg1) + } + + If ((Arg0 & 0x10000000)) + { + Notify (SE0, Arg1) + } + + If ((Arg0 & 0x20000000)) + { + Notify (SE8, Arg1) + } + + If ((Arg0 & 0x40000000)) + { + Notify (SF0, Arg1) + } + + If ((Arg0 & 0x80000000)) + { + Notify (SF8, Arg1) + } + } + + Method (PCNT, 0, NotSerialized) + { + BNUM = Zero + DVNT (PCIU, One) + DVNT (PCID, 0x03) + } + } + } +} + diff --git a/tests/data/acpi/pc/DSDT.bridge.dsl b/tests/data/acpi/pc/DSDT.bridge.dsl new file mode 100644 index 0000000000..3311b57ecb --- /dev/null +++ b/tests/data/acpi/pc/DSDT.bridge.dsl @@ -0,0 +1,1800 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/pc/DSDT.bridge, Tue Aug 4 11:14:15 2020 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x00001A89 (6793) + * Revision 0x01 **** 32-bit table (V1), no 64-bit math support + * Checksum 0x09 + * OEM ID "BOCHS " + * OEM Table ID "BXPCDSDT" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001) +{ + Scope (\) + { + OperationRegion (DBG, SystemIO, 0x0402, One) + Field (DBG, ByteAcc, NoLock, Preserve) + { + DBGB, 8 + } + + Method (DBUG, 1, NotSerialized) + { + ToHexString (Arg0, Local0) + ToBuffer (Local0, Local0) + Local1 = (SizeOf (Local0) - One) + Local2 = Zero + While ((Local2 < Local1)) + { + DBGB = DerefOf (Local0 [Local2]) + Local2++ + } + + DBGB = 0x0A + } + } + + Scope (_SB) + { + Device (PCI0) + { + Name (_HID, EisaId ("PNP0A03") /* PCI Bus */) // _HID: Hardware ID + Name (_ADR, Zero) // _ADR: Address + Name (_UID, Zero) // _UID: Unique ID + } + } + + Scope (_SB) + { + Device (HPET) + { + Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + OperationRegion (HPTM, SystemMemory, 0xFED00000, 0x0400) + Field (HPTM, DWordAcc, Lock, Preserve) + { + VEND, 32, + PRD, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Local0 = VEND /* \_SB_.HPET.VEND */ + Local1 = PRD /* \_SB_.HPET.PRD_ */ + Local0 >>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x00010000) // _ADR: Address + OperationRegion (P40C, PCI_Config, 0x60, 0x04) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (FDC0) + { + Name (_HID, EisaId ("PNP0700")) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F2, // Range Minimum + 0x03F2, // Range Maximum + 0x00, // Alignment + 0x04, // Length + ) + IO (Decode16, + 0x03F7, // Range Minimum + 0x03F7, // Range Maximum + 0x00, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {6} + DMA (Compatibility, NotBusMaster, Transfer8, ) + {2} + }) + Device (FLPA) + { + Name (_ADR, Zero) // _ADR: Address + Name (_FDI, Package (0x10) // _FDI: Floppy Drive Information + { + Zero, + 0x05, + 0x4F, + 0x30, + One, + 0xAF, + 0x02, + 0x25, + 0x02, + 0x12, + 0x1B, + 0xFF, + 0x6C, + 0xF6, + 0x0F, + 0x08 + }) + } + + Name (_FDE, Buffer (0x14) // _FDE: Floppy Disk Enumerate + { + /* 0000 */ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0010 */ 0x02, 0x00, 0x00, 0x00 // .... + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Scope (_SB.PCI0) + { + OperationRegion (PCST, SystemIO, 0xAE00, 0x08) + Field (PCST, DWordAcc, NoLock, WriteAsZeros) + { + PCIU, 32, + PCID, 32 + } + + OperationRegion (SEJ, SystemIO, 0xAE08, 0x04) + Field (SEJ, DWordAcc, NoLock, WriteAsZeros) + { + B0EJ, 32 + } + + OperationRegion (BNMR, SystemIO, 0xAE10, 0x04) + Field (BNMR, DWordAcc, NoLock, WriteAsZeros) + { + BNUM, 32 + } + + Mutex (BLCK, 0x00) + Method (PCEJ, 2, NotSerialized) + { + Acquire (BLCK, 0xFFFF) + BNUM = Arg0 + B0EJ = (One << Arg1) + Release (BLCK) + Return (Zero) + } + } + + Scope (_SB) + { + Scope (PCI0) + { + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + Local0 = Package (0x80){} + Local1 = Zero + While ((Local1 < 0x80)) + { + Local2 = (Local1 >> 0x02) + Local3 = ((Local1 + Local2) & 0x03) + If ((Local3 == Zero)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKD, + Zero + } + } + + If ((Local3 == One)) + { + If ((Local1 == 0x04)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKS, + Zero + } + } + Else + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKA, + Zero + } + } + } + + If ((Local3 == 0x02)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKB, + Zero + } + } + + If ((Local3 == 0x03)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKC, + Zero + } + } + + Local4 [Zero] = ((Local2 << 0x10) | 0xFFFF) + Local4 [One] = (Local1 & 0x03) + Local0 [Local1] = Local4 + Local1++ + } + + Return (Local0) + } + } + + Field (PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) + { + PRQ0, 8, + PRQ1, 8, + PRQ2, 8, + PRQ3, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + If ((Arg0 < 0x80)) + { + PRRI = Arg0 + } + + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ0)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ0 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ0)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ0 = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ1)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ1 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ1)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ1 = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ2)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ2 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ2)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ2 = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ3)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ3 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ3)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ3 = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKS) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000009, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (_PRS) /* \_SB_.LNKS._PRS */ + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAF00, // Range Minimum + 0xAF00, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0xAF00, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Local0 = One + While ((Local0 == One)) + { + Local0 = Zero + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CINS == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, One) + \_SB.PCI0.PRES.CINS = One + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + Acquire (\_SB.PCI0.BLCK, 0xFFFF) + \_SB.PCI0.PCNT () + Release (\_SB.PCI0.BLCK) + } + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xF6C00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000100000000, // Range Minimum + 0x000000017FFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000080000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAFE0, // Range Minimum + 0xAFE0, // Range Maximum + 0x01, // Alignment + 0x04, // Length + ) + }) + } + + Device (PHPR) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "PCI Hotplug resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAE00, // Range Minimum + 0xAE00, // Range Maximum + 0x01, // Alignment + 0x14, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Name (BSEL, Zero) + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S10) + { + Name (_ADR, 0x00020000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Device (S18) + { + Name (_ADR, 0x00030000) // _ADR: Address + Name (BSEL, One) + Device (S00) + { + Name (_SUN, Zero) // _SUN: Slot User Number + Name (_ADR, Zero) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S08) + { + Name (_SUN, One) // _SUN: Slot User Number + Name (_ADR, 0x00010000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S10) + { + Name (_SUN, 0x02) // _SUN: Slot User Number + Name (_ADR, 0x00020000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S18) + { + Name (_SUN, 0x03) // _SUN: Slot User Number + Name (_ADR, 0x00030000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S20) + { + Name (_SUN, 0x04) // _SUN: Slot User Number + Name (_ADR, 0x00040000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S28) + { + Name (_SUN, 0x05) // _SUN: Slot User Number + Name (_ADR, 0x00050000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S30) + { + Name (_SUN, 0x06) // _SUN: Slot User Number + Name (_ADR, 0x00060000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S38) + { + Name (_SUN, 0x07) // _SUN: Slot User Number + Name (_ADR, 0x00070000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S40) + { + Name (_SUN, 0x08) // _SUN: Slot User Number + Name (_ADR, 0x00080000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S48) + { + Name (_SUN, 0x09) // _SUN: Slot User Number + Name (_ADR, 0x00090000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S50) + { + Name (_SUN, 0x0A) // _SUN: Slot User Number + Name (_ADR, 0x000A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S58) + { + Name (_SUN, 0x0B) // _SUN: Slot User Number + Name (_ADR, 0x000B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S60) + { + Name (_SUN, 0x0C) // _SUN: Slot User Number + Name (_ADR, 0x000C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S68) + { + Name (_SUN, 0x0D) // _SUN: Slot User Number + Name (_ADR, 0x000D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S70) + { + Name (_SUN, 0x0E) // _SUN: Slot User Number + Name (_ADR, 0x000E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S78) + { + Name (_SUN, 0x0F) // _SUN: Slot User Number + Name (_ADR, 0x000F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S80) + { + Name (_SUN, 0x10) // _SUN: Slot User Number + Name (_ADR, 0x00100000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S88) + { + Name (_SUN, 0x11) // _SUN: Slot User Number + Name (_ADR, 0x00110000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S90) + { + Name (_SUN, 0x12) // _SUN: Slot User Number + Name (_ADR, 0x00120000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S98) + { + Name (_SUN, 0x13) // _SUN: Slot User Number + Name (_ADR, 0x00130000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA0) + { + Name (_SUN, 0x14) // _SUN: Slot User Number + Name (_ADR, 0x00140000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA8) + { + Name (_SUN, 0x15) // _SUN: Slot User Number + Name (_ADR, 0x00150000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB0) + { + Name (_SUN, 0x16) // _SUN: Slot User Number + Name (_ADR, 0x00160000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB8) + { + Name (_SUN, 0x17) // _SUN: Slot User Number + Name (_ADR, 0x00170000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC0) + { + Name (_SUN, 0x18) // _SUN: Slot User Number + Name (_ADR, 0x00180000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC8) + { + Name (_SUN, 0x19) // _SUN: Slot User Number + Name (_ADR, 0x00190000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD0) + { + Name (_SUN, 0x1A) // _SUN: Slot User Number + Name (_ADR, 0x001A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD8) + { + Name (_SUN, 0x1B) // _SUN: Slot User Number + Name (_ADR, 0x001B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE0) + { + Name (_SUN, 0x1C) // _SUN: Slot User Number + Name (_ADR, 0x001C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE8) + { + Name (_SUN, 0x1D) // _SUN: Slot User Number + Name (_ADR, 0x001D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF0) + { + Name (_SUN, 0x1E) // _SUN: Slot User Number + Name (_ADR, 0x001E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF8) + { + Name (_SUN, 0x1F) // _SUN: Slot User Number + Name (_ADR, 0x001F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Method (DVNT, 2, NotSerialized) + { + If ((Arg0 & One)) + { + Notify (S00, Arg1) + } + + If ((Arg0 & 0x02)) + { + Notify (S08, Arg1) + } + + If ((Arg0 & 0x04)) + { + Notify (S10, Arg1) + } + + If ((Arg0 & 0x08)) + { + Notify (S18, Arg1) + } + + If ((Arg0 & 0x10)) + { + Notify (S20, Arg1) + } + + If ((Arg0 & 0x20)) + { + Notify (S28, Arg1) + } + + If ((Arg0 & 0x40)) + { + Notify (S30, Arg1) + } + + If ((Arg0 & 0x80)) + { + Notify (S38, Arg1) + } + + If ((Arg0 & 0x0100)) + { + Notify (S40, Arg1) + } + + If ((Arg0 & 0x0200)) + { + Notify (S48, Arg1) + } + + If ((Arg0 & 0x0400)) + { + Notify (S50, Arg1) + } + + If ((Arg0 & 0x0800)) + { + Notify (S58, Arg1) + } + + If ((Arg0 & 0x1000)) + { + Notify (S60, Arg1) + } + + If ((Arg0 & 0x2000)) + { + Notify (S68, Arg1) + } + + If ((Arg0 & 0x4000)) + { + Notify (S70, Arg1) + } + + If ((Arg0 & 0x8000)) + { + Notify (S78, Arg1) + } + + If ((Arg0 & 0x00010000)) + { + Notify (S80, Arg1) + } + + If ((Arg0 & 0x00020000)) + { + Notify (S88, Arg1) + } + + If ((Arg0 & 0x00040000)) + { + Notify (S90, Arg1) + } + + If ((Arg0 & 0x00080000)) + { + Notify (S98, Arg1) + } + + If ((Arg0 & 0x00100000)) + { + Notify (SA0, Arg1) + } + + If ((Arg0 & 0x00200000)) + { + Notify (SA8, Arg1) + } + + If ((Arg0 & 0x00400000)) + { + Notify (SB0, Arg1) + } + + If ((Arg0 & 0x00800000)) + { + Notify (SB8, Arg1) + } + + If ((Arg0 & 0x01000000)) + { + Notify (SC0, Arg1) + } + + If ((Arg0 & 0x02000000)) + { + Notify (SC8, Arg1) + } + + If ((Arg0 & 0x04000000)) + { + Notify (SD0, Arg1) + } + + If ((Arg0 & 0x08000000)) + { + Notify (SD8, Arg1) + } + + If ((Arg0 & 0x10000000)) + { + Notify (SE0, Arg1) + } + + If ((Arg0 & 0x20000000)) + { + Notify (SE8, Arg1) + } + + If ((Arg0 & 0x40000000)) + { + Notify (SF0, Arg1) + } + + If ((Arg0 & 0x80000000)) + { + Notify (SF8, Arg1) + } + } + + Method (PCNT, 0, NotSerialized) + { + BNUM = One + DVNT (PCIU, One) + DVNT (PCID, 0x03) + } + } + + Device (S20) + { + Name (_SUN, 0x04) // _SUN: Slot User Number + Name (_ADR, 0x00040000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S28) + { + Name (_SUN, 0x05) // _SUN: Slot User Number + Name (_ADR, 0x00050000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S30) + { + Name (_SUN, 0x06) // _SUN: Slot User Number + Name (_ADR, 0x00060000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S38) + { + Name (_SUN, 0x07) // _SUN: Slot User Number + Name (_ADR, 0x00070000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S40) + { + Name (_SUN, 0x08) // _SUN: Slot User Number + Name (_ADR, 0x00080000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S48) + { + Name (_SUN, 0x09) // _SUN: Slot User Number + Name (_ADR, 0x00090000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S50) + { + Name (_SUN, 0x0A) // _SUN: Slot User Number + Name (_ADR, 0x000A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S58) + { + Name (_SUN, 0x0B) // _SUN: Slot User Number + Name (_ADR, 0x000B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S60) + { + Name (_SUN, 0x0C) // _SUN: Slot User Number + Name (_ADR, 0x000C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S68) + { + Name (_SUN, 0x0D) // _SUN: Slot User Number + Name (_ADR, 0x000D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S70) + { + Name (_SUN, 0x0E) // _SUN: Slot User Number + Name (_ADR, 0x000E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S78) + { + Name (_SUN, 0x0F) // _SUN: Slot User Number + Name (_ADR, 0x000F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S80) + { + Name (_SUN, 0x10) // _SUN: Slot User Number + Name (_ADR, 0x00100000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S88) + { + Name (_SUN, 0x11) // _SUN: Slot User Number + Name (_ADR, 0x00110000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S90) + { + Name (_SUN, 0x12) // _SUN: Slot User Number + Name (_ADR, 0x00120000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S98) + { + Name (_SUN, 0x13) // _SUN: Slot User Number + Name (_ADR, 0x00130000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA0) + { + Name (_SUN, 0x14) // _SUN: Slot User Number + Name (_ADR, 0x00140000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA8) + { + Name (_SUN, 0x15) // _SUN: Slot User Number + Name (_ADR, 0x00150000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB0) + { + Name (_SUN, 0x16) // _SUN: Slot User Number + Name (_ADR, 0x00160000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB8) + { + Name (_SUN, 0x17) // _SUN: Slot User Number + Name (_ADR, 0x00170000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC0) + { + Name (_SUN, 0x18) // _SUN: Slot User Number + Name (_ADR, 0x00180000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC8) + { + Name (_SUN, 0x19) // _SUN: Slot User Number + Name (_ADR, 0x00190000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD0) + { + Name (_SUN, 0x1A) // _SUN: Slot User Number + Name (_ADR, 0x001A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD8) + { + Name (_SUN, 0x1B) // _SUN: Slot User Number + Name (_ADR, 0x001B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE0) + { + Name (_SUN, 0x1C) // _SUN: Slot User Number + Name (_ADR, 0x001C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE8) + { + Name (_SUN, 0x1D) // _SUN: Slot User Number + Name (_ADR, 0x001D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF0) + { + Name (_SUN, 0x1E) // _SUN: Slot User Number + Name (_ADR, 0x001E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF8) + { + Name (_SUN, 0x1F) // _SUN: Slot User Number + Name (_ADR, 0x001F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Method (DVNT, 2, NotSerialized) + { + If ((Arg0 & 0x10)) + { + Notify (S20, Arg1) + } + + If ((Arg0 & 0x20)) + { + Notify (S28, Arg1) + } + + If ((Arg0 & 0x40)) + { + Notify (S30, Arg1) + } + + If ((Arg0 & 0x80)) + { + Notify (S38, Arg1) + } + + If ((Arg0 & 0x0100)) + { + Notify (S40, Arg1) + } + + If ((Arg0 & 0x0200)) + { + Notify (S48, Arg1) + } + + If ((Arg0 & 0x0400)) + { + Notify (S50, Arg1) + } + + If ((Arg0 & 0x0800)) + { + Notify (S58, Arg1) + } + + If ((Arg0 & 0x1000)) + { + Notify (S60, Arg1) + } + + If ((Arg0 & 0x2000)) + { + Notify (S68, Arg1) + } + + If ((Arg0 & 0x4000)) + { + Notify (S70, Arg1) + } + + If ((Arg0 & 0x8000)) + { + Notify (S78, Arg1) + } + + If ((Arg0 & 0x00010000)) + { + Notify (S80, Arg1) + } + + If ((Arg0 & 0x00020000)) + { + Notify (S88, Arg1) + } + + If ((Arg0 & 0x00040000)) + { + Notify (S90, Arg1) + } + + If ((Arg0 & 0x00080000)) + { + Notify (S98, Arg1) + } + + If ((Arg0 & 0x00100000)) + { + Notify (SA0, Arg1) + } + + If ((Arg0 & 0x00200000)) + { + Notify (SA8, Arg1) + } + + If ((Arg0 & 0x00400000)) + { + Notify (SB0, Arg1) + } + + If ((Arg0 & 0x00800000)) + { + Notify (SB8, Arg1) + } + + If ((Arg0 & 0x01000000)) + { + Notify (SC0, Arg1) + } + + If ((Arg0 & 0x02000000)) + { + Notify (SC8, Arg1) + } + + If ((Arg0 & 0x04000000)) + { + Notify (SD0, Arg1) + } + + If ((Arg0 & 0x08000000)) + { + Notify (SD8, Arg1) + } + + If ((Arg0 & 0x10000000)) + { + Notify (SE0, Arg1) + } + + If ((Arg0 & 0x20000000)) + { + Notify (SE8, Arg1) + } + + If ((Arg0 & 0x40000000)) + { + Notify (SF0, Arg1) + } + + If ((Arg0 & 0x80000000)) + { + Notify (SF8, Arg1) + } + } + + Method (PCNT, 0, NotSerialized) + { + BNUM = Zero + DVNT (PCIU, One) + DVNT (PCID, 0x03) + ^S18.PCNT () + } + } + } +} + diff --git a/tests/data/acpi/pc/DSDT.cphp.dsl b/tests/data/acpi/pc/DSDT.cphp.dsl new file mode 100644 index 0000000000..22ed37d7dc --- /dev/null +++ b/tests/data/acpi/pc/DSDT.cphp.dsl @@ -0,0 +1,1466 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/pc/DSDT.cphp, Tue Aug 4 11:14:15 2020 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x00001515 (5397) + * Revision 0x01 **** 32-bit table (V1), no 64-bit math support + * Checksum 0x39 + * OEM ID "BOCHS " + * OEM Table ID "BXPCDSDT" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001) +{ + Scope (\) + { + OperationRegion (DBG, SystemIO, 0x0402, One) + Field (DBG, ByteAcc, NoLock, Preserve) + { + DBGB, 8 + } + + Method (DBUG, 1, NotSerialized) + { + ToHexString (Arg0, Local0) + ToBuffer (Local0, Local0) + Local1 = (SizeOf (Local0) - One) + Local2 = Zero + While ((Local2 < Local1)) + { + DBGB = DerefOf (Local0 [Local2]) + Local2++ + } + + DBGB = 0x0A + } + } + + Scope (_SB) + { + Device (PCI0) + { + Name (_HID, EisaId ("PNP0A03") /* PCI Bus */) // _HID: Hardware ID + Name (_ADR, Zero) // _ADR: Address + Name (_UID, Zero) // _UID: Unique ID + } + } + + Scope (_SB) + { + Device (HPET) + { + Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + OperationRegion (HPTM, SystemMemory, 0xFED00000, 0x0400) + Field (HPTM, DWordAcc, Lock, Preserve) + { + VEND, 32, + PRD, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Local0 = VEND /* \_SB_.HPET.VEND */ + Local1 = PRD /* \_SB_.HPET.PRD_ */ + Local0 >>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x00010000) // _ADR: Address + OperationRegion (P40C, PCI_Config, 0x60, 0x04) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (FDC0) + { + Name (_HID, EisaId ("PNP0700")) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F2, // Range Minimum + 0x03F2, // Range Maximum + 0x00, // Alignment + 0x04, // Length + ) + IO (Decode16, + 0x03F7, // Range Minimum + 0x03F7, // Range Maximum + 0x00, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {6} + DMA (Compatibility, NotBusMaster, Transfer8, ) + {2} + }) + Device (FLPA) + { + Name (_ADR, Zero) // _ADR: Address + Name (_FDI, Package (0x10) // _FDI: Floppy Drive Information + { + Zero, + 0x05, + 0x4F, + 0x30, + One, + 0xAF, + 0x02, + 0x25, + 0x02, + 0x12, + 0x1B, + 0xFF, + 0x6C, + 0xF6, + 0x0F, + 0x08 + }) + } + + Name (_FDE, Buffer (0x14) // _FDE: Floppy Disk Enumerate + { + /* 0000 */ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0010 */ 0x02, 0x00, 0x00, 0x00 // .... + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Scope (_SB.PCI0) + { + OperationRegion (PCST, SystemIO, 0xAE00, 0x08) + Field (PCST, DWordAcc, NoLock, WriteAsZeros) + { + PCIU, 32, + PCID, 32 + } + + OperationRegion (SEJ, SystemIO, 0xAE08, 0x04) + Field (SEJ, DWordAcc, NoLock, WriteAsZeros) + { + B0EJ, 32 + } + + OperationRegion (BNMR, SystemIO, 0xAE10, 0x04) + Field (BNMR, DWordAcc, NoLock, WriteAsZeros) + { + BNUM, 32 + } + + Mutex (BLCK, 0x00) + Method (PCEJ, 2, NotSerialized) + { + Acquire (BLCK, 0xFFFF) + BNUM = Arg0 + B0EJ = (One << Arg1) + Release (BLCK) + Return (Zero) + } + } + + Scope (_SB) + { + Scope (PCI0) + { + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + Local0 = Package (0x80){} + Local1 = Zero + While ((Local1 < 0x80)) + { + Local2 = (Local1 >> 0x02) + Local3 = ((Local1 + Local2) & 0x03) + If ((Local3 == Zero)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKD, + Zero + } + } + + If ((Local3 == One)) + { + If ((Local1 == 0x04)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKS, + Zero + } + } + Else + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKA, + Zero + } + } + } + + If ((Local3 == 0x02)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKB, + Zero + } + } + + If ((Local3 == 0x03)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKC, + Zero + } + } + + Local4 [Zero] = ((Local2 << 0x10) | 0xFFFF) + Local4 [One] = (Local1 & 0x03) + Local0 [Local1] = Local4 + Local1++ + } + + Return (Local0) + } + } + + Field (PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) + { + PRQ0, 8, + PRQ1, 8, + PRQ2, 8, + PRQ3, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + If ((Arg0 < 0x80)) + { + PRRI = Arg0 + } + + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ0)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ0 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ0)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ0 = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ1)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ1 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ1)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ1 = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ2)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ2 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ2)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ2 = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ3)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ3 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ3)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ3 = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKS) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000009, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (_PRS) /* \_SB_.LNKS._PRS */ + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAF00, // Range Minimum + 0xAF00, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0xAF00, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + + If ((Arg0 == One)) + { + Notify (C001, Arg1) + } + + If ((Arg0 == 0x02)) + { + Notify (C002, Arg1) + } + + If ((Arg0 == 0x03)) + { + Notify (C003, Arg1) + } + + If ((Arg0 == 0x04)) + { + Notify (C004, Arg1) + } + + If ((Arg0 == 0x05)) + { + Notify (C005, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Local0 = One + While ((Local0 == One)) + { + Local0 = Zero + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CINS == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, One) + \_SB.PCI0.PRES.CINS = One + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + + Name (_PXM, Zero) // _PXM: Device Proximity + } + + Processor (C001, 0x01, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (One)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (One) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (One, Arg0, Arg1, Arg2) + } + + Name (_PXM, Zero) // _PXM: Device Proximity + } + + Processor (C002, 0x02, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (0x02)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x02, 0x02, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (0x02) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (0x02, Arg0, Arg1, Arg2) + } + + Name (_PXM, Zero) // _PXM: Device Proximity + } + + Processor (C003, 0x03, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (0x03)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x03, 0x04, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (0x03) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (0x03, Arg0, Arg1, Arg2) + } + + Name (_PXM, One) // _PXM: Device Proximity + } + + Processor (C004, 0x04, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (0x04)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x04, 0x05, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (0x04) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (0x04, Arg0, Arg1, Arg2) + } + + Name (_PXM, One) // _PXM: Device Proximity + } + + Processor (C005, 0x05, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (0x05)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x05, 0x06, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (0x05) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (0x05, Arg0, Arg1, Arg2) + } + + Name (_PXM, One) // _PXM: Device Proximity + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + Acquire (\_SB.PCI0.BLCK, 0xFFFF) + \_SB.PCI0.PCNT () + Release (\_SB.PCI0.BLCK) + } + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xF6C00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000100000000, // Range Minimum + 0x000000017FFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000080000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAFE0, // Range Minimum + 0xAFE0, // Range Maximum + 0x01, // Alignment + 0x04, // Length + ) + }) + } + + Device (PHPR) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "PCI Hotplug resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAE00, // Range Minimum + 0xAE00, // Range Maximum + 0x01, // Alignment + 0x14, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Name (BSEL, Zero) + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S10) + { + Name (_ADR, 0x00020000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Device (S18) + { + Name (_SUN, 0x03) // _SUN: Slot User Number + Name (_ADR, 0x00030000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S20) + { + Name (_SUN, 0x04) // _SUN: Slot User Number + Name (_ADR, 0x00040000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S28) + { + Name (_SUN, 0x05) // _SUN: Slot User Number + Name (_ADR, 0x00050000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S30) + { + Name (_SUN, 0x06) // _SUN: Slot User Number + Name (_ADR, 0x00060000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S38) + { + Name (_SUN, 0x07) // _SUN: Slot User Number + Name (_ADR, 0x00070000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S40) + { + Name (_SUN, 0x08) // _SUN: Slot User Number + Name (_ADR, 0x00080000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S48) + { + Name (_SUN, 0x09) // _SUN: Slot User Number + Name (_ADR, 0x00090000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S50) + { + Name (_SUN, 0x0A) // _SUN: Slot User Number + Name (_ADR, 0x000A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S58) + { + Name (_SUN, 0x0B) // _SUN: Slot User Number + Name (_ADR, 0x000B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S60) + { + Name (_SUN, 0x0C) // _SUN: Slot User Number + Name (_ADR, 0x000C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S68) + { + Name (_SUN, 0x0D) // _SUN: Slot User Number + Name (_ADR, 0x000D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S70) + { + Name (_SUN, 0x0E) // _SUN: Slot User Number + Name (_ADR, 0x000E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S78) + { + Name (_SUN, 0x0F) // _SUN: Slot User Number + Name (_ADR, 0x000F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S80) + { + Name (_SUN, 0x10) // _SUN: Slot User Number + Name (_ADR, 0x00100000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S88) + { + Name (_SUN, 0x11) // _SUN: Slot User Number + Name (_ADR, 0x00110000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S90) + { + Name (_SUN, 0x12) // _SUN: Slot User Number + Name (_ADR, 0x00120000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S98) + { + Name (_SUN, 0x13) // _SUN: Slot User Number + Name (_ADR, 0x00130000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA0) + { + Name (_SUN, 0x14) // _SUN: Slot User Number + Name (_ADR, 0x00140000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA8) + { + Name (_SUN, 0x15) // _SUN: Slot User Number + Name (_ADR, 0x00150000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB0) + { + Name (_SUN, 0x16) // _SUN: Slot User Number + Name (_ADR, 0x00160000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB8) + { + Name (_SUN, 0x17) // _SUN: Slot User Number + Name (_ADR, 0x00170000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC0) + { + Name (_SUN, 0x18) // _SUN: Slot User Number + Name (_ADR, 0x00180000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC8) + { + Name (_SUN, 0x19) // _SUN: Slot User Number + Name (_ADR, 0x00190000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD0) + { + Name (_SUN, 0x1A) // _SUN: Slot User Number + Name (_ADR, 0x001A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD8) + { + Name (_SUN, 0x1B) // _SUN: Slot User Number + Name (_ADR, 0x001B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE0) + { + Name (_SUN, 0x1C) // _SUN: Slot User Number + Name (_ADR, 0x001C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE8) + { + Name (_SUN, 0x1D) // _SUN: Slot User Number + Name (_ADR, 0x001D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF0) + { + Name (_SUN, 0x1E) // _SUN: Slot User Number + Name (_ADR, 0x001E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF8) + { + Name (_SUN, 0x1F) // _SUN: Slot User Number + Name (_ADR, 0x001F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Method (DVNT, 2, NotSerialized) + { + If ((Arg0 & 0x08)) + { + Notify (S18, Arg1) + } + + If ((Arg0 & 0x10)) + { + Notify (S20, Arg1) + } + + If ((Arg0 & 0x20)) + { + Notify (S28, Arg1) + } + + If ((Arg0 & 0x40)) + { + Notify (S30, Arg1) + } + + If ((Arg0 & 0x80)) + { + Notify (S38, Arg1) + } + + If ((Arg0 & 0x0100)) + { + Notify (S40, Arg1) + } + + If ((Arg0 & 0x0200)) + { + Notify (S48, Arg1) + } + + If ((Arg0 & 0x0400)) + { + Notify (S50, Arg1) + } + + If ((Arg0 & 0x0800)) + { + Notify (S58, Arg1) + } + + If ((Arg0 & 0x1000)) + { + Notify (S60, Arg1) + } + + If ((Arg0 & 0x2000)) + { + Notify (S68, Arg1) + } + + If ((Arg0 & 0x4000)) + { + Notify (S70, Arg1) + } + + If ((Arg0 & 0x8000)) + { + Notify (S78, Arg1) + } + + If ((Arg0 & 0x00010000)) + { + Notify (S80, Arg1) + } + + If ((Arg0 & 0x00020000)) + { + Notify (S88, Arg1) + } + + If ((Arg0 & 0x00040000)) + { + Notify (S90, Arg1) + } + + If ((Arg0 & 0x00080000)) + { + Notify (S98, Arg1) + } + + If ((Arg0 & 0x00100000)) + { + Notify (SA0, Arg1) + } + + If ((Arg0 & 0x00200000)) + { + Notify (SA8, Arg1) + } + + If ((Arg0 & 0x00400000)) + { + Notify (SB0, Arg1) + } + + If ((Arg0 & 0x00800000)) + { + Notify (SB8, Arg1) + } + + If ((Arg0 & 0x01000000)) + { + Notify (SC0, Arg1) + } + + If ((Arg0 & 0x02000000)) + { + Notify (SC8, Arg1) + } + + If ((Arg0 & 0x04000000)) + { + Notify (SD0, Arg1) + } + + If ((Arg0 & 0x08000000)) + { + Notify (SD8, Arg1) + } + + If ((Arg0 & 0x10000000)) + { + Notify (SE0, Arg1) + } + + If ((Arg0 & 0x20000000)) + { + Notify (SE8, Arg1) + } + + If ((Arg0 & 0x40000000)) + { + Notify (SF0, Arg1) + } + + If ((Arg0 & 0x80000000)) + { + Notify (SF8, Arg1) + } + } + + Method (PCNT, 0, NotSerialized) + { + BNUM = Zero + DVNT (PCIU, One) + DVNT (PCID, 0x03) + } + } + } +} + diff --git a/tests/data/acpi/pc/DSDT.dimmpxm.dsl b/tests/data/acpi/pc/DSDT.dimmpxm.dsl new file mode 100644 index 0000000000..798056147b --- /dev/null +++ b/tests/data/acpi/pc/DSDT.dimmpxm.dsl @@ -0,0 +1,1719 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/pc/DSDT.dimmpxm, Tue Aug 4 11:14:15 2020 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x000019BB (6587) + * Revision 0x01 **** 32-bit table (V1), no 64-bit math support + * Checksum 0x21 + * OEM ID "BOCHS " + * OEM Table ID "BXPCDSDT" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001) +{ + External (_SB_.NVDR, UnknownObj) + + Scope (\) + { + OperationRegion (DBG, SystemIO, 0x0402, One) + Field (DBG, ByteAcc, NoLock, Preserve) + { + DBGB, 8 + } + + Method (DBUG, 1, NotSerialized) + { + ToHexString (Arg0, Local0) + ToBuffer (Local0, Local0) + Local1 = (SizeOf (Local0) - One) + Local2 = Zero + While ((Local2 < Local1)) + { + DBGB = DerefOf (Local0 [Local2]) + Local2++ + } + + DBGB = 0x0A + } + } + + Scope (_SB) + { + Device (PCI0) + { + Name (_HID, EisaId ("PNP0A03") /* PCI Bus */) // _HID: Hardware ID + Name (_ADR, Zero) // _ADR: Address + Name (_UID, Zero) // _UID: Unique ID + } + } + + Scope (_SB) + { + Device (HPET) + { + Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + OperationRegion (HPTM, SystemMemory, 0xFED00000, 0x0400) + Field (HPTM, DWordAcc, Lock, Preserve) + { + VEND, 32, + PRD, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Local0 = VEND /* \_SB_.HPET.VEND */ + Local1 = PRD /* \_SB_.HPET.PRD_ */ + Local0 >>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x00010000) // _ADR: Address + OperationRegion (P40C, PCI_Config, 0x60, 0x04) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (FDC0) + { + Name (_HID, EisaId ("PNP0700")) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F2, // Range Minimum + 0x03F2, // Range Maximum + 0x00, // Alignment + 0x04, // Length + ) + IO (Decode16, + 0x03F7, // Range Minimum + 0x03F7, // Range Maximum + 0x00, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {6} + DMA (Compatibility, NotBusMaster, Transfer8, ) + {2} + }) + Device (FLPA) + { + Name (_ADR, Zero) // _ADR: Address + Name (_FDI, Package (0x10) // _FDI: Floppy Drive Information + { + Zero, + 0x05, + 0x4F, + 0x30, + One, + 0xAF, + 0x02, + 0x25, + 0x02, + 0x12, + 0x1B, + 0xFF, + 0x6C, + 0xF6, + 0x0F, + 0x08 + }) + } + + Name (_FDE, Buffer (0x14) // _FDE: Floppy Disk Enumerate + { + /* 0000 */ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0010 */ 0x02, 0x00, 0x00, 0x00 // .... + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Scope (_SB.PCI0) + { + OperationRegion (PCST, SystemIO, 0xAE00, 0x08) + Field (PCST, DWordAcc, NoLock, WriteAsZeros) + { + PCIU, 32, + PCID, 32 + } + + OperationRegion (SEJ, SystemIO, 0xAE08, 0x04) + Field (SEJ, DWordAcc, NoLock, WriteAsZeros) + { + B0EJ, 32 + } + + OperationRegion (BNMR, SystemIO, 0xAE10, 0x04) + Field (BNMR, DWordAcc, NoLock, WriteAsZeros) + { + BNUM, 32 + } + + Mutex (BLCK, 0x00) + Method (PCEJ, 2, NotSerialized) + { + Acquire (BLCK, 0xFFFF) + BNUM = Arg0 + B0EJ = (One << Arg1) + Release (BLCK) + Return (Zero) + } + } + + Scope (_SB) + { + Scope (PCI0) + { + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + Local0 = Package (0x80){} + Local1 = Zero + While ((Local1 < 0x80)) + { + Local2 = (Local1 >> 0x02) + Local3 = ((Local1 + Local2) & 0x03) + If ((Local3 == Zero)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKD, + Zero + } + } + + If ((Local3 == One)) + { + If ((Local1 == 0x04)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKS, + Zero + } + } + Else + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKA, + Zero + } + } + } + + If ((Local3 == 0x02)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKB, + Zero + } + } + + If ((Local3 == 0x03)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKC, + Zero + } + } + + Local4 [Zero] = ((Local2 << 0x10) | 0xFFFF) + Local4 [One] = (Local1 & 0x03) + Local0 [Local1] = Local4 + Local1++ + } + + Return (Local0) + } + } + + Field (PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) + { + PRQ0, 8, + PRQ1, 8, + PRQ2, 8, + PRQ3, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + If ((Arg0 < 0x80)) + { + PRRI = Arg0 + } + + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ0)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ0 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ0)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ0 = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ1)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ1 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ1)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ1 = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ2)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ2 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ2)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ2 = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ3)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ3 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ3)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ3 = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKS) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000009, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (_PRS) /* \_SB_.LNKS._PRS */ + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAF00, // Range Minimum + 0xAF00, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0xAF00, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + + If ((Arg0 == One)) + { + Notify (C001, Arg1) + } + + If ((Arg0 == 0x02)) + { + Notify (C002, Arg1) + } + + If ((Arg0 == 0x03)) + { + Notify (C003, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Local0 = One + While ((Local0 == One)) + { + Local0 = Zero + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CINS == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, One) + \_SB.PCI0.PRES.CINS = One + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + + Name (_PXM, Zero) // _PXM: Device Proximity + } + + Processor (C001, 0x01, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (One)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (One) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (One, Arg0, Arg1, Arg2) + } + + Name (_PXM, One) // _PXM: Device Proximity + } + + Processor (C002, 0x02, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (0x02)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x02, 0x02, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (0x02) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (0x02, Arg0, Arg1, Arg2) + } + + Name (_PXM, 0x02) // _PXM: Device Proximity + } + + Processor (C003, 0x03, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (0x03)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x03, 0x03, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (0x03) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (0x03, Arg0, Arg1, Arg2) + } + + Name (_PXM, 0x03) // _PXM: Device Proximity + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Device (\_SB.PCI0.MHPD) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "Memory hotplug resources") // _UID: Unique ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0A00, // Range Minimum + 0x0A00, // Range Maximum + 0x00, // Alignment + 0x18, // Length + ) + }) + OperationRegion (HPMR, SystemIO, 0x0A00, 0x18) + } + + Device (\_SB.MHPC) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "DIMM devices") // _UID: Unique ID + Name (MDNR, 0x03) + Field (\_SB.PCI0.MHPD.HPMR, DWordAcc, NoLock, Preserve) + { + MRBL, 32, + MRBH, 32, + MRLL, 32, + MRLH, 32, + MPX, 32 + } + + Field (\_SB.PCI0.MHPD.HPMR, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x14), + MES, 1, + MINS, 1, + MRMV, 1, + MEJ, 1 + } + + Field (\_SB.PCI0.MHPD.HPMR, DWordAcc, NoLock, Preserve) + { + MSEL, 32, + MOEV, 32, + MOSC, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If ((MDNR == Zero)) + { + Return (Zero) + } + + Return (0x0B) + } + + Mutex (MLCK, 0x00) + Method (MSCN, 0, NotSerialized) + { + If ((MDNR == Zero)) + { + Return (Zero) + } + + Local0 = Zero + Acquire (MLCK, 0xFFFF) + While ((Local0 < MDNR)) + { + MSEL = Local0 + If ((MINS == One)) + { + MTFY (Local0, One) + MINS = One + } + ElseIf ((MRMV == One)) + { + MTFY (Local0, 0x03) + MRMV = One + } + + Local0 += One + } + + Release (MLCK) + Return (One) + } + + Method (MRST, 1, NotSerialized) + { + Local0 = Zero + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + If ((MES == One)) + { + Local0 = 0x0F + } + + Release (MLCK) + Return (Local0) + } + + Method (MCRS, 1, Serialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + Name (MR64, ResourceTemplate () + { + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000000000000, // Range Minimum + 0xFFFFFFFFFFFFFFFE, // Range Maximum + 0x0000000000000000, // Translation Offset + 0xFFFFFFFFFFFFFFFF, // Length + ,, _Y01, AddressRangeMemory, TypeStatic) + }) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._MIN, MINL) // _MIN: Minimum Base Address + CreateDWordField (MR64, 0x12, MINH) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._LEN, LENL) // _LEN: Length + CreateDWordField (MR64, 0x2A, LENH) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._MAX, MAXL) // _MAX: Maximum Base Address + CreateDWordField (MR64, 0x1A, MAXH) + MINH = MRBH /* \_SB_.MHPC.MRBH */ + MINL = MRBL /* \_SB_.MHPC.MRBL */ + LENH = MRLH /* \_SB_.MHPC.MRLH */ + LENL = MRLL /* \_SB_.MHPC.MRLL */ + MAXL = (MINL + LENL) /* \_SB_.MHPC.MCRS.LENL */ + MAXH = (MINH + LENH) /* \_SB_.MHPC.MCRS.LENH */ + If ((MAXL < MINL)) + { + MAXH += One + } + + If ((MAXL < One)) + { + MAXH -= One + } + + MAXL -= One + If ((MAXH == Zero)) + { + Name (MR32, ResourceTemplate () + { + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x00000000, // Range Minimum + 0xFFFFFFFE, // Range Maximum + 0x00000000, // Translation Offset + 0xFFFFFFFF, // Length + ,, _Y02, AddressRangeMemory, TypeStatic) + }) + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._MIN, MIN) // _MIN: Minimum Base Address + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._MAX, MAX) // _MAX: Maximum Base Address + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._LEN, LEN) // _LEN: Length + MIN = MINL /* \_SB_.MHPC.MCRS.MINL */ + MAX = MAXL /* \_SB_.MHPC.MCRS.MAXL */ + LEN = LENL /* \_SB_.MHPC.MCRS.LENL */ + Release (MLCK) + Return (MR32) /* \_SB_.MHPC.MCRS.MR32 */ + } + + Release (MLCK) + Return (MR64) /* \_SB_.MHPC.MCRS.MR64 */ + } + + Method (MPXM, 1, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + Local0 = MPX /* \_SB_.MHPC.MPX_ */ + Release (MLCK) + Return (Local0) + } + + Method (MOST, 4, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + MOEV = Arg1 + MOSC = Arg2 + Release (MLCK) + } + + Method (MEJ0, 2, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + MEJ = One + Release (MLCK) + } + + Device (MP00) + { + Name (_UID, "0x00") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Device (MP01) + { + Name (_UID, "0x01") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Device (MP02) + { + Name (_UID, "0x02") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Method (MTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (MP00, Arg1) + } + + If ((Arg0 == One)) + { + Notify (MP01, Arg1) + } + + If ((Arg0 == 0x02)) + { + Notify (MP02, Arg1) + } + } + } + + Method (\_GPE._E03, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.MHPC.MSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + Acquire (\_SB.PCI0.BLCK, 0xFFFF) + \_SB.PCI0.PCNT () + Release (\_SB.PCI0.BLCK) + } + + Method (_E04, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + Notify (\_SB.NVDR, 0x80) // Status Change + } + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xF6C00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000200000000, // Range Minimum + 0x000000027FFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000080000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAFE0, // Range Minimum + 0xAFE0, // Range Maximum + 0x01, // Alignment + 0x04, // Length + ) + }) + } + + Device (PHPR) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "PCI Hotplug resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAE00, // Range Minimum + 0xAE00, // Range Maximum + 0x01, // Alignment + 0x14, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Name (BSEL, Zero) + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S10) + { + Name (_ADR, 0x00020000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Device (S18) + { + Name (_SUN, 0x03) // _SUN: Slot User Number + Name (_ADR, 0x00030000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S20) + { + Name (_SUN, 0x04) // _SUN: Slot User Number + Name (_ADR, 0x00040000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S28) + { + Name (_SUN, 0x05) // _SUN: Slot User Number + Name (_ADR, 0x00050000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S30) + { + Name (_SUN, 0x06) // _SUN: Slot User Number + Name (_ADR, 0x00060000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S38) + { + Name (_SUN, 0x07) // _SUN: Slot User Number + Name (_ADR, 0x00070000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S40) + { + Name (_SUN, 0x08) // _SUN: Slot User Number + Name (_ADR, 0x00080000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S48) + { + Name (_SUN, 0x09) // _SUN: Slot User Number + Name (_ADR, 0x00090000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S50) + { + Name (_SUN, 0x0A) // _SUN: Slot User Number + Name (_ADR, 0x000A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S58) + { + Name (_SUN, 0x0B) // _SUN: Slot User Number + Name (_ADR, 0x000B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S60) + { + Name (_SUN, 0x0C) // _SUN: Slot User Number + Name (_ADR, 0x000C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S68) + { + Name (_SUN, 0x0D) // _SUN: Slot User Number + Name (_ADR, 0x000D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S70) + { + Name (_SUN, 0x0E) // _SUN: Slot User Number + Name (_ADR, 0x000E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S78) + { + Name (_SUN, 0x0F) // _SUN: Slot User Number + Name (_ADR, 0x000F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S80) + { + Name (_SUN, 0x10) // _SUN: Slot User Number + Name (_ADR, 0x00100000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S88) + { + Name (_SUN, 0x11) // _SUN: Slot User Number + Name (_ADR, 0x00110000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S90) + { + Name (_SUN, 0x12) // _SUN: Slot User Number + Name (_ADR, 0x00120000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S98) + { + Name (_SUN, 0x13) // _SUN: Slot User Number + Name (_ADR, 0x00130000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA0) + { + Name (_SUN, 0x14) // _SUN: Slot User Number + Name (_ADR, 0x00140000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA8) + { + Name (_SUN, 0x15) // _SUN: Slot User Number + Name (_ADR, 0x00150000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB0) + { + Name (_SUN, 0x16) // _SUN: Slot User Number + Name (_ADR, 0x00160000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB8) + { + Name (_SUN, 0x17) // _SUN: Slot User Number + Name (_ADR, 0x00170000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC0) + { + Name (_SUN, 0x18) // _SUN: Slot User Number + Name (_ADR, 0x00180000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC8) + { + Name (_SUN, 0x19) // _SUN: Slot User Number + Name (_ADR, 0x00190000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD0) + { + Name (_SUN, 0x1A) // _SUN: Slot User Number + Name (_ADR, 0x001A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD8) + { + Name (_SUN, 0x1B) // _SUN: Slot User Number + Name (_ADR, 0x001B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE0) + { + Name (_SUN, 0x1C) // _SUN: Slot User Number + Name (_ADR, 0x001C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE8) + { + Name (_SUN, 0x1D) // _SUN: Slot User Number + Name (_ADR, 0x001D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF0) + { + Name (_SUN, 0x1E) // _SUN: Slot User Number + Name (_ADR, 0x001E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF8) + { + Name (_SUN, 0x1F) // _SUN: Slot User Number + Name (_ADR, 0x001F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Method (DVNT, 2, NotSerialized) + { + If ((Arg0 & 0x08)) + { + Notify (S18, Arg1) + } + + If ((Arg0 & 0x10)) + { + Notify (S20, Arg1) + } + + If ((Arg0 & 0x20)) + { + Notify (S28, Arg1) + } + + If ((Arg0 & 0x40)) + { + Notify (S30, Arg1) + } + + If ((Arg0 & 0x80)) + { + Notify (S38, Arg1) + } + + If ((Arg0 & 0x0100)) + { + Notify (S40, Arg1) + } + + If ((Arg0 & 0x0200)) + { + Notify (S48, Arg1) + } + + If ((Arg0 & 0x0400)) + { + Notify (S50, Arg1) + } + + If ((Arg0 & 0x0800)) + { + Notify (S58, Arg1) + } + + If ((Arg0 & 0x1000)) + { + Notify (S60, Arg1) + } + + If ((Arg0 & 0x2000)) + { + Notify (S68, Arg1) + } + + If ((Arg0 & 0x4000)) + { + Notify (S70, Arg1) + } + + If ((Arg0 & 0x8000)) + { + Notify (S78, Arg1) + } + + If ((Arg0 & 0x00010000)) + { + Notify (S80, Arg1) + } + + If ((Arg0 & 0x00020000)) + { + Notify (S88, Arg1) + } + + If ((Arg0 & 0x00040000)) + { + Notify (S90, Arg1) + } + + If ((Arg0 & 0x00080000)) + { + Notify (S98, Arg1) + } + + If ((Arg0 & 0x00100000)) + { + Notify (SA0, Arg1) + } + + If ((Arg0 & 0x00200000)) + { + Notify (SA8, Arg1) + } + + If ((Arg0 & 0x00400000)) + { + Notify (SB0, Arg1) + } + + If ((Arg0 & 0x00800000)) + { + Notify (SB8, Arg1) + } + + If ((Arg0 & 0x01000000)) + { + Notify (SC0, Arg1) + } + + If ((Arg0 & 0x02000000)) + { + Notify (SC8, Arg1) + } + + If ((Arg0 & 0x04000000)) + { + Notify (SD0, Arg1) + } + + If ((Arg0 & 0x08000000)) + { + Notify (SD8, Arg1) + } + + If ((Arg0 & 0x10000000)) + { + Notify (SE0, Arg1) + } + + If ((Arg0 & 0x20000000)) + { + Notify (SE8, Arg1) + } + + If ((Arg0 & 0x40000000)) + { + Notify (SF0, Arg1) + } + + If ((Arg0 & 0x80000000)) + { + Notify (SF8, Arg1) + } + } + + Method (PCNT, 0, NotSerialized) + { + BNUM = Zero + DVNT (PCIU, One) + DVNT (PCID, 0x03) + } + } + } +} + diff --git a/tests/data/acpi/pc/DSDT.dsl b/tests/data/acpi/pc/DSDT.dsl new file mode 100644 index 0000000000..da2b413efc --- /dev/null +++ b/tests/data/acpi/pc/DSDT.dsl @@ -0,0 +1,1407 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/pc/DSDT.roothp, Mon Sep 28 17:24:38 2020 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x00001488 (5256) + * Revision 0x01 **** 32-bit table (V1), no 64-bit math support + * Checksum 0xF2 + * OEM ID "BOCHS " + * OEM Table ID "BXPCDSDT" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001) +{ + Scope (\) + { + OperationRegion (DBG, SystemIO, 0x0402, One) + Field (DBG, ByteAcc, NoLock, Preserve) + { + DBGB, 8 + } + + Method (DBUG, 1, NotSerialized) + { + ToHexString (Arg0, Local0) + ToBuffer (Local0, Local0) + Local1 = (SizeOf (Local0) - One) + Local2 = Zero + While ((Local2 < Local1)) + { + DBGB = DerefOf (Local0 [Local2]) + Local2++ + } + + DBGB = 0x0A + } + } + + Scope (_SB) + { + Device (PCI0) + { + Name (_HID, EisaId ("PNP0A03") /* PCI Bus */) // _HID: Hardware ID + Name (_ADR, Zero) // _ADR: Address + Name (_UID, Zero) // _UID: Unique ID + } + } + + Scope (_SB) + { + Device (HPET) + { + Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + OperationRegion (HPTM, SystemMemory, 0xFED00000, 0x0400) + Field (HPTM, DWordAcc, Lock, Preserve) + { + VEND, 32, + PRD, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Local0 = VEND /* \_SB_.HPET.VEND */ + Local1 = PRD /* \_SB_.HPET.PRD_ */ + Local0 >>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x00010000) // _ADR: Address + OperationRegion (P40C, PCI_Config, 0x60, 0x04) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (FDC0) + { + Name (_HID, EisaId ("PNP0700")) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F2, // Range Minimum + 0x03F2, // Range Maximum + 0x00, // Alignment + 0x04, // Length + ) + IO (Decode16, + 0x03F7, // Range Minimum + 0x03F7, // Range Maximum + 0x00, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {6} + DMA (Compatibility, NotBusMaster, Transfer8, ) + {2} + }) + Device (FLPA) + { + Name (_ADR, Zero) // _ADR: Address + Name (_FDI, Package (0x10) // _FDI: Floppy Drive Information + { + Zero, + 0x05, + 0x4F, + 0x30, + One, + 0xAF, + 0x02, + 0x25, + 0x02, + 0x12, + 0x1B, + 0xFF, + 0x6C, + 0xF6, + 0x0F, + 0x08 + }) + } + + Name (_FDE, Buffer (0x14) // _FDE: Floppy Disk Enumerate + { + /* 0000 */ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0010 */ 0x02, 0x00, 0x00, 0x00 // .... + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Scope (_SB.PCI0) + { + OperationRegion (PCST, SystemIO, 0xAE00, 0x08) + Field (PCST, DWordAcc, NoLock, WriteAsZeros) + { + PCIU, 32, + PCID, 32 + } + + OperationRegion (SEJ, SystemIO, 0xAE08, 0x04) + Field (SEJ, DWordAcc, NoLock, WriteAsZeros) + { + B0EJ, 32 + } + + OperationRegion (BNMR, SystemIO, 0xAE10, 0x04) + Field (BNMR, DWordAcc, NoLock, WriteAsZeros) + { + BNUM, 32 + } + + Mutex (BLCK, 0x00) + Method (PCEJ, 2, NotSerialized) + { + Acquire (BLCK, 0xFFFF) + BNUM = Arg0 + B0EJ = (One << Arg1) + Release (BLCK) + Return (Zero) + } + } + + Scope (_SB) + { + Scope (PCI0) + { + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + Local0 = Package (0x80){} + Local1 = Zero + While ((Local1 < 0x80)) + { + Local2 = (Local1 >> 0x02) + Local3 = ((Local1 + Local2) & 0x03) + If ((Local3 == Zero)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKD, + Zero + } + } + + If ((Local3 == One)) + { + If ((Local1 == 0x04)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKS, + Zero + } + } + Else + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKA, + Zero + } + } + } + + If ((Local3 == 0x02)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKB, + Zero + } + } + + If ((Local3 == 0x03)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKC, + Zero + } + } + + Local4 [Zero] = ((Local2 << 0x10) | 0xFFFF) + Local4 [One] = (Local1 & 0x03) + Local0 [Local1] = Local4 + Local1++ + } + + Return (Local0) + } + } + + Field (PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) + { + PRQ0, 8, + PRQ1, 8, + PRQ2, 8, + PRQ3, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + If ((Arg0 < 0x80)) + { + PRRI = Arg0 + } + + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ0)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ0 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ0)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ0 = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ1)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ1 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ1)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ1 = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ2)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ2 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ2)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ2 = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ3)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ3 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ3)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ3 = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKS) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000009, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (_PRS) /* \_SB_.LNKS._PRS */ + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAF00, // Range Minimum + 0xAF00, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0xAF00, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Name (CNEW, Package (0xFF){}) + Local3 = Zero + Local4 = One + While ((Local4 == One)) + { + Local4 = Zero + Local0 = One + Local1 = Zero + While (((Local0 == One) && (Local3 < One))) + { + Local0 = Zero + \_SB.PCI0.PRES.CSEL = Local3 + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CDAT < Local3)) + { + Break + } + + If ((Local1 == 0xFF)) + { + Local4 = One + Break + } + + Local3 = \_SB.PCI0.PRES.CDAT + If ((\_SB.PCI0.PRES.CINS == One)) + { + CNEW [Local1] = Local3 + Local1++ + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (Local3, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + + Local3++ + } + + Local2 = Zero + While ((Local2 < Local1)) + { + Local3 = DerefOf (CNEW [Local2]) + CTFY (Local3, One) + Debug = Local3 + \_SB.PCI0.PRES.CSEL = Local3 + \_SB.PCI0.PRES.CINS = One + Local2++ + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + Acquire (\_SB.PCI0.BLCK, 0xFFFF) + \_SB.PCI0.PCNT () + Release (\_SB.PCI0.BLCK) + } + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xF6C00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000100000000, // Range Minimum + 0x000000017FFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000080000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAFE0, // Range Minimum + 0xAFE0, // Range Maximum + 0x01, // Alignment + 0x04, // Length + ) + }) + } + + Device (PHPR) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "PCI Hotplug resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAE00, // Range Minimum + 0xAE00, // Range Maximum + 0x01, // Alignment + 0x14, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S10) + { + Name (_ADR, 0x00020000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Device (S18) + { + Name (_ADR, 0x00030000) // _ADR: Address + Name (BSEL, Zero) + Device (S00) + { + Name (_SUN, Zero) // _SUN: Slot User Number + Name (_ADR, Zero) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S08) + { + Name (_SUN, One) // _SUN: Slot User Number + Name (_ADR, 0x00010000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S10) + { + Name (_SUN, 0x02) // _SUN: Slot User Number + Name (_ADR, 0x00020000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S18) + { + Name (_SUN, 0x03) // _SUN: Slot User Number + Name (_ADR, 0x00030000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S20) + { + Name (_SUN, 0x04) // _SUN: Slot User Number + Name (_ADR, 0x00040000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S28) + { + Name (_SUN, 0x05) // _SUN: Slot User Number + Name (_ADR, 0x00050000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S30) + { + Name (_SUN, 0x06) // _SUN: Slot User Number + Name (_ADR, 0x00060000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S38) + { + Name (_SUN, 0x07) // _SUN: Slot User Number + Name (_ADR, 0x00070000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S40) + { + Name (_SUN, 0x08) // _SUN: Slot User Number + Name (_ADR, 0x00080000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S48) + { + Name (_SUN, 0x09) // _SUN: Slot User Number + Name (_ADR, 0x00090000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S50) + { + Name (_SUN, 0x0A) // _SUN: Slot User Number + Name (_ADR, 0x000A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S58) + { + Name (_SUN, 0x0B) // _SUN: Slot User Number + Name (_ADR, 0x000B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S60) + { + Name (_SUN, 0x0C) // _SUN: Slot User Number + Name (_ADR, 0x000C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S68) + { + Name (_SUN, 0x0D) // _SUN: Slot User Number + Name (_ADR, 0x000D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S70) + { + Name (_SUN, 0x0E) // _SUN: Slot User Number + Name (_ADR, 0x000E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S78) + { + Name (_SUN, 0x0F) // _SUN: Slot User Number + Name (_ADR, 0x000F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S80) + { + Name (_SUN, 0x10) // _SUN: Slot User Number + Name (_ADR, 0x00100000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S88) + { + Name (_SUN, 0x11) // _SUN: Slot User Number + Name (_ADR, 0x00110000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S90) + { + Name (_SUN, 0x12) // _SUN: Slot User Number + Name (_ADR, 0x00120000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S98) + { + Name (_SUN, 0x13) // _SUN: Slot User Number + Name (_ADR, 0x00130000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA0) + { + Name (_SUN, 0x14) // _SUN: Slot User Number + Name (_ADR, 0x00140000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA8) + { + Name (_SUN, 0x15) // _SUN: Slot User Number + Name (_ADR, 0x00150000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB0) + { + Name (_SUN, 0x16) // _SUN: Slot User Number + Name (_ADR, 0x00160000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB8) + { + Name (_SUN, 0x17) // _SUN: Slot User Number + Name (_ADR, 0x00170000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC0) + { + Name (_SUN, 0x18) // _SUN: Slot User Number + Name (_ADR, 0x00180000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC8) + { + Name (_SUN, 0x19) // _SUN: Slot User Number + Name (_ADR, 0x00190000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD0) + { + Name (_SUN, 0x1A) // _SUN: Slot User Number + Name (_ADR, 0x001A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD8) + { + Name (_SUN, 0x1B) // _SUN: Slot User Number + Name (_ADR, 0x001B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE0) + { + Name (_SUN, 0x1C) // _SUN: Slot User Number + Name (_ADR, 0x001C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE8) + { + Name (_SUN, 0x1D) // _SUN: Slot User Number + Name (_ADR, 0x001D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF0) + { + Name (_SUN, 0x1E) // _SUN: Slot User Number + Name (_ADR, 0x001E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF8) + { + Name (_SUN, 0x1F) // _SUN: Slot User Number + Name (_ADR, 0x001F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Method (DVNT, 2, NotSerialized) + { + If ((Arg0 & One)) + { + Notify (S00, Arg1) + } + + If ((Arg0 & 0x02)) + { + Notify (S08, Arg1) + } + + If ((Arg0 & 0x04)) + { + Notify (S10, Arg1) + } + + If ((Arg0 & 0x08)) + { + Notify (S18, Arg1) + } + + If ((Arg0 & 0x10)) + { + Notify (S20, Arg1) + } + + If ((Arg0 & 0x20)) + { + Notify (S28, Arg1) + } + + If ((Arg0 & 0x40)) + { + Notify (S30, Arg1) + } + + If ((Arg0 & 0x80)) + { + Notify (S38, Arg1) + } + + If ((Arg0 & 0x0100)) + { + Notify (S40, Arg1) + } + + If ((Arg0 & 0x0200)) + { + Notify (S48, Arg1) + } + + If ((Arg0 & 0x0400)) + { + Notify (S50, Arg1) + } + + If ((Arg0 & 0x0800)) + { + Notify (S58, Arg1) + } + + If ((Arg0 & 0x1000)) + { + Notify (S60, Arg1) + } + + If ((Arg0 & 0x2000)) + { + Notify (S68, Arg1) + } + + If ((Arg0 & 0x4000)) + { + Notify (S70, Arg1) + } + + If ((Arg0 & 0x8000)) + { + Notify (S78, Arg1) + } + + If ((Arg0 & 0x00010000)) + { + Notify (S80, Arg1) + } + + If ((Arg0 & 0x00020000)) + { + Notify (S88, Arg1) + } + + If ((Arg0 & 0x00040000)) + { + Notify (S90, Arg1) + } + + If ((Arg0 & 0x00080000)) + { + Notify (S98, Arg1) + } + + If ((Arg0 & 0x00100000)) + { + Notify (SA0, Arg1) + } + + If ((Arg0 & 0x00200000)) + { + Notify (SA8, Arg1) + } + + If ((Arg0 & 0x00400000)) + { + Notify (SB0, Arg1) + } + + If ((Arg0 & 0x00800000)) + { + Notify (SB8, Arg1) + } + + If ((Arg0 & 0x01000000)) + { + Notify (SC0, Arg1) + } + + If ((Arg0 & 0x02000000)) + { + Notify (SC8, Arg1) + } + + If ((Arg0 & 0x04000000)) + { + Notify (SD0, Arg1) + } + + If ((Arg0 & 0x08000000)) + { + Notify (SD8, Arg1) + } + + If ((Arg0 & 0x10000000)) + { + Notify (SE0, Arg1) + } + + If ((Arg0 & 0x20000000)) + { + Notify (SE8, Arg1) + } + + If ((Arg0 & 0x40000000)) + { + Notify (SF0, Arg1) + } + + If ((Arg0 & 0x80000000)) + { + Notify (SF8, Arg1) + } + } + + Method (PCNT, 0, NotSerialized) + { + BNUM = Zero + DVNT (PCIU, One) + DVNT (PCID, 0x03) + } + } + + Method (PCNT, 0, NotSerialized) + { + ^S18.PCNT () + } + } + } +} + diff --git a/tests/data/acpi/pc/DSDT.hpbridge b/tests/data/acpi/pc/DSDT.hpbridge index b0751398541bdf88ce405be9742aeba0b375dbc3..56032bcf1ba4e251f16c9028429826090531efdd 100644 GIT binary patch delta 323 zcmbQQHdmd?CD+d@E<%%27z-Fu3K$a#7!nux@JyJTz&JITv4A0=AUQ^#B|g|GKET=2ARx#! z*g4qMr+@)n(An2zf%sH(Q5VOMG5)3}Gx_L>Kk+ p3oc+xSm@2Nz=LJ74X30ox&jx+5H4m+eL=oq1&j%scXK}C1OS!|HcS8j diff --git a/tests/data/acpi/pc/DSDT.ipmikcs.dsl b/tests/data/acpi/pc/DSDT.ipmikcs.dsl new file mode 100644 index 0000000000..2e4b524ab8 --- /dev/null +++ b/tests/data/acpi/pc/DSDT.ipmikcs.dsl @@ -0,0 +1,1337 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/pc/DSDT.ipmikcs, Tue Aug 4 11:14:15 2020 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x0000138E (5006) + * Revision 0x01 **** 32-bit table (V1), no 64-bit math support + * Checksum 0x54 + * OEM ID "BOCHS " + * OEM Table ID "BXPCDSDT" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001) +{ + Scope (\) + { + OperationRegion (DBG, SystemIO, 0x0402, One) + Field (DBG, ByteAcc, NoLock, Preserve) + { + DBGB, 8 + } + + Method (DBUG, 1, NotSerialized) + { + ToHexString (Arg0, Local0) + ToBuffer (Local0, Local0) + Local1 = (SizeOf (Local0) - One) + Local2 = Zero + While ((Local2 < Local1)) + { + DBGB = DerefOf (Local0 [Local2]) + Local2++ + } + + DBGB = 0x0A + } + } + + Scope (_SB) + { + Device (PCI0) + { + Name (_HID, EisaId ("PNP0A03") /* PCI Bus */) // _HID: Hardware ID + Name (_ADR, Zero) // _ADR: Address + Name (_UID, Zero) // _UID: Unique ID + } + } + + Scope (_SB) + { + Device (HPET) + { + Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + OperationRegion (HPTM, SystemMemory, 0xFED00000, 0x0400) + Field (HPTM, DWordAcc, Lock, Preserve) + { + VEND, 32, + PRD, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Local0 = VEND /* \_SB_.HPET.VEND */ + Local1 = PRD /* \_SB_.HPET.PRD_ */ + Local0 >>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x00010000) // _ADR: Address + OperationRegion (P40C, PCI_Config, 0x60, 0x04) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (MI1) + { + Name (_HID, EisaId ("IPI0001")) // _HID: Hardware ID + Name (_STR, "ipmi_kcs") // _STR: Description String + Name (_UID, One) // _UID: Unique ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0CA2, // Range Minimum + 0x0CA3, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + }) + Name (_IFT, One) // _IFT: IPMI Interface Type + Name (_SRV, 0x0200) // _SRV: IPMI Spec Revision + } + + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (FDC0) + { + Name (_HID, EisaId ("PNP0700")) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F2, // Range Minimum + 0x03F2, // Range Maximum + 0x00, // Alignment + 0x04, // Length + ) + IO (Decode16, + 0x03F7, // Range Minimum + 0x03F7, // Range Maximum + 0x00, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {6} + DMA (Compatibility, NotBusMaster, Transfer8, ) + {2} + }) + Device (FLPA) + { + Name (_ADR, Zero) // _ADR: Address + Name (_FDI, Package (0x10) // _FDI: Floppy Drive Information + { + Zero, + 0x05, + 0x4F, + 0x30, + One, + 0xAF, + 0x02, + 0x25, + 0x02, + 0x12, + 0x1B, + 0xFF, + 0x6C, + 0xF6, + 0x0F, + 0x08 + }) + } + + Name (_FDE, Buffer (0x14) // _FDE: Floppy Disk Enumerate + { + /* 0000 */ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0010 */ 0x02, 0x00, 0x00, 0x00 // .... + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Scope (_SB.PCI0) + { + OperationRegion (PCST, SystemIO, 0xAE00, 0x08) + Field (PCST, DWordAcc, NoLock, WriteAsZeros) + { + PCIU, 32, + PCID, 32 + } + + OperationRegion (SEJ, SystemIO, 0xAE08, 0x04) + Field (SEJ, DWordAcc, NoLock, WriteAsZeros) + { + B0EJ, 32 + } + + OperationRegion (BNMR, SystemIO, 0xAE10, 0x04) + Field (BNMR, DWordAcc, NoLock, WriteAsZeros) + { + BNUM, 32 + } + + Mutex (BLCK, 0x00) + Method (PCEJ, 2, NotSerialized) + { + Acquire (BLCK, 0xFFFF) + BNUM = Arg0 + B0EJ = (One << Arg1) + Release (BLCK) + Return (Zero) + } + } + + Scope (_SB) + { + Scope (PCI0) + { + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + Local0 = Package (0x80){} + Local1 = Zero + While ((Local1 < 0x80)) + { + Local2 = (Local1 >> 0x02) + Local3 = ((Local1 + Local2) & 0x03) + If ((Local3 == Zero)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKD, + Zero + } + } + + If ((Local3 == One)) + { + If ((Local1 == 0x04)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKS, + Zero + } + } + Else + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKA, + Zero + } + } + } + + If ((Local3 == 0x02)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKB, + Zero + } + } + + If ((Local3 == 0x03)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKC, + Zero + } + } + + Local4 [Zero] = ((Local2 << 0x10) | 0xFFFF) + Local4 [One] = (Local1 & 0x03) + Local0 [Local1] = Local4 + Local1++ + } + + Return (Local0) + } + } + + Field (PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) + { + PRQ0, 8, + PRQ1, 8, + PRQ2, 8, + PRQ3, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + If ((Arg0 < 0x80)) + { + PRRI = Arg0 + } + + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ0)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ0 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ0)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ0 = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ1)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ1 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ1)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ1 = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ2)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ2 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ2)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ2 = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ3)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ3 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ3)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ3 = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKS) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000009, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (_PRS) /* \_SB_.LNKS._PRS */ + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAF00, // Range Minimum + 0xAF00, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0xAF00, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Local0 = One + While ((Local0 == One)) + { + Local0 = Zero + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CINS == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, One) + \_SB.PCI0.PRES.CINS = One + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + Acquire (\_SB.PCI0.BLCK, 0xFFFF) + \_SB.PCI0.PCNT () + Release (\_SB.PCI0.BLCK) + } + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xF6C00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000100000000, // Range Minimum + 0x000000017FFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000080000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAFE0, // Range Minimum + 0xAFE0, // Range Maximum + 0x01, // Alignment + 0x04, // Length + ) + }) + } + + Device (PHPR) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "PCI Hotplug resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAE00, // Range Minimum + 0xAE00, // Range Maximum + 0x01, // Alignment + 0x14, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Name (BSEL, Zero) + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S10) + { + Name (_ADR, 0x00020000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Device (S18) + { + Name (_SUN, 0x03) // _SUN: Slot User Number + Name (_ADR, 0x00030000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S20) + { + Name (_SUN, 0x04) // _SUN: Slot User Number + Name (_ADR, 0x00040000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S28) + { + Name (_SUN, 0x05) // _SUN: Slot User Number + Name (_ADR, 0x00050000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S30) + { + Name (_SUN, 0x06) // _SUN: Slot User Number + Name (_ADR, 0x00060000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S38) + { + Name (_SUN, 0x07) // _SUN: Slot User Number + Name (_ADR, 0x00070000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S40) + { + Name (_SUN, 0x08) // _SUN: Slot User Number + Name (_ADR, 0x00080000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S48) + { + Name (_SUN, 0x09) // _SUN: Slot User Number + Name (_ADR, 0x00090000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S50) + { + Name (_SUN, 0x0A) // _SUN: Slot User Number + Name (_ADR, 0x000A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S58) + { + Name (_SUN, 0x0B) // _SUN: Slot User Number + Name (_ADR, 0x000B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S60) + { + Name (_SUN, 0x0C) // _SUN: Slot User Number + Name (_ADR, 0x000C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S68) + { + Name (_SUN, 0x0D) // _SUN: Slot User Number + Name (_ADR, 0x000D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S70) + { + Name (_SUN, 0x0E) // _SUN: Slot User Number + Name (_ADR, 0x000E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S78) + { + Name (_SUN, 0x0F) // _SUN: Slot User Number + Name (_ADR, 0x000F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S80) + { + Name (_SUN, 0x10) // _SUN: Slot User Number + Name (_ADR, 0x00100000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S88) + { + Name (_SUN, 0x11) // _SUN: Slot User Number + Name (_ADR, 0x00110000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S90) + { + Name (_SUN, 0x12) // _SUN: Slot User Number + Name (_ADR, 0x00120000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S98) + { + Name (_SUN, 0x13) // _SUN: Slot User Number + Name (_ADR, 0x00130000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA0) + { + Name (_SUN, 0x14) // _SUN: Slot User Number + Name (_ADR, 0x00140000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA8) + { + Name (_SUN, 0x15) // _SUN: Slot User Number + Name (_ADR, 0x00150000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB0) + { + Name (_SUN, 0x16) // _SUN: Slot User Number + Name (_ADR, 0x00160000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB8) + { + Name (_SUN, 0x17) // _SUN: Slot User Number + Name (_ADR, 0x00170000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC0) + { + Name (_SUN, 0x18) // _SUN: Slot User Number + Name (_ADR, 0x00180000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC8) + { + Name (_SUN, 0x19) // _SUN: Slot User Number + Name (_ADR, 0x00190000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD0) + { + Name (_SUN, 0x1A) // _SUN: Slot User Number + Name (_ADR, 0x001A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD8) + { + Name (_SUN, 0x1B) // _SUN: Slot User Number + Name (_ADR, 0x001B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE0) + { + Name (_SUN, 0x1C) // _SUN: Slot User Number + Name (_ADR, 0x001C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE8) + { + Name (_SUN, 0x1D) // _SUN: Slot User Number + Name (_ADR, 0x001D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF0) + { + Name (_SUN, 0x1E) // _SUN: Slot User Number + Name (_ADR, 0x001E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF8) + { + Name (_SUN, 0x1F) // _SUN: Slot User Number + Name (_ADR, 0x001F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Method (DVNT, 2, NotSerialized) + { + If ((Arg0 & 0x08)) + { + Notify (S18, Arg1) + } + + If ((Arg0 & 0x10)) + { + Notify (S20, Arg1) + } + + If ((Arg0 & 0x20)) + { + Notify (S28, Arg1) + } + + If ((Arg0 & 0x40)) + { + Notify (S30, Arg1) + } + + If ((Arg0 & 0x80)) + { + Notify (S38, Arg1) + } + + If ((Arg0 & 0x0100)) + { + Notify (S40, Arg1) + } + + If ((Arg0 & 0x0200)) + { + Notify (S48, Arg1) + } + + If ((Arg0 & 0x0400)) + { + Notify (S50, Arg1) + } + + If ((Arg0 & 0x0800)) + { + Notify (S58, Arg1) + } + + If ((Arg0 & 0x1000)) + { + Notify (S60, Arg1) + } + + If ((Arg0 & 0x2000)) + { + Notify (S68, Arg1) + } + + If ((Arg0 & 0x4000)) + { + Notify (S70, Arg1) + } + + If ((Arg0 & 0x8000)) + { + Notify (S78, Arg1) + } + + If ((Arg0 & 0x00010000)) + { + Notify (S80, Arg1) + } + + If ((Arg0 & 0x00020000)) + { + Notify (S88, Arg1) + } + + If ((Arg0 & 0x00040000)) + { + Notify (S90, Arg1) + } + + If ((Arg0 & 0x00080000)) + { + Notify (S98, Arg1) + } + + If ((Arg0 & 0x00100000)) + { + Notify (SA0, Arg1) + } + + If ((Arg0 & 0x00200000)) + { + Notify (SA8, Arg1) + } + + If ((Arg0 & 0x00400000)) + { + Notify (SB0, Arg1) + } + + If ((Arg0 & 0x00800000)) + { + Notify (SB8, Arg1) + } + + If ((Arg0 & 0x01000000)) + { + Notify (SC0, Arg1) + } + + If ((Arg0 & 0x02000000)) + { + Notify (SC8, Arg1) + } + + If ((Arg0 & 0x04000000)) + { + Notify (SD0, Arg1) + } + + If ((Arg0 & 0x08000000)) + { + Notify (SD8, Arg1) + } + + If ((Arg0 & 0x10000000)) + { + Notify (SE0, Arg1) + } + + If ((Arg0 & 0x20000000)) + { + Notify (SE8, Arg1) + } + + If ((Arg0 & 0x40000000)) + { + Notify (SF0, Arg1) + } + + If ((Arg0 & 0x80000000)) + { + Notify (SF8, Arg1) + } + } + + Method (PCNT, 0, NotSerialized) + { + BNUM = Zero + DVNT (PCIU, One) + DVNT (PCID, 0x03) + } + } + } +} + diff --git a/tests/data/acpi/pc/DSDT.memhp.dsl b/tests/data/acpi/pc/DSDT.memhp.dsl new file mode 100644 index 0000000000..299315051e --- /dev/null +++ b/tests/data/acpi/pc/DSDT.memhp.dsl @@ -0,0 +1,1625 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/pc/DSDT.memhp, Tue Aug 4 11:14:15 2020 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x00001895 (6293) + * Revision 0x01 **** 32-bit table (V1), no 64-bit math support + * Checksum 0xB2 + * OEM ID "BOCHS " + * OEM Table ID "BXPCDSDT" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001) +{ + Scope (\) + { + OperationRegion (DBG, SystemIO, 0x0402, One) + Field (DBG, ByteAcc, NoLock, Preserve) + { + DBGB, 8 + } + + Method (DBUG, 1, NotSerialized) + { + ToHexString (Arg0, Local0) + ToBuffer (Local0, Local0) + Local1 = (SizeOf (Local0) - One) + Local2 = Zero + While ((Local2 < Local1)) + { + DBGB = DerefOf (Local0 [Local2]) + Local2++ + } + + DBGB = 0x0A + } + } + + Scope (_SB) + { + Device (PCI0) + { + Name (_HID, EisaId ("PNP0A03") /* PCI Bus */) // _HID: Hardware ID + Name (_ADR, Zero) // _ADR: Address + Name (_UID, Zero) // _UID: Unique ID + } + } + + Scope (_SB) + { + Device (HPET) + { + Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + OperationRegion (HPTM, SystemMemory, 0xFED00000, 0x0400) + Field (HPTM, DWordAcc, Lock, Preserve) + { + VEND, 32, + PRD, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Local0 = VEND /* \_SB_.HPET.VEND */ + Local1 = PRD /* \_SB_.HPET.PRD_ */ + Local0 >>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x00010000) // _ADR: Address + OperationRegion (P40C, PCI_Config, 0x60, 0x04) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (FDC0) + { + Name (_HID, EisaId ("PNP0700")) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F2, // Range Minimum + 0x03F2, // Range Maximum + 0x00, // Alignment + 0x04, // Length + ) + IO (Decode16, + 0x03F7, // Range Minimum + 0x03F7, // Range Maximum + 0x00, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {6} + DMA (Compatibility, NotBusMaster, Transfer8, ) + {2} + }) + Device (FLPA) + { + Name (_ADR, Zero) // _ADR: Address + Name (_FDI, Package (0x10) // _FDI: Floppy Drive Information + { + Zero, + 0x05, + 0x4F, + 0x30, + One, + 0xAF, + 0x02, + 0x25, + 0x02, + 0x12, + 0x1B, + 0xFF, + 0x6C, + 0xF6, + 0x0F, + 0x08 + }) + } + + Name (_FDE, Buffer (0x14) // _FDE: Floppy Disk Enumerate + { + /* 0000 */ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0010 */ 0x02, 0x00, 0x00, 0x00 // .... + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Scope (_SB.PCI0) + { + OperationRegion (PCST, SystemIO, 0xAE00, 0x08) + Field (PCST, DWordAcc, NoLock, WriteAsZeros) + { + PCIU, 32, + PCID, 32 + } + + OperationRegion (SEJ, SystemIO, 0xAE08, 0x04) + Field (SEJ, DWordAcc, NoLock, WriteAsZeros) + { + B0EJ, 32 + } + + OperationRegion (BNMR, SystemIO, 0xAE10, 0x04) + Field (BNMR, DWordAcc, NoLock, WriteAsZeros) + { + BNUM, 32 + } + + Mutex (BLCK, 0x00) + Method (PCEJ, 2, NotSerialized) + { + Acquire (BLCK, 0xFFFF) + BNUM = Arg0 + B0EJ = (One << Arg1) + Release (BLCK) + Return (Zero) + } + } + + Scope (_SB) + { + Scope (PCI0) + { + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + Local0 = Package (0x80){} + Local1 = Zero + While ((Local1 < 0x80)) + { + Local2 = (Local1 >> 0x02) + Local3 = ((Local1 + Local2) & 0x03) + If ((Local3 == Zero)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKD, + Zero + } + } + + If ((Local3 == One)) + { + If ((Local1 == 0x04)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKS, + Zero + } + } + Else + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKA, + Zero + } + } + } + + If ((Local3 == 0x02)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKB, + Zero + } + } + + If ((Local3 == 0x03)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKC, + Zero + } + } + + Local4 [Zero] = ((Local2 << 0x10) | 0xFFFF) + Local4 [One] = (Local1 & 0x03) + Local0 [Local1] = Local4 + Local1++ + } + + Return (Local0) + } + } + + Field (PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) + { + PRQ0, 8, + PRQ1, 8, + PRQ2, 8, + PRQ3, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + If ((Arg0 < 0x80)) + { + PRRI = Arg0 + } + + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ0)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ0 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ0)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ0 = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ1)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ1 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ1)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ1 = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ2)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ2 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ2)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ2 = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ3)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ3 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ3)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ3 = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKS) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000009, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (_PRS) /* \_SB_.LNKS._PRS */ + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAF00, // Range Minimum + 0xAF00, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0xAF00, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Local0 = One + While ((Local0 == One)) + { + Local0 = Zero + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CINS == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, One) + \_SB.PCI0.PRES.CINS = One + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + + Name (_PXM, Zero) // _PXM: Device Proximity + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Device (\_SB.PCI0.MHPD) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "Memory hotplug resources") // _UID: Unique ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0A00, // Range Minimum + 0x0A00, // Range Maximum + 0x00, // Alignment + 0x18, // Length + ) + }) + OperationRegion (HPMR, SystemIO, 0x0A00, 0x18) + } + + Device (\_SB.MHPC) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "DIMM devices") // _UID: Unique ID + Name (MDNR, 0x03) + Field (\_SB.PCI0.MHPD.HPMR, DWordAcc, NoLock, Preserve) + { + MRBL, 32, + MRBH, 32, + MRLL, 32, + MRLH, 32, + MPX, 32 + } + + Field (\_SB.PCI0.MHPD.HPMR, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x14), + MES, 1, + MINS, 1, + MRMV, 1, + MEJ, 1 + } + + Field (\_SB.PCI0.MHPD.HPMR, DWordAcc, NoLock, Preserve) + { + MSEL, 32, + MOEV, 32, + MOSC, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If ((MDNR == Zero)) + { + Return (Zero) + } + + Return (0x0B) + } + + Mutex (MLCK, 0x00) + Method (MSCN, 0, NotSerialized) + { + If ((MDNR == Zero)) + { + Return (Zero) + } + + Local0 = Zero + Acquire (MLCK, 0xFFFF) + While ((Local0 < MDNR)) + { + MSEL = Local0 + If ((MINS == One)) + { + MTFY (Local0, One) + MINS = One + } + ElseIf ((MRMV == One)) + { + MTFY (Local0, 0x03) + MRMV = One + } + + Local0 += One + } + + Release (MLCK) + Return (One) + } + + Method (MRST, 1, NotSerialized) + { + Local0 = Zero + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + If ((MES == One)) + { + Local0 = 0x0F + } + + Release (MLCK) + Return (Local0) + } + + Method (MCRS, 1, Serialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + Name (MR64, ResourceTemplate () + { + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000000000000, // Range Minimum + 0xFFFFFFFFFFFFFFFE, // Range Maximum + 0x0000000000000000, // Translation Offset + 0xFFFFFFFFFFFFFFFF, // Length + ,, _Y01, AddressRangeMemory, TypeStatic) + }) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._MIN, MINL) // _MIN: Minimum Base Address + CreateDWordField (MR64, 0x12, MINH) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._LEN, LENL) // _LEN: Length + CreateDWordField (MR64, 0x2A, LENH) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._MAX, MAXL) // _MAX: Maximum Base Address + CreateDWordField (MR64, 0x1A, MAXH) + MINH = MRBH /* \_SB_.MHPC.MRBH */ + MINL = MRBL /* \_SB_.MHPC.MRBL */ + LENH = MRLH /* \_SB_.MHPC.MRLH */ + LENL = MRLL /* \_SB_.MHPC.MRLL */ + MAXL = (MINL + LENL) /* \_SB_.MHPC.MCRS.LENL */ + MAXH = (MINH + LENH) /* \_SB_.MHPC.MCRS.LENH */ + If ((MAXL < MINL)) + { + MAXH += One + } + + If ((MAXL < One)) + { + MAXH -= One + } + + MAXL -= One + If ((MAXH == Zero)) + { + Name (MR32, ResourceTemplate () + { + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x00000000, // Range Minimum + 0xFFFFFFFE, // Range Maximum + 0x00000000, // Translation Offset + 0xFFFFFFFF, // Length + ,, _Y02, AddressRangeMemory, TypeStatic) + }) + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._MIN, MIN) // _MIN: Minimum Base Address + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._MAX, MAX) // _MAX: Maximum Base Address + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._LEN, LEN) // _LEN: Length + MIN = MINL /* \_SB_.MHPC.MCRS.MINL */ + MAX = MAXL /* \_SB_.MHPC.MCRS.MAXL */ + LEN = LENL /* \_SB_.MHPC.MCRS.LENL */ + Release (MLCK) + Return (MR32) /* \_SB_.MHPC.MCRS.MR32 */ + } + + Release (MLCK) + Return (MR64) /* \_SB_.MHPC.MCRS.MR64 */ + } + + Method (MPXM, 1, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + Local0 = MPX /* \_SB_.MHPC.MPX_ */ + Release (MLCK) + Return (Local0) + } + + Method (MOST, 4, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + MOEV = Arg1 + MOSC = Arg2 + Release (MLCK) + } + + Method (MEJ0, 2, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + MEJ = One + Release (MLCK) + } + + Device (MP00) + { + Name (_UID, "0x00") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Device (MP01) + { + Name (_UID, "0x01") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Device (MP02) + { + Name (_UID, "0x02") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Method (MTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (MP00, Arg1) + } + + If ((Arg0 == One)) + { + Notify (MP01, Arg1) + } + + If ((Arg0 == 0x02)) + { + Notify (MP02, Arg1) + } + } + } + + Method (\_GPE._E03, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.MHPC.MSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + Acquire (\_SB.PCI0.BLCK, 0xFFFF) + \_SB.PCI0.PCNT () + Release (\_SB.PCI0.BLCK) + } + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xF6C00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000200000000, // Range Minimum + 0x000000027FFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000080000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAFE0, // Range Minimum + 0xAFE0, // Range Maximum + 0x01, // Alignment + 0x04, // Length + ) + }) + } + + Device (PHPR) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "PCI Hotplug resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAE00, // Range Minimum + 0xAE00, // Range Maximum + 0x01, // Alignment + 0x14, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Name (BSEL, Zero) + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S10) + { + Name (_ADR, 0x00020000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Device (S18) + { + Name (_SUN, 0x03) // _SUN: Slot User Number + Name (_ADR, 0x00030000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S20) + { + Name (_SUN, 0x04) // _SUN: Slot User Number + Name (_ADR, 0x00040000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S28) + { + Name (_SUN, 0x05) // _SUN: Slot User Number + Name (_ADR, 0x00050000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S30) + { + Name (_SUN, 0x06) // _SUN: Slot User Number + Name (_ADR, 0x00060000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S38) + { + Name (_SUN, 0x07) // _SUN: Slot User Number + Name (_ADR, 0x00070000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S40) + { + Name (_SUN, 0x08) // _SUN: Slot User Number + Name (_ADR, 0x00080000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S48) + { + Name (_SUN, 0x09) // _SUN: Slot User Number + Name (_ADR, 0x00090000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S50) + { + Name (_SUN, 0x0A) // _SUN: Slot User Number + Name (_ADR, 0x000A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S58) + { + Name (_SUN, 0x0B) // _SUN: Slot User Number + Name (_ADR, 0x000B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S60) + { + Name (_SUN, 0x0C) // _SUN: Slot User Number + Name (_ADR, 0x000C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S68) + { + Name (_SUN, 0x0D) // _SUN: Slot User Number + Name (_ADR, 0x000D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S70) + { + Name (_SUN, 0x0E) // _SUN: Slot User Number + Name (_ADR, 0x000E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S78) + { + Name (_SUN, 0x0F) // _SUN: Slot User Number + Name (_ADR, 0x000F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S80) + { + Name (_SUN, 0x10) // _SUN: Slot User Number + Name (_ADR, 0x00100000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S88) + { + Name (_SUN, 0x11) // _SUN: Slot User Number + Name (_ADR, 0x00110000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S90) + { + Name (_SUN, 0x12) // _SUN: Slot User Number + Name (_ADR, 0x00120000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S98) + { + Name (_SUN, 0x13) // _SUN: Slot User Number + Name (_ADR, 0x00130000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA0) + { + Name (_SUN, 0x14) // _SUN: Slot User Number + Name (_ADR, 0x00140000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA8) + { + Name (_SUN, 0x15) // _SUN: Slot User Number + Name (_ADR, 0x00150000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB0) + { + Name (_SUN, 0x16) // _SUN: Slot User Number + Name (_ADR, 0x00160000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB8) + { + Name (_SUN, 0x17) // _SUN: Slot User Number + Name (_ADR, 0x00170000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC0) + { + Name (_SUN, 0x18) // _SUN: Slot User Number + Name (_ADR, 0x00180000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC8) + { + Name (_SUN, 0x19) // _SUN: Slot User Number + Name (_ADR, 0x00190000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD0) + { + Name (_SUN, 0x1A) // _SUN: Slot User Number + Name (_ADR, 0x001A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD8) + { + Name (_SUN, 0x1B) // _SUN: Slot User Number + Name (_ADR, 0x001B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE0) + { + Name (_SUN, 0x1C) // _SUN: Slot User Number + Name (_ADR, 0x001C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE8) + { + Name (_SUN, 0x1D) // _SUN: Slot User Number + Name (_ADR, 0x001D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF0) + { + Name (_SUN, 0x1E) // _SUN: Slot User Number + Name (_ADR, 0x001E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF8) + { + Name (_SUN, 0x1F) // _SUN: Slot User Number + Name (_ADR, 0x001F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Method (DVNT, 2, NotSerialized) + { + If ((Arg0 & 0x08)) + { + Notify (S18, Arg1) + } + + If ((Arg0 & 0x10)) + { + Notify (S20, Arg1) + } + + If ((Arg0 & 0x20)) + { + Notify (S28, Arg1) + } + + If ((Arg0 & 0x40)) + { + Notify (S30, Arg1) + } + + If ((Arg0 & 0x80)) + { + Notify (S38, Arg1) + } + + If ((Arg0 & 0x0100)) + { + Notify (S40, Arg1) + } + + If ((Arg0 & 0x0200)) + { + Notify (S48, Arg1) + } + + If ((Arg0 & 0x0400)) + { + Notify (S50, Arg1) + } + + If ((Arg0 & 0x0800)) + { + Notify (S58, Arg1) + } + + If ((Arg0 & 0x1000)) + { + Notify (S60, Arg1) + } + + If ((Arg0 & 0x2000)) + { + Notify (S68, Arg1) + } + + If ((Arg0 & 0x4000)) + { + Notify (S70, Arg1) + } + + If ((Arg0 & 0x8000)) + { + Notify (S78, Arg1) + } + + If ((Arg0 & 0x00010000)) + { + Notify (S80, Arg1) + } + + If ((Arg0 & 0x00020000)) + { + Notify (S88, Arg1) + } + + If ((Arg0 & 0x00040000)) + { + Notify (S90, Arg1) + } + + If ((Arg0 & 0x00080000)) + { + Notify (S98, Arg1) + } + + If ((Arg0 & 0x00100000)) + { + Notify (SA0, Arg1) + } + + If ((Arg0 & 0x00200000)) + { + Notify (SA8, Arg1) + } + + If ((Arg0 & 0x00400000)) + { + Notify (SB0, Arg1) + } + + If ((Arg0 & 0x00800000)) + { + Notify (SB8, Arg1) + } + + If ((Arg0 & 0x01000000)) + { + Notify (SC0, Arg1) + } + + If ((Arg0 & 0x02000000)) + { + Notify (SC8, Arg1) + } + + If ((Arg0 & 0x04000000)) + { + Notify (SD0, Arg1) + } + + If ((Arg0 & 0x08000000)) + { + Notify (SD8, Arg1) + } + + If ((Arg0 & 0x10000000)) + { + Notify (SE0, Arg1) + } + + If ((Arg0 & 0x20000000)) + { + Notify (SE8, Arg1) + } + + If ((Arg0 & 0x40000000)) + { + Notify (SF0, Arg1) + } + + If ((Arg0 & 0x80000000)) + { + Notify (SF8, Arg1) + } + } + + Method (PCNT, 0, NotSerialized) + { + BNUM = Zero + DVNT (PCIU, One) + DVNT (PCID, 0x03) + } + } + } +} + diff --git a/tests/data/acpi/pc/DSDT.numamem.dsl b/tests/data/acpi/pc/DSDT.numamem.dsl new file mode 100644 index 0000000000..3d08447f1e --- /dev/null +++ b/tests/data/acpi/pc/DSDT.numamem.dsl @@ -0,0 +1,1321 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/pc/DSDT.numamem, Tue Aug 4 11:14:15 2020 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x0000134C (4940) + * Revision 0x01 **** 32-bit table (V1), no 64-bit math support + * Checksum 0x6A + * OEM ID "BOCHS " + * OEM Table ID "BXPCDSDT" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001) +{ + Scope (\) + { + OperationRegion (DBG, SystemIO, 0x0402, One) + Field (DBG, ByteAcc, NoLock, Preserve) + { + DBGB, 8 + } + + Method (DBUG, 1, NotSerialized) + { + ToHexString (Arg0, Local0) + ToBuffer (Local0, Local0) + Local1 = (SizeOf (Local0) - One) + Local2 = Zero + While ((Local2 < Local1)) + { + DBGB = DerefOf (Local0 [Local2]) + Local2++ + } + + DBGB = 0x0A + } + } + + Scope (_SB) + { + Device (PCI0) + { + Name (_HID, EisaId ("PNP0A03") /* PCI Bus */) // _HID: Hardware ID + Name (_ADR, Zero) // _ADR: Address + Name (_UID, Zero) // _UID: Unique ID + } + } + + Scope (_SB) + { + Device (HPET) + { + Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + OperationRegion (HPTM, SystemMemory, 0xFED00000, 0x0400) + Field (HPTM, DWordAcc, Lock, Preserve) + { + VEND, 32, + PRD, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Local0 = VEND /* \_SB_.HPET.VEND */ + Local1 = PRD /* \_SB_.HPET.PRD_ */ + Local0 >>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x00010000) // _ADR: Address + OperationRegion (P40C, PCI_Config, 0x60, 0x04) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (FDC0) + { + Name (_HID, EisaId ("PNP0700")) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F2, // Range Minimum + 0x03F2, // Range Maximum + 0x00, // Alignment + 0x04, // Length + ) + IO (Decode16, + 0x03F7, // Range Minimum + 0x03F7, // Range Maximum + 0x00, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {6} + DMA (Compatibility, NotBusMaster, Transfer8, ) + {2} + }) + Device (FLPA) + { + Name (_ADR, Zero) // _ADR: Address + Name (_FDI, Package (0x10) // _FDI: Floppy Drive Information + { + Zero, + 0x05, + 0x4F, + 0x30, + One, + 0xAF, + 0x02, + 0x25, + 0x02, + 0x12, + 0x1B, + 0xFF, + 0x6C, + 0xF6, + 0x0F, + 0x08 + }) + } + + Name (_FDE, Buffer (0x14) // _FDE: Floppy Disk Enumerate + { + /* 0000 */ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0010 */ 0x02, 0x00, 0x00, 0x00 // .... + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Scope (_SB.PCI0) + { + OperationRegion (PCST, SystemIO, 0xAE00, 0x08) + Field (PCST, DWordAcc, NoLock, WriteAsZeros) + { + PCIU, 32, + PCID, 32 + } + + OperationRegion (SEJ, SystemIO, 0xAE08, 0x04) + Field (SEJ, DWordAcc, NoLock, WriteAsZeros) + { + B0EJ, 32 + } + + OperationRegion (BNMR, SystemIO, 0xAE10, 0x04) + Field (BNMR, DWordAcc, NoLock, WriteAsZeros) + { + BNUM, 32 + } + + Mutex (BLCK, 0x00) + Method (PCEJ, 2, NotSerialized) + { + Acquire (BLCK, 0xFFFF) + BNUM = Arg0 + B0EJ = (One << Arg1) + Release (BLCK) + Return (Zero) + } + } + + Scope (_SB) + { + Scope (PCI0) + { + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + Local0 = Package (0x80){} + Local1 = Zero + While ((Local1 < 0x80)) + { + Local2 = (Local1 >> 0x02) + Local3 = ((Local1 + Local2) & 0x03) + If ((Local3 == Zero)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKD, + Zero + } + } + + If ((Local3 == One)) + { + If ((Local1 == 0x04)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKS, + Zero + } + } + Else + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKA, + Zero + } + } + } + + If ((Local3 == 0x02)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKB, + Zero + } + } + + If ((Local3 == 0x03)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKC, + Zero + } + } + + Local4 [Zero] = ((Local2 << 0x10) | 0xFFFF) + Local4 [One] = (Local1 & 0x03) + Local0 [Local1] = Local4 + Local1++ + } + + Return (Local0) + } + } + + Field (PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) + { + PRQ0, 8, + PRQ1, 8, + PRQ2, 8, + PRQ3, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + If ((Arg0 < 0x80)) + { + PRRI = Arg0 + } + + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ0)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ0 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ0)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ0 = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ1)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ1 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ1)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ1 = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ2)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ2 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ2)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ2 = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ3)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ3 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ3)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ3 = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKS) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000009, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (_PRS) /* \_SB_.LNKS._PRS */ + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAF00, // Range Minimum + 0xAF00, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0xAF00, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Local0 = One + While ((Local0 == One)) + { + Local0 = Zero + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CINS == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, One) + \_SB.PCI0.PRES.CINS = One + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + + Name (_PXM, Zero) // _PXM: Device Proximity + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + Acquire (\_SB.PCI0.BLCK, 0xFFFF) + \_SB.PCI0.PCNT () + Release (\_SB.PCI0.BLCK) + } + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xF6C00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000100000000, // Range Minimum + 0x000000017FFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000080000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAFE0, // Range Minimum + 0xAFE0, // Range Maximum + 0x01, // Alignment + 0x04, // Length + ) + }) + } + + Device (PHPR) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "PCI Hotplug resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAE00, // Range Minimum + 0xAE00, // Range Maximum + 0x01, // Alignment + 0x14, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Name (BSEL, Zero) + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S10) + { + Name (_ADR, 0x00020000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Device (S18) + { + Name (_SUN, 0x03) // _SUN: Slot User Number + Name (_ADR, 0x00030000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S20) + { + Name (_SUN, 0x04) // _SUN: Slot User Number + Name (_ADR, 0x00040000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S28) + { + Name (_SUN, 0x05) // _SUN: Slot User Number + Name (_ADR, 0x00050000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S30) + { + Name (_SUN, 0x06) // _SUN: Slot User Number + Name (_ADR, 0x00060000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S38) + { + Name (_SUN, 0x07) // _SUN: Slot User Number + Name (_ADR, 0x00070000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S40) + { + Name (_SUN, 0x08) // _SUN: Slot User Number + Name (_ADR, 0x00080000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S48) + { + Name (_SUN, 0x09) // _SUN: Slot User Number + Name (_ADR, 0x00090000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S50) + { + Name (_SUN, 0x0A) // _SUN: Slot User Number + Name (_ADR, 0x000A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S58) + { + Name (_SUN, 0x0B) // _SUN: Slot User Number + Name (_ADR, 0x000B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S60) + { + Name (_SUN, 0x0C) // _SUN: Slot User Number + Name (_ADR, 0x000C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S68) + { + Name (_SUN, 0x0D) // _SUN: Slot User Number + Name (_ADR, 0x000D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S70) + { + Name (_SUN, 0x0E) // _SUN: Slot User Number + Name (_ADR, 0x000E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S78) + { + Name (_SUN, 0x0F) // _SUN: Slot User Number + Name (_ADR, 0x000F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S80) + { + Name (_SUN, 0x10) // _SUN: Slot User Number + Name (_ADR, 0x00100000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S88) + { + Name (_SUN, 0x11) // _SUN: Slot User Number + Name (_ADR, 0x00110000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S90) + { + Name (_SUN, 0x12) // _SUN: Slot User Number + Name (_ADR, 0x00120000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S98) + { + Name (_SUN, 0x13) // _SUN: Slot User Number + Name (_ADR, 0x00130000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA0) + { + Name (_SUN, 0x14) // _SUN: Slot User Number + Name (_ADR, 0x00140000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA8) + { + Name (_SUN, 0x15) // _SUN: Slot User Number + Name (_ADR, 0x00150000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB0) + { + Name (_SUN, 0x16) // _SUN: Slot User Number + Name (_ADR, 0x00160000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB8) + { + Name (_SUN, 0x17) // _SUN: Slot User Number + Name (_ADR, 0x00170000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC0) + { + Name (_SUN, 0x18) // _SUN: Slot User Number + Name (_ADR, 0x00180000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC8) + { + Name (_SUN, 0x19) // _SUN: Slot User Number + Name (_ADR, 0x00190000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD0) + { + Name (_SUN, 0x1A) // _SUN: Slot User Number + Name (_ADR, 0x001A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD8) + { + Name (_SUN, 0x1B) // _SUN: Slot User Number + Name (_ADR, 0x001B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE0) + { + Name (_SUN, 0x1C) // _SUN: Slot User Number + Name (_ADR, 0x001C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE8) + { + Name (_SUN, 0x1D) // _SUN: Slot User Number + Name (_ADR, 0x001D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF0) + { + Name (_SUN, 0x1E) // _SUN: Slot User Number + Name (_ADR, 0x001E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF8) + { + Name (_SUN, 0x1F) // _SUN: Slot User Number + Name (_ADR, 0x001F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Method (DVNT, 2, NotSerialized) + { + If ((Arg0 & 0x08)) + { + Notify (S18, Arg1) + } + + If ((Arg0 & 0x10)) + { + Notify (S20, Arg1) + } + + If ((Arg0 & 0x20)) + { + Notify (S28, Arg1) + } + + If ((Arg0 & 0x40)) + { + Notify (S30, Arg1) + } + + If ((Arg0 & 0x80)) + { + Notify (S38, Arg1) + } + + If ((Arg0 & 0x0100)) + { + Notify (S40, Arg1) + } + + If ((Arg0 & 0x0200)) + { + Notify (S48, Arg1) + } + + If ((Arg0 & 0x0400)) + { + Notify (S50, Arg1) + } + + If ((Arg0 & 0x0800)) + { + Notify (S58, Arg1) + } + + If ((Arg0 & 0x1000)) + { + Notify (S60, Arg1) + } + + If ((Arg0 & 0x2000)) + { + Notify (S68, Arg1) + } + + If ((Arg0 & 0x4000)) + { + Notify (S70, Arg1) + } + + If ((Arg0 & 0x8000)) + { + Notify (S78, Arg1) + } + + If ((Arg0 & 0x00010000)) + { + Notify (S80, Arg1) + } + + If ((Arg0 & 0x00020000)) + { + Notify (S88, Arg1) + } + + If ((Arg0 & 0x00040000)) + { + Notify (S90, Arg1) + } + + If ((Arg0 & 0x00080000)) + { + Notify (S98, Arg1) + } + + If ((Arg0 & 0x00100000)) + { + Notify (SA0, Arg1) + } + + If ((Arg0 & 0x00200000)) + { + Notify (SA8, Arg1) + } + + If ((Arg0 & 0x00400000)) + { + Notify (SB0, Arg1) + } + + If ((Arg0 & 0x00800000)) + { + Notify (SB8, Arg1) + } + + If ((Arg0 & 0x01000000)) + { + Notify (SC0, Arg1) + } + + If ((Arg0 & 0x02000000)) + { + Notify (SC8, Arg1) + } + + If ((Arg0 & 0x04000000)) + { + Notify (SD0, Arg1) + } + + If ((Arg0 & 0x08000000)) + { + Notify (SD8, Arg1) + } + + If ((Arg0 & 0x10000000)) + { + Notify (SE0, Arg1) + } + + If ((Arg0 & 0x20000000)) + { + Notify (SE8, Arg1) + } + + If ((Arg0 & 0x40000000)) + { + Notify (SF0, Arg1) + } + + If ((Arg0 & 0x80000000)) + { + Notify (SF8, Arg1) + } + } + + Method (PCNT, 0, NotSerialized) + { + BNUM = Zero + DVNT (PCIU, One) + DVNT (PCID, 0x03) + } + } + } +} + diff --git a/tests/data/acpi/pc/DSDT.roothp b/tests/data/acpi/pc/DSDT.roothp index 886a5e6952f6f034bdd80d44d43de5975a1a4b0f..18caa0765fc10adb29e01717390ead6c63cd0f3c 100644 GIT binary patch delta 323 zcmeCu=+NYH33dtT5Mf|o{Irp43mcP{-Q)votC@U_C+D*NWpWdnoWmhg&*ALn8ZN~2 zzkngRfH7r}i_qj0#sY?v0>*>_hQviaJQF4-FiuToEMQ0|NRH8Gi4S&)4{-K02nccw zb`Ey+DPTYsboO;wAU+jc)WtC*dFcYq$%$P53m8+D7Qp1|VP=68EKr#Y6Nd?V`UNu< zBzJ%unaEI@SiqRD(0qX@hO!{vFh=JPx5#8J<^o1^GlG1>3K$bglM5J<7P+!aO-d|i k1{;{fknGG2(!^Mh9Bo*TJXwcBmDSTPxHM_AE$3M-04)<@N&o-= delta 193 zcmeCs?9$+J33dtL5@BFqe72Em3mcP<+2jLktC{?@C+D*NW%A&goWmi*SHPIC$dP+; z0%HL~LIJ~MLoQ*z1@0`9WAs_#gPr07oIMQ!f?R{0J^g|iokQFr(ZyXHLl_Gf(M3J| of(sZE7J9QR@L-v2!zrnYuE51Hgo_zdUyyHD0b|1E-JEB+0A02<>i_@% diff --git a/tests/data/acpi/pc/FACP.acpihmat b/tests/data/acpi/pc/FACP.acpihmat new file mode 100644 index 0000000000000000000000000000000000000000..261ebdc5d1c3bdf18fb7935314a04fd7f6f92a7a GIT binary patch literal 116 zcmZ>BbPgzCU|?We=;ZJ05v<@85#S6GV`N}p0I@+d0~9baa58LSU|{(8fq{X64I;<_ pr9nInHU@?V>p?6A1{Nj;78V8uhX4Hk`5__<3`PtL3`-jr7y#~G4*>uG literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/FACP.acpihmat.dsl b/tests/data/acpi/pc/FACP.acpihmat.dsl new file mode 100644 index 0000000000..226fd58ec9 --- /dev/null +++ b/tests/data/acpi/pc/FACP.acpihmat.dsl @@ -0,0 +1,99 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACP.acpihmat, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACP] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)] +[004h 0004 4] Table Length : 00000074 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : A1 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCFACP" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] FACS Address : 00000000 +[028h 0040 4] DSDT Address : 00000000 +[02Ch 0044 1] Model : 01 +[02Dh 0045 1] PM Profile : 00 [Unspecified] +[02Eh 0046 2] SCI Interrupt : 0009 +[030h 0048 4] SMI Command Port : 000000B2 +[034h 0052 1] ACPI Enable Value : F1 +[035h 0053 1] ACPI Disable Value : F0 +[036h 0054 1] S4BIOS Command : 00 +[037h 0055 1] P-State Control : 00 +[038h 0056 4] PM1A Event Block Address : 00000600 +[03Ch 0060 4] PM1B Event Block Address : 00000000 +[040h 0064 4] PM1A Control Block Address : 00000604 +[044h 0068 4] PM1B Control Block Address : 00000000 +[048h 0072 4] PM2 Control Block Address : 00000000 +[04Ch 0076 4] PM Timer Block Address : 00000608 +[050h 0080 4] GPE0 Block Address : 0000AFE0 +[054h 0084 4] GPE1 Block Address : 00000000 +[058h 0088 1] PM1 Event Block Length : 04 +[059h 0089 1] PM1 Control Block Length : 02 +[05Ah 0090 1] PM2 Control Block Length : 00 +[05Bh 0091 1] PM Timer Block Length : 04 +[05Ch 0092 1] GPE0 Block Length : 04 +[05Dh 0093 1] GPE1 Block Length : 00 +[05Eh 0094 1] GPE1 Base Offset : 00 +[05Fh 0095 1] _CST Support : 00 +[060h 0096 2] C2 Latency : 0FFF +[062h 0098 2] C3 Latency : 0FFF +[064h 0100 2] CPU Cache Size : 0000 +[066h 0102 2] Cache Flush Stride : 0000 +[068h 0104 1] Duty Cycle Offset : 00 +[069h 0105 1] Duty Cycle Width : 00 +[06Ah 0106 1] RTC Day Alarm Index : 00 +[06Bh 0107 1] RTC Month Alarm Index : 00 +[06Ch 0108 1] RTC Century Index : 32 +[06Dh 0109 2] Boot Flags (decoded below) : 0000 + Legacy Devices Supported (V2) : 0 + 8042 Present on ports 60/64 (V2) : 0 + VGA Not Present (V4) : 0 + MSI Not Supported (V4) : 0 + PCIe ASPM Not Supported (V4) : 0 + CMOS RTC Not Present (V5) : 0 +[06Fh 0111 1] Reserved : 00 +[070h 0112 4] Flags (decoded below) : 000080A5 + WBINVD instruction is operational (V1) : 1 + WBINVD flushes all caches (V1) : 0 + All CPUs support C1 (V1) : 1 + C2 works on MP system (V1) : 0 + Control Method Power Button (V1) : 0 + Control Method Sleep Button (V1) : 1 + RTC wake not in fixed reg space (V1) : 0 + RTC can wake system from S4 (V1) : 1 + 32-bit PM Timer (V1) : 0 + Docking Supported (V1) : 0 + Reset Register Supported (V2) : 0 + Sealed Case (V3) : 0 + Headless - No Video (V3) : 0 + Use native instr after SLP_TYPx (V3) : 0 + PCIEXP_WAK Bits Supported (V4) : 0 + Use Platform Timer (V4) : 1 + RTC_STS valid on S4 wake (V4) : 0 + Remote Power-on capable (V4) : 0 + Use APIC Cluster Model (V4) : 0 + Use APIC Physical Destination Mode (V4) : 0 + Hardware Reduced (V5) : 0 + Low Power S0 Idle (V5) : 0 + +Raw Table Data: Length 116 (0x74) + + 0000: 46 41 43 50 74 00 00 00 01 A1 42 4F 43 48 53 20 // FACPt.....BOCHS + 0010: 42 58 50 43 46 41 43 50 01 00 00 00 42 58 50 43 // BXPCFACP....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 01 00 09 00 // ................ + 0030: B2 00 00 00 F1 F0 00 00 00 06 00 00 00 00 00 00 // ................ + 0040: 04 06 00 00 00 00 00 00 00 00 00 00 08 06 00 00 // ................ + 0050: E0 AF 00 00 00 00 00 00 04 02 00 04 04 00 00 00 // ................ + 0060: FF 0F FF 0F 00 00 00 00 00 00 00 00 32 00 00 00 // ............2... + 0070: A5 80 00 00 // .... diff --git a/tests/data/acpi/pc/FACP.bridge b/tests/data/acpi/pc/FACP.bridge new file mode 100644 index 0000000000000000000000000000000000000000..261ebdc5d1c3bdf18fb7935314a04fd7f6f92a7a GIT binary patch literal 116 zcmZ>BbPgzCU|?We=;ZJ05v<@85#S6GV`N}p0I@+d0~9baa58LSU|{(8fq{X64I;<_ pr9nInHU@?V>p?6A1{Nj;78V8uhX4Hk`5__<3`PtL3`-jr7y#~G4*>uG literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/FACP.bridge.dsl b/tests/data/acpi/pc/FACP.bridge.dsl new file mode 100644 index 0000000000..11b371812d --- /dev/null +++ b/tests/data/acpi/pc/FACP.bridge.dsl @@ -0,0 +1,99 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACP.bridge, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACP] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)] +[004h 0004 4] Table Length : 00000074 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : A1 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCFACP" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] FACS Address : 00000000 +[028h 0040 4] DSDT Address : 00000000 +[02Ch 0044 1] Model : 01 +[02Dh 0045 1] PM Profile : 00 [Unspecified] +[02Eh 0046 2] SCI Interrupt : 0009 +[030h 0048 4] SMI Command Port : 000000B2 +[034h 0052 1] ACPI Enable Value : F1 +[035h 0053 1] ACPI Disable Value : F0 +[036h 0054 1] S4BIOS Command : 00 +[037h 0055 1] P-State Control : 00 +[038h 0056 4] PM1A Event Block Address : 00000600 +[03Ch 0060 4] PM1B Event Block Address : 00000000 +[040h 0064 4] PM1A Control Block Address : 00000604 +[044h 0068 4] PM1B Control Block Address : 00000000 +[048h 0072 4] PM2 Control Block Address : 00000000 +[04Ch 0076 4] PM Timer Block Address : 00000608 +[050h 0080 4] GPE0 Block Address : 0000AFE0 +[054h 0084 4] GPE1 Block Address : 00000000 +[058h 0088 1] PM1 Event Block Length : 04 +[059h 0089 1] PM1 Control Block Length : 02 +[05Ah 0090 1] PM2 Control Block Length : 00 +[05Bh 0091 1] PM Timer Block Length : 04 +[05Ch 0092 1] GPE0 Block Length : 04 +[05Dh 0093 1] GPE1 Block Length : 00 +[05Eh 0094 1] GPE1 Base Offset : 00 +[05Fh 0095 1] _CST Support : 00 +[060h 0096 2] C2 Latency : 0FFF +[062h 0098 2] C3 Latency : 0FFF +[064h 0100 2] CPU Cache Size : 0000 +[066h 0102 2] Cache Flush Stride : 0000 +[068h 0104 1] Duty Cycle Offset : 00 +[069h 0105 1] Duty Cycle Width : 00 +[06Ah 0106 1] RTC Day Alarm Index : 00 +[06Bh 0107 1] RTC Month Alarm Index : 00 +[06Ch 0108 1] RTC Century Index : 32 +[06Dh 0109 2] Boot Flags (decoded below) : 0000 + Legacy Devices Supported (V2) : 0 + 8042 Present on ports 60/64 (V2) : 0 + VGA Not Present (V4) : 0 + MSI Not Supported (V4) : 0 + PCIe ASPM Not Supported (V4) : 0 + CMOS RTC Not Present (V5) : 0 +[06Fh 0111 1] Reserved : 00 +[070h 0112 4] Flags (decoded below) : 000080A5 + WBINVD instruction is operational (V1) : 1 + WBINVD flushes all caches (V1) : 0 + All CPUs support C1 (V1) : 1 + C2 works on MP system (V1) : 0 + Control Method Power Button (V1) : 0 + Control Method Sleep Button (V1) : 1 + RTC wake not in fixed reg space (V1) : 0 + RTC can wake system from S4 (V1) : 1 + 32-bit PM Timer (V1) : 0 + Docking Supported (V1) : 0 + Reset Register Supported (V2) : 0 + Sealed Case (V3) : 0 + Headless - No Video (V3) : 0 + Use native instr after SLP_TYPx (V3) : 0 + PCIEXP_WAK Bits Supported (V4) : 0 + Use Platform Timer (V4) : 1 + RTC_STS valid on S4 wake (V4) : 0 + Remote Power-on capable (V4) : 0 + Use APIC Cluster Model (V4) : 0 + Use APIC Physical Destination Mode (V4) : 0 + Hardware Reduced (V5) : 0 + Low Power S0 Idle (V5) : 0 + +Raw Table Data: Length 116 (0x74) + + 0000: 46 41 43 50 74 00 00 00 01 A1 42 4F 43 48 53 20 // FACPt.....BOCHS + 0010: 42 58 50 43 46 41 43 50 01 00 00 00 42 58 50 43 // BXPCFACP....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 01 00 09 00 // ................ + 0030: B2 00 00 00 F1 F0 00 00 00 06 00 00 00 00 00 00 // ................ + 0040: 04 06 00 00 00 00 00 00 00 00 00 00 08 06 00 00 // ................ + 0050: E0 AF 00 00 00 00 00 00 04 02 00 04 04 00 00 00 // ................ + 0060: FF 0F FF 0F 00 00 00 00 00 00 00 00 32 00 00 00 // ............2... + 0070: A5 80 00 00 // .... diff --git a/tests/data/acpi/pc/FACP.cphp b/tests/data/acpi/pc/FACP.cphp new file mode 100644 index 0000000000000000000000000000000000000000..261ebdc5d1c3bdf18fb7935314a04fd7f6f92a7a GIT binary patch literal 116 zcmZ>BbPgzCU|?We=;ZJ05v<@85#S6GV`N}p0I@+d0~9baa58LSU|{(8fq{X64I;<_ pr9nInHU@?V>p?6A1{Nj;78V8uhX4Hk`5__<3`PtL3`-jr7y#~G4*>uG literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/FACP.cphp.dsl b/tests/data/acpi/pc/FACP.cphp.dsl new file mode 100644 index 0000000000..affffe9b64 --- /dev/null +++ b/tests/data/acpi/pc/FACP.cphp.dsl @@ -0,0 +1,99 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACP.cphp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACP] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)] +[004h 0004 4] Table Length : 00000074 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : A1 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCFACP" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] FACS Address : 00000000 +[028h 0040 4] DSDT Address : 00000000 +[02Ch 0044 1] Model : 01 +[02Dh 0045 1] PM Profile : 00 [Unspecified] +[02Eh 0046 2] SCI Interrupt : 0009 +[030h 0048 4] SMI Command Port : 000000B2 +[034h 0052 1] ACPI Enable Value : F1 +[035h 0053 1] ACPI Disable Value : F0 +[036h 0054 1] S4BIOS Command : 00 +[037h 0055 1] P-State Control : 00 +[038h 0056 4] PM1A Event Block Address : 00000600 +[03Ch 0060 4] PM1B Event Block Address : 00000000 +[040h 0064 4] PM1A Control Block Address : 00000604 +[044h 0068 4] PM1B Control Block Address : 00000000 +[048h 0072 4] PM2 Control Block Address : 00000000 +[04Ch 0076 4] PM Timer Block Address : 00000608 +[050h 0080 4] GPE0 Block Address : 0000AFE0 +[054h 0084 4] GPE1 Block Address : 00000000 +[058h 0088 1] PM1 Event Block Length : 04 +[059h 0089 1] PM1 Control Block Length : 02 +[05Ah 0090 1] PM2 Control Block Length : 00 +[05Bh 0091 1] PM Timer Block Length : 04 +[05Ch 0092 1] GPE0 Block Length : 04 +[05Dh 0093 1] GPE1 Block Length : 00 +[05Eh 0094 1] GPE1 Base Offset : 00 +[05Fh 0095 1] _CST Support : 00 +[060h 0096 2] C2 Latency : 0FFF +[062h 0098 2] C3 Latency : 0FFF +[064h 0100 2] CPU Cache Size : 0000 +[066h 0102 2] Cache Flush Stride : 0000 +[068h 0104 1] Duty Cycle Offset : 00 +[069h 0105 1] Duty Cycle Width : 00 +[06Ah 0106 1] RTC Day Alarm Index : 00 +[06Bh 0107 1] RTC Month Alarm Index : 00 +[06Ch 0108 1] RTC Century Index : 32 +[06Dh 0109 2] Boot Flags (decoded below) : 0000 + Legacy Devices Supported (V2) : 0 + 8042 Present on ports 60/64 (V2) : 0 + VGA Not Present (V4) : 0 + MSI Not Supported (V4) : 0 + PCIe ASPM Not Supported (V4) : 0 + CMOS RTC Not Present (V5) : 0 +[06Fh 0111 1] Reserved : 00 +[070h 0112 4] Flags (decoded below) : 000080A5 + WBINVD instruction is operational (V1) : 1 + WBINVD flushes all caches (V1) : 0 + All CPUs support C1 (V1) : 1 + C2 works on MP system (V1) : 0 + Control Method Power Button (V1) : 0 + Control Method Sleep Button (V1) : 1 + RTC wake not in fixed reg space (V1) : 0 + RTC can wake system from S4 (V1) : 1 + 32-bit PM Timer (V1) : 0 + Docking Supported (V1) : 0 + Reset Register Supported (V2) : 0 + Sealed Case (V3) : 0 + Headless - No Video (V3) : 0 + Use native instr after SLP_TYPx (V3) : 0 + PCIEXP_WAK Bits Supported (V4) : 0 + Use Platform Timer (V4) : 1 + RTC_STS valid on S4 wake (V4) : 0 + Remote Power-on capable (V4) : 0 + Use APIC Cluster Model (V4) : 0 + Use APIC Physical Destination Mode (V4) : 0 + Hardware Reduced (V5) : 0 + Low Power S0 Idle (V5) : 0 + +Raw Table Data: Length 116 (0x74) + + 0000: 46 41 43 50 74 00 00 00 01 A1 42 4F 43 48 53 20 // FACPt.....BOCHS + 0010: 42 58 50 43 46 41 43 50 01 00 00 00 42 58 50 43 // BXPCFACP....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 01 00 09 00 // ................ + 0030: B2 00 00 00 F1 F0 00 00 00 06 00 00 00 00 00 00 // ................ + 0040: 04 06 00 00 00 00 00 00 00 00 00 00 08 06 00 00 // ................ + 0050: E0 AF 00 00 00 00 00 00 04 02 00 04 04 00 00 00 // ................ + 0060: FF 0F FF 0F 00 00 00 00 00 00 00 00 32 00 00 00 // ............2... + 0070: A5 80 00 00 // .... diff --git a/tests/data/acpi/pc/FACP.dimmpxm b/tests/data/acpi/pc/FACP.dimmpxm new file mode 100644 index 0000000000000000000000000000000000000000..261ebdc5d1c3bdf18fb7935314a04fd7f6f92a7a GIT binary patch literal 116 zcmZ>BbPgzCU|?We=;ZJ05v<@85#S6GV`N}p0I@+d0~9baa58LSU|{(8fq{X64I;<_ pr9nInHU@?V>p?6A1{Nj;78V8uhX4Hk`5__<3`PtL3`-jr7y#~G4*>uG literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/FACP.dimmpxm.dsl b/tests/data/acpi/pc/FACP.dimmpxm.dsl new file mode 100644 index 0000000000..fd5a5ef375 --- /dev/null +++ b/tests/data/acpi/pc/FACP.dimmpxm.dsl @@ -0,0 +1,99 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACP.dimmpxm, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACP] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)] +[004h 0004 4] Table Length : 00000074 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : A1 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCFACP" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] FACS Address : 00000000 +[028h 0040 4] DSDT Address : 00000000 +[02Ch 0044 1] Model : 01 +[02Dh 0045 1] PM Profile : 00 [Unspecified] +[02Eh 0046 2] SCI Interrupt : 0009 +[030h 0048 4] SMI Command Port : 000000B2 +[034h 0052 1] ACPI Enable Value : F1 +[035h 0053 1] ACPI Disable Value : F0 +[036h 0054 1] S4BIOS Command : 00 +[037h 0055 1] P-State Control : 00 +[038h 0056 4] PM1A Event Block Address : 00000600 +[03Ch 0060 4] PM1B Event Block Address : 00000000 +[040h 0064 4] PM1A Control Block Address : 00000604 +[044h 0068 4] PM1B Control Block Address : 00000000 +[048h 0072 4] PM2 Control Block Address : 00000000 +[04Ch 0076 4] PM Timer Block Address : 00000608 +[050h 0080 4] GPE0 Block Address : 0000AFE0 +[054h 0084 4] GPE1 Block Address : 00000000 +[058h 0088 1] PM1 Event Block Length : 04 +[059h 0089 1] PM1 Control Block Length : 02 +[05Ah 0090 1] PM2 Control Block Length : 00 +[05Bh 0091 1] PM Timer Block Length : 04 +[05Ch 0092 1] GPE0 Block Length : 04 +[05Dh 0093 1] GPE1 Block Length : 00 +[05Eh 0094 1] GPE1 Base Offset : 00 +[05Fh 0095 1] _CST Support : 00 +[060h 0096 2] C2 Latency : 0FFF +[062h 0098 2] C3 Latency : 0FFF +[064h 0100 2] CPU Cache Size : 0000 +[066h 0102 2] Cache Flush Stride : 0000 +[068h 0104 1] Duty Cycle Offset : 00 +[069h 0105 1] Duty Cycle Width : 00 +[06Ah 0106 1] RTC Day Alarm Index : 00 +[06Bh 0107 1] RTC Month Alarm Index : 00 +[06Ch 0108 1] RTC Century Index : 32 +[06Dh 0109 2] Boot Flags (decoded below) : 0000 + Legacy Devices Supported (V2) : 0 + 8042 Present on ports 60/64 (V2) : 0 + VGA Not Present (V4) : 0 + MSI Not Supported (V4) : 0 + PCIe ASPM Not Supported (V4) : 0 + CMOS RTC Not Present (V5) : 0 +[06Fh 0111 1] Reserved : 00 +[070h 0112 4] Flags (decoded below) : 000080A5 + WBINVD instruction is operational (V1) : 1 + WBINVD flushes all caches (V1) : 0 + All CPUs support C1 (V1) : 1 + C2 works on MP system (V1) : 0 + Control Method Power Button (V1) : 0 + Control Method Sleep Button (V1) : 1 + RTC wake not in fixed reg space (V1) : 0 + RTC can wake system from S4 (V1) : 1 + 32-bit PM Timer (V1) : 0 + Docking Supported (V1) : 0 + Reset Register Supported (V2) : 0 + Sealed Case (V3) : 0 + Headless - No Video (V3) : 0 + Use native instr after SLP_TYPx (V3) : 0 + PCIEXP_WAK Bits Supported (V4) : 0 + Use Platform Timer (V4) : 1 + RTC_STS valid on S4 wake (V4) : 0 + Remote Power-on capable (V4) : 0 + Use APIC Cluster Model (V4) : 0 + Use APIC Physical Destination Mode (V4) : 0 + Hardware Reduced (V5) : 0 + Low Power S0 Idle (V5) : 0 + +Raw Table Data: Length 116 (0x74) + + 0000: 46 41 43 50 74 00 00 00 01 A1 42 4F 43 48 53 20 // FACPt.....BOCHS + 0010: 42 58 50 43 46 41 43 50 01 00 00 00 42 58 50 43 // BXPCFACP....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 01 00 09 00 // ................ + 0030: B2 00 00 00 F1 F0 00 00 00 06 00 00 00 00 00 00 // ................ + 0040: 04 06 00 00 00 00 00 00 00 00 00 00 08 06 00 00 // ................ + 0050: E0 AF 00 00 00 00 00 00 04 02 00 04 04 00 00 00 // ................ + 0060: FF 0F FF 0F 00 00 00 00 00 00 00 00 32 00 00 00 // ............2... + 0070: A5 80 00 00 // .... diff --git a/tests/data/acpi/pc/FACP.dsl b/tests/data/acpi/pc/FACP.dsl new file mode 100644 index 0000000000..c5e3718772 --- /dev/null +++ b/tests/data/acpi/pc/FACP.dsl @@ -0,0 +1,99 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACP.roothp, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [FACP] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)] +[004h 0004 4] Table Length : 00000074 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : A1 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCFACP" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] FACS Address : 00000000 +[028h 0040 4] DSDT Address : 00000000 +[02Ch 0044 1] Model : 01 +[02Dh 0045 1] PM Profile : 00 [Unspecified] +[02Eh 0046 2] SCI Interrupt : 0009 +[030h 0048 4] SMI Command Port : 000000B2 +[034h 0052 1] ACPI Enable Value : F1 +[035h 0053 1] ACPI Disable Value : F0 +[036h 0054 1] S4BIOS Command : 00 +[037h 0055 1] P-State Control : 00 +[038h 0056 4] PM1A Event Block Address : 00000600 +[03Ch 0060 4] PM1B Event Block Address : 00000000 +[040h 0064 4] PM1A Control Block Address : 00000604 +[044h 0068 4] PM1B Control Block Address : 00000000 +[048h 0072 4] PM2 Control Block Address : 00000000 +[04Ch 0076 4] PM Timer Block Address : 00000608 +[050h 0080 4] GPE0 Block Address : 0000AFE0 +[054h 0084 4] GPE1 Block Address : 00000000 +[058h 0088 1] PM1 Event Block Length : 04 +[059h 0089 1] PM1 Control Block Length : 02 +[05Ah 0090 1] PM2 Control Block Length : 00 +[05Bh 0091 1] PM Timer Block Length : 04 +[05Ch 0092 1] GPE0 Block Length : 04 +[05Dh 0093 1] GPE1 Block Length : 00 +[05Eh 0094 1] GPE1 Base Offset : 00 +[05Fh 0095 1] _CST Support : 00 +[060h 0096 2] C2 Latency : 0FFF +[062h 0098 2] C3 Latency : 0FFF +[064h 0100 2] CPU Cache Size : 0000 +[066h 0102 2] Cache Flush Stride : 0000 +[068h 0104 1] Duty Cycle Offset : 00 +[069h 0105 1] Duty Cycle Width : 00 +[06Ah 0106 1] RTC Day Alarm Index : 00 +[06Bh 0107 1] RTC Month Alarm Index : 00 +[06Ch 0108 1] RTC Century Index : 32 +[06Dh 0109 2] Boot Flags (decoded below) : 0000 + Legacy Devices Supported (V2) : 0 + 8042 Present on ports 60/64 (V2) : 0 + VGA Not Present (V4) : 0 + MSI Not Supported (V4) : 0 + PCIe ASPM Not Supported (V4) : 0 + CMOS RTC Not Present (V5) : 0 +[06Fh 0111 1] Reserved : 00 +[070h 0112 4] Flags (decoded below) : 000080A5 + WBINVD instruction is operational (V1) : 1 + WBINVD flushes all caches (V1) : 0 + All CPUs support C1 (V1) : 1 + C2 works on MP system (V1) : 0 + Control Method Power Button (V1) : 0 + Control Method Sleep Button (V1) : 1 + RTC wake not in fixed reg space (V1) : 0 + RTC can wake system from S4 (V1) : 1 + 32-bit PM Timer (V1) : 0 + Docking Supported (V1) : 0 + Reset Register Supported (V2) : 0 + Sealed Case (V3) : 0 + Headless - No Video (V3) : 0 + Use native instr after SLP_TYPx (V3) : 0 + PCIEXP_WAK Bits Supported (V4) : 0 + Use Platform Timer (V4) : 1 + RTC_STS valid on S4 wake (V4) : 0 + Remote Power-on capable (V4) : 0 + Use APIC Cluster Model (V4) : 0 + Use APIC Physical Destination Mode (V4) : 0 + Hardware Reduced (V5) : 0 + Low Power S0 Idle (V5) : 0 + +Raw Table Data: Length 116 (0x74) + + 0000: 46 41 43 50 74 00 00 00 01 A1 42 4F 43 48 53 20 // FACPt.....BOCHS + 0010: 42 58 50 43 46 41 43 50 01 00 00 00 42 58 50 43 // BXPCFACP....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 01 00 09 00 // ................ + 0030: B2 00 00 00 F1 F0 00 00 00 06 00 00 00 00 00 00 // ................ + 0040: 04 06 00 00 00 00 00 00 00 00 00 00 08 06 00 00 // ................ + 0050: E0 AF 00 00 00 00 00 00 04 02 00 04 04 00 00 00 // ................ + 0060: FF 0F FF 0F 00 00 00 00 00 00 00 00 32 00 00 00 // ............2... + 0070: A5 80 00 00 // .... diff --git a/tests/data/acpi/pc/FACP.hpbridge b/tests/data/acpi/pc/FACP.hpbridge new file mode 100644 index 0000000000000000000000000000000000000000..261ebdc5d1c3bdf18fb7935314a04fd7f6f92a7a GIT binary patch literal 116 zcmZ>BbPgzCU|?We=;ZJ05v<@85#S6GV`N}p0I@+d0~9baa58LSU|{(8fq{X64I;<_ pr9nInHU@?V>p?6A1{Nj;78V8uhX4Hk`5__<3`PtL3`-jr7y#~G4*>uG literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/FACP.ipmikcs b/tests/data/acpi/pc/FACP.ipmikcs new file mode 100644 index 0000000000000000000000000000000000000000..261ebdc5d1c3bdf18fb7935314a04fd7f6f92a7a GIT binary patch literal 116 zcmZ>BbPgzCU|?We=;ZJ05v<@85#S6GV`N}p0I@+d0~9baa58LSU|{(8fq{X64I;<_ pr9nInHU@?V>p?6A1{Nj;78V8uhX4Hk`5__<3`PtL3`-jr7y#~G4*>uG literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/FACP.ipmikcs.dsl b/tests/data/acpi/pc/FACP.ipmikcs.dsl new file mode 100644 index 0000000000..3f1dd018da --- /dev/null +++ b/tests/data/acpi/pc/FACP.ipmikcs.dsl @@ -0,0 +1,99 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACP.ipmikcs, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACP] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)] +[004h 0004 4] Table Length : 00000074 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : A1 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCFACP" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] FACS Address : 00000000 +[028h 0040 4] DSDT Address : 00000000 +[02Ch 0044 1] Model : 01 +[02Dh 0045 1] PM Profile : 00 [Unspecified] +[02Eh 0046 2] SCI Interrupt : 0009 +[030h 0048 4] SMI Command Port : 000000B2 +[034h 0052 1] ACPI Enable Value : F1 +[035h 0053 1] ACPI Disable Value : F0 +[036h 0054 1] S4BIOS Command : 00 +[037h 0055 1] P-State Control : 00 +[038h 0056 4] PM1A Event Block Address : 00000600 +[03Ch 0060 4] PM1B Event Block Address : 00000000 +[040h 0064 4] PM1A Control Block Address : 00000604 +[044h 0068 4] PM1B Control Block Address : 00000000 +[048h 0072 4] PM2 Control Block Address : 00000000 +[04Ch 0076 4] PM Timer Block Address : 00000608 +[050h 0080 4] GPE0 Block Address : 0000AFE0 +[054h 0084 4] GPE1 Block Address : 00000000 +[058h 0088 1] PM1 Event Block Length : 04 +[059h 0089 1] PM1 Control Block Length : 02 +[05Ah 0090 1] PM2 Control Block Length : 00 +[05Bh 0091 1] PM Timer Block Length : 04 +[05Ch 0092 1] GPE0 Block Length : 04 +[05Dh 0093 1] GPE1 Block Length : 00 +[05Eh 0094 1] GPE1 Base Offset : 00 +[05Fh 0095 1] _CST Support : 00 +[060h 0096 2] C2 Latency : 0FFF +[062h 0098 2] C3 Latency : 0FFF +[064h 0100 2] CPU Cache Size : 0000 +[066h 0102 2] Cache Flush Stride : 0000 +[068h 0104 1] Duty Cycle Offset : 00 +[069h 0105 1] Duty Cycle Width : 00 +[06Ah 0106 1] RTC Day Alarm Index : 00 +[06Bh 0107 1] RTC Month Alarm Index : 00 +[06Ch 0108 1] RTC Century Index : 32 +[06Dh 0109 2] Boot Flags (decoded below) : 0000 + Legacy Devices Supported (V2) : 0 + 8042 Present on ports 60/64 (V2) : 0 + VGA Not Present (V4) : 0 + MSI Not Supported (V4) : 0 + PCIe ASPM Not Supported (V4) : 0 + CMOS RTC Not Present (V5) : 0 +[06Fh 0111 1] Reserved : 00 +[070h 0112 4] Flags (decoded below) : 000080A5 + WBINVD instruction is operational (V1) : 1 + WBINVD flushes all caches (V1) : 0 + All CPUs support C1 (V1) : 1 + C2 works on MP system (V1) : 0 + Control Method Power Button (V1) : 0 + Control Method Sleep Button (V1) : 1 + RTC wake not in fixed reg space (V1) : 0 + RTC can wake system from S4 (V1) : 1 + 32-bit PM Timer (V1) : 0 + Docking Supported (V1) : 0 + Reset Register Supported (V2) : 0 + Sealed Case (V3) : 0 + Headless - No Video (V3) : 0 + Use native instr after SLP_TYPx (V3) : 0 + PCIEXP_WAK Bits Supported (V4) : 0 + Use Platform Timer (V4) : 1 + RTC_STS valid on S4 wake (V4) : 0 + Remote Power-on capable (V4) : 0 + Use APIC Cluster Model (V4) : 0 + Use APIC Physical Destination Mode (V4) : 0 + Hardware Reduced (V5) : 0 + Low Power S0 Idle (V5) : 0 + +Raw Table Data: Length 116 (0x74) + + 0000: 46 41 43 50 74 00 00 00 01 A1 42 4F 43 48 53 20 // FACPt.....BOCHS + 0010: 42 58 50 43 46 41 43 50 01 00 00 00 42 58 50 43 // BXPCFACP....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 01 00 09 00 // ................ + 0030: B2 00 00 00 F1 F0 00 00 00 06 00 00 00 00 00 00 // ................ + 0040: 04 06 00 00 00 00 00 00 00 00 00 00 08 06 00 00 // ................ + 0050: E0 AF 00 00 00 00 00 00 04 02 00 04 04 00 00 00 // ................ + 0060: FF 0F FF 0F 00 00 00 00 00 00 00 00 32 00 00 00 // ............2... + 0070: A5 80 00 00 // .... diff --git a/tests/data/acpi/pc/FACP.memhp b/tests/data/acpi/pc/FACP.memhp new file mode 100644 index 0000000000000000000000000000000000000000..261ebdc5d1c3bdf18fb7935314a04fd7f6f92a7a GIT binary patch literal 116 zcmZ>BbPgzCU|?We=;ZJ05v<@85#S6GV`N}p0I@+d0~9baa58LSU|{(8fq{X64I;<_ pr9nInHU@?V>p?6A1{Nj;78V8uhX4Hk`5__<3`PtL3`-jr7y#~G4*>uG literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/FACP.memhp.dsl b/tests/data/acpi/pc/FACP.memhp.dsl new file mode 100644 index 0000000000..b2c466e989 --- /dev/null +++ b/tests/data/acpi/pc/FACP.memhp.dsl @@ -0,0 +1,99 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACP.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACP] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)] +[004h 0004 4] Table Length : 00000074 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : A1 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCFACP" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] FACS Address : 00000000 +[028h 0040 4] DSDT Address : 00000000 +[02Ch 0044 1] Model : 01 +[02Dh 0045 1] PM Profile : 00 [Unspecified] +[02Eh 0046 2] SCI Interrupt : 0009 +[030h 0048 4] SMI Command Port : 000000B2 +[034h 0052 1] ACPI Enable Value : F1 +[035h 0053 1] ACPI Disable Value : F0 +[036h 0054 1] S4BIOS Command : 00 +[037h 0055 1] P-State Control : 00 +[038h 0056 4] PM1A Event Block Address : 00000600 +[03Ch 0060 4] PM1B Event Block Address : 00000000 +[040h 0064 4] PM1A Control Block Address : 00000604 +[044h 0068 4] PM1B Control Block Address : 00000000 +[048h 0072 4] PM2 Control Block Address : 00000000 +[04Ch 0076 4] PM Timer Block Address : 00000608 +[050h 0080 4] GPE0 Block Address : 0000AFE0 +[054h 0084 4] GPE1 Block Address : 00000000 +[058h 0088 1] PM1 Event Block Length : 04 +[059h 0089 1] PM1 Control Block Length : 02 +[05Ah 0090 1] PM2 Control Block Length : 00 +[05Bh 0091 1] PM Timer Block Length : 04 +[05Ch 0092 1] GPE0 Block Length : 04 +[05Dh 0093 1] GPE1 Block Length : 00 +[05Eh 0094 1] GPE1 Base Offset : 00 +[05Fh 0095 1] _CST Support : 00 +[060h 0096 2] C2 Latency : 0FFF +[062h 0098 2] C3 Latency : 0FFF +[064h 0100 2] CPU Cache Size : 0000 +[066h 0102 2] Cache Flush Stride : 0000 +[068h 0104 1] Duty Cycle Offset : 00 +[069h 0105 1] Duty Cycle Width : 00 +[06Ah 0106 1] RTC Day Alarm Index : 00 +[06Bh 0107 1] RTC Month Alarm Index : 00 +[06Ch 0108 1] RTC Century Index : 32 +[06Dh 0109 2] Boot Flags (decoded below) : 0000 + Legacy Devices Supported (V2) : 0 + 8042 Present on ports 60/64 (V2) : 0 + VGA Not Present (V4) : 0 + MSI Not Supported (V4) : 0 + PCIe ASPM Not Supported (V4) : 0 + CMOS RTC Not Present (V5) : 0 +[06Fh 0111 1] Reserved : 00 +[070h 0112 4] Flags (decoded below) : 000080A5 + WBINVD instruction is operational (V1) : 1 + WBINVD flushes all caches (V1) : 0 + All CPUs support C1 (V1) : 1 + C2 works on MP system (V1) : 0 + Control Method Power Button (V1) : 0 + Control Method Sleep Button (V1) : 1 + RTC wake not in fixed reg space (V1) : 0 + RTC can wake system from S4 (V1) : 1 + 32-bit PM Timer (V1) : 0 + Docking Supported (V1) : 0 + Reset Register Supported (V2) : 0 + Sealed Case (V3) : 0 + Headless - No Video (V3) : 0 + Use native instr after SLP_TYPx (V3) : 0 + PCIEXP_WAK Bits Supported (V4) : 0 + Use Platform Timer (V4) : 1 + RTC_STS valid on S4 wake (V4) : 0 + Remote Power-on capable (V4) : 0 + Use APIC Cluster Model (V4) : 0 + Use APIC Physical Destination Mode (V4) : 0 + Hardware Reduced (V5) : 0 + Low Power S0 Idle (V5) : 0 + +Raw Table Data: Length 116 (0x74) + + 0000: 46 41 43 50 74 00 00 00 01 A1 42 4F 43 48 53 20 // FACPt.....BOCHS + 0010: 42 58 50 43 46 41 43 50 01 00 00 00 42 58 50 43 // BXPCFACP....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 01 00 09 00 // ................ + 0030: B2 00 00 00 F1 F0 00 00 00 06 00 00 00 00 00 00 // ................ + 0040: 04 06 00 00 00 00 00 00 00 00 00 00 08 06 00 00 // ................ + 0050: E0 AF 00 00 00 00 00 00 04 02 00 04 04 00 00 00 // ................ + 0060: FF 0F FF 0F 00 00 00 00 00 00 00 00 32 00 00 00 // ............2... + 0070: A5 80 00 00 // .... diff --git a/tests/data/acpi/pc/FACP.numamem b/tests/data/acpi/pc/FACP.numamem new file mode 100644 index 0000000000000000000000000000000000000000..261ebdc5d1c3bdf18fb7935314a04fd7f6f92a7a GIT binary patch literal 116 zcmZ>BbPgzCU|?We=;ZJ05v<@85#S6GV`N}p0I@+d0~9baa58LSU|{(8fq{X64I;<_ pr9nInHU@?V>p?6A1{Nj;78V8uhX4Hk`5__<3`PtL3`-jr7y#~G4*>uG literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/FACP.numamem.dsl b/tests/data/acpi/pc/FACP.numamem.dsl new file mode 100644 index 0000000000..34ed95d536 --- /dev/null +++ b/tests/data/acpi/pc/FACP.numamem.dsl @@ -0,0 +1,99 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACP.numamem, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACP] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)] +[004h 0004 4] Table Length : 00000074 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : A1 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCFACP" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] FACS Address : 00000000 +[028h 0040 4] DSDT Address : 00000000 +[02Ch 0044 1] Model : 01 +[02Dh 0045 1] PM Profile : 00 [Unspecified] +[02Eh 0046 2] SCI Interrupt : 0009 +[030h 0048 4] SMI Command Port : 000000B2 +[034h 0052 1] ACPI Enable Value : F1 +[035h 0053 1] ACPI Disable Value : F0 +[036h 0054 1] S4BIOS Command : 00 +[037h 0055 1] P-State Control : 00 +[038h 0056 4] PM1A Event Block Address : 00000600 +[03Ch 0060 4] PM1B Event Block Address : 00000000 +[040h 0064 4] PM1A Control Block Address : 00000604 +[044h 0068 4] PM1B Control Block Address : 00000000 +[048h 0072 4] PM2 Control Block Address : 00000000 +[04Ch 0076 4] PM Timer Block Address : 00000608 +[050h 0080 4] GPE0 Block Address : 0000AFE0 +[054h 0084 4] GPE1 Block Address : 00000000 +[058h 0088 1] PM1 Event Block Length : 04 +[059h 0089 1] PM1 Control Block Length : 02 +[05Ah 0090 1] PM2 Control Block Length : 00 +[05Bh 0091 1] PM Timer Block Length : 04 +[05Ch 0092 1] GPE0 Block Length : 04 +[05Dh 0093 1] GPE1 Block Length : 00 +[05Eh 0094 1] GPE1 Base Offset : 00 +[05Fh 0095 1] _CST Support : 00 +[060h 0096 2] C2 Latency : 0FFF +[062h 0098 2] C3 Latency : 0FFF +[064h 0100 2] CPU Cache Size : 0000 +[066h 0102 2] Cache Flush Stride : 0000 +[068h 0104 1] Duty Cycle Offset : 00 +[069h 0105 1] Duty Cycle Width : 00 +[06Ah 0106 1] RTC Day Alarm Index : 00 +[06Bh 0107 1] RTC Month Alarm Index : 00 +[06Ch 0108 1] RTC Century Index : 32 +[06Dh 0109 2] Boot Flags (decoded below) : 0000 + Legacy Devices Supported (V2) : 0 + 8042 Present on ports 60/64 (V2) : 0 + VGA Not Present (V4) : 0 + MSI Not Supported (V4) : 0 + PCIe ASPM Not Supported (V4) : 0 + CMOS RTC Not Present (V5) : 0 +[06Fh 0111 1] Reserved : 00 +[070h 0112 4] Flags (decoded below) : 000080A5 + WBINVD instruction is operational (V1) : 1 + WBINVD flushes all caches (V1) : 0 + All CPUs support C1 (V1) : 1 + C2 works on MP system (V1) : 0 + Control Method Power Button (V1) : 0 + Control Method Sleep Button (V1) : 1 + RTC wake not in fixed reg space (V1) : 0 + RTC can wake system from S4 (V1) : 1 + 32-bit PM Timer (V1) : 0 + Docking Supported (V1) : 0 + Reset Register Supported (V2) : 0 + Sealed Case (V3) : 0 + Headless - No Video (V3) : 0 + Use native instr after SLP_TYPx (V3) : 0 + PCIEXP_WAK Bits Supported (V4) : 0 + Use Platform Timer (V4) : 1 + RTC_STS valid on S4 wake (V4) : 0 + Remote Power-on capable (V4) : 0 + Use APIC Cluster Model (V4) : 0 + Use APIC Physical Destination Mode (V4) : 0 + Hardware Reduced (V5) : 0 + Low Power S0 Idle (V5) : 0 + +Raw Table Data: Length 116 (0x74) + + 0000: 46 41 43 50 74 00 00 00 01 A1 42 4F 43 48 53 20 // FACPt.....BOCHS + 0010: 42 58 50 43 46 41 43 50 01 00 00 00 42 58 50 43 // BXPCFACP....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 01 00 09 00 // ................ + 0030: B2 00 00 00 F1 F0 00 00 00 06 00 00 00 00 00 00 // ................ + 0040: 04 06 00 00 00 00 00 00 00 00 00 00 08 06 00 00 // ................ + 0050: E0 AF 00 00 00 00 00 00 04 02 00 04 04 00 00 00 // ................ + 0060: FF 0F FF 0F 00 00 00 00 00 00 00 00 32 00 00 00 // ............2... + 0070: A5 80 00 00 // .... diff --git a/tests/data/acpi/pc/FACP.roothp b/tests/data/acpi/pc/FACP.roothp new file mode 100644 index 0000000000000000000000000000000000000000..261ebdc5d1c3bdf18fb7935314a04fd7f6f92a7a GIT binary patch literal 116 zcmZ>BbPgzCU|?We=;ZJ05v<@85#S6GV`N}p0I@+d0~9baa58LSU|{(8fq{X64I;<_ pr9nInHU@?V>p?6A1{Nj;78V8uhX4Hk`5__<3`PtL3`-jr7y#~G4*>uG literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/FACS.acpihmat b/tests/data/acpi/pc/FACS.acpihmat new file mode 100644 index 0000000000000000000000000000000000000000..fc67ecc40782bd7fe8921e430d7de67f0bfaad93 GIT binary patch literal 64 PcmZ>BbPjf4ARhn#RKNjV literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/FACS.acpihmat.dsl b/tests/data/acpi/pc/FACS.acpihmat.dsl new file mode 100644 index 0000000000..bff165ba4e --- /dev/null +++ b/tests/data/acpi/pc/FACS.acpihmat.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACS.acpihmat, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/FACS.bridge b/tests/data/acpi/pc/FACS.bridge new file mode 100644 index 0000000000000000000000000000000000000000..fc67ecc40782bd7fe8921e430d7de67f0bfaad93 GIT binary patch literal 64 PcmZ>BbPjf4ARhn#RKNjV literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/FACS.bridge.dsl b/tests/data/acpi/pc/FACS.bridge.dsl new file mode 100644 index 0000000000..981354f0f3 --- /dev/null +++ b/tests/data/acpi/pc/FACS.bridge.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACS.bridge, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/FACS.cphp b/tests/data/acpi/pc/FACS.cphp new file mode 100644 index 0000000000000000000000000000000000000000..fc67ecc40782bd7fe8921e430d7de67f0bfaad93 GIT binary patch literal 64 PcmZ>BbPjf4ARhn#RKNjV literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/FACS.cphp.dsl b/tests/data/acpi/pc/FACS.cphp.dsl new file mode 100644 index 0000000000..bb44e525b9 --- /dev/null +++ b/tests/data/acpi/pc/FACS.cphp.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACS.cphp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/FACS.dimmpxm b/tests/data/acpi/pc/FACS.dimmpxm new file mode 100644 index 0000000000000000000000000000000000000000..fc67ecc40782bd7fe8921e430d7de67f0bfaad93 GIT binary patch literal 64 PcmZ>BbPjf4ARhn#RKNjV literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/FACS.dimmpxm.dsl b/tests/data/acpi/pc/FACS.dimmpxm.dsl new file mode 100644 index 0000000000..e7586d3236 --- /dev/null +++ b/tests/data/acpi/pc/FACS.dimmpxm.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACS.dimmpxm, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/FACS.dsl b/tests/data/acpi/pc/FACS.dsl new file mode 100644 index 0000000000..11d622cdf7 --- /dev/null +++ b/tests/data/acpi/pc/FACS.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACS.roothp, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/FACS.hpbridge b/tests/data/acpi/pc/FACS.hpbridge new file mode 100644 index 0000000000000000000000000000000000000000..fc67ecc40782bd7fe8921e430d7de67f0bfaad93 GIT binary patch literal 64 PcmZ>BbPjf4ARhn#RKNjV literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/FACS.ipmikcs b/tests/data/acpi/pc/FACS.ipmikcs new file mode 100644 index 0000000000000000000000000000000000000000..fc67ecc40782bd7fe8921e430d7de67f0bfaad93 GIT binary patch literal 64 PcmZ>BbPjf4ARhn#RKNjV literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/FACS.ipmikcs.dsl b/tests/data/acpi/pc/FACS.ipmikcs.dsl new file mode 100644 index 0000000000..f4b7c9718c --- /dev/null +++ b/tests/data/acpi/pc/FACS.ipmikcs.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACS.ipmikcs, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/FACS.memhp b/tests/data/acpi/pc/FACS.memhp new file mode 100644 index 0000000000000000000000000000000000000000..fc67ecc40782bd7fe8921e430d7de67f0bfaad93 GIT binary patch literal 64 PcmZ>BbPjf4ARhn#RKNjV literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/FACS.memhp.dsl b/tests/data/acpi/pc/FACS.memhp.dsl new file mode 100644 index 0000000000..da2e230a62 --- /dev/null +++ b/tests/data/acpi/pc/FACS.memhp.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACS.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/FACS.numamem b/tests/data/acpi/pc/FACS.numamem new file mode 100644 index 0000000000000000000000000000000000000000..fc67ecc40782bd7fe8921e430d7de67f0bfaad93 GIT binary patch literal 64 PcmZ>BbPjf4ARhn#RKNjV literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/FACS.numamem.dsl b/tests/data/acpi/pc/FACS.numamem.dsl new file mode 100644 index 0000000000..c856f8b230 --- /dev/null +++ b/tests/data/acpi/pc/FACS.numamem.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACS.numamem, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/FACS.roothp b/tests/data/acpi/pc/FACS.roothp new file mode 100644 index 0000000000000000000000000000000000000000..fc67ecc40782bd7fe8921e430d7de67f0bfaad93 GIT binary patch literal 64 PcmZ>BbPjf4ARhn#RKNjV literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/HMAT.acpihmat.dsl b/tests/data/acpi/pc/HMAT.acpihmat.dsl new file mode 100644 index 0000000000..b55564d383 --- /dev/null +++ b/tests/data/acpi/pc/HMAT.acpihmat.dsl @@ -0,0 +1,132 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/HMAT.acpihmat, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HMAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HMAT" [Heterogeneous Memory Attributes Table] +[004h 0004 4] Table Length : 00000118 +[008h 0008 1] Revision : 02 +[009h 0009 1] Checksum : 98 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHMAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Reserved : 00000000 + +[028h 0040 2] Structure Type : 0000 [Memory Proximity Domain Attributes] +[02Ah 0042 2] Reserved : 0000 +[02Ch 0044 4] Length : 00000028 +[030h 0048 2] Flags (decoded below) : 0001 + Processor Proximity Domain Valid : 1 +[032h 0050 2] Reserved1 : 0000 +[034h 0052 4] Processor Proximity Domain : 00000000 +[038h 0056 4] Memory Proximity Domain : 00000000 +[03Ch 0060 4] Reserved2 : 00000000 +[040h 0064 8] Reserved3 : 0000000000000000 +[048h 0072 8] Reserved4 : 0000000000000000 + +[050h 0080 2] Structure Type : 0000 [Memory Proximity Domain Attributes] +[052h 0082 2] Reserved : 0000 +[054h 0084 4] Length : 00000028 +[058h 0088 2] Flags (decoded below) : 0001 + Processor Proximity Domain Valid : 1 +[05Ah 0090 2] Reserved1 : 0000 +[05Ch 0092 4] Processor Proximity Domain : 00000000 +[060h 0096 4] Memory Proximity Domain : 00000001 +[064h 0100 4] Reserved2 : 00000000 +[068h 0104 8] Reserved3 : 0000000000000000 +[070h 0112 8] Reserved4 : 0000000000000000 + +[078h 0120 2] Structure Type : 0001 [System Locality Latency and Bandwidth Information] +[07Ah 0122 2] Reserved : 0000 +[07Ch 0124 4] Length : 00000030 +[080h 0128 1] Flags (decoded below) : 00 + Memory Hierarchy : 0 +[081h 0129 1] Data Type : 00 +[082h 0130 2] Reserved1 : 0000 +[084h 0132 4] Initiator Proximity Domains # : 00000001 +[088h 0136 4] Target Proximity Domains # : 00000002 +[08Ch 0140 4] Reserved2 : 00000000 +[090h 0144 8] Entry Base Unit : 00000000000003E8 +[098h 0152 4] Initiator Proximity Domain List : 00000000 +[09Ch 0156 4] Target Proximity Domain List : 00000000 +[0A0h 0160 4] Target Proximity Domain List : 00000001 +[0A4h 0164 2] Entry : 0001 +[0A6h 0166 2] Entry : FFFE + +[0A8h 0168 2] Structure Type : 0001 [System Locality Latency and Bandwidth Information] +[0AAh 0170 2] Reserved : 0000 +[0ACh 0172 4] Length : 00000030 +[0B0h 0176 1] Flags (decoded below) : 00 + Memory Hierarchy : 0 +[0B1h 0177 1] Data Type : 03 +[0B2h 0178 2] Reserved1 : 0000 +[0B4h 0180 4] Initiator Proximity Domains # : 00000001 +[0B8h 0184 4] Target Proximity Domains # : 00000002 +[0BCh 0188 4] Reserved2 : 00000000 +[0C0h 0192 8] Entry Base Unit : 0000000000000001 +[0C8h 0200 4] Initiator Proximity Domain List : 00000000 +[0CCh 0204 4] Target Proximity Domain List : 00000000 +[0D0h 0208 4] Target Proximity Domain List : 00000001 +[0D4h 0212 2] Entry : FFFE +[0D6h 0214 2] Entry : 7FFF + +[0D8h 0216 2] Structure Type : 0002 [Memory Side Cache Information] +[0DAh 0218 2] Reserved : 0000 +[0DCh 0220 4] Length : 00000020 +[0E0h 0224 4] Memory Proximity Domain : 00000000 +[0E4h 0228 4] Reserved1 : 00000000 +[0E8h 0232 8] Memory Side Cache Size : 0000000000002800 +[0F0h 0240 4] Cache Attributes (decoded below) : 00081111 + Total Cache Levels : 1 + Cache Level : 1 + Cache Associativity : 1 + Write Policy : 1 + Cache Line Size : 0008 +[0F4h 0244 2] Reserved2 : 0000 +[0F6h 0246 2] SMBIOS Handle # : 0000 + +[0F8h 0248 2] Structure Type : 0002 [Memory Side Cache Information] +[0FAh 0250 2] Reserved : 0000 +[0FCh 0252 4] Length : 00000020 +[100h 0256 4] Memory Proximity Domain : 00000001 +[104h 0260 4] Reserved1 : 00000000 +[108h 0264 8] Memory Side Cache Size : 0000000000002800 +[110h 0272 4] Cache Attributes (decoded below) : 00081111 + Total Cache Levels : 1 + Cache Level : 1 + Cache Associativity : 1 + Write Policy : 1 + Cache Line Size : 0008 +[114h 0276 2] Reserved2 : 0000 +[116h 0278 2] SMBIOS Handle # : 0000 + +Raw Table Data: Length 280 (0x118) + + 0000: 48 4D 41 54 18 01 00 00 02 98 42 4F 43 48 53 20 // HMAT......BOCHS + 0010: 42 58 50 43 48 4D 41 54 01 00 00 00 42 58 50 43 // BXPCHMAT....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 28 00 00 00 // ............(... + 0030: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0050: 00 00 00 00 28 00 00 00 01 00 00 00 00 00 00 00 // ....(........... + 0060: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0070: 00 00 00 00 00 00 00 00 01 00 00 00 30 00 00 00 // ............0... + 0080: 00 00 00 00 01 00 00 00 02 00 00 00 00 00 00 00 // ................ + 0090: E8 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00A0: 01 00 00 00 01 00 FE FF 01 00 00 00 30 00 00 00 // ............0... + 00B0: 00 03 00 00 01 00 00 00 02 00 00 00 00 00 00 00 // ................ + 00C0: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 01 00 00 00 FE FF FF 7F 02 00 00 00 20 00 00 00 // ............ ... + 00E0: 00 00 00 00 00 00 00 00 00 28 00 00 00 00 00 00 // .........(...... + 00F0: 11 11 08 00 00 00 00 00 02 00 00 00 20 00 00 00 // ............ ... + 0100: 01 00 00 00 00 00 00 00 00 28 00 00 00 00 00 00 // .........(...... + 0110: 11 11 08 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/HMAT.dsl b/tests/data/acpi/pc/HMAT.dsl new file mode 100644 index 0000000000..8031f62433 --- /dev/null +++ b/tests/data/acpi/pc/HMAT.dsl @@ -0,0 +1,132 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/HMAT.acpihmat, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [HMAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HMAT" [Heterogeneous Memory Attributes Table] +[004h 0004 4] Table Length : 00000118 +[008h 0008 1] Revision : 02 +[009h 0009 1] Checksum : 98 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHMAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Reserved : 00000000 + +[028h 0040 2] Structure Type : 0000 [Memory Proximity Domain Attributes] +[02Ah 0042 2] Reserved : 0000 +[02Ch 0044 4] Length : 00000028 +[030h 0048 2] Flags (decoded below) : 0001 + Processor Proximity Domain Valid : 1 +[032h 0050 2] Reserved1 : 0000 +[034h 0052 4] Processor Proximity Domain : 00000000 +[038h 0056 4] Memory Proximity Domain : 00000000 +[03Ch 0060 4] Reserved2 : 00000000 +[040h 0064 8] Reserved3 : 0000000000000000 +[048h 0072 8] Reserved4 : 0000000000000000 + +[050h 0080 2] Structure Type : 0000 [Memory Proximity Domain Attributes] +[052h 0082 2] Reserved : 0000 +[054h 0084 4] Length : 00000028 +[058h 0088 2] Flags (decoded below) : 0001 + Processor Proximity Domain Valid : 1 +[05Ah 0090 2] Reserved1 : 0000 +[05Ch 0092 4] Processor Proximity Domain : 00000000 +[060h 0096 4] Memory Proximity Domain : 00000001 +[064h 0100 4] Reserved2 : 00000000 +[068h 0104 8] Reserved3 : 0000000000000000 +[070h 0112 8] Reserved4 : 0000000000000000 + +[078h 0120 2] Structure Type : 0001 [System Locality Latency and Bandwidth Information] +[07Ah 0122 2] Reserved : 0000 +[07Ch 0124 4] Length : 00000030 +[080h 0128 1] Flags (decoded below) : 00 + Memory Hierarchy : 0 +[081h 0129 1] Data Type : 00 +[082h 0130 2] Reserved1 : 0000 +[084h 0132 4] Initiator Proximity Domains # : 00000001 +[088h 0136 4] Target Proximity Domains # : 00000002 +[08Ch 0140 4] Reserved2 : 00000000 +[090h 0144 8] Entry Base Unit : 00000000000003E8 +[098h 0152 4] Initiator Proximity Domain List : 00000000 +[09Ch 0156 4] Target Proximity Domain List : 00000000 +[0A0h 0160 4] Target Proximity Domain List : 00000001 +[0A4h 0164 2] Entry : 0001 +[0A6h 0166 2] Entry : FFFE + +[0A8h 0168 2] Structure Type : 0001 [System Locality Latency and Bandwidth Information] +[0AAh 0170 2] Reserved : 0000 +[0ACh 0172 4] Length : 00000030 +[0B0h 0176 1] Flags (decoded below) : 00 + Memory Hierarchy : 0 +[0B1h 0177 1] Data Type : 03 +[0B2h 0178 2] Reserved1 : 0000 +[0B4h 0180 4] Initiator Proximity Domains # : 00000001 +[0B8h 0184 4] Target Proximity Domains # : 00000002 +[0BCh 0188 4] Reserved2 : 00000000 +[0C0h 0192 8] Entry Base Unit : 0000000000000001 +[0C8h 0200 4] Initiator Proximity Domain List : 00000000 +[0CCh 0204 4] Target Proximity Domain List : 00000000 +[0D0h 0208 4] Target Proximity Domain List : 00000001 +[0D4h 0212 2] Entry : FFFE +[0D6h 0214 2] Entry : 7FFF + +[0D8h 0216 2] Structure Type : 0002 [Memory Side Cache Information] +[0DAh 0218 2] Reserved : 0000 +[0DCh 0220 4] Length : 00000020 +[0E0h 0224 4] Memory Proximity Domain : 00000000 +[0E4h 0228 4] Reserved1 : 00000000 +[0E8h 0232 8] Memory Side Cache Size : 0000000000002800 +[0F0h 0240 4] Cache Attributes (decoded below) : 00081111 + Total Cache Levels : 1 + Cache Level : 1 + Cache Associativity : 1 + Write Policy : 1 + Cache Line Size : 0008 +[0F4h 0244 2] Reserved2 : 0000 +[0F6h 0246 2] SMBIOS Handle # : 0000 + +[0F8h 0248 2] Structure Type : 0002 [Memory Side Cache Information] +[0FAh 0250 2] Reserved : 0000 +[0FCh 0252 4] Length : 00000020 +[100h 0256 4] Memory Proximity Domain : 00000001 +[104h 0260 4] Reserved1 : 00000000 +[108h 0264 8] Memory Side Cache Size : 0000000000002800 +[110h 0272 4] Cache Attributes (decoded below) : 00081111 + Total Cache Levels : 1 + Cache Level : 1 + Cache Associativity : 1 + Write Policy : 1 + Cache Line Size : 0008 +[114h 0276 2] Reserved2 : 0000 +[116h 0278 2] SMBIOS Handle # : 0000 + +Raw Table Data: Length 280 (0x118) + + 0000: 48 4D 41 54 18 01 00 00 02 98 42 4F 43 48 53 20 // HMAT......BOCHS + 0010: 42 58 50 43 48 4D 41 54 01 00 00 00 42 58 50 43 // BXPCHMAT....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 28 00 00 00 // ............(... + 0030: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0050: 00 00 00 00 28 00 00 00 01 00 00 00 00 00 00 00 // ....(........... + 0060: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0070: 00 00 00 00 00 00 00 00 01 00 00 00 30 00 00 00 // ............0... + 0080: 00 00 00 00 01 00 00 00 02 00 00 00 00 00 00 00 // ................ + 0090: E8 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00A0: 01 00 00 00 01 00 FE FF 01 00 00 00 30 00 00 00 // ............0... + 00B0: 00 03 00 00 01 00 00 00 02 00 00 00 00 00 00 00 // ................ + 00C0: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 01 00 00 00 FE FF FF 7F 02 00 00 00 20 00 00 00 // ............ ... + 00E0: 00 00 00 00 00 00 00 00 00 28 00 00 00 00 00 00 // .........(...... + 00F0: 11 11 08 00 00 00 00 00 02 00 00 00 20 00 00 00 // ............ ... + 0100: 01 00 00 00 00 00 00 00 00 28 00 00 00 00 00 00 // .........(...... + 0110: 11 11 08 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/HPET.acpihmat b/tests/data/acpi/pc/HPET.acpihmat new file mode 100644 index 0000000000000000000000000000000000000000..df689b8f99c1c43cfd7d63bdede3bcdfd23b7de1 GIT binary patch literal 56 xcmeYWa1F6wU|?WmcJg=j2v%^42yh08F)}bPfY>0KaZy_X0~lQR2c{Sp7yvda3IPBB literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/HPET.acpihmat.dsl b/tests/data/acpi/pc/HPET.acpihmat.dsl new file mode 100644 index 0000000000..9029afb2a2 --- /dev/null +++ b/tests/data/acpi/pc/HPET.acpihmat.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/HPET.acpihmat, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/HPET.bridge b/tests/data/acpi/pc/HPET.bridge new file mode 100644 index 0000000000000000000000000000000000000000..df689b8f99c1c43cfd7d63bdede3bcdfd23b7de1 GIT binary patch literal 56 xcmeYWa1F6wU|?WmcJg=j2v%^42yh08F)}bPfY>0KaZy_X0~lQR2c{Sp7yvda3IPBB literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/HPET.bridge.dsl b/tests/data/acpi/pc/HPET.bridge.dsl new file mode 100644 index 0000000000..936616faa8 --- /dev/null +++ b/tests/data/acpi/pc/HPET.bridge.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/HPET.bridge, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/HPET.cphp b/tests/data/acpi/pc/HPET.cphp new file mode 100644 index 0000000000000000000000000000000000000000..df689b8f99c1c43cfd7d63bdede3bcdfd23b7de1 GIT binary patch literal 56 xcmeYWa1F6wU|?WmcJg=j2v%^42yh08F)}bPfY>0KaZy_X0~lQR2c{Sp7yvda3IPBB literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/HPET.cphp.dsl b/tests/data/acpi/pc/HPET.cphp.dsl new file mode 100644 index 0000000000..e095a43ee7 --- /dev/null +++ b/tests/data/acpi/pc/HPET.cphp.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/HPET.cphp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/HPET.dimmpxm b/tests/data/acpi/pc/HPET.dimmpxm new file mode 100644 index 0000000000000000000000000000000000000000..df689b8f99c1c43cfd7d63bdede3bcdfd23b7de1 GIT binary patch literal 56 xcmeYWa1F6wU|?WmcJg=j2v%^42yh08F)}bPfY>0KaZy_X0~lQR2c{Sp7yvda3IPBB literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/HPET.dimmpxm.dsl b/tests/data/acpi/pc/HPET.dimmpxm.dsl new file mode 100644 index 0000000000..84ce218492 --- /dev/null +++ b/tests/data/acpi/pc/HPET.dimmpxm.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/HPET.dimmpxm, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/HPET.dsl b/tests/data/acpi/pc/HPET.dsl new file mode 100644 index 0000000000..b392de5c95 --- /dev/null +++ b/tests/data/acpi/pc/HPET.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/HPET.roothp, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/HPET.hpbridge b/tests/data/acpi/pc/HPET.hpbridge new file mode 100644 index 0000000000000000000000000000000000000000..df689b8f99c1c43cfd7d63bdede3bcdfd23b7de1 GIT binary patch literal 56 xcmeYWa1F6wU|?WmcJg=j2v%^42yh08F)}bPfY>0KaZy_X0~lQR2c{Sp7yvda3IPBB literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/HPET.ipmikcs b/tests/data/acpi/pc/HPET.ipmikcs new file mode 100644 index 0000000000000000000000000000000000000000..df689b8f99c1c43cfd7d63bdede3bcdfd23b7de1 GIT binary patch literal 56 xcmeYWa1F6wU|?WmcJg=j2v%^42yh08F)}bPfY>0KaZy_X0~lQR2c{Sp7yvda3IPBB literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/HPET.ipmikcs.dsl b/tests/data/acpi/pc/HPET.ipmikcs.dsl new file mode 100644 index 0000000000..34d10927dc --- /dev/null +++ b/tests/data/acpi/pc/HPET.ipmikcs.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/HPET.ipmikcs, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/HPET.memhp b/tests/data/acpi/pc/HPET.memhp new file mode 100644 index 0000000000000000000000000000000000000000..df689b8f99c1c43cfd7d63bdede3bcdfd23b7de1 GIT binary patch literal 56 xcmeYWa1F6wU|?WmcJg=j2v%^42yh08F)}bPfY>0KaZy_X0~lQR2c{Sp7yvda3IPBB literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/HPET.memhp.dsl b/tests/data/acpi/pc/HPET.memhp.dsl new file mode 100644 index 0000000000..f9f62dd9c8 --- /dev/null +++ b/tests/data/acpi/pc/HPET.memhp.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/HPET.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/HPET.numamem b/tests/data/acpi/pc/HPET.numamem new file mode 100644 index 0000000000000000000000000000000000000000..df689b8f99c1c43cfd7d63bdede3bcdfd23b7de1 GIT binary patch literal 56 xcmeYWa1F6wU|?WmcJg=j2v%^42yh08F)}bPfY>0KaZy_X0~lQR2c{Sp7yvda3IPBB literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/HPET.numamem.dsl b/tests/data/acpi/pc/HPET.numamem.dsl new file mode 100644 index 0000000000..1f51efad19 --- /dev/null +++ b/tests/data/acpi/pc/HPET.numamem.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/HPET.numamem, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/HPET.roothp b/tests/data/acpi/pc/HPET.roothp new file mode 100644 index 0000000000000000000000000000000000000000..df689b8f99c1c43cfd7d63bdede3bcdfd23b7de1 GIT binary patch literal 56 xcmeYWa1F6wU|?WmcJg=j2v%^42yh08F)}bPfY>0KaZy_X0~lQR2c{Sp7yvda3IPBB literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/NFIT.dimmpxm.dsl b/tests/data/acpi/pc/NFIT.dimmpxm.dsl new file mode 100644 index 0000000000..33212b0a17 --- /dev/null +++ b/tests/data/acpi/pc/NFIT.dimmpxm.dsl @@ -0,0 +1,115 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/NFIT.dimmpxm, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [NFIT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "NFIT" [NVDIMM Firmware Interface Table] +[004h 0004 4] Table Length : 000000F0 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 24 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCNFIT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Reserved : 00000000 + +[028h 0040 2] Subtable Type : 0000 [System Physical Address Range] +[02Ah 0042 2] Length : 0038 + +[02Ch 0044 2] Range Index : 0004 +[02Eh 0046 2] Flags (decoded below) : 0003 + Add/Online Operation Only : 1 + Proximity Domain Valid : 1 +[030h 0048 4] Reserved : 00000000 +[034h 0052 4] Proximity Domain : 00000002 +[038h 0056 16] Region Type GUID : 66F0D379-B4F3-4074-AC43-0D3318B78CDB +[048h 0072 8] Address Range Base : 0000000108000000 +[050h 0080 8] Address Range Length : 0000000008000000 +[058h 0088 8] Memory Map Attribute : 0000000000008008 + +[060h 0096 2] Subtable Type : 0001 [Memory Range Map] +[062h 0098 2] Length : 0030 + +[064h 0100 4] Device Handle : 00000002 +[068h 0104 2] Physical Id : 0000 +[06Ah 0106 2] Region Id : 0000 +[06Ch 0108 2] Range Index : 0004 +[06Eh 0110 2] Control Region Index : 0005 +[070h 0112 8] Region Size : 0000000008000000 +[078h 0120 8] Region Offset : 0000000000000000 +[080h 0128 8] Address Region Base : 0000000000000000 +[088h 0136 2] Interleave Index : 0000 +[08Ah 0138 2] Interleave Ways : 0001 +[08Ch 0140 2] Flags : 0000 + Save to device failed : 0 + Restore from device failed : 0 + Platform flush failed : 0 + Device not armed : 0 + Health events observed : 0 + Health events enabled : 0 + Mapping failed : 0 +[08Eh 0142 2] Reserved : 0000 + +[090h 0144 2] Subtable Type : 0004 [NVDIMM Control Region] +[092h 0146 2] Length : 0050 + +[094h 0148 2] Region Index : 0005 +[096h 0150 2] Vendor Id : 8086 +[098h 0152 2] Device Id : 0001 +[09Ah 0154 2] Revision Id : 0001 +[09Ch 0156 2] Subsystem Vendor Id : 0000 +[09Eh 0158 2] Subsystem Device Id : 0000 +[0A0h 0160 2] Subsystem Revision Id : 0000 +[0A2h 0162 1] Valid Fields : 00 +[0A3h 0163 1] Manufacturing Location : 00 +[0A4h 0164 2] Manufacturing Date : 0000 +[0A6h 0166 2] Reserved : 0000 +[0A8h 0168 4] Serial Number : 00123457 +[0ACh 0172 2] Code : 0301 +[0AEh 0174 2] Window Count : 0000 +[0B0h 0176 8] Window Size : 0000000000000000 +[0B8h 0184 8] Command Offset : 0000000000000000 +[0C0h 0192 8] Command Size : 0000000000000000 +[0C8h 0200 8] Status Offset : 0000000000000000 +[0D0h 0208 8] Status Size : 0000000000000000 +[0D8h 0216 2] Flags : 0000 + Windows buffered : 0 +[0DAh 0218 6] Reserved1 : 000000000000 + +[0E0h 0224 2] Subtable Type : 0007 [Platform Capabilities] +[0E2h 0226 2] Length : 0010 + +[0E4h 0228 1] Highest Capability : 01 +[0E5h 0229 3] Reserved : 000000 +[0E8h 0232 4] Capabilities (decoded below) : 00000003 + Cache Flush to NVDIMM : 1 + Memory Flush to NVDIMM : 1 + Memory Mirroring : 0 +[0ECh 0236 4] Reserved : 00000000 + +Raw Table Data: Length 240 (0xF0) + + 0000: 4E 46 49 54 F0 00 00 00 01 24 42 4F 43 48 53 20 // NFIT.....$BOCHS + 0010: 42 58 50 43 4E 46 49 54 01 00 00 00 42 58 50 43 // BXPCNFIT....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 38 00 04 00 03 00 // ..........8..... + 0030: 00 00 00 00 02 00 00 00 79 D3 F0 66 F3 B4 74 40 // ........y..f..t@ + 0040: AC 43 0D 33 18 B7 8C DB 00 00 00 08 01 00 00 00 // .C.3............ + 0050: 00 00 00 08 00 00 00 00 08 80 00 00 00 00 00 00 // ................ + 0060: 01 00 30 00 02 00 00 00 00 00 00 00 04 00 05 00 // ..0............. + 0070: 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0080: 00 00 00 00 00 00 00 00 00 00 01 00 00 00 00 00 // ................ + 0090: 04 00 50 00 05 00 86 80 01 00 01 00 00 00 00 00 // ..P............. + 00A0: 00 00 00 00 00 00 00 00 57 34 12 00 01 03 00 00 // ........W4...... + 00B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00E0: 07 00 10 00 01 00 00 00 03 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/NFIT.dsl b/tests/data/acpi/pc/NFIT.dsl new file mode 100644 index 0000000000..f4a8034f87 --- /dev/null +++ b/tests/data/acpi/pc/NFIT.dsl @@ -0,0 +1,115 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/NFIT.dimmpxm, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [NFIT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "NFIT" [NVDIMM Firmware Interface Table] +[004h 0004 4] Table Length : 000000F0 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 24 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCNFIT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Reserved : 00000000 + +[028h 0040 2] Subtable Type : 0000 [System Physical Address Range] +[02Ah 0042 2] Length : 0038 + +[02Ch 0044 2] Range Index : 0004 +[02Eh 0046 2] Flags (decoded below) : 0003 + Add/Online Operation Only : 1 + Proximity Domain Valid : 1 +[030h 0048 4] Reserved : 00000000 +[034h 0052 4] Proximity Domain : 00000002 +[038h 0056 16] Region Type GUID : 66F0D379-B4F3-4074-AC43-0D3318B78CDB +[048h 0072 8] Address Range Base : 0000000108000000 +[050h 0080 8] Address Range Length : 0000000008000000 +[058h 0088 8] Memory Map Attribute : 0000000000008008 + +[060h 0096 2] Subtable Type : 0001 [Memory Range Map] +[062h 0098 2] Length : 0030 + +[064h 0100 4] Device Handle : 00000002 +[068h 0104 2] Physical Id : 0000 +[06Ah 0106 2] Region Id : 0000 +[06Ch 0108 2] Range Index : 0004 +[06Eh 0110 2] Control Region Index : 0005 +[070h 0112 8] Region Size : 0000000008000000 +[078h 0120 8] Region Offset : 0000000000000000 +[080h 0128 8] Address Region Base : 0000000000000000 +[088h 0136 2] Interleave Index : 0000 +[08Ah 0138 2] Interleave Ways : 0001 +[08Ch 0140 2] Flags : 0000 + Save to device failed : 0 + Restore from device failed : 0 + Platform flush failed : 0 + Device not armed : 0 + Health events observed : 0 + Health events enabled : 0 + Mapping failed : 0 +[08Eh 0142 2] Reserved : 0000 + +[090h 0144 2] Subtable Type : 0004 [NVDIMM Control Region] +[092h 0146 2] Length : 0050 + +[094h 0148 2] Region Index : 0005 +[096h 0150 2] Vendor Id : 8086 +[098h 0152 2] Device Id : 0001 +[09Ah 0154 2] Revision Id : 0001 +[09Ch 0156 2] Subsystem Vendor Id : 0000 +[09Eh 0158 2] Subsystem Device Id : 0000 +[0A0h 0160 2] Subsystem Revision Id : 0000 +[0A2h 0162 1] Valid Fields : 00 +[0A3h 0163 1] Manufacturing Location : 00 +[0A4h 0164 2] Manufacturing Date : 0000 +[0A6h 0166 2] Reserved : 0000 +[0A8h 0168 4] Serial Number : 00123457 +[0ACh 0172 2] Code : 0301 +[0AEh 0174 2] Window Count : 0000 +[0B0h 0176 8] Window Size : 0000000000000000 +[0B8h 0184 8] Command Offset : 0000000000000000 +[0C0h 0192 8] Command Size : 0000000000000000 +[0C8h 0200 8] Status Offset : 0000000000000000 +[0D0h 0208 8] Status Size : 0000000000000000 +[0D8h 0216 2] Flags : 0000 + Windows buffered : 0 +[0DAh 0218 6] Reserved1 : 000000000000 + +[0E0h 0224 2] Subtable Type : 0007 [Platform Capabilities] +[0E2h 0226 2] Length : 0010 + +[0E4h 0228 1] Highest Capability : 01 +[0E5h 0229 3] Reserved : 000000 +[0E8h 0232 4] Capabilities (decoded below) : 00000003 + Cache Flush to NVDIMM : 1 + Memory Flush to NVDIMM : 1 + Memory Mirroring : 0 +[0ECh 0236 4] Reserved : 00000000 + +Raw Table Data: Length 240 (0xF0) + + 0000: 4E 46 49 54 F0 00 00 00 01 24 42 4F 43 48 53 20 // NFIT.....$BOCHS + 0010: 42 58 50 43 4E 46 49 54 01 00 00 00 42 58 50 43 // BXPCNFIT....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 38 00 04 00 03 00 // ..........8..... + 0030: 00 00 00 00 02 00 00 00 79 D3 F0 66 F3 B4 74 40 // ........y..f..t@ + 0040: AC 43 0D 33 18 B7 8C DB 00 00 00 08 01 00 00 00 // .C.3............ + 0050: 00 00 00 08 00 00 00 00 08 80 00 00 00 00 00 00 // ................ + 0060: 01 00 30 00 02 00 00 00 00 00 00 00 04 00 05 00 // ..0............. + 0070: 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0080: 00 00 00 00 00 00 00 00 00 00 01 00 00 00 00 00 // ................ + 0090: 04 00 50 00 05 00 86 80 01 00 01 00 00 00 00 00 // ..P............. + 00A0: 00 00 00 00 00 00 00 00 57 34 12 00 01 03 00 00 // ........W4...... + 00B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00E0: 07 00 10 00 01 00 00 00 03 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/SLIT.cphp.dsl b/tests/data/acpi/pc/SLIT.cphp.dsl new file mode 100644 index 0000000000..20289608db --- /dev/null +++ b/tests/data/acpi/pc/SLIT.cphp.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/SLIT.cphp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SLIT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SLIT" [System Locality Information Table] +[004h 0004 4] Table Length : 00000030 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 2C +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSLIT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Localities : 0000000000000002 +[02Ch 0044 2] Locality 0 : 0A 15 +[02Eh 0046 2] Locality 1 : 15 0A + +Raw Table Data: Length 48 (0x30) + + 0000: 53 4C 49 54 30 00 00 00 01 2C 42 4F 43 48 53 20 // SLIT0....,BOCHS + 0010: 42 58 50 43 53 4C 49 54 01 00 00 00 42 58 50 43 // BXPCSLIT....BXPC + 0020: 01 00 00 00 02 00 00 00 00 00 00 00 0A 15 15 0A // ................ diff --git a/tests/data/acpi/pc/SLIT.dsl b/tests/data/acpi/pc/SLIT.dsl new file mode 100644 index 0000000000..8b923249af --- /dev/null +++ b/tests/data/acpi/pc/SLIT.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/SLIT.memhp, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [SLIT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SLIT" [System Locality Information Table] +[004h 0004 4] Table Length : 00000030 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 2C +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSLIT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Localities : 0000000000000002 +[02Ch 0044 2] Locality 0 : 0A 15 +[02Eh 0046 2] Locality 1 : 15 0A + +Raw Table Data: Length 48 (0x30) + + 0000: 53 4C 49 54 30 00 00 00 01 2C 42 4F 43 48 53 20 // SLIT0....,BOCHS + 0010: 42 58 50 43 53 4C 49 54 01 00 00 00 42 58 50 43 // BXPCSLIT....BXPC + 0020: 01 00 00 00 02 00 00 00 00 00 00 00 0A 15 15 0A // ................ diff --git a/tests/data/acpi/pc/SLIT.memhp.dsl b/tests/data/acpi/pc/SLIT.memhp.dsl new file mode 100644 index 0000000000..b3a0170144 --- /dev/null +++ b/tests/data/acpi/pc/SLIT.memhp.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/SLIT.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SLIT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SLIT" [System Locality Information Table] +[004h 0004 4] Table Length : 00000030 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 2C +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSLIT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Localities : 0000000000000002 +[02Ch 0044 2] Locality 0 : 0A 15 +[02Eh 0046 2] Locality 1 : 15 0A + +Raw Table Data: Length 48 (0x30) + + 0000: 53 4C 49 54 30 00 00 00 01 2C 42 4F 43 48 53 20 // SLIT0....,BOCHS + 0010: 42 58 50 43 53 4C 49 54 01 00 00 00 42 58 50 43 // BXPCSLIT....BXPC + 0020: 01 00 00 00 02 00 00 00 00 00 00 00 0A 15 15 0A // ................ diff --git a/tests/data/acpi/pc/SRAT.acpihmat.dsl b/tests/data/acpi/pc/SRAT.acpihmat.dsl new file mode 100644 index 0000000000..e3c788672f --- /dev/null +++ b/tests/data/acpi/pc/SRAT.acpihmat.dsl @@ -0,0 +1,137 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/SRAT.acpihmat, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SRAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table] +[004h 0004 4] Table Length : 00000118 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : C0 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSRAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Table Revision : 00000001 +[028h 0040 8] Reserved : 0000000000000000 + +[030h 0048 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[031h 0049 1] Length : 10 + +[032h 0050 1] Proximity Domain Low(8) : 00 +[033h 0051 1] Apic ID : 00 +[034h 0052 4] Flags (decoded below) : 00000001 + Enabled : 1 +[038h 0056 1] Local Sapic EID : 00 +[039h 0057 3] Proximity Domain High(24) : 000000 +[03Ch 0060 4] Clock Domain : 00000000 + +[040h 0064 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[041h 0065 1] Length : 10 + +[042h 0066 1] Proximity Domain Low(8) : 00 +[043h 0067 1] Apic ID : 01 +[044h 0068 4] Flags (decoded below) : 00000001 + Enabled : 1 +[048h 0072 1] Local Sapic EID : 00 +[049h 0073 3] Proximity Domain High(24) : 000000 +[04Ch 0076 4] Clock Domain : 00000000 + +[050h 0080 1] Subtable Type : 01 [Memory Affinity] +[051h 0081 1] Length : 28 + +[052h 0082 4] Proximity Domain : 00000000 +[056h 0086 2] Reserved1 : 0000 +[058h 0088 8] Base Address : 0000000000000000 +[060h 0096 8] Address Length : 00000000000A0000 +[068h 0104 4] Reserved2 : 00000000 +[06Ch 0108 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[070h 0112 8] Reserved3 : 0000000000000000 + +[078h 0120 1] Subtable Type : 01 [Memory Affinity] +[079h 0121 1] Length : 28 + +[07Ah 0122 4] Proximity Domain : 00000000 +[07Eh 0126 2] Reserved1 : 0000 +[080h 0128 8] Base Address : 0000000000100000 +[088h 0136 8] Address Length : 0000000003F00000 +[090h 0144 4] Reserved2 : 00000000 +[094h 0148 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[098h 0152 8] Reserved3 : 0000000000000000 + +[0A0h 0160 1] Subtable Type : 01 [Memory Affinity] +[0A1h 0161 1] Length : 28 + +[0A2h 0162 4] Proximity Domain : 00000001 +[0A6h 0166 2] Reserved1 : 0000 +[0A8h 0168 8] Base Address : 0000000004000000 +[0B0h 0176 8] Address Length : 0000000004000000 +[0B8h 0184 4] Reserved2 : 00000000 +[0BCh 0188 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[0C0h 0192 8] Reserved3 : 0000000000000000 + +[0C8h 0200 1] Subtable Type : 01 [Memory Affinity] +[0C9h 0201 1] Length : 28 + +[0CAh 0202 4] Proximity Domain : 00000000 +[0CEh 0206 2] Reserved1 : 0000 +[0D0h 0208 8] Base Address : 0000000000000000 +[0D8h 0216 8] Address Length : 0000000000000000 +[0E0h 0224 4] Reserved2 : 00000000 +[0E4h 0228 4] Flags (decoded below) : 00000000 + Enabled : 0 + Hot Pluggable : 0 + Non-Volatile : 0 +[0E8h 0232 8] Reserved3 : 0000000000000000 + +[0F0h 0240 1] Subtable Type : 01 [Memory Affinity] +[0F1h 0241 1] Length : 28 + +[0F2h 0242 4] Proximity Domain : 00000001 +[0F6h 0246 2] Reserved1 : 0000 +[0F8h 0248 8] Base Address : 0000000100000000 +[100h 0256 8] Address Length : 00000000B8000000 +[108h 0264 4] Reserved2 : 00000000 +[10Ch 0268 4] Flags (decoded below) : 00000003 + Enabled : 1 + Hot Pluggable : 1 + Non-Volatile : 0 +[110h 0272 8] Reserved3 : 0000000000000000 + +Raw Table Data: Length 280 (0x118) + + 0000: 53 52 41 54 18 01 00 00 01 C0 42 4F 43 48 53 20 // SRAT......BOCHS + 0010: 42 58 50 43 53 52 41 54 01 00 00 00 42 58 50 43 // BXPCSRAT....BXPC + 0020: 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 10 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 00 10 00 01 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0050: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 0060: 00 00 0A 00 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 0070: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 0080: 00 00 10 00 00 00 00 00 00 00 F0 03 00 00 00 00 // ................ + 0090: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00A0: 01 28 01 00 00 00 00 00 00 00 00 04 00 00 00 00 // .(.............. + 00B0: 00 00 00 04 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 00C0: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00E0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00F0: 01 28 01 00 00 00 00 00 00 00 00 00 01 00 00 00 // .(.............. + 0100: 00 00 00 B8 00 00 00 00 00 00 00 00 03 00 00 00 // ................ + 0110: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/SRAT.cphp.dsl b/tests/data/acpi/pc/SRAT.cphp.dsl new file mode 100644 index 0000000000..20c38ee3cc --- /dev/null +++ b/tests/data/acpi/pc/SRAT.cphp.dsl @@ -0,0 +1,168 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/SRAT.cphp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SRAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table] +[004h 0004 4] Table Length : 00000130 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 36 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSRAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Table Revision : 00000001 +[028h 0040 8] Reserved : 0000000000000000 + +[030h 0048 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[031h 0049 1] Length : 10 + +[032h 0050 1] Proximity Domain Low(8) : 00 +[033h 0051 1] Apic ID : 00 +[034h 0052 4] Flags (decoded below) : 00000001 + Enabled : 1 +[038h 0056 1] Local Sapic EID : 00 +[039h 0057 3] Proximity Domain High(24) : 000000 +[03Ch 0060 4] Clock Domain : 00000000 + +[040h 0064 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[041h 0065 1] Length : 10 + +[042h 0066 1] Proximity Domain Low(8) : 00 +[043h 0067 1] Apic ID : 01 +[044h 0068 4] Flags (decoded below) : 00000001 + Enabled : 1 +[048h 0072 1] Local Sapic EID : 00 +[049h 0073 3] Proximity Domain High(24) : 000000 +[04Ch 0076 4] Clock Domain : 00000000 + +[050h 0080 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[051h 0081 1] Length : 10 + +[052h 0082 1] Proximity Domain Low(8) : 00 +[053h 0083 1] Apic ID : 02 +[054h 0084 4] Flags (decoded below) : 00000001 + Enabled : 1 +[058h 0088 1] Local Sapic EID : 00 +[059h 0089 3] Proximity Domain High(24) : 000000 +[05Ch 0092 4] Clock Domain : 00000000 + +[060h 0096 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[061h 0097 1] Length : 10 + +[062h 0098 1] Proximity Domain Low(8) : 01 +[063h 0099 1] Apic ID : 04 +[064h 0100 4] Flags (decoded below) : 00000001 + Enabled : 1 +[068h 0104 1] Local Sapic EID : 00 +[069h 0105 3] Proximity Domain High(24) : 000000 +[06Ch 0108 4] Clock Domain : 00000000 + +[070h 0112 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[071h 0113 1] Length : 10 + +[072h 0114 1] Proximity Domain Low(8) : 01 +[073h 0115 1] Apic ID : 05 +[074h 0116 4] Flags (decoded below) : 00000001 + Enabled : 1 +[078h 0120 1] Local Sapic EID : 00 +[079h 0121 3] Proximity Domain High(24) : 000000 +[07Ch 0124 4] Clock Domain : 00000000 + +[080h 0128 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[081h 0129 1] Length : 10 + +[082h 0130 1] Proximity Domain Low(8) : 01 +[083h 0131 1] Apic ID : 06 +[084h 0132 4] Flags (decoded below) : 00000001 + Enabled : 1 +[088h 0136 1] Local Sapic EID : 00 +[089h 0137 3] Proximity Domain High(24) : 000000 +[08Ch 0140 4] Clock Domain : 00000000 + +[090h 0144 1] Subtable Type : 01 [Memory Affinity] +[091h 0145 1] Length : 28 + +[092h 0146 4] Proximity Domain : 00000000 +[096h 0150 2] Reserved1 : 0000 +[098h 0152 8] Base Address : 0000000000000000 +[0A0h 0160 8] Address Length : 00000000000A0000 +[0A8h 0168 4] Reserved2 : 00000000 +[0ACh 0172 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[0B0h 0176 8] Reserved3 : 0000000000000000 + +[0B8h 0184 1] Subtable Type : 01 [Memory Affinity] +[0B9h 0185 1] Length : 28 + +[0BAh 0186 4] Proximity Domain : 00000000 +[0BEh 0190 2] Reserved1 : 0000 +[0C0h 0192 8] Base Address : 0000000000100000 +[0C8h 0200 8] Address Length : 0000000003F00000 +[0D0h 0208 4] Reserved2 : 00000000 +[0D4h 0212 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[0D8h 0216 8] Reserved3 : 0000000000000000 + +[0E0h 0224 1] Subtable Type : 01 [Memory Affinity] +[0E1h 0225 1] Length : 28 + +[0E2h 0226 4] Proximity Domain : 00000001 +[0E6h 0230 2] Reserved1 : 0000 +[0E8h 0232 8] Base Address : 0000000004000000 +[0F0h 0240 8] Address Length : 0000000004000000 +[0F8h 0248 4] Reserved2 : 00000000 +[0FCh 0252 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[100h 0256 8] Reserved3 : 0000000000000000 + +[108h 0264 1] Subtable Type : 01 [Memory Affinity] +[109h 0265 1] Length : 28 + +[10Ah 0266 4] Proximity Domain : 00000000 +[10Eh 0270 2] Reserved1 : 0000 +[110h 0272 8] Base Address : 0000000000000000 +[118h 0280 8] Address Length : 0000000000000000 +[120h 0288 4] Reserved2 : 00000000 +[124h 0292 4] Flags (decoded below) : 00000000 + Enabled : 0 + Hot Pluggable : 0 + Non-Volatile : 0 +[128h 0296 8] Reserved3 : 0000000000000000 + +Raw Table Data: Length 304 (0x130) + + 0000: 53 52 41 54 30 01 00 00 01 36 42 4F 43 48 53 20 // SRAT0....6BOCHS + 0010: 42 58 50 43 53 52 41 54 01 00 00 00 42 58 50 43 // BXPCSRAT....BXPC + 0020: 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 10 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 00 10 00 01 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0050: 00 10 00 02 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0060: 00 10 01 04 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0070: 00 10 01 05 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0080: 00 10 01 06 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0090: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 00A0: 00 00 0A 00 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 00B0: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 00C0: 00 00 10 00 00 00 00 00 00 00 F0 03 00 00 00 00 // ................ + 00D0: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00E0: 01 28 01 00 00 00 00 00 00 00 00 04 00 00 00 00 // .(.............. + 00F0: 00 00 00 04 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 0100: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 0110: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/SRAT.dimmpxm.dsl b/tests/data/acpi/pc/SRAT.dimmpxm.dsl new file mode 100644 index 0000000000..888fef1b5c --- /dev/null +++ b/tests/data/acpi/pc/SRAT.dimmpxm.dsl @@ -0,0 +1,194 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/SRAT.dimmpxm, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SRAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table] +[004h 0004 4] Table Length : 00000188 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 68 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSRAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Table Revision : 00000001 +[028h 0040 8] Reserved : 0000000000000000 + +[030h 0048 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[031h 0049 1] Length : 10 + +[032h 0050 1] Proximity Domain Low(8) : 00 +[033h 0051 1] Apic ID : 00 +[034h 0052 4] Flags (decoded below) : 00000001 + Enabled : 1 +[038h 0056 1] Local Sapic EID : 00 +[039h 0057 3] Proximity Domain High(24) : 000000 +[03Ch 0060 4] Clock Domain : 00000000 + +[040h 0064 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[041h 0065 1] Length : 10 + +[042h 0066 1] Proximity Domain Low(8) : 01 +[043h 0067 1] Apic ID : 01 +[044h 0068 4] Flags (decoded below) : 00000001 + Enabled : 1 +[048h 0072 1] Local Sapic EID : 00 +[049h 0073 3] Proximity Domain High(24) : 000000 +[04Ch 0076 4] Clock Domain : 00000000 + +[050h 0080 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[051h 0081 1] Length : 10 + +[052h 0082 1] Proximity Domain Low(8) : 02 +[053h 0083 1] Apic ID : 02 +[054h 0084 4] Flags (decoded below) : 00000001 + Enabled : 1 +[058h 0088 1] Local Sapic EID : 00 +[059h 0089 3] Proximity Domain High(24) : 000000 +[05Ch 0092 4] Clock Domain : 00000000 + +[060h 0096 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[061h 0097 1] Length : 10 + +[062h 0098 1] Proximity Domain Low(8) : 03 +[063h 0099 1] Apic ID : 03 +[064h 0100 4] Flags (decoded below) : 00000001 + Enabled : 1 +[068h 0104 1] Local Sapic EID : 00 +[069h 0105 3] Proximity Domain High(24) : 000000 +[06Ch 0108 4] Clock Domain : 00000000 + +[070h 0112 1] Subtable Type : 01 [Memory Affinity] +[071h 0113 1] Length : 28 + +[072h 0114 4] Proximity Domain : 00000000 +[076h 0118 2] Reserved1 : 0000 +[078h 0120 8] Base Address : 0000000000000000 +[080h 0128 8] Address Length : 00000000000A0000 +[088h 0136 4] Reserved2 : 00000000 +[08Ch 0140 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[090h 0144 8] Reserved3 : 0000000000000000 + +[098h 0152 1] Subtable Type : 01 [Memory Affinity] +[099h 0153 1] Length : 28 + +[09Ah 0154 4] Proximity Domain : 00000000 +[09Eh 0158 2] Reserved1 : 0000 +[0A0h 0160 8] Base Address : 0000000000100000 +[0A8h 0168 8] Address Length : 0000000001F00000 +[0B0h 0176 4] Reserved2 : 00000000 +[0B4h 0180 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[0B8h 0184 8] Reserved3 : 0000000000000000 + +[0C0h 0192 1] Subtable Type : 01 [Memory Affinity] +[0C1h 0193 1] Length : 28 + +[0C2h 0194 4] Proximity Domain : 00000001 +[0C6h 0198 2] Reserved1 : 0000 +[0C8h 0200 8] Base Address : 0000000002000000 +[0D0h 0208 8] Address Length : 0000000002000000 +[0D8h 0216 4] Reserved2 : 00000000 +[0DCh 0220 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[0E0h 0224 8] Reserved3 : 0000000000000000 + +[0E8h 0232 1] Subtable Type : 01 [Memory Affinity] +[0E9h 0233 1] Length : 28 + +[0EAh 0234 4] Proximity Domain : 00000002 +[0EEh 0238 2] Reserved1 : 0000 +[0F0h 0240 8] Base Address : 0000000004000000 +[0F8h 0248 8] Address Length : 0000000002000000 +[100h 0256 4] Reserved2 : 00000000 +[104h 0260 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[108h 0264 8] Reserved3 : 0000000000000000 + +[110h 0272 1] Subtable Type : 01 [Memory Affinity] +[111h 0273 1] Length : 28 + +[112h 0274 4] Proximity Domain : 00000003 +[116h 0278 2] Reserved1 : 0000 +[118h 0280 8] Base Address : 0000000006000000 +[120h 0288 8] Address Length : 0000000002000000 +[128h 0296 4] Reserved2 : 00000000 +[12Ch 0300 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[130h 0304 8] Reserved3 : 0000000000000000 + +[138h 0312 1] Subtable Type : 01 [Memory Affinity] +[139h 0313 1] Length : 28 + +[13Ah 0314 4] Proximity Domain : 00000002 +[13Eh 0318 2] Reserved1 : 0000 +[140h 0320 8] Base Address : 0000000108000000 +[148h 0328 8] Address Length : 0000000008000000 +[150h 0336 4] Reserved2 : 00000000 +[154h 0340 4] Flags (decoded below) : 00000005 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 1 +[158h 0344 8] Reserved3 : 0000000000000000 + +[160h 0352 1] Subtable Type : 01 [Memory Affinity] +[161h 0353 1] Length : 28 + +[162h 0354 4] Proximity Domain : 00000003 +[166h 0358 2] Reserved1 : 0000 +[168h 0360 8] Base Address : 0000000100000000 +[170h 0368 8] Address Length : 00000000F8000000 +[178h 0376 4] Reserved2 : 00000000 +[17Ch 0380 4] Flags (decoded below) : 00000003 + Enabled : 1 + Hot Pluggable : 1 + Non-Volatile : 0 +[180h 0384 8] Reserved3 : 0000000000000000 + +Raw Table Data: Length 392 (0x188) + + 0000: 53 52 41 54 88 01 00 00 01 68 42 4F 43 48 53 20 // SRAT.....hBOCHS + 0010: 42 58 50 43 53 52 41 54 01 00 00 00 42 58 50 43 // BXPCSRAT....BXPC + 0020: 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 10 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 00 10 01 01 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0050: 00 10 02 02 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0060: 00 10 03 03 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0070: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 0080: 00 00 0A 00 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 0090: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 00A0: 00 00 10 00 00 00 00 00 00 00 F0 01 00 00 00 00 // ................ + 00B0: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00C0: 01 28 01 00 00 00 00 00 00 00 00 02 00 00 00 00 // .(.............. + 00D0: 00 00 00 02 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 00E0: 00 00 00 00 00 00 00 00 01 28 02 00 00 00 00 00 // .........(...... + 00F0: 00 00 00 04 00 00 00 00 00 00 00 02 00 00 00 00 // ................ + 0100: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0110: 01 28 03 00 00 00 00 00 00 00 00 06 00 00 00 00 // .(.............. + 0120: 00 00 00 02 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 0130: 00 00 00 00 00 00 00 00 01 28 02 00 00 00 00 00 // .........(...... + 0140: 00 00 00 08 01 00 00 00 00 00 00 08 00 00 00 00 // ................ + 0150: 00 00 00 00 05 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0160: 01 28 03 00 00 00 00 00 00 00 00 00 01 00 00 00 // .(.............. + 0170: 00 00 00 F8 00 00 00 00 00 00 00 00 03 00 00 00 // ................ + 0180: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/SRAT.dsl b/tests/data/acpi/pc/SRAT.dsl new file mode 100644 index 0000000000..77bbfebc81 --- /dev/null +++ b/tests/data/acpi/pc/SRAT.dsl @@ -0,0 +1,108 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/SRAT.numamem, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [SRAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table] +[004h 0004 4] Table Length : 000000E0 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : F5 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSRAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Table Revision : 00000001 +[028h 0040 8] Reserved : 0000000000000000 + +[030h 0048 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[031h 0049 1] Length : 10 + +[032h 0050 1] Proximity Domain Low(8) : 00 +[033h 0051 1] Apic ID : 00 +[034h 0052 4] Flags (decoded below) : 00000001 + Enabled : 1 +[038h 0056 1] Local Sapic EID : 00 +[039h 0057 3] Proximity Domain High(24) : 000000 +[03Ch 0060 4] Clock Domain : 00000000 + +[040h 0064 1] Subtable Type : 01 [Memory Affinity] +[041h 0065 1] Length : 28 + +[042h 0066 4] Proximity Domain : 00000001 +[046h 0070 2] Reserved1 : 0000 +[048h 0072 8] Base Address : 0000000000000000 +[050h 0080 8] Address Length : 00000000000A0000 +[058h 0088 4] Reserved2 : 00000000 +[05Ch 0092 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[060h 0096 8] Reserved3 : 0000000000000000 + +[068h 0104 1] Subtable Type : 01 [Memory Affinity] +[069h 0105 1] Length : 28 + +[06Ah 0106 4] Proximity Domain : 00000001 +[06Eh 0110 2] Reserved1 : 0000 +[070h 0112 8] Base Address : 0000000000100000 +[078h 0120 8] Address Length : 0000000007F00000 +[080h 0128 4] Reserved2 : 00000000 +[084h 0132 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[088h 0136 8] Reserved3 : 0000000000000000 + +[090h 0144 1] Subtable Type : 01 [Memory Affinity] +[091h 0145 1] Length : 28 + +[092h 0146 4] Proximity Domain : 00000000 +[096h 0150 2] Reserved1 : 0000 +[098h 0152 8] Base Address : 0000000000000000 +[0A0h 0160 8] Address Length : 0000000000000000 +[0A8h 0168 4] Reserved2 : 00000000 +[0ACh 0172 4] Flags (decoded below) : 00000000 + Enabled : 0 + Hot Pluggable : 0 + Non-Volatile : 0 +[0B0h 0176 8] Reserved3 : 0000000000000000 + +[0B8h 0184 1] Subtable Type : 01 [Memory Affinity] +[0B9h 0185 1] Length : 28 + +[0BAh 0186 4] Proximity Domain : 00000000 +[0BEh 0190 2] Reserved1 : 0000 +[0C0h 0192 8] Base Address : 0000000000000000 +[0C8h 0200 8] Address Length : 0000000000000000 +[0D0h 0208 4] Reserved2 : 00000000 +[0D4h 0212 4] Flags (decoded below) : 00000000 + Enabled : 0 + Hot Pluggable : 0 + Non-Volatile : 0 +[0D8h 0216 8] Reserved3 : 0000000000000000 + +Raw Table Data: Length 224 (0xE0) + + 0000: 53 52 41 54 E0 00 00 00 01 F5 42 4F 43 48 53 20 // SRAT......BOCHS + 0010: 42 58 50 43 53 52 41 54 01 00 00 00 42 58 50 43 // BXPCSRAT....BXPC + 0020: 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 10 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 01 28 01 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 0050: 00 00 0A 00 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 0060: 00 00 00 00 00 00 00 00 01 28 01 00 00 00 00 00 // .........(...... + 0070: 00 00 10 00 00 00 00 00 00 00 F0 07 00 00 00 00 // ................ + 0080: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0090: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 00A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00B0: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/SRAT.memhp.dsl b/tests/data/acpi/pc/SRAT.memhp.dsl new file mode 100644 index 0000000000..803f9c8f1a --- /dev/null +++ b/tests/data/acpi/pc/SRAT.memhp.dsl @@ -0,0 +1,125 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/SRAT.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SRAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table] +[004h 0004 4] Table Length : 00000108 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : A2 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSRAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Table Revision : 00000001 +[028h 0040 8] Reserved : 0000000000000000 + +[030h 0048 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[031h 0049 1] Length : 10 + +[032h 0050 1] Proximity Domain Low(8) : 00 +[033h 0051 1] Apic ID : 00 +[034h 0052 4] Flags (decoded below) : 00000001 + Enabled : 1 +[038h 0056 1] Local Sapic EID : 00 +[039h 0057 3] Proximity Domain High(24) : 000000 +[03Ch 0060 4] Clock Domain : 00000000 + +[040h 0064 1] Subtable Type : 01 [Memory Affinity] +[041h 0065 1] Length : 28 + +[042h 0066 4] Proximity Domain : 00000000 +[046h 0070 2] Reserved1 : 0000 +[048h 0072 8] Base Address : 0000000000000000 +[050h 0080 8] Address Length : 00000000000A0000 +[058h 0088 4] Reserved2 : 00000000 +[05Ch 0092 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[060h 0096 8] Reserved3 : 0000000000000000 + +[068h 0104 1] Subtable Type : 01 [Memory Affinity] +[069h 0105 1] Length : 28 + +[06Ah 0106 4] Proximity Domain : 00000000 +[06Eh 0110 2] Reserved1 : 0000 +[070h 0112 8] Base Address : 0000000000100000 +[078h 0120 8] Address Length : 0000000003F00000 +[080h 0128 4] Reserved2 : 00000000 +[084h 0132 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[088h 0136 8] Reserved3 : 0000000000000000 + +[090h 0144 1] Subtable Type : 01 [Memory Affinity] +[091h 0145 1] Length : 28 + +[092h 0146 4] Proximity Domain : 00000001 +[096h 0150 2] Reserved1 : 0000 +[098h 0152 8] Base Address : 0000000004000000 +[0A0h 0160 8] Address Length : 0000000004000000 +[0A8h 0168 4] Reserved2 : 00000000 +[0ACh 0172 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[0B0h 0176 8] Reserved3 : 0000000000000000 + +[0B8h 0184 1] Subtable Type : 01 [Memory Affinity] +[0B9h 0185 1] Length : 28 + +[0BAh 0186 4] Proximity Domain : 00000000 +[0BEh 0190 2] Reserved1 : 0000 +[0C0h 0192 8] Base Address : 0000000000000000 +[0C8h 0200 8] Address Length : 0000000000000000 +[0D0h 0208 4] Reserved2 : 00000000 +[0D4h 0212 4] Flags (decoded below) : 00000000 + Enabled : 0 + Hot Pluggable : 0 + Non-Volatile : 0 +[0D8h 0216 8] Reserved3 : 0000000000000000 + +[0E0h 0224 1] Subtable Type : 01 [Memory Affinity] +[0E1h 0225 1] Length : 28 + +[0E2h 0226 4] Proximity Domain : 00000001 +[0E6h 0230 2] Reserved1 : 0000 +[0E8h 0232 8] Base Address : 0000000100000000 +[0F0h 0240 8] Address Length : 00000000F8000000 +[0F8h 0248 4] Reserved2 : 00000000 +[0FCh 0252 4] Flags (decoded below) : 00000003 + Enabled : 1 + Hot Pluggable : 1 + Non-Volatile : 0 +[100h 0256 8] Reserved3 : 0000000000000000 + +Raw Table Data: Length 264 (0x108) + + 0000: 53 52 41 54 08 01 00 00 01 A2 42 4F 43 48 53 20 // SRAT......BOCHS + 0010: 42 58 50 43 53 52 41 54 01 00 00 00 42 58 50 43 // BXPCSRAT....BXPC + 0020: 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 10 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 0050: 00 00 0A 00 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 0060: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 0070: 00 00 10 00 00 00 00 00 00 00 F0 03 00 00 00 00 // ................ + 0080: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0090: 01 28 01 00 00 00 00 00 00 00 00 04 00 00 00 00 // .(.............. + 00A0: 00 00 00 04 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 00B0: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00E0: 01 28 01 00 00 00 00 00 00 00 00 00 01 00 00 00 // .(.............. + 00F0: 00 00 00 F8 00 00 00 00 00 00 00 00 03 00 00 00 // ................ + 0100: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/SRAT.numamem.dsl b/tests/data/acpi/pc/SRAT.numamem.dsl new file mode 100644 index 0000000000..74f4382dd1 --- /dev/null +++ b/tests/data/acpi/pc/SRAT.numamem.dsl @@ -0,0 +1,108 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/SRAT.numamem, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SRAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table] +[004h 0004 4] Table Length : 000000E0 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : F5 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSRAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Table Revision : 00000001 +[028h 0040 8] Reserved : 0000000000000000 + +[030h 0048 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[031h 0049 1] Length : 10 + +[032h 0050 1] Proximity Domain Low(8) : 00 +[033h 0051 1] Apic ID : 00 +[034h 0052 4] Flags (decoded below) : 00000001 + Enabled : 1 +[038h 0056 1] Local Sapic EID : 00 +[039h 0057 3] Proximity Domain High(24) : 000000 +[03Ch 0060 4] Clock Domain : 00000000 + +[040h 0064 1] Subtable Type : 01 [Memory Affinity] +[041h 0065 1] Length : 28 + +[042h 0066 4] Proximity Domain : 00000001 +[046h 0070 2] Reserved1 : 0000 +[048h 0072 8] Base Address : 0000000000000000 +[050h 0080 8] Address Length : 00000000000A0000 +[058h 0088 4] Reserved2 : 00000000 +[05Ch 0092 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[060h 0096 8] Reserved3 : 0000000000000000 + +[068h 0104 1] Subtable Type : 01 [Memory Affinity] +[069h 0105 1] Length : 28 + +[06Ah 0106 4] Proximity Domain : 00000001 +[06Eh 0110 2] Reserved1 : 0000 +[070h 0112 8] Base Address : 0000000000100000 +[078h 0120 8] Address Length : 0000000007F00000 +[080h 0128 4] Reserved2 : 00000000 +[084h 0132 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[088h 0136 8] Reserved3 : 0000000000000000 + +[090h 0144 1] Subtable Type : 01 [Memory Affinity] +[091h 0145 1] Length : 28 + +[092h 0146 4] Proximity Domain : 00000000 +[096h 0150 2] Reserved1 : 0000 +[098h 0152 8] Base Address : 0000000000000000 +[0A0h 0160 8] Address Length : 0000000000000000 +[0A8h 0168 4] Reserved2 : 00000000 +[0ACh 0172 4] Flags (decoded below) : 00000000 + Enabled : 0 + Hot Pluggable : 0 + Non-Volatile : 0 +[0B0h 0176 8] Reserved3 : 0000000000000000 + +[0B8h 0184 1] Subtable Type : 01 [Memory Affinity] +[0B9h 0185 1] Length : 28 + +[0BAh 0186 4] Proximity Domain : 00000000 +[0BEh 0190 2] Reserved1 : 0000 +[0C0h 0192 8] Base Address : 0000000000000000 +[0C8h 0200 8] Address Length : 0000000000000000 +[0D0h 0208 4] Reserved2 : 00000000 +[0D4h 0212 4] Flags (decoded below) : 00000000 + Enabled : 0 + Hot Pluggable : 0 + Non-Volatile : 0 +[0D8h 0216 8] Reserved3 : 0000000000000000 + +Raw Table Data: Length 224 (0xE0) + + 0000: 53 52 41 54 E0 00 00 00 01 F5 42 4F 43 48 53 20 // SRAT......BOCHS + 0010: 42 58 50 43 53 52 41 54 01 00 00 00 42 58 50 43 // BXPCSRAT....BXPC + 0020: 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 10 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 01 28 01 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 0050: 00 00 0A 00 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 0060: 00 00 00 00 00 00 00 00 01 28 01 00 00 00 00 00 // .........(...... + 0070: 00 00 10 00 00 00 00 00 00 00 F0 07 00 00 00 00 // ................ + 0080: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0090: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 00A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00B0: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/SSDT.dsl b/tests/data/acpi/pc/SSDT.dsl new file mode 100644 index 0000000000..abd64f6133 --- /dev/null +++ b/tests/data/acpi/pc/SSDT.dsl @@ -0,0 +1,205 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/pc/SSDT.dimmpxm, Mon Sep 28 17:24:38 2020 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x000002DE (734) + * Revision 0x01 + * Checksum 0x56 + * OEM ID "BOCHS " + * OEM Table ID "NVDIMM" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM", 0x00000001) +{ + Scope (\_SB) + { + Device (NVDR) + { + Name (_HID, "ACPI0012" /* NVDIMM Root Device */) // _HID: Hardware ID + Method (NCAL, 5, Serialized) + { + Local6 = MEMA /* \MEMA */ + OperationRegion (NPIO, SystemIO, 0x0A18, 0x04) + OperationRegion (NRAM, SystemMemory, Local6, 0x1000) + Field (NPIO, DWordAcc, NoLock, Preserve) + { + NTFI, 32 + } + + Field (NRAM, DWordAcc, NoLock, Preserve) + { + HDLE, 32, + REVS, 32, + FUNC, 32, + FARG, 32672 + } + + Field (NRAM, DWordAcc, NoLock, Preserve) + { + RLEN, 32, + ODAT, 32736 + } + + If ((Arg4 == Zero)) + { + Local0 = ToUUID ("2f10e7a4-9e91-11e4-89d3-123b93f75cba") + } + ElseIf ((Arg4 == 0x00010000)) + { + Local0 = ToUUID ("648b9cf2-cda1-4312-8ad9-49c4af32bd62") + } + Else + { + Local0 = ToUUID ("4309ac30-0d11-11e4-9191-0800200c9a66") + } + + If (((Local6 == Zero) | (Arg0 != Local0))) + { + If ((Arg2 == Zero)) + { + Return (Buffer (One) + { + 0x00 // . + }) + } + + Return (Buffer (One) + { + 0x01 // . + }) + } + + HDLE = Arg4 + REVS = Arg1 + FUNC = Arg2 + If (((ObjectType (Arg3) == 0x04) & (SizeOf (Arg3) == One))) + { + Local2 = Arg3 [Zero] + Local3 = DerefOf (Local2) + FARG = Local3 + } + + NTFI = Local6 + Local1 = (RLEN - 0x04) + If ((Local1 < 0x08)) + { + Local2 = Zero + Name (TBUF, Buffer (One) + { + 0x00 // . + }) + Local7 = Buffer (Zero){} + While ((Local2 < Local1)) + { + TBUF [Zero] = DerefOf (ODAT [Local2]) + Concatenate (Local7, TBUF, Local7) + Local2++ + } + + Return (Local7) + } + + Local1 = (Local1 << 0x03) + CreateField (ODAT, Zero, Local1, OBUF) + Return (OBUF) /* \_SB_.NVDR.NCAL.OBUF */ + } + + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + Return (NCAL (Arg0, Arg1, Arg2, Arg3, Zero)) + } + + Name (RSTA, Zero) + Method (RFIT, 1, Serialized) + { + Name (OFST, Zero) + OFST = Arg0 + Local0 = NCAL (ToUUID ("648b9cf2-cda1-4312-8ad9-49c4af32bd62"), One, One, Package (0x01) + { + OFST + }, 0x00010000) + CreateDWordField (Local0, Zero, STAU) + RSTA = STAU /* \_SB_.NVDR.RFIT.STAU */ + If ((Zero != STAU)) + { + Return (Buffer (Zero){}) + } + + Local1 = SizeOf (Local0) + Local1 -= 0x04 + If ((Local1 == Zero)) + { + Return (Buffer (Zero){}) + } + + CreateField (Local0, 0x20, (Local1 << 0x03), BUFF) + Return (BUFF) /* \_SB_.NVDR.RFIT.BUFF */ + } + + Method (_FIT, 0, Serialized) // _FIT: Firmware Interface Table + { + Local2 = Buffer (Zero){} + Local3 = Zero + While (One) + { + Local0 = RFIT (Local3) + Local1 = SizeOf (Local0) + If ((RSTA == 0x0100)) + { + Local2 = Buffer (Zero){} + Local3 = Zero + } + Else + { + If ((Local1 == Zero)) + { + Return (Local2) + } + + Local3 += Local1 + Concatenate (Local2, Local0, Local2) + } + } + } + + Device (NV00) + { + Name (_ADR, One) // _ADR: Address + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + Return (NCAL (Arg0, Arg1, Arg2, Arg3, One)) + } + } + + Device (NV01) + { + Name (_ADR, 0x02) // _ADR: Address + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + Return (NCAL (Arg0, Arg1, Arg2, Arg3, 0x02)) + } + } + + Device (NV02) + { + Name (_ADR, 0x03) // _ADR: Address + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + Return (NCAL (Arg0, Arg1, Arg2, Arg3, 0x03)) + } + } + } + } + + Name (MEMA, 0x07FFE000) +} + diff --git a/tests/data/acpi/pc/WAET.acpihmat b/tests/data/acpi/pc/WAET.acpihmat new file mode 100644 index 0000000000000000000000000000000000000000..c2240f58dff6b2f765386b5a2e506fda4800be3e GIT binary patch literal 40 ocmWG{bPds9U|?YEaPoKd2v%^42yh08F)}bPfY>0KiGhIu0IX>T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/WAET.acpihmat.dsl b/tests/data/acpi/pc/WAET.acpihmat.dsl new file mode 100644 index 0000000000..991c8773b8 --- /dev/null +++ b/tests/data/acpi/pc/WAET.acpihmat.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/WAET.acpihmat, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/pc/WAET.bridge b/tests/data/acpi/pc/WAET.bridge new file mode 100644 index 0000000000000000000000000000000000000000..c2240f58dff6b2f765386b5a2e506fda4800be3e GIT binary patch literal 40 ocmWG{bPds9U|?YEaPoKd2v%^42yh08F)}bPfY>0KiGhIu0IX>T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/WAET.bridge.dsl b/tests/data/acpi/pc/WAET.bridge.dsl new file mode 100644 index 0000000000..f47dbb17a7 --- /dev/null +++ b/tests/data/acpi/pc/WAET.bridge.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/WAET.bridge, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/pc/WAET.cphp b/tests/data/acpi/pc/WAET.cphp new file mode 100644 index 0000000000000000000000000000000000000000..c2240f58dff6b2f765386b5a2e506fda4800be3e GIT binary patch literal 40 ocmWG{bPds9U|?YEaPoKd2v%^42yh08F)}bPfY>0KiGhIu0IX>T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/WAET.cphp.dsl b/tests/data/acpi/pc/WAET.cphp.dsl new file mode 100644 index 0000000000..ff077a14eb --- /dev/null +++ b/tests/data/acpi/pc/WAET.cphp.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/WAET.cphp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/pc/WAET.dimmpxm b/tests/data/acpi/pc/WAET.dimmpxm new file mode 100644 index 0000000000000000000000000000000000000000..c2240f58dff6b2f765386b5a2e506fda4800be3e GIT binary patch literal 40 ocmWG{bPds9U|?YEaPoKd2v%^42yh08F)}bPfY>0KiGhIu0IX>T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/WAET.dimmpxm.dsl b/tests/data/acpi/pc/WAET.dimmpxm.dsl new file mode 100644 index 0000000000..b8192c8601 --- /dev/null +++ b/tests/data/acpi/pc/WAET.dimmpxm.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/WAET.dimmpxm, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/pc/WAET.dsl b/tests/data/acpi/pc/WAET.dsl new file mode 100644 index 0000000000..53b6c1dc42 --- /dev/null +++ b/tests/data/acpi/pc/WAET.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/WAET.roothp, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/pc/WAET.hpbridge b/tests/data/acpi/pc/WAET.hpbridge new file mode 100644 index 0000000000000000000000000000000000000000..c2240f58dff6b2f765386b5a2e506fda4800be3e GIT binary patch literal 40 ocmWG{bPds9U|?YEaPoKd2v%^42yh08F)}bPfY>0KiGhIu0IX>T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/WAET.ipmikcs b/tests/data/acpi/pc/WAET.ipmikcs new file mode 100644 index 0000000000000000000000000000000000000000..c2240f58dff6b2f765386b5a2e506fda4800be3e GIT binary patch literal 40 ocmWG{bPds9U|?YEaPoKd2v%^42yh08F)}bPfY>0KiGhIu0IX>T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/WAET.ipmikcs.dsl b/tests/data/acpi/pc/WAET.ipmikcs.dsl new file mode 100644 index 0000000000..5144bada0f --- /dev/null +++ b/tests/data/acpi/pc/WAET.ipmikcs.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/WAET.ipmikcs, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/pc/WAET.memhp b/tests/data/acpi/pc/WAET.memhp new file mode 100644 index 0000000000000000000000000000000000000000..c2240f58dff6b2f765386b5a2e506fda4800be3e GIT binary patch literal 40 ocmWG{bPds9U|?YEaPoKd2v%^42yh08F)}bPfY>0KiGhIu0IX>T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/WAET.memhp.dsl b/tests/data/acpi/pc/WAET.memhp.dsl new file mode 100644 index 0000000000..bfe3a036d7 --- /dev/null +++ b/tests/data/acpi/pc/WAET.memhp.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/WAET.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/pc/WAET.numamem b/tests/data/acpi/pc/WAET.numamem new file mode 100644 index 0000000000000000000000000000000000000000..c2240f58dff6b2f765386b5a2e506fda4800be3e GIT binary patch literal 40 ocmWG{bPds9U|?YEaPoKd2v%^42yh08F)}bPfY>0KiGhIu0IX>T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/pc/WAET.numamem.dsl b/tests/data/acpi/pc/WAET.numamem.dsl new file mode 100644 index 0000000000..e4c6cf4bf8 --- /dev/null +++ b/tests/data/acpi/pc/WAET.numamem.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/WAET.numamem, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/pc/WAET.roothp b/tests/data/acpi/pc/WAET.roothp new file mode 100644 index 0000000000000000000000000000000000000000..c2240f58dff6b2f765386b5a2e506fda4800be3e GIT binary patch literal 40 ocmWG{bPds9U|?YEaPoKd2v%^42yh08F)}bPfY>0KiGhIu0IX>T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/APIC.acpihmat.dsl b/tests/data/acpi/q35/APIC.acpihmat.dsl new file mode 100644 index 0000000000..5fe9fb4669 --- /dev/null +++ b/tests/data/acpi/q35/APIC.acpihmat.dsl @@ -0,0 +1,112 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/APIC.acpihmat, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 00000080 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : DA +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 00 [Processor Local APIC] +[035h 0053 1] Length : 08 +[036h 0054 1] Processor ID : 01 +[037h 0055 1] Local Apic ID : 01 +[038h 0056 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[03Ch 0060 1] Subtable Type : 01 [I/O APIC] +[03Dh 0061 1] Length : 0C +[03Eh 0062 1] I/O Apic ID : 00 +[03Fh 0063 1] Reserved : 00 +[040h 0064 4] Address : FEC00000 +[044h 0068 4] Interrupt : 00000000 + +[048h 0072 1] Subtable Type : 02 [Interrupt Source Override] +[049h 0073 1] Length : 0A +[04Ah 0074 1] Bus : 00 +[04Bh 0075 1] Source : 00 +[04Ch 0076 4] Interrupt : 00000002 +[050h 0080 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[052h 0082 1] Subtable Type : 02 [Interrupt Source Override] +[053h 0083 1] Length : 0A +[054h 0084 1] Bus : 00 +[055h 0085 1] Source : 05 +[056h 0086 4] Interrupt : 00000005 +[05Ah 0090 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[05Ch 0092 1] Subtable Type : 02 [Interrupt Source Override] +[05Dh 0093 1] Length : 0A +[05Eh 0094 1] Bus : 00 +[05Fh 0095 1] Source : 09 +[060h 0096 4] Interrupt : 00000009 +[064h 0100 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[066h 0102 1] Subtable Type : 02 [Interrupt Source Override] +[067h 0103 1] Length : 0A +[068h 0104 1] Bus : 00 +[069h 0105 1] Source : 0A +[06Ah 0106 4] Interrupt : 0000000A +[06Eh 0110 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[070h 0112 1] Subtable Type : 02 [Interrupt Source Override] +[071h 0113 1] Length : 0A +[072h 0114 1] Bus : 00 +[073h 0115 1] Source : 0B +[074h 0116 4] Interrupt : 0000000B +[078h 0120 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[07Ah 0122 1] Subtable Type : 04 [Local APIC NMI] +[07Bh 0123 1] Length : 06 +[07Ch 0124 1] Processor ID : FF +[07Dh 0125 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[07Fh 0127 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 128 (0x80) + + 0000: 41 50 49 43 80 00 00 00 01 DA 42 4F 43 48 53 20 // APIC......BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 00 08 01 01 01 00 00 00 01 0C 00 00 // ................ + 0040: 00 00 C0 FE 00 00 00 00 02 0A 00 00 02 00 00 00 // ................ + 0050: 00 00 02 0A 00 05 05 00 00 00 0D 00 02 0A 00 09 // ................ + 0060: 09 00 00 00 0D 00 02 0A 00 0A 0A 00 00 00 0D 00 // ................ + 0070: 02 0A 00 0B 0B 00 00 00 0D 00 04 06 FF 00 00 01 // ................ diff --git a/tests/data/acpi/q35/APIC.bridge b/tests/data/acpi/q35/APIC.bridge new file mode 100644 index 0000000000000000000000000000000000000000..84509e0ae4cabeb5ead3e42a4edfa50abddbc17d GIT binary patch literal 120 zcmZ<^@N}+VU|?W;>*Vk35v<@85#S6GV`N}p0I@+d1H*%VV48!00Yo$MFfcGM9QX$! onYb7jm_Q5$CN2h6Rt5$JUJ#3u6UO4=g0Z-{!7LWG{|pR_06i!T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/APIC.bridge.dsl b/tests/data/acpi/q35/APIC.bridge.dsl new file mode 100644 index 0000000000..2489067401 --- /dev/null +++ b/tests/data/acpi/q35/APIC.bridge.dsl @@ -0,0 +1,104 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/APIC.bridge, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 00000078 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : ED +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 01 [I/O APIC] +[035h 0053 1] Length : 0C +[036h 0054 1] I/O Apic ID : 00 +[037h 0055 1] Reserved : 00 +[038h 0056 4] Address : FEC00000 +[03Ch 0060 4] Interrupt : 00000000 + +[040h 0064 1] Subtable Type : 02 [Interrupt Source Override] +[041h 0065 1] Length : 0A +[042h 0066 1] Bus : 00 +[043h 0067 1] Source : 00 +[044h 0068 4] Interrupt : 00000002 +[048h 0072 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[04Ah 0074 1] Subtable Type : 02 [Interrupt Source Override] +[04Bh 0075 1] Length : 0A +[04Ch 0076 1] Bus : 00 +[04Dh 0077 1] Source : 05 +[04Eh 0078 4] Interrupt : 00000005 +[052h 0082 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[054h 0084 1] Subtable Type : 02 [Interrupt Source Override] +[055h 0085 1] Length : 0A +[056h 0086 1] Bus : 00 +[057h 0087 1] Source : 09 +[058h 0088 4] Interrupt : 00000009 +[05Ch 0092 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[05Eh 0094 1] Subtable Type : 02 [Interrupt Source Override] +[05Fh 0095 1] Length : 0A +[060h 0096 1] Bus : 00 +[061h 0097 1] Source : 0A +[062h 0098 4] Interrupt : 0000000A +[066h 0102 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[068h 0104 1] Subtable Type : 02 [Interrupt Source Override] +[069h 0105 1] Length : 0A +[06Ah 0106 1] Bus : 00 +[06Bh 0107 1] Source : 0B +[06Ch 0108 4] Interrupt : 0000000B +[070h 0112 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[072h 0114 1] Subtable Type : 04 [Local APIC NMI] +[073h 0115 1] Length : 06 +[074h 0116 1] Processor ID : FF +[075h 0117 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[077h 0119 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 120 (0x78) + + 0000: 41 50 49 43 78 00 00 00 01 ED 42 4F 43 48 53 20 // APICx.....BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 // ................ + 0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00 // ................ + 0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A // ................ + 0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00 // ................ + 0070: 0D 00 04 06 FF 00 00 01 // ........ diff --git a/tests/data/acpi/q35/APIC.cphp.dsl b/tests/data/acpi/q35/APIC.cphp.dsl new file mode 100644 index 0000000000..be8daf5f80 --- /dev/null +++ b/tests/data/acpi/q35/APIC.cphp.dsl @@ -0,0 +1,146 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/APIC.cphp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 000000A0 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 7B +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 00 [Processor Local APIC] +[035h 0053 1] Length : 08 +[036h 0054 1] Processor ID : 01 +[037h 0055 1] Local Apic ID : 01 +[038h 0056 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[03Ch 0060 1] Subtable Type : 00 [Processor Local APIC] +[03Dh 0061 1] Length : 08 +[03Eh 0062 1] Processor ID : 02 +[03Fh 0063 1] Local Apic ID : 02 +[040h 0064 4] Flags (decoded below) : 00000000 + Processor Enabled : 0 + Runtime Online Capable : 0 + +[044h 0068 1] Subtable Type : 00 [Processor Local APIC] +[045h 0069 1] Length : 08 +[046h 0070 1] Processor ID : 03 +[047h 0071 1] Local Apic ID : 04 +[048h 0072 4] Flags (decoded below) : 00000000 + Processor Enabled : 0 + Runtime Online Capable : 0 + +[04Ch 0076 1] Subtable Type : 00 [Processor Local APIC] +[04Dh 0077 1] Length : 08 +[04Eh 0078 1] Processor ID : 04 +[04Fh 0079 1] Local Apic ID : 05 +[050h 0080 4] Flags (decoded below) : 00000000 + Processor Enabled : 0 + Runtime Online Capable : 0 + +[054h 0084 1] Subtable Type : 00 [Processor Local APIC] +[055h 0085 1] Length : 08 +[056h 0086 1] Processor ID : 05 +[057h 0087 1] Local Apic ID : 06 +[058h 0088 4] Flags (decoded below) : 00000000 + Processor Enabled : 0 + Runtime Online Capable : 0 + +[05Ch 0092 1] Subtable Type : 01 [I/O APIC] +[05Dh 0093 1] Length : 0C +[05Eh 0094 1] I/O Apic ID : 00 +[05Fh 0095 1] Reserved : 00 +[060h 0096 4] Address : FEC00000 +[064h 0100 4] Interrupt : 00000000 + +[068h 0104 1] Subtable Type : 02 [Interrupt Source Override] +[069h 0105 1] Length : 0A +[06Ah 0106 1] Bus : 00 +[06Bh 0107 1] Source : 00 +[06Ch 0108 4] Interrupt : 00000002 +[070h 0112 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[072h 0114 1] Subtable Type : 02 [Interrupt Source Override] +[073h 0115 1] Length : 0A +[074h 0116 1] Bus : 00 +[075h 0117 1] Source : 05 +[076h 0118 4] Interrupt : 00000005 +[07Ah 0122 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[07Ch 0124 1] Subtable Type : 02 [Interrupt Source Override] +[07Dh 0125 1] Length : 0A +[07Eh 0126 1] Bus : 00 +[07Fh 0127 1] Source : 09 +[080h 0128 4] Interrupt : 00000009 +[084h 0132 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[086h 0134 1] Subtable Type : 02 [Interrupt Source Override] +[087h 0135 1] Length : 0A +[088h 0136 1] Bus : 00 +[089h 0137 1] Source : 0A +[08Ah 0138 4] Interrupt : 0000000A +[08Eh 0142 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[090h 0144 1] Subtable Type : 02 [Interrupt Source Override] +[091h 0145 1] Length : 0A +[092h 0146 1] Bus : 00 +[093h 0147 1] Source : 0B +[094h 0148 4] Interrupt : 0000000B +[098h 0152 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[09Ah 0154 1] Subtable Type : 04 [Local APIC NMI] +[09Bh 0155 1] Length : 06 +[09Ch 0156 1] Processor ID : FF +[09Dh 0157 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[09Fh 0159 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 160 (0xA0) + + 0000: 41 50 49 43 A0 00 00 00 01 7B 42 4F 43 48 53 20 // APIC.....{BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 00 08 01 01 01 00 00 00 00 08 02 02 // ................ + 0040: 00 00 00 00 00 08 03 04 00 00 00 00 00 08 04 05 // ................ + 0050: 00 00 00 00 00 08 05 06 00 00 00 00 01 0C 00 00 // ................ + 0060: 00 00 C0 FE 00 00 00 00 02 0A 00 00 02 00 00 00 // ................ + 0070: 00 00 02 0A 00 05 05 00 00 00 0D 00 02 0A 00 09 // ................ + 0080: 09 00 00 00 0D 00 02 0A 00 0A 0A 00 00 00 0D 00 // ................ + 0090: 02 0A 00 0B 0B 00 00 00 0D 00 04 06 FF 00 00 01 // ................ diff --git a/tests/data/acpi/q35/APIC.dimmpxm.dsl b/tests/data/acpi/q35/APIC.dimmpxm.dsl new file mode 100644 index 0000000000..798ab91bed --- /dev/null +++ b/tests/data/acpi/q35/APIC.dimmpxm.dsl @@ -0,0 +1,129 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/APIC.dimmpxm, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 00000090 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : AE +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 00 [Processor Local APIC] +[035h 0053 1] Length : 08 +[036h 0054 1] Processor ID : 01 +[037h 0055 1] Local Apic ID : 01 +[038h 0056 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[03Ch 0060 1] Subtable Type : 00 [Processor Local APIC] +[03Dh 0061 1] Length : 08 +[03Eh 0062 1] Processor ID : 02 +[03Fh 0063 1] Local Apic ID : 02 +[040h 0064 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[044h 0068 1] Subtable Type : 00 [Processor Local APIC] +[045h 0069 1] Length : 08 +[046h 0070 1] Processor ID : 03 +[047h 0071 1] Local Apic ID : 03 +[048h 0072 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[04Ch 0076 1] Subtable Type : 01 [I/O APIC] +[04Dh 0077 1] Length : 0C +[04Eh 0078 1] I/O Apic ID : 00 +[04Fh 0079 1] Reserved : 00 +[050h 0080 4] Address : FEC00000 +[054h 0084 4] Interrupt : 00000000 + +[058h 0088 1] Subtable Type : 02 [Interrupt Source Override] +[059h 0089 1] Length : 0A +[05Ah 0090 1] Bus : 00 +[05Bh 0091 1] Source : 00 +[05Ch 0092 4] Interrupt : 00000002 +[060h 0096 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[062h 0098 1] Subtable Type : 02 [Interrupt Source Override] +[063h 0099 1] Length : 0A +[064h 0100 1] Bus : 00 +[065h 0101 1] Source : 05 +[066h 0102 4] Interrupt : 00000005 +[06Ah 0106 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[06Ch 0108 1] Subtable Type : 02 [Interrupt Source Override] +[06Dh 0109 1] Length : 0A +[06Eh 0110 1] Bus : 00 +[06Fh 0111 1] Source : 09 +[070h 0112 4] Interrupt : 00000009 +[074h 0116 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[076h 0118 1] Subtable Type : 02 [Interrupt Source Override] +[077h 0119 1] Length : 0A +[078h 0120 1] Bus : 00 +[079h 0121 1] Source : 0A +[07Ah 0122 4] Interrupt : 0000000A +[07Eh 0126 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[080h 0128 1] Subtable Type : 02 [Interrupt Source Override] +[081h 0129 1] Length : 0A +[082h 0130 1] Bus : 00 +[083h 0131 1] Source : 0B +[084h 0132 4] Interrupt : 0000000B +[088h 0136 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[08Ah 0138 1] Subtable Type : 04 [Local APIC NMI] +[08Bh 0139 1] Length : 06 +[08Ch 0140 1] Processor ID : FF +[08Dh 0141 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[08Fh 0143 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 144 (0x90) + + 0000: 41 50 49 43 90 00 00 00 01 AE 42 4F 43 48 53 20 // APIC......BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 00 08 01 01 01 00 00 00 00 08 02 02 // ................ + 0040: 01 00 00 00 00 08 03 03 01 00 00 00 01 0C 00 00 // ................ + 0050: 00 00 C0 FE 00 00 00 00 02 0A 00 00 02 00 00 00 // ................ + 0060: 00 00 02 0A 00 05 05 00 00 00 0D 00 02 0A 00 09 // ................ + 0070: 09 00 00 00 0D 00 02 0A 00 0A 0A 00 00 00 0D 00 // ................ + 0080: 02 0A 00 0B 0B 00 00 00 0D 00 04 06 FF 00 00 01 // ................ diff --git a/tests/data/acpi/q35/APIC.dsl b/tests/data/acpi/q35/APIC.dsl new file mode 100644 index 0000000000..77d2d2c0a5 --- /dev/null +++ b/tests/data/acpi/q35/APIC.dsl @@ -0,0 +1,104 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/APIC.tis, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 00000078 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : ED +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 01 [I/O APIC] +[035h 0053 1] Length : 0C +[036h 0054 1] I/O Apic ID : 00 +[037h 0055 1] Reserved : 00 +[038h 0056 4] Address : FEC00000 +[03Ch 0060 4] Interrupt : 00000000 + +[040h 0064 1] Subtable Type : 02 [Interrupt Source Override] +[041h 0065 1] Length : 0A +[042h 0066 1] Bus : 00 +[043h 0067 1] Source : 00 +[044h 0068 4] Interrupt : 00000002 +[048h 0072 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[04Ah 0074 1] Subtable Type : 02 [Interrupt Source Override] +[04Bh 0075 1] Length : 0A +[04Ch 0076 1] Bus : 00 +[04Dh 0077 1] Source : 05 +[04Eh 0078 4] Interrupt : 00000005 +[052h 0082 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[054h 0084 1] Subtable Type : 02 [Interrupt Source Override] +[055h 0085 1] Length : 0A +[056h 0086 1] Bus : 00 +[057h 0087 1] Source : 09 +[058h 0088 4] Interrupt : 00000009 +[05Ch 0092 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[05Eh 0094 1] Subtable Type : 02 [Interrupt Source Override] +[05Fh 0095 1] Length : 0A +[060h 0096 1] Bus : 00 +[061h 0097 1] Source : 0A +[062h 0098 4] Interrupt : 0000000A +[066h 0102 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[068h 0104 1] Subtable Type : 02 [Interrupt Source Override] +[069h 0105 1] Length : 0A +[06Ah 0106 1] Bus : 00 +[06Bh 0107 1] Source : 0B +[06Ch 0108 4] Interrupt : 0000000B +[070h 0112 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[072h 0114 1] Subtable Type : 04 [Local APIC NMI] +[073h 0115 1] Length : 06 +[074h 0116 1] Processor ID : FF +[075h 0117 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[077h 0119 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 120 (0x78) + + 0000: 41 50 49 43 78 00 00 00 01 ED 42 4F 43 48 53 20 // APICx.....BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 // ................ + 0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00 // ................ + 0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A // ................ + 0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00 // ................ + 0070: 0D 00 04 06 FF 00 00 01 // ........ diff --git a/tests/data/acpi/q35/APIC.ipmibt b/tests/data/acpi/q35/APIC.ipmibt new file mode 100644 index 0000000000000000000000000000000000000000..84509e0ae4cabeb5ead3e42a4edfa50abddbc17d GIT binary patch literal 120 zcmZ<^@N}+VU|?W;>*Vk35v<@85#S6GV`N}p0I@+d1H*%VV48!00Yo$MFfcGM9QX$! onYb7jm_Q5$CN2h6Rt5$JUJ#3u6UO4=g0Z-{!7LWG{|pR_06i!T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/APIC.ipmibt.dsl b/tests/data/acpi/q35/APIC.ipmibt.dsl new file mode 100644 index 0000000000..127e21e2fe --- /dev/null +++ b/tests/data/acpi/q35/APIC.ipmibt.dsl @@ -0,0 +1,104 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/APIC.ipmibt, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 00000078 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : ED +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 01 [I/O APIC] +[035h 0053 1] Length : 0C +[036h 0054 1] I/O Apic ID : 00 +[037h 0055 1] Reserved : 00 +[038h 0056 4] Address : FEC00000 +[03Ch 0060 4] Interrupt : 00000000 + +[040h 0064 1] Subtable Type : 02 [Interrupt Source Override] +[041h 0065 1] Length : 0A +[042h 0066 1] Bus : 00 +[043h 0067 1] Source : 00 +[044h 0068 4] Interrupt : 00000002 +[048h 0072 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[04Ah 0074 1] Subtable Type : 02 [Interrupt Source Override] +[04Bh 0075 1] Length : 0A +[04Ch 0076 1] Bus : 00 +[04Dh 0077 1] Source : 05 +[04Eh 0078 4] Interrupt : 00000005 +[052h 0082 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[054h 0084 1] Subtable Type : 02 [Interrupt Source Override] +[055h 0085 1] Length : 0A +[056h 0086 1] Bus : 00 +[057h 0087 1] Source : 09 +[058h 0088 4] Interrupt : 00000009 +[05Ch 0092 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[05Eh 0094 1] Subtable Type : 02 [Interrupt Source Override] +[05Fh 0095 1] Length : 0A +[060h 0096 1] Bus : 00 +[061h 0097 1] Source : 0A +[062h 0098 4] Interrupt : 0000000A +[066h 0102 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[068h 0104 1] Subtable Type : 02 [Interrupt Source Override] +[069h 0105 1] Length : 0A +[06Ah 0106 1] Bus : 00 +[06Bh 0107 1] Source : 0B +[06Ch 0108 4] Interrupt : 0000000B +[070h 0112 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[072h 0114 1] Subtable Type : 04 [Local APIC NMI] +[073h 0115 1] Length : 06 +[074h 0116 1] Processor ID : FF +[075h 0117 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[077h 0119 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 120 (0x78) + + 0000: 41 50 49 43 78 00 00 00 01 ED 42 4F 43 48 53 20 // APICx.....BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 // ................ + 0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00 // ................ + 0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A // ................ + 0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00 // ................ + 0070: 0D 00 04 06 FF 00 00 01 // ........ diff --git a/tests/data/acpi/q35/APIC.memhp b/tests/data/acpi/q35/APIC.memhp new file mode 100644 index 0000000000000000000000000000000000000000..84509e0ae4cabeb5ead3e42a4edfa50abddbc17d GIT binary patch literal 120 zcmZ<^@N}+VU|?W;>*Vk35v<@85#S6GV`N}p0I@+d1H*%VV48!00Yo$MFfcGM9QX$! onYb7jm_Q5$CN2h6Rt5$JUJ#3u6UO4=g0Z-{!7LWG{|pR_06i!T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/APIC.memhp.dsl b/tests/data/acpi/q35/APIC.memhp.dsl new file mode 100644 index 0000000000..1c0cb1dad1 --- /dev/null +++ b/tests/data/acpi/q35/APIC.memhp.dsl @@ -0,0 +1,104 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/APIC.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 00000078 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : ED +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 01 [I/O APIC] +[035h 0053 1] Length : 0C +[036h 0054 1] I/O Apic ID : 00 +[037h 0055 1] Reserved : 00 +[038h 0056 4] Address : FEC00000 +[03Ch 0060 4] Interrupt : 00000000 + +[040h 0064 1] Subtable Type : 02 [Interrupt Source Override] +[041h 0065 1] Length : 0A +[042h 0066 1] Bus : 00 +[043h 0067 1] Source : 00 +[044h 0068 4] Interrupt : 00000002 +[048h 0072 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[04Ah 0074 1] Subtable Type : 02 [Interrupt Source Override] +[04Bh 0075 1] Length : 0A +[04Ch 0076 1] Bus : 00 +[04Dh 0077 1] Source : 05 +[04Eh 0078 4] Interrupt : 00000005 +[052h 0082 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[054h 0084 1] Subtable Type : 02 [Interrupt Source Override] +[055h 0085 1] Length : 0A +[056h 0086 1] Bus : 00 +[057h 0087 1] Source : 09 +[058h 0088 4] Interrupt : 00000009 +[05Ch 0092 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[05Eh 0094 1] Subtable Type : 02 [Interrupt Source Override] +[05Fh 0095 1] Length : 0A +[060h 0096 1] Bus : 00 +[061h 0097 1] Source : 0A +[062h 0098 4] Interrupt : 0000000A +[066h 0102 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[068h 0104 1] Subtable Type : 02 [Interrupt Source Override] +[069h 0105 1] Length : 0A +[06Ah 0106 1] Bus : 00 +[06Bh 0107 1] Source : 0B +[06Ch 0108 4] Interrupt : 0000000B +[070h 0112 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[072h 0114 1] Subtable Type : 04 [Local APIC NMI] +[073h 0115 1] Length : 06 +[074h 0116 1] Processor ID : FF +[075h 0117 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[077h 0119 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 120 (0x78) + + 0000: 41 50 49 43 78 00 00 00 01 ED 42 4F 43 48 53 20 // APICx.....BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 // ................ + 0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00 // ................ + 0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A // ................ + 0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00 // ................ + 0070: 0D 00 04 06 FF 00 00 01 // ........ diff --git a/tests/data/acpi/q35/APIC.mmio64 b/tests/data/acpi/q35/APIC.mmio64 new file mode 100644 index 0000000000000000000000000000000000000000..84509e0ae4cabeb5ead3e42a4edfa50abddbc17d GIT binary patch literal 120 zcmZ<^@N}+VU|?W;>*Vk35v<@85#S6GV`N}p0I@+d1H*%VV48!00Yo$MFfcGM9QX$! onYb7jm_Q5$CN2h6Rt5$JUJ#3u6UO4=g0Z-{!7LWG{|pR_06i!T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/APIC.mmio64.dsl b/tests/data/acpi/q35/APIC.mmio64.dsl new file mode 100644 index 0000000000..9a3df90766 --- /dev/null +++ b/tests/data/acpi/q35/APIC.mmio64.dsl @@ -0,0 +1,104 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/APIC.mmio64, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 00000078 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : ED +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 01 [I/O APIC] +[035h 0053 1] Length : 0C +[036h 0054 1] I/O Apic ID : 00 +[037h 0055 1] Reserved : 00 +[038h 0056 4] Address : FEC00000 +[03Ch 0060 4] Interrupt : 00000000 + +[040h 0064 1] Subtable Type : 02 [Interrupt Source Override] +[041h 0065 1] Length : 0A +[042h 0066 1] Bus : 00 +[043h 0067 1] Source : 00 +[044h 0068 4] Interrupt : 00000002 +[048h 0072 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[04Ah 0074 1] Subtable Type : 02 [Interrupt Source Override] +[04Bh 0075 1] Length : 0A +[04Ch 0076 1] Bus : 00 +[04Dh 0077 1] Source : 05 +[04Eh 0078 4] Interrupt : 00000005 +[052h 0082 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[054h 0084 1] Subtable Type : 02 [Interrupt Source Override] +[055h 0085 1] Length : 0A +[056h 0086 1] Bus : 00 +[057h 0087 1] Source : 09 +[058h 0088 4] Interrupt : 00000009 +[05Ch 0092 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[05Eh 0094 1] Subtable Type : 02 [Interrupt Source Override] +[05Fh 0095 1] Length : 0A +[060h 0096 1] Bus : 00 +[061h 0097 1] Source : 0A +[062h 0098 4] Interrupt : 0000000A +[066h 0102 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[068h 0104 1] Subtable Type : 02 [Interrupt Source Override] +[069h 0105 1] Length : 0A +[06Ah 0106 1] Bus : 00 +[06Bh 0107 1] Source : 0B +[06Ch 0108 4] Interrupt : 0000000B +[070h 0112 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[072h 0114 1] Subtable Type : 04 [Local APIC NMI] +[073h 0115 1] Length : 06 +[074h 0116 1] Processor ID : FF +[075h 0117 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[077h 0119 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 120 (0x78) + + 0000: 41 50 49 43 78 00 00 00 01 ED 42 4F 43 48 53 20 // APICx.....BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 // ................ + 0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00 // ................ + 0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A // ................ + 0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00 // ................ + 0070: 0D 00 04 06 FF 00 00 01 // ........ diff --git a/tests/data/acpi/q35/APIC.numamem b/tests/data/acpi/q35/APIC.numamem new file mode 100644 index 0000000000000000000000000000000000000000..84509e0ae4cabeb5ead3e42a4edfa50abddbc17d GIT binary patch literal 120 zcmZ<^@N}+VU|?W;>*Vk35v<@85#S6GV`N}p0I@+d1H*%VV48!00Yo$MFfcGM9QX$! onYb7jm_Q5$CN2h6Rt5$JUJ#3u6UO4=g0Z-{!7LWG{|pR_06i!T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/APIC.numamem.dsl b/tests/data/acpi/q35/APIC.numamem.dsl new file mode 100644 index 0000000000..f4c5480fd6 --- /dev/null +++ b/tests/data/acpi/q35/APIC.numamem.dsl @@ -0,0 +1,104 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/APIC.numamem, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 00000078 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : ED +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 01 [I/O APIC] +[035h 0053 1] Length : 0C +[036h 0054 1] I/O Apic ID : 00 +[037h 0055 1] Reserved : 00 +[038h 0056 4] Address : FEC00000 +[03Ch 0060 4] Interrupt : 00000000 + +[040h 0064 1] Subtable Type : 02 [Interrupt Source Override] +[041h 0065 1] Length : 0A +[042h 0066 1] Bus : 00 +[043h 0067 1] Source : 00 +[044h 0068 4] Interrupt : 00000002 +[048h 0072 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[04Ah 0074 1] Subtable Type : 02 [Interrupt Source Override] +[04Bh 0075 1] Length : 0A +[04Ch 0076 1] Bus : 00 +[04Dh 0077 1] Source : 05 +[04Eh 0078 4] Interrupt : 00000005 +[052h 0082 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[054h 0084 1] Subtable Type : 02 [Interrupt Source Override] +[055h 0085 1] Length : 0A +[056h 0086 1] Bus : 00 +[057h 0087 1] Source : 09 +[058h 0088 4] Interrupt : 00000009 +[05Ch 0092 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[05Eh 0094 1] Subtable Type : 02 [Interrupt Source Override] +[05Fh 0095 1] Length : 0A +[060h 0096 1] Bus : 00 +[061h 0097 1] Source : 0A +[062h 0098 4] Interrupt : 0000000A +[066h 0102 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[068h 0104 1] Subtable Type : 02 [Interrupt Source Override] +[069h 0105 1] Length : 0A +[06Ah 0106 1] Bus : 00 +[06Bh 0107 1] Source : 0B +[06Ch 0108 4] Interrupt : 0000000B +[070h 0112 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[072h 0114 1] Subtable Type : 04 [Local APIC NMI] +[073h 0115 1] Length : 06 +[074h 0116 1] Processor ID : FF +[075h 0117 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[077h 0119 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 120 (0x78) + + 0000: 41 50 49 43 78 00 00 00 01 ED 42 4F 43 48 53 20 // APICx.....BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 // ................ + 0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00 // ................ + 0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A // ................ + 0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00 // ................ + 0070: 0D 00 04 06 FF 00 00 01 // ........ diff --git a/tests/data/acpi/q35/APIC.tis b/tests/data/acpi/q35/APIC.tis new file mode 100644 index 0000000000000000000000000000000000000000..84509e0ae4cabeb5ead3e42a4edfa50abddbc17d GIT binary patch literal 120 zcmZ<^@N}+VU|?W;>*Vk35v<@85#S6GV`N}p0I@+d1H*%VV48!00Yo$MFfcGM9QX$! onYb7jm_Q5$CN2h6Rt5$JUJ#3u6UO4=g0Z-{!7LWG{|pR_06i!T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/APIC.tis.dsl b/tests/data/acpi/q35/APIC.tis.dsl new file mode 100644 index 0000000000..ca2373818e --- /dev/null +++ b/tests/data/acpi/q35/APIC.tis.dsl @@ -0,0 +1,104 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/APIC.tis, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 00000078 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : ED +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 01 [I/O APIC] +[035h 0053 1] Length : 0C +[036h 0054 1] I/O Apic ID : 00 +[037h 0055 1] Reserved : 00 +[038h 0056 4] Address : FEC00000 +[03Ch 0060 4] Interrupt : 00000000 + +[040h 0064 1] Subtable Type : 02 [Interrupt Source Override] +[041h 0065 1] Length : 0A +[042h 0066 1] Bus : 00 +[043h 0067 1] Source : 00 +[044h 0068 4] Interrupt : 00000002 +[048h 0072 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[04Ah 0074 1] Subtable Type : 02 [Interrupt Source Override] +[04Bh 0075 1] Length : 0A +[04Ch 0076 1] Bus : 00 +[04Dh 0077 1] Source : 05 +[04Eh 0078 4] Interrupt : 00000005 +[052h 0082 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[054h 0084 1] Subtable Type : 02 [Interrupt Source Override] +[055h 0085 1] Length : 0A +[056h 0086 1] Bus : 00 +[057h 0087 1] Source : 09 +[058h 0088 4] Interrupt : 00000009 +[05Ch 0092 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[05Eh 0094 1] Subtable Type : 02 [Interrupt Source Override] +[05Fh 0095 1] Length : 0A +[060h 0096 1] Bus : 00 +[061h 0097 1] Source : 0A +[062h 0098 4] Interrupt : 0000000A +[066h 0102 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[068h 0104 1] Subtable Type : 02 [Interrupt Source Override] +[069h 0105 1] Length : 0A +[06Ah 0106 1] Bus : 00 +[06Bh 0107 1] Source : 0B +[06Ch 0108 4] Interrupt : 0000000B +[070h 0112 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[072h 0114 1] Subtable Type : 04 [Local APIC NMI] +[073h 0115 1] Length : 06 +[074h 0116 1] Processor ID : FF +[075h 0117 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[077h 0119 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 120 (0x78) + + 0000: 41 50 49 43 78 00 00 00 01 ED 42 4F 43 48 53 20 // APICx.....BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 // ................ + 0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00 // ................ + 0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A // ................ + 0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00 // ................ + 0070: 0D 00 04 06 FF 00 00 01 // ........ diff --git a/tests/data/acpi/q35/DSDT b/tests/data/acpi/q35/DSDT index d6c26940b1a68d4184f6f2335924099aa28b130a..e7414e78563372fca4d2aab9d16c58c0ff8468f4 100644 GIT binary patch delta 33 ocmexk^TmeCCD-hQE4NWiX5jKOH6#QQ@nuPWD7Z40H)^%$^ZZW delta 42 xcmexj^T&qECD>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x001F0000) // _ADR: Address + OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Name (PICF, Zero) + Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model + { + PICF = Arg0 + } + + Scope (_SB) + { + Scope (PCI0) + { + Name (PRTP, Package (0x80) + { + Package (0x04) + { + 0xFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0xFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x03, + LNKD, + Zero + } + }) + Name (PRTA, Package (0x80) + { + Package (0x04) + { + 0xFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0xFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x03, + GSID, + Zero + } + }) + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If ((PICF == Zero)) + { + Return (PRTP) /* \_SB_.PCI0.PRTP */ + } + Else + { + Return (PRTA) /* \_SB_.PCI0.PRTA */ + } + } + } + + Field (PCI0.ISA.PIRQ, ByteAcc, NoLock, Preserve) + { + PRQA, 8, + PRQB, 8, + PRQC, 8, + PRQD, 8, + Offset (0x08), + PRQE, 8, + PRQF, 8, + PRQG, 8, + PRQH, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + PRRI = (Arg0 & 0x0F) + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQA)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQA |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQA)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQA = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQB)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQB |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQB)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQB = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQC)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQC |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQC)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQC = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQD)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQD |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQD)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQD = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKE) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQE)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQE |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQE)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQE = PRRI /* \_SB_.LNKE._SRS.PRRI */ + } + } + + Device (LNKF) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x05) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQF)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQF |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQF)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQF = PRRI /* \_SB_.LNKF._SRS.PRRI */ + } + } + + Device (LNKG) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x06) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQG)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQG |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQG)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQG = PRRI /* \_SB_.LNKG._SRS.PRRI */ + } + } + + Device (LNKH) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x07) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQH)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQH |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQH)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQH = PRRI /* \_SB_.LNKH._SRS.PRRI */ + } + } + + Device (GSIA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x10) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000010, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000010, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x11) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000011, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000011, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x12) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000012, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000012, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSID) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x13) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000013, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000013, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIE) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x14) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000014, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000014, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIF) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x15) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000015, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000015, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIG) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x16) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000016, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000016, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIH) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x17) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000017, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000017, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB.PCI0) + { + Device (SMB0) + { + Name (_ADR, 0x001F0003) // _ADR: Address + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0CD8, // Range Minimum + 0x0CD8, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0x0CD8, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + + If ((Arg0 == One)) + { + Notify (C001, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Local0 = One + While ((Local0 == One)) + { + Local0 = Zero + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CINS == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, One) + \_SB.PCI0.PRES.CINS = One + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + + Name (_PXM, Zero) // _PXM: Device Proximity + } + + Processor (C001, 0x01, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (One)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (One) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (One, Arg0, Arg1, Arg2) + } + + Name (_PXM, Zero) // _PXM: Device Proximity + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Device (\_SB.PCI0.MHPD) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "Memory hotplug resources") // _UID: Unique ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0A00, // Range Minimum + 0x0A00, // Range Maximum + 0x00, // Alignment + 0x18, // Length + ) + }) + OperationRegion (HPMR, SystemIO, 0x0A00, 0x18) + } + + Device (\_SB.MHPC) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "DIMM devices") // _UID: Unique ID + Name (MDNR, 0x02) + Field (\_SB.PCI0.MHPD.HPMR, DWordAcc, NoLock, Preserve) + { + MRBL, 32, + MRBH, 32, + MRLL, 32, + MRLH, 32, + MPX, 32 + } + + Field (\_SB.PCI0.MHPD.HPMR, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x14), + MES, 1, + MINS, 1, + MRMV, 1, + MEJ, 1 + } + + Field (\_SB.PCI0.MHPD.HPMR, DWordAcc, NoLock, Preserve) + { + MSEL, 32, + MOEV, 32, + MOSC, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If ((MDNR == Zero)) + { + Return (Zero) + } + + Return (0x0B) + } + + Mutex (MLCK, 0x00) + Method (MSCN, 0, NotSerialized) + { + If ((MDNR == Zero)) + { + Return (Zero) + } + + Local0 = Zero + Acquire (MLCK, 0xFFFF) + While ((Local0 < MDNR)) + { + MSEL = Local0 + If ((MINS == One)) + { + MTFY (Local0, One) + MINS = One + } + ElseIf ((MRMV == One)) + { + MTFY (Local0, 0x03) + MRMV = One + } + + Local0 += One + } + + Release (MLCK) + Return (One) + } + + Method (MRST, 1, NotSerialized) + { + Local0 = Zero + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + If ((MES == One)) + { + Local0 = 0x0F + } + + Release (MLCK) + Return (Local0) + } + + Method (MCRS, 1, Serialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + Name (MR64, ResourceTemplate () + { + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000000000000, // Range Minimum + 0xFFFFFFFFFFFFFFFE, // Range Maximum + 0x0000000000000000, // Translation Offset + 0xFFFFFFFFFFFFFFFF, // Length + ,, _Y01, AddressRangeMemory, TypeStatic) + }) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._MIN, MINL) // _MIN: Minimum Base Address + CreateDWordField (MR64, 0x12, MINH) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._LEN, LENL) // _LEN: Length + CreateDWordField (MR64, 0x2A, LENH) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._MAX, MAXL) // _MAX: Maximum Base Address + CreateDWordField (MR64, 0x1A, MAXH) + MINH = MRBH /* \_SB_.MHPC.MRBH */ + MINL = MRBL /* \_SB_.MHPC.MRBL */ + LENH = MRLH /* \_SB_.MHPC.MRLH */ + LENL = MRLL /* \_SB_.MHPC.MRLL */ + MAXL = (MINL + LENL) /* \_SB_.MHPC.MCRS.LENL */ + MAXH = (MINH + LENH) /* \_SB_.MHPC.MCRS.LENH */ + If ((MAXL < MINL)) + { + MAXH += One + } + + If ((MAXL < One)) + { + MAXH -= One + } + + MAXL -= One + If ((MAXH == Zero)) + { + Name (MR32, ResourceTemplate () + { + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x00000000, // Range Minimum + 0xFFFFFFFE, // Range Maximum + 0x00000000, // Translation Offset + 0xFFFFFFFF, // Length + ,, _Y02, AddressRangeMemory, TypeStatic) + }) + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._MIN, MIN) // _MIN: Minimum Base Address + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._MAX, MAX) // _MAX: Maximum Base Address + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._LEN, LEN) // _LEN: Length + MIN = MINL /* \_SB_.MHPC.MCRS.MINL */ + MAX = MAXL /* \_SB_.MHPC.MCRS.MAXL */ + LEN = LENL /* \_SB_.MHPC.MCRS.LENL */ + Release (MLCK) + Return (MR32) /* \_SB_.MHPC.MCRS.MR32 */ + } + + Release (MLCK) + Return (MR64) /* \_SB_.MHPC.MCRS.MR64 */ + } + + Method (MPXM, 1, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + Local0 = MPX /* \_SB_.MHPC.MPX_ */ + Release (MLCK) + Return (Local0) + } + + Method (MOST, 4, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + MOEV = Arg1 + MOSC = Arg2 + Release (MLCK) + } + + Method (MEJ0, 2, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + MEJ = One + Release (MLCK) + } + + Device (MP00) + { + Name (_UID, "0x00") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Device (MP01) + { + Name (_UID, "0x01") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Method (MTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (MP00, Arg1) + } + + If ((Arg0 == One)) + { + Notify (MP01, Arg1) + } + } + } + + Method (\_GPE._E03, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.MHPC.MSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xAFFFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xA8000000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0xC0000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x3EC00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x00000001C0000000, // Range Minimum + 0x00000009BFFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000800000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0620, // Range Minimum + 0x0620, // Range Maximum + 0x01, // Alignment + 0x10, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S08) + { + Name (_ADR, 0x00010000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Method (PCNT, 0, NotSerialized) + { + } + } + } +} + diff --git a/tests/data/acpi/q35/DSDT.bridge b/tests/data/acpi/q35/DSDT.bridge index 0f6c9c68c81cddd2126eea8a7c336b8667202223..118476ff6101e11d6b1f2d3399241d7fd1a6f634 100644 GIT binary patch delta 33 ocmeCRZL{Ta33dr-lVf0D+`W-YMUK;hH6}jTDPF)~vbmf;0GQ4QumAu6 delta 41 wcmZp(?X~4{33dtTm1AIF4ByD5BFE{^8WSJv6ffXD*<8+_U4$*b*)N0v0NR)dw*UYD diff --git a/tests/data/acpi/q35/DSDT.bridge.dsl b/tests/data/acpi/q35/DSDT.bridge.dsl new file mode 100644 index 0000000000..51fbeb729d --- /dev/null +++ b/tests/data/acpi/q35/DSDT.bridge.dsl @@ -0,0 +1,3141 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/q35/DSDT.bridge, Tue Aug 4 11:14:15 2020 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x00001E0F (7695) + * Revision 0x01 **** 32-bit table (V1), no 64-bit math support + * Checksum 0x4B + * OEM ID "BOCHS " + * OEM Table ID "BXPCDSDT" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001) +{ + Scope (\) + { + OperationRegion (DBG, SystemIO, 0x0402, One) + Field (DBG, ByteAcc, NoLock, Preserve) + { + DBGB, 8 + } + + Method (DBUG, 1, NotSerialized) + { + ToHexString (Arg0, Local0) + ToBuffer (Local0, Local0) + Local1 = (SizeOf (Local0) - One) + Local2 = Zero + While ((Local2 < Local1)) + { + DBGB = DerefOf (Local0 [Local2]) + Local2++ + } + + DBGB = 0x0A + } + } + + Scope (_SB) + { + Device (PCI0) + { + Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID + Name (_ADR, Zero) // _ADR: Address + Name (_UID, Zero) // _UID: Unique ID + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + CreateDWordField (Arg3, Zero, CDW1) + If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) + { + CreateDWordField (Arg3, 0x04, CDW2) + CreateDWordField (Arg3, 0x08, CDW3) + Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */ + Local0 &= 0x1F + If ((Arg1 != One)) + { + CDW1 |= 0x08 + } + + If ((CDW3 != Local0)) + { + CDW1 |= 0x10 + } + + CDW3 = Local0 + } + Else + { + CDW1 |= 0x04 + } + + Return (Arg3) + } + } + } + + Scope (_SB) + { + Device (HPET) + { + Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + OperationRegion (HPTM, SystemMemory, 0xFED00000, 0x0400) + Field (HPTM, DWordAcc, Lock, Preserve) + { + VEND, 32, + PRD, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Local0 = VEND /* \_SB_.HPET.VEND */ + Local1 = PRD /* \_SB_.HPET.PRD_ */ + Local0 >>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x001F0000) // _ADR: Address + OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Name (PICF, Zero) + Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model + { + PICF = Arg0 + } + + Scope (_SB) + { + Scope (PCI0) + { + Name (PRTP, Package (0x80) + { + Package (0x04) + { + 0xFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0xFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x03, + LNKD, + Zero + } + }) + Name (PRTA, Package (0x80) + { + Package (0x04) + { + 0xFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0xFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x03, + GSID, + Zero + } + }) + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If ((PICF == Zero)) + { + Return (PRTP) /* \_SB_.PCI0.PRTP */ + } + Else + { + Return (PRTA) /* \_SB_.PCI0.PRTA */ + } + } + } + + Field (PCI0.ISA.PIRQ, ByteAcc, NoLock, Preserve) + { + PRQA, 8, + PRQB, 8, + PRQC, 8, + PRQD, 8, + Offset (0x08), + PRQE, 8, + PRQF, 8, + PRQG, 8, + PRQH, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + PRRI = (Arg0 & 0x0F) + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQA)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQA |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQA)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQA = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQB)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQB |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQB)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQB = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQC)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQC |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQC)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQC = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQD)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQD |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQD)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQD = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKE) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQE)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQE |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQE)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQE = PRRI /* \_SB_.LNKE._SRS.PRRI */ + } + } + + Device (LNKF) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x05) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQF)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQF |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQF)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQF = PRRI /* \_SB_.LNKF._SRS.PRRI */ + } + } + + Device (LNKG) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x06) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQG)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQG |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQG)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQG = PRRI /* \_SB_.LNKG._SRS.PRRI */ + } + } + + Device (LNKH) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x07) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQH)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQH |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQH)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQH = PRRI /* \_SB_.LNKH._SRS.PRRI */ + } + } + + Device (GSIA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x10) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000010, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000010, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x11) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000011, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000011, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x12) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000012, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000012, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSID) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x13) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000013, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000013, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIE) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x14) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000014, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000014, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIF) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x15) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000015, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000015, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIG) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x16) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000016, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000016, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIH) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x17) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000017, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000017, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB.PCI0) + { + Device (SMB0) + { + Name (_ADR, 0x001F0003) // _ADR: Address + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0CD8, // Range Minimum + 0x0CD8, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0x0CD8, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Local0 = One + While ((Local0 == One)) + { + Local0 = Zero + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CINS == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, One) + \_SB.PCI0.PRES.CINS = One + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xAFFFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xA8000000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0xC0000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x3EC00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000100000000, // Range Minimum + 0x00000008FFFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000800000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0620, // Range Minimum + 0x0620, // Range Maximum + 0x01, // Alignment + 0x10, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S08) + { + Name (_ADR, 0x00010000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Device (S10) + { + Name (_ADR, 0x00020000) // _ADR: Address + } + + Method (PCNT, 0, NotSerialized) + { + } + } + } +} + diff --git a/tests/data/acpi/q35/DSDT.cphp b/tests/data/acpi/q35/DSDT.cphp index d7bedee7ff638f11b3bb84ef960364b409a49cce..69c5edf620529e995461ccba63b76a083f25b2b6 100644 GIT binary patch delta 33 ocmX@(aKwSjCD delta 42 xcmX@&aK?elCD>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x001F0000) // _ADR: Address + OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Name (PICF, Zero) + Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model + { + PICF = Arg0 + } + + Scope (_SB) + { + Scope (PCI0) + { + Name (PRTP, Package (0x80) + { + Package (0x04) + { + 0xFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0xFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x03, + LNKD, + Zero + } + }) + Name (PRTA, Package (0x80) + { + Package (0x04) + { + 0xFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0xFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x03, + GSID, + Zero + } + }) + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If ((PICF == Zero)) + { + Return (PRTP) /* \_SB_.PCI0.PRTP */ + } + Else + { + Return (PRTA) /* \_SB_.PCI0.PRTA */ + } + } + } + + Field (PCI0.ISA.PIRQ, ByteAcc, NoLock, Preserve) + { + PRQA, 8, + PRQB, 8, + PRQC, 8, + PRQD, 8, + Offset (0x08), + PRQE, 8, + PRQF, 8, + PRQG, 8, + PRQH, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + PRRI = (Arg0 & 0x0F) + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQA)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQA |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQA)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQA = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQB)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQB |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQB)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQB = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQC)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQC |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQC)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQC = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQD)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQD |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQD)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQD = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKE) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQE)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQE |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQE)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQE = PRRI /* \_SB_.LNKE._SRS.PRRI */ + } + } + + Device (LNKF) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x05) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQF)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQF |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQF)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQF = PRRI /* \_SB_.LNKF._SRS.PRRI */ + } + } + + Device (LNKG) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x06) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQG)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQG |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQG)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQG = PRRI /* \_SB_.LNKG._SRS.PRRI */ + } + } + + Device (LNKH) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x07) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQH)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQH |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQH)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQH = PRRI /* \_SB_.LNKH._SRS.PRRI */ + } + } + + Device (GSIA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x10) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000010, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000010, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x11) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000011, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000011, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x12) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000012, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000012, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSID) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x13) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000013, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000013, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIE) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x14) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000014, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000014, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIF) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x15) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000015, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000015, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIG) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x16) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000016, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000016, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIH) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x17) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000017, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000017, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB.PCI0) + { + Device (SMB0) + { + Name (_ADR, 0x001F0003) // _ADR: Address + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0CD8, // Range Minimum + 0x0CD8, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0x0CD8, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + + If ((Arg0 == One)) + { + Notify (C001, Arg1) + } + + If ((Arg0 == 0x02)) + { + Notify (C002, Arg1) + } + + If ((Arg0 == 0x03)) + { + Notify (C003, Arg1) + } + + If ((Arg0 == 0x04)) + { + Notify (C004, Arg1) + } + + If ((Arg0 == 0x05)) + { + Notify (C005, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Local0 = One + While ((Local0 == One)) + { + Local0 = Zero + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CINS == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, One) + \_SB.PCI0.PRES.CINS = One + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + + Name (_PXM, Zero) // _PXM: Device Proximity + } + + Processor (C001, 0x01, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (One)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (One) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (One, Arg0, Arg1, Arg2) + } + + Name (_PXM, Zero) // _PXM: Device Proximity + } + + Processor (C002, 0x02, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (0x02)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x02, 0x02, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (0x02) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (0x02, Arg0, Arg1, Arg2) + } + + Name (_PXM, Zero) // _PXM: Device Proximity + } + + Processor (C003, 0x03, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (0x03)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x03, 0x04, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (0x03) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (0x03, Arg0, Arg1, Arg2) + } + + Name (_PXM, One) // _PXM: Device Proximity + } + + Processor (C004, 0x04, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (0x04)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x04, 0x05, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (0x04) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (0x04, Arg0, Arg1, Arg2) + } + + Name (_PXM, One) // _PXM: Device Proximity + } + + Processor (C005, 0x05, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (0x05)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x05, 0x06, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (0x05) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (0x05, Arg0, Arg1, Arg2) + } + + Name (_PXM, One) // _PXM: Device Proximity + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xAFFFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xA8000000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0xC0000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x3EC00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000100000000, // Range Minimum + 0x00000008FFFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000800000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0620, // Range Minimum + 0x0620, // Range Maximum + 0x01, // Alignment + 0x10, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S08) + { + Name (_ADR, 0x00010000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Method (PCNT, 0, NotSerialized) + { + } + } + } +} + diff --git a/tests/data/acpi/q35/DSDT.dimmpxm b/tests/data/acpi/q35/DSDT.dimmpxm index 13e80ae2e5c7606a7260d4cb3ab776488d0697d6..af41acba6e0117191ad8495a30ded7b0acc4d2ca 100644 GIT binary patch delta 33 pcmez5`O1^aCD)(0sz0?3UmMf delta 42 ycmaFm`N@;ZCD>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x001F0000) // _ADR: Address + OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Name (PICF, Zero) + Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model + { + PICF = Arg0 + } + + Scope (_SB) + { + Scope (PCI0) + { + Name (PRTP, Package (0x80) + { + Package (0x04) + { + 0xFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0xFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x03, + LNKD, + Zero + } + }) + Name (PRTA, Package (0x80) + { + Package (0x04) + { + 0xFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0xFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x03, + GSID, + Zero + } + }) + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If ((PICF == Zero)) + { + Return (PRTP) /* \_SB_.PCI0.PRTP */ + } + Else + { + Return (PRTA) /* \_SB_.PCI0.PRTA */ + } + } + } + + Field (PCI0.ISA.PIRQ, ByteAcc, NoLock, Preserve) + { + PRQA, 8, + PRQB, 8, + PRQC, 8, + PRQD, 8, + Offset (0x08), + PRQE, 8, + PRQF, 8, + PRQG, 8, + PRQH, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + PRRI = (Arg0 & 0x0F) + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQA)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQA |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQA)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQA = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQB)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQB |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQB)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQB = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQC)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQC |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQC)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQC = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQD)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQD |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQD)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQD = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKE) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQE)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQE |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQE)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQE = PRRI /* \_SB_.LNKE._SRS.PRRI */ + } + } + + Device (LNKF) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x05) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQF)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQF |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQF)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQF = PRRI /* \_SB_.LNKF._SRS.PRRI */ + } + } + + Device (LNKG) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x06) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQG)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQG |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQG)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQG = PRRI /* \_SB_.LNKG._SRS.PRRI */ + } + } + + Device (LNKH) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x07) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQH)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQH |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQH)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQH = PRRI /* \_SB_.LNKH._SRS.PRRI */ + } + } + + Device (GSIA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x10) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000010, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000010, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x11) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000011, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000011, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x12) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000012, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000012, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSID) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x13) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000013, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000013, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIE) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x14) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000014, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000014, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIF) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x15) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000015, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000015, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIG) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x16) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000016, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000016, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIH) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x17) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000017, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000017, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB.PCI0) + { + Device (SMB0) + { + Name (_ADR, 0x001F0003) // _ADR: Address + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0CD8, // Range Minimum + 0x0CD8, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0x0CD8, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + + If ((Arg0 == One)) + { + Notify (C001, Arg1) + } + + If ((Arg0 == 0x02)) + { + Notify (C002, Arg1) + } + + If ((Arg0 == 0x03)) + { + Notify (C003, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Local0 = One + While ((Local0 == One)) + { + Local0 = Zero + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CINS == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, One) + \_SB.PCI0.PRES.CINS = One + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + + Name (_PXM, Zero) // _PXM: Device Proximity + } + + Processor (C001, 0x01, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (One)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (One) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (One, Arg0, Arg1, Arg2) + } + + Name (_PXM, One) // _PXM: Device Proximity + } + + Processor (C002, 0x02, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (0x02)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x02, 0x02, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (0x02) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (0x02, Arg0, Arg1, Arg2) + } + + Name (_PXM, 0x02) // _PXM: Device Proximity + } + + Processor (C003, 0x03, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (0x03)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x03, 0x03, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (0x03) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (0x03, Arg0, Arg1, Arg2) + } + + Name (_PXM, 0x03) // _PXM: Device Proximity + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Device (\_SB.PCI0.MHPD) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "Memory hotplug resources") // _UID: Unique ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0A00, // Range Minimum + 0x0A00, // Range Maximum + 0x00, // Alignment + 0x18, // Length + ) + }) + OperationRegion (HPMR, SystemIO, 0x0A00, 0x18) + } + + Device (\_SB.MHPC) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "DIMM devices") // _UID: Unique ID + Name (MDNR, 0x03) + Field (\_SB.PCI0.MHPD.HPMR, DWordAcc, NoLock, Preserve) + { + MRBL, 32, + MRBH, 32, + MRLL, 32, + MRLH, 32, + MPX, 32 + } + + Field (\_SB.PCI0.MHPD.HPMR, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x14), + MES, 1, + MINS, 1, + MRMV, 1, + MEJ, 1 + } + + Field (\_SB.PCI0.MHPD.HPMR, DWordAcc, NoLock, Preserve) + { + MSEL, 32, + MOEV, 32, + MOSC, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If ((MDNR == Zero)) + { + Return (Zero) + } + + Return (0x0B) + } + + Mutex (MLCK, 0x00) + Method (MSCN, 0, NotSerialized) + { + If ((MDNR == Zero)) + { + Return (Zero) + } + + Local0 = Zero + Acquire (MLCK, 0xFFFF) + While ((Local0 < MDNR)) + { + MSEL = Local0 + If ((MINS == One)) + { + MTFY (Local0, One) + MINS = One + } + ElseIf ((MRMV == One)) + { + MTFY (Local0, 0x03) + MRMV = One + } + + Local0 += One + } + + Release (MLCK) + Return (One) + } + + Method (MRST, 1, NotSerialized) + { + Local0 = Zero + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + If ((MES == One)) + { + Local0 = 0x0F + } + + Release (MLCK) + Return (Local0) + } + + Method (MCRS, 1, Serialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + Name (MR64, ResourceTemplate () + { + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000000000000, // Range Minimum + 0xFFFFFFFFFFFFFFFE, // Range Maximum + 0x0000000000000000, // Translation Offset + 0xFFFFFFFFFFFFFFFF, // Length + ,, _Y01, AddressRangeMemory, TypeStatic) + }) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._MIN, MINL) // _MIN: Minimum Base Address + CreateDWordField (MR64, 0x12, MINH) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._LEN, LENL) // _LEN: Length + CreateDWordField (MR64, 0x2A, LENH) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._MAX, MAXL) // _MAX: Maximum Base Address + CreateDWordField (MR64, 0x1A, MAXH) + MINH = MRBH /* \_SB_.MHPC.MRBH */ + MINL = MRBL /* \_SB_.MHPC.MRBL */ + LENH = MRLH /* \_SB_.MHPC.MRLH */ + LENL = MRLL /* \_SB_.MHPC.MRLL */ + MAXL = (MINL + LENL) /* \_SB_.MHPC.MCRS.LENL */ + MAXH = (MINH + LENH) /* \_SB_.MHPC.MCRS.LENH */ + If ((MAXL < MINL)) + { + MAXH += One + } + + If ((MAXL < One)) + { + MAXH -= One + } + + MAXL -= One + If ((MAXH == Zero)) + { + Name (MR32, ResourceTemplate () + { + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x00000000, // Range Minimum + 0xFFFFFFFE, // Range Maximum + 0x00000000, // Translation Offset + 0xFFFFFFFF, // Length + ,, _Y02, AddressRangeMemory, TypeStatic) + }) + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._MIN, MIN) // _MIN: Minimum Base Address + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._MAX, MAX) // _MAX: Maximum Base Address + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._LEN, LEN) // _LEN: Length + MIN = MINL /* \_SB_.MHPC.MCRS.MINL */ + MAX = MAXL /* \_SB_.MHPC.MCRS.MAXL */ + LEN = LENL /* \_SB_.MHPC.MCRS.LENL */ + Release (MLCK) + Return (MR32) /* \_SB_.MHPC.MCRS.MR32 */ + } + + Release (MLCK) + Return (MR64) /* \_SB_.MHPC.MCRS.MR64 */ + } + + Method (MPXM, 1, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + Local0 = MPX /* \_SB_.MHPC.MPX_ */ + Release (MLCK) + Return (Local0) + } + + Method (MOST, 4, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + MOEV = Arg1 + MOSC = Arg2 + Release (MLCK) + } + + Method (MEJ0, 2, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + MEJ = One + Release (MLCK) + } + + Device (MP00) + { + Name (_UID, "0x00") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Device (MP01) + { + Name (_UID, "0x01") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Device (MP02) + { + Name (_UID, "0x02") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Method (MTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (MP00, Arg1) + } + + If ((Arg0 == One)) + { + Notify (MP01, Arg1) + } + + If ((Arg0 == 0x02)) + { + Notify (MP02, Arg1) + } + } + } + + Method (\_GPE._E03, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.MHPC.MSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + Method (_E04, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + Notify (\_SB.NVDR, 0x80) // Status Change + } + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xAFFFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xA8000000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0xC0000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x3EC00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000200000000, // Range Minimum + 0x00000009FFFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000800000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0620, // Range Minimum + 0x0620, // Range Maximum + 0x01, // Alignment + 0x10, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S08) + { + Name (_ADR, 0x00010000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Method (PCNT, 0, NotSerialized) + { + } + } + } +} + diff --git a/tests/data/acpi/q35/DSDT.dsl b/tests/data/acpi/q35/DSDT.dsl new file mode 100644 index 0000000000..5adfe001c7 --- /dev/null +++ b/tests/data/acpi/q35/DSDT.dsl @@ -0,0 +1,3351 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/q35/DSDT.tis, Mon Sep 28 17:24:38 2020 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x000020D2 (8402) + * Revision 0x01 **** 32-bit table (V1), no 64-bit math support + * Checksum 0xF4 + * OEM ID "BOCHS " + * OEM Table ID "BXPCDSDT" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001) +{ + Scope (\) + { + OperationRegion (DBG, SystemIO, 0x0402, One) + Field (DBG, ByteAcc, NoLock, Preserve) + { + DBGB, 8 + } + + Method (DBUG, 1, NotSerialized) + { + ToHexString (Arg0, Local0) + ToBuffer (Local0, Local0) + Local1 = (SizeOf (Local0) - One) + Local2 = Zero + While ((Local2 < Local1)) + { + DBGB = DerefOf (Local0 [Local2]) + Local2++ + } + + DBGB = 0x0A + } + } + + Scope (_SB) + { + Device (PCI0) + { + Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID + Name (_ADR, Zero) // _ADR: Address + Name (_UID, Zero) // _UID: Unique ID + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + CreateDWordField (Arg3, Zero, CDW1) + If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) + { + CreateDWordField (Arg3, 0x04, CDW2) + CreateDWordField (Arg3, 0x08, CDW3) + Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */ + Local0 &= 0x1F + If ((Arg1 != One)) + { + CDW1 |= 0x08 + } + + If ((CDW3 != Local0)) + { + CDW1 |= 0x10 + } + + CDW3 = Local0 + } + Else + { + CDW1 |= 0x04 + } + + Return (Arg3) + } + } + } + + Scope (_SB) + { + Device (HPET) + { + Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + OperationRegion (HPTM, SystemMemory, 0xFED00000, 0x0400) + Field (HPTM, DWordAcc, Lock, Preserve) + { + VEND, 32, + PRD, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Local0 = VEND /* \_SB_.HPET.VEND */ + Local1 = PRD /* \_SB_.HPET.PRD_ */ + Local0 >>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x001F0000) // _ADR: Address + OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Name (PICF, Zero) + Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model + { + PICF = Arg0 + } + + Scope (_SB) + { + Scope (PCI0) + { + Name (PRTP, Package (0x80) + { + Package (0x04) + { + 0xFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0xFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x03, + LNKD, + Zero + } + }) + Name (PRTA, Package (0x80) + { + Package (0x04) + { + 0xFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0xFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x03, + GSID, + Zero + } + }) + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If ((PICF == Zero)) + { + Return (PRTP) /* \_SB_.PCI0.PRTP */ + } + Else + { + Return (PRTA) /* \_SB_.PCI0.PRTA */ + } + } + } + + Field (PCI0.ISA.PIRQ, ByteAcc, NoLock, Preserve) + { + PRQA, 8, + PRQB, 8, + PRQC, 8, + PRQD, 8, + Offset (0x08), + PRQE, 8, + PRQF, 8, + PRQG, 8, + PRQH, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + PRRI = (Arg0 & 0x0F) + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQA)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQA |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQA)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQA = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQB)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQB |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQB)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQB = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQC)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQC |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQC)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQC = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQD)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQD |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQD)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQD = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKE) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQE)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQE |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQE)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQE = PRRI /* \_SB_.LNKE._SRS.PRRI */ + } + } + + Device (LNKF) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x05) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQF)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQF |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQF)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQF = PRRI /* \_SB_.LNKF._SRS.PRRI */ + } + } + + Device (LNKG) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x06) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQG)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQG |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQG)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQG = PRRI /* \_SB_.LNKG._SRS.PRRI */ + } + } + + Device (LNKH) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x07) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQH)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQH |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQH)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQH = PRRI /* \_SB_.LNKH._SRS.PRRI */ + } + } + + Device (GSIA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x10) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000010, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000010, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x11) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000011, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000011, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x12) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000012, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000012, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSID) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x13) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000013, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000013, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIE) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x14) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000014, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000014, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIF) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x15) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000015, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000015, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIG) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x16) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000016, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000016, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIH) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x17) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000017, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000017, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB.PCI0) + { + Device (SMB0) + { + Name (_ADR, 0x001F0003) // _ADR: Address + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0CD8, // Range Minimum + 0x0CD8, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0x0CD8, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Name (CNEW, Package (0xFF){}) + Local3 = Zero + Local4 = One + While ((Local4 == One)) + { + Local4 = Zero + Local0 = One + Local1 = Zero + While (((Local0 == One) && (Local3 < One))) + { + Local0 = Zero + \_SB.PCI0.PRES.CSEL = Local3 + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CDAT < Local3)) + { + Break + } + + If ((Local1 == 0xFF)) + { + Local4 = One + Break + } + + Local3 = \_SB.PCI0.PRES.CDAT + If ((\_SB.PCI0.PRES.CINS == One)) + { + CNEW [Local1] = Local3 + Local1++ + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (Local3, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + + Local3++ + } + + Local2 = Zero + While ((Local2 < Local1)) + { + Local3 = DerefOf (CNEW [Local2]) + CTFY (Local3, One) + Debug = Local3 + \_SB.PCI0.PRES.CSEL = Local3 + \_SB.PCI0.PRES.CINS = One + Local2++ + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xAFFFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xA8000000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0xC0000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x3EC00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000100000000, // Range Minimum + 0x00000008FFFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000800000000, // Length + ,, , AddressRangeMemory, TypeStatic) + Memory32Fixed (ReadWrite, + 0xFED40000, // Address Base + 0x00005000, // Address Length + ) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0620, // Range Minimum + 0x0620, // Range Maximum + 0x01, // Alignment + 0x10, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S08) + { + Name (_ADR, 0x00010000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Device (TPM) + { + Name (_HID, "MSFT0101" /* TPM 2.0 Security Device */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0xFED40000, // Address Base + 0x00005000, // Address Length + ) + }) + OperationRegion (TPP2, SystemMemory, 0xFED45100, 0x5A) + Field (TPP2, AnyAcc, NoLock, Preserve) + { + PPIN, 8, + PPIP, 32, + PPRP, 32, + PPRQ, 32, + PPRM, 32, + LPPR, 32 + } + + OperationRegion (TPP3, SystemMemory, 0xFED4515A, One) + Field (TPP3, ByteAcc, NoLock, Preserve) + { + MOVV, 8 + } + + Method (TPFN, 1, Serialized) + { + If ((Arg0 >= 0x0100)) + { + Return (Zero) + } + + OperationRegion (TPP1, SystemMemory, (0xFED45000 + Arg0), One) + Field (TPP1, ByteAcc, NoLock, Preserve) + { + TPPF, 8 + } + + Return (TPPF) /* \_SB_.PCI0.TPM_.TPFN.TPPF */ + } + + Name (TPM2, Package (0x02) + { + Zero, + Zero + }) + Name (TPM3, Package (0x03) + { + Zero, + Zero, + Zero + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If ((Arg0 == ToUUID ("3dddfaa6-361b-4eb4-a424-8d10089d1653") /* Physical Presence Interface */)) + { + If ((Arg2 == Zero)) + { + Return (Buffer (0x02) + { + 0xFF, 0x01 // .. + }) + } + + If ((Arg2 == One)) + { + Return ("1.3") + } + + If ((Arg2 == 0x02)) + { + Local0 = DerefOf (Arg3 [Zero]) + Local1 = TPFN (Local0) + If (((Local1 & 0x07) == Zero)) + { + Return (One) + } + + PPRQ = Local0 + PPRM = Zero + Return (Zero) + } + + If ((Arg2 == 0x03)) + { + If ((Arg1 == One)) + { + TPM2 [One] = PPRQ /* \_SB_.PCI0.TPM_.PPRQ */ + Return (TPM2) /* \_SB_.PCI0.TPM_.TPM2 */ + } + + If ((Arg1 == 0x02)) + { + TPM3 [One] = PPRQ /* \_SB_.PCI0.TPM_.PPRQ */ + TPM3 [0x02] = PPRM /* \_SB_.PCI0.TPM_.PPRM */ + Return (TPM3) /* \_SB_.PCI0.TPM_.TPM3 */ + } + } + + If ((Arg2 == 0x04)) + { + Return (0x02) + } + + If ((Arg2 == 0x05)) + { + TPM3 [One] = LPPR /* \_SB_.PCI0.TPM_.LPPR */ + TPM3 [0x02] = PPRP /* \_SB_.PCI0.TPM_.PPRP */ + Return (TPM3) /* \_SB_.PCI0.TPM_.TPM3 */ + } + + If ((Arg2 == 0x06)) + { + Return (0x03) + } + + If ((Arg2 == 0x07)) + { + Local0 = DerefOf (Arg3 [Zero]) + Local1 = TPFN (Local0) + If (((Local1 & 0x07) == Zero)) + { + Return (One) + } + + If (((Local1 & 0x07) == 0x02)) + { + Return (0x03) + } + + If ((Arg1 == One)) + { + PPRQ = Local0 + PPRM = Zero + } + + If ((Arg1 == 0x02)) + { + PPRQ = Local0 + PPRM = DerefOf (Arg3 [One]) + } + + Return (Zero) + } + + If ((Arg2 == 0x08)) + { + Local0 = DerefOf (Arg3 [Zero]) + Local1 = TPFN (Local0) + Return ((Local1 & 0x07)) + } + + Return (Buffer (One) + { + 0x00 // . + }) + } + + If ((Arg0 == ToUUID ("376054ed-cc13-4675-901c-4756d7f2d45d"))) + { + If ((Arg2 == Zero)) + { + Return (Buffer (One) + { + 0x03 // . + }) + } + + If ((Arg2 == One)) + { + Local0 = DerefOf (Arg3 [Zero]) + MOVV = Local0 + Return (Zero) + } + } + } + } + } + } +} + diff --git a/tests/data/acpi/q35/DSDT.ipmibt b/tests/data/acpi/q35/DSDT.ipmibt index 9a1b635dab776fb25e378a00e6ca0cadf9902c25..a650c3041ab9d6688eda843a6a2ab418e1a7ce9b 100644 GIT binary patch delta 33 ocmX?ZyWf_}CD>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x001F0000) // _ADR: Address + OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (MI1) + { + Name (_HID, EisaId ("IPI0001")) // _HID: Hardware ID + Name (_STR, "ipmi_bt") // _STR: Description String + Name (_UID, One) // _UID: Unique ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x00E4, // Range Minimum + 0x00E6, // Range Maximum + 0x01, // Alignment + 0x03, // Length + ) + IRQNoFlags () + {5} + }) + Name (_IFT, 0x03) // _IFT: IPMI Interface Type + Name (_SRV, 0x0200) // _SRV: IPMI Spec Revision + } + + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Name (PICF, Zero) + Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model + { + PICF = Arg0 + } + + Scope (_SB) + { + Scope (PCI0) + { + Name (PRTP, Package (0x80) + { + Package (0x04) + { + 0xFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0xFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x03, + LNKD, + Zero + } + }) + Name (PRTA, Package (0x80) + { + Package (0x04) + { + 0xFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0xFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x03, + GSID, + Zero + } + }) + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If ((PICF == Zero)) + { + Return (PRTP) /* \_SB_.PCI0.PRTP */ + } + Else + { + Return (PRTA) /* \_SB_.PCI0.PRTA */ + } + } + } + + Field (PCI0.ISA.PIRQ, ByteAcc, NoLock, Preserve) + { + PRQA, 8, + PRQB, 8, + PRQC, 8, + PRQD, 8, + Offset (0x08), + PRQE, 8, + PRQF, 8, + PRQG, 8, + PRQH, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + PRRI = (Arg0 & 0x0F) + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQA)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQA |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQA)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQA = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQB)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQB |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQB)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQB = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQC)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQC |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQC)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQC = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQD)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQD |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQD)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQD = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKE) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQE)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQE |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQE)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQE = PRRI /* \_SB_.LNKE._SRS.PRRI */ + } + } + + Device (LNKF) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x05) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQF)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQF |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQF)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQF = PRRI /* \_SB_.LNKF._SRS.PRRI */ + } + } + + Device (LNKG) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x06) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQG)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQG |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQG)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQG = PRRI /* \_SB_.LNKG._SRS.PRRI */ + } + } + + Device (LNKH) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x07) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQH)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQH |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQH)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQH = PRRI /* \_SB_.LNKH._SRS.PRRI */ + } + } + + Device (GSIA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x10) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000010, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000010, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x11) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000011, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000011, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x12) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000012, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000012, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSID) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x13) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000013, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000013, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIE) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x14) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000014, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000014, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIF) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x15) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000015, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000015, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIG) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x16) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000016, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000016, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIH) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x17) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000017, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000017, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB.PCI0) + { + Device (SMB0) + { + Name (_ADR, 0x001F0003) // _ADR: Address + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0CD8, // Range Minimum + 0x0CD8, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0x0CD8, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Local0 = One + While ((Local0 == One)) + { + Local0 = Zero + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CINS == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, One) + \_SB.PCI0.PRES.CINS = One + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xAFFFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xA8000000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0xC0000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x3EC00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000100000000, // Range Minimum + 0x00000008FFFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000800000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0620, // Range Minimum + 0x0620, // Range Maximum + 0x01, // Alignment + 0x10, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S08) + { + Name (_ADR, 0x00010000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Method (PCNT, 0, NotSerialized) + { + } + } + } +} + diff --git a/tests/data/acpi/q35/DSDT.memhp b/tests/data/acpi/q35/DSDT.memhp index 55ce4e2293624c2c0725c3bbaaa7ec29acfccfc9..85598ca3f68f437e8d5048e2cb9815f20b332152 100644 GIT binary patch delta 33 ocmX@@e%PJMCD>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x001F0000) // _ADR: Address + OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Name (PICF, Zero) + Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model + { + PICF = Arg0 + } + + Scope (_SB) + { + Scope (PCI0) + { + Name (PRTP, Package (0x80) + { + Package (0x04) + { + 0xFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0xFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x03, + LNKD, + Zero + } + }) + Name (PRTA, Package (0x80) + { + Package (0x04) + { + 0xFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0xFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x03, + GSID, + Zero + } + }) + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If ((PICF == Zero)) + { + Return (PRTP) /* \_SB_.PCI0.PRTP */ + } + Else + { + Return (PRTA) /* \_SB_.PCI0.PRTA */ + } + } + } + + Field (PCI0.ISA.PIRQ, ByteAcc, NoLock, Preserve) + { + PRQA, 8, + PRQB, 8, + PRQC, 8, + PRQD, 8, + Offset (0x08), + PRQE, 8, + PRQF, 8, + PRQG, 8, + PRQH, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + PRRI = (Arg0 & 0x0F) + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQA)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQA |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQA)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQA = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQB)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQB |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQB)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQB = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQC)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQC |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQC)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQC = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQD)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQD |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQD)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQD = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKE) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQE)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQE |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQE)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQE = PRRI /* \_SB_.LNKE._SRS.PRRI */ + } + } + + Device (LNKF) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x05) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQF)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQF |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQF)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQF = PRRI /* \_SB_.LNKF._SRS.PRRI */ + } + } + + Device (LNKG) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x06) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQG)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQG |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQG)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQG = PRRI /* \_SB_.LNKG._SRS.PRRI */ + } + } + + Device (LNKH) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x07) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQH)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQH |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQH)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQH = PRRI /* \_SB_.LNKH._SRS.PRRI */ + } + } + + Device (GSIA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x10) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000010, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000010, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x11) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000011, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000011, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x12) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000012, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000012, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSID) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x13) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000013, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000013, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIE) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x14) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000014, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000014, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIF) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x15) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000015, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000015, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIG) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x16) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000016, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000016, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIH) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x17) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000017, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000017, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB.PCI0) + { + Device (SMB0) + { + Name (_ADR, 0x001F0003) // _ADR: Address + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0CD8, // Range Minimum + 0x0CD8, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0x0CD8, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Local0 = One + While ((Local0 == One)) + { + Local0 = Zero + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CINS == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, One) + \_SB.PCI0.PRES.CINS = One + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + + Name (_PXM, Zero) // _PXM: Device Proximity + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Device (\_SB.PCI0.MHPD) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "Memory hotplug resources") // _UID: Unique ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0A00, // Range Minimum + 0x0A00, // Range Maximum + 0x00, // Alignment + 0x18, // Length + ) + }) + OperationRegion (HPMR, SystemIO, 0x0A00, 0x18) + } + + Device (\_SB.MHPC) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "DIMM devices") // _UID: Unique ID + Name (MDNR, 0x03) + Field (\_SB.PCI0.MHPD.HPMR, DWordAcc, NoLock, Preserve) + { + MRBL, 32, + MRBH, 32, + MRLL, 32, + MRLH, 32, + MPX, 32 + } + + Field (\_SB.PCI0.MHPD.HPMR, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x14), + MES, 1, + MINS, 1, + MRMV, 1, + MEJ, 1 + } + + Field (\_SB.PCI0.MHPD.HPMR, DWordAcc, NoLock, Preserve) + { + MSEL, 32, + MOEV, 32, + MOSC, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If ((MDNR == Zero)) + { + Return (Zero) + } + + Return (0x0B) + } + + Mutex (MLCK, 0x00) + Method (MSCN, 0, NotSerialized) + { + If ((MDNR == Zero)) + { + Return (Zero) + } + + Local0 = Zero + Acquire (MLCK, 0xFFFF) + While ((Local0 < MDNR)) + { + MSEL = Local0 + If ((MINS == One)) + { + MTFY (Local0, One) + MINS = One + } + ElseIf ((MRMV == One)) + { + MTFY (Local0, 0x03) + MRMV = One + } + + Local0 += One + } + + Release (MLCK) + Return (One) + } + + Method (MRST, 1, NotSerialized) + { + Local0 = Zero + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + If ((MES == One)) + { + Local0 = 0x0F + } + + Release (MLCK) + Return (Local0) + } + + Method (MCRS, 1, Serialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + Name (MR64, ResourceTemplate () + { + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000000000000, // Range Minimum + 0xFFFFFFFFFFFFFFFE, // Range Maximum + 0x0000000000000000, // Translation Offset + 0xFFFFFFFFFFFFFFFF, // Length + ,, _Y01, AddressRangeMemory, TypeStatic) + }) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._MIN, MINL) // _MIN: Minimum Base Address + CreateDWordField (MR64, 0x12, MINH) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._LEN, LENL) // _LEN: Length + CreateDWordField (MR64, 0x2A, LENH) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._MAX, MAXL) // _MAX: Maximum Base Address + CreateDWordField (MR64, 0x1A, MAXH) + MINH = MRBH /* \_SB_.MHPC.MRBH */ + MINL = MRBL /* \_SB_.MHPC.MRBL */ + LENH = MRLH /* \_SB_.MHPC.MRLH */ + LENL = MRLL /* \_SB_.MHPC.MRLL */ + MAXL = (MINL + LENL) /* \_SB_.MHPC.MCRS.LENL */ + MAXH = (MINH + LENH) /* \_SB_.MHPC.MCRS.LENH */ + If ((MAXL < MINL)) + { + MAXH += One + } + + If ((MAXL < One)) + { + MAXH -= One + } + + MAXL -= One + If ((MAXH == Zero)) + { + Name (MR32, ResourceTemplate () + { + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x00000000, // Range Minimum + 0xFFFFFFFE, // Range Maximum + 0x00000000, // Translation Offset + 0xFFFFFFFF, // Length + ,, _Y02, AddressRangeMemory, TypeStatic) + }) + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._MIN, MIN) // _MIN: Minimum Base Address + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._MAX, MAX) // _MAX: Maximum Base Address + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._LEN, LEN) // _LEN: Length + MIN = MINL /* \_SB_.MHPC.MCRS.MINL */ + MAX = MAXL /* \_SB_.MHPC.MCRS.MAXL */ + LEN = LENL /* \_SB_.MHPC.MCRS.LENL */ + Release (MLCK) + Return (MR32) /* \_SB_.MHPC.MCRS.MR32 */ + } + + Release (MLCK) + Return (MR64) /* \_SB_.MHPC.MCRS.MR64 */ + } + + Method (MPXM, 1, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + Local0 = MPX /* \_SB_.MHPC.MPX_ */ + Release (MLCK) + Return (Local0) + } + + Method (MOST, 4, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + MOEV = Arg1 + MOSC = Arg2 + Release (MLCK) + } + + Method (MEJ0, 2, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + MEJ = One + Release (MLCK) + } + + Device (MP00) + { + Name (_UID, "0x00") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Device (MP01) + { + Name (_UID, "0x01") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Device (MP02) + { + Name (_UID, "0x02") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Method (MTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (MP00, Arg1) + } + + If ((Arg0 == One)) + { + Notify (MP01, Arg1) + } + + If ((Arg0 == 0x02)) + { + Notify (MP02, Arg1) + } + } + } + + Method (\_GPE._E03, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.MHPC.MSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xAFFFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xA8000000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0xC0000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x3EC00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000200000000, // Range Minimum + 0x00000009FFFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000800000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0620, // Range Minimum + 0x0620, // Range Maximum + 0x01, // Alignment + 0x10, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S08) + { + Name (_ADR, 0x00010000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Method (PCNT, 0, NotSerialized) + { + } + } + } +} + diff --git a/tests/data/acpi/q35/DSDT.mmio64 b/tests/data/acpi/q35/DSDT.mmio64 index 99b7b2ae4ba36b8ca7901626c1561d29100087d2..092fdc32628f5a145b510c2a46de8b02222b1951 100644 GIT binary patch delta 33 pcmaFndf%1HCD>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x001F0000) // _ADR: Address + OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Name (PICF, Zero) + Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model + { + PICF = Arg0 + } + + Scope (_SB) + { + Scope (PCI0) + { + Name (PRTP, Package (0x80) + { + Package (0x04) + { + 0xFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0xFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x03, + LNKD, + Zero + } + }) + Name (PRTA, Package (0x80) + { + Package (0x04) + { + 0xFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0xFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x03, + GSID, + Zero + } + }) + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If ((PICF == Zero)) + { + Return (PRTP) /* \_SB_.PCI0.PRTP */ + } + Else + { + Return (PRTA) /* \_SB_.PCI0.PRTA */ + } + } + } + + Field (PCI0.ISA.PIRQ, ByteAcc, NoLock, Preserve) + { + PRQA, 8, + PRQB, 8, + PRQC, 8, + PRQD, 8, + Offset (0x08), + PRQE, 8, + PRQF, 8, + PRQG, 8, + PRQH, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + PRRI = (Arg0 & 0x0F) + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQA)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQA |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQA)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQA = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQB)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQB |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQB)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQB = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQC)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQC |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQC)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQC = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQD)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQD |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQD)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQD = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKE) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQE)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQE |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQE)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQE = PRRI /* \_SB_.LNKE._SRS.PRRI */ + } + } + + Device (LNKF) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x05) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQF)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQF |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQF)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQF = PRRI /* \_SB_.LNKF._SRS.PRRI */ + } + } + + Device (LNKG) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x06) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQG)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQG |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQG)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQG = PRRI /* \_SB_.LNKG._SRS.PRRI */ + } + } + + Device (LNKH) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x07) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQH)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQH |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQH)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQH = PRRI /* \_SB_.LNKH._SRS.PRRI */ + } + } + + Device (GSIA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x10) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000010, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000010, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x11) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000011, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000011, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x12) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000012, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000012, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSID) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x13) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000013, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000013, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIE) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x14) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000014, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000014, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIF) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x15) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000015, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000015, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIG) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x16) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000016, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000016, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIH) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x17) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000017, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000017, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB.PCI0) + { + Device (SMB0) + { + Name (_ADR, 0x001F0003) // _ADR: Address + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0CD8, // Range Minimum + 0x0CD8, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0x0CD8, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Local0 = One + While ((Local0 == One)) + { + Local0 = Zero + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CINS == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, One) + \_SB.PCI0.PRES.CINS = One + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + + Name (_PXM, Zero) // _PXM: Device Proximity + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Device (\_SB.PCI0.MHPD) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "Memory hotplug resources") // _UID: Unique ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0A00, // Range Minimum + 0x0A00, // Range Maximum + 0x00, // Alignment + 0x18, // Length + ) + }) + OperationRegion (HPMR, SystemIO, 0x0A00, 0x18) + } + + Device (\_SB.MHPC) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "DIMM devices") // _UID: Unique ID + Name (MDNR, One) + Field (\_SB.PCI0.MHPD.HPMR, DWordAcc, NoLock, Preserve) + { + MRBL, 32, + MRBH, 32, + MRLL, 32, + MRLH, 32, + MPX, 32 + } + + Field (\_SB.PCI0.MHPD.HPMR, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x14), + MES, 1, + MINS, 1, + MRMV, 1, + MEJ, 1 + } + + Field (\_SB.PCI0.MHPD.HPMR, DWordAcc, NoLock, Preserve) + { + MSEL, 32, + MOEV, 32, + MOSC, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If ((MDNR == Zero)) + { + Return (Zero) + } + + Return (0x0B) + } + + Mutex (MLCK, 0x00) + Method (MSCN, 0, NotSerialized) + { + If ((MDNR == Zero)) + { + Return (Zero) + } + + Local0 = Zero + Acquire (MLCK, 0xFFFF) + While ((Local0 < MDNR)) + { + MSEL = Local0 + If ((MINS == One)) + { + MTFY (Local0, One) + MINS = One + } + ElseIf ((MRMV == One)) + { + MTFY (Local0, 0x03) + MRMV = One + } + + Local0 += One + } + + Release (MLCK) + Return (One) + } + + Method (MRST, 1, NotSerialized) + { + Local0 = Zero + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + If ((MES == One)) + { + Local0 = 0x0F + } + + Release (MLCK) + Return (Local0) + } + + Method (MCRS, 1, Serialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + Name (MR64, ResourceTemplate () + { + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000000000000, // Range Minimum + 0xFFFFFFFFFFFFFFFE, // Range Maximum + 0x0000000000000000, // Translation Offset + 0xFFFFFFFFFFFFFFFF, // Length + ,, _Y01, AddressRangeMemory, TypeStatic) + }) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._MIN, MINL) // _MIN: Minimum Base Address + CreateDWordField (MR64, 0x12, MINH) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._LEN, LENL) // _LEN: Length + CreateDWordField (MR64, 0x2A, LENH) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._MAX, MAXL) // _MAX: Maximum Base Address + CreateDWordField (MR64, 0x1A, MAXH) + MINH = MRBH /* \_SB_.MHPC.MRBH */ + MINL = MRBL /* \_SB_.MHPC.MRBL */ + LENH = MRLH /* \_SB_.MHPC.MRLH */ + LENL = MRLL /* \_SB_.MHPC.MRLL */ + MAXL = (MINL + LENL) /* \_SB_.MHPC.MCRS.LENL */ + MAXH = (MINH + LENH) /* \_SB_.MHPC.MCRS.LENH */ + If ((MAXL < MINL)) + { + MAXH += One + } + + If ((MAXL < One)) + { + MAXH -= One + } + + MAXL -= One + If ((MAXH == Zero)) + { + Name (MR32, ResourceTemplate () + { + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x00000000, // Range Minimum + 0xFFFFFFFE, // Range Maximum + 0x00000000, // Translation Offset + 0xFFFFFFFF, // Length + ,, _Y02, AddressRangeMemory, TypeStatic) + }) + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._MIN, MIN) // _MIN: Minimum Base Address + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._MAX, MAX) // _MAX: Maximum Base Address + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._LEN, LEN) // _LEN: Length + MIN = MINL /* \_SB_.MHPC.MCRS.MINL */ + MAX = MAXL /* \_SB_.MHPC.MCRS.MAXL */ + LEN = LENL /* \_SB_.MHPC.MCRS.LENL */ + Release (MLCK) + Return (MR32) /* \_SB_.MHPC.MCRS.MR32 */ + } + + Release (MLCK) + Return (MR64) /* \_SB_.MHPC.MCRS.MR64 */ + } + + Method (MPXM, 1, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + Local0 = MPX /* \_SB_.MHPC.MPX_ */ + Release (MLCK) + Return (Local0) + } + + Method (MOST, 4, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + MOEV = Arg1 + MOSC = Arg2 + Release (MLCK) + } + + Method (MEJ0, 2, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + MEJ = One + Release (MLCK) + } + + Device (MP00) + { + Name (_UID, "0x00") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Method (MTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (MP00, Arg1) + } + } + } + + Method (\_GPE._E03, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.MHPC.MSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xAFFFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xA8000000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0xC0000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x3EC00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000200000000, // Range Minimum + 0x00000009FFFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000800000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0620, // Range Minimum + 0x0620, // Range Maximum + 0x01, // Alignment + 0x10, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S08) + { + Name (_ADR, 0x00010000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Device (S10) + { + Name (_ADR, 0x00020000) // _ADR: Address + } + + Method (PCNT, 0, NotSerialized) + { + } + } + } +} + diff --git a/tests/data/acpi/q35/DSDT.numamem b/tests/data/acpi/q35/DSDT.numamem index 2b2433cc13ec3110abbc8440a0b1ad8c487edb6c..899946255b9111e077e06c5f78be860e863911b9 100644 GIT binary patch delta 33 ocmZp&{bj@D66_LECC9+PcxEG)mK>)WOH6#QQ@nuPWIH)q0Hvo16951J delta 42 xcmexm(`3u#66_MvB*(zOn7ENkOODHrB_=-DDPF*hWwNcDExQO?fU{o+0|4^g3K{?a diff --git a/tests/data/acpi/q35/DSDT.numamem.dsl b/tests/data/acpi/q35/DSDT.numamem.dsl new file mode 100644 index 0000000000..e76de462f0 --- /dev/null +++ b/tests/data/acpi/q35/DSDT.numamem.dsl @@ -0,0 +1,3138 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/q35/DSDT.numamem, Tue Aug 4 11:14:15 2020 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x00001E04 (7684) + * Revision 0x01 **** 32-bit table (V1), no 64-bit math support + * Checksum 0x55 + * OEM ID "BOCHS " + * OEM Table ID "BXPCDSDT" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001) +{ + Scope (\) + { + OperationRegion (DBG, SystemIO, 0x0402, One) + Field (DBG, ByteAcc, NoLock, Preserve) + { + DBGB, 8 + } + + Method (DBUG, 1, NotSerialized) + { + ToHexString (Arg0, Local0) + ToBuffer (Local0, Local0) + Local1 = (SizeOf (Local0) - One) + Local2 = Zero + While ((Local2 < Local1)) + { + DBGB = DerefOf (Local0 [Local2]) + Local2++ + } + + DBGB = 0x0A + } + } + + Scope (_SB) + { + Device (PCI0) + { + Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID + Name (_ADR, Zero) // _ADR: Address + Name (_UID, Zero) // _UID: Unique ID + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + CreateDWordField (Arg3, Zero, CDW1) + If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) + { + CreateDWordField (Arg3, 0x04, CDW2) + CreateDWordField (Arg3, 0x08, CDW3) + Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */ + Local0 &= 0x1F + If ((Arg1 != One)) + { + CDW1 |= 0x08 + } + + If ((CDW3 != Local0)) + { + CDW1 |= 0x10 + } + + CDW3 = Local0 + } + Else + { + CDW1 |= 0x04 + } + + Return (Arg3) + } + } + } + + Scope (_SB) + { + Device (HPET) + { + Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + OperationRegion (HPTM, SystemMemory, 0xFED00000, 0x0400) + Field (HPTM, DWordAcc, Lock, Preserve) + { + VEND, 32, + PRD, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Local0 = VEND /* \_SB_.HPET.VEND */ + Local1 = PRD /* \_SB_.HPET.PRD_ */ + Local0 >>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x001F0000) // _ADR: Address + OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Name (PICF, Zero) + Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model + { + PICF = Arg0 + } + + Scope (_SB) + { + Scope (PCI0) + { + Name (PRTP, Package (0x80) + { + Package (0x04) + { + 0xFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0xFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x03, + LNKD, + Zero + } + }) + Name (PRTA, Package (0x80) + { + Package (0x04) + { + 0xFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0xFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x03, + GSID, + Zero + } + }) + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If ((PICF == Zero)) + { + Return (PRTP) /* \_SB_.PCI0.PRTP */ + } + Else + { + Return (PRTA) /* \_SB_.PCI0.PRTA */ + } + } + } + + Field (PCI0.ISA.PIRQ, ByteAcc, NoLock, Preserve) + { + PRQA, 8, + PRQB, 8, + PRQC, 8, + PRQD, 8, + Offset (0x08), + PRQE, 8, + PRQF, 8, + PRQG, 8, + PRQH, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + PRRI = (Arg0 & 0x0F) + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQA)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQA |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQA)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQA = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQB)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQB |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQB)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQB = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQC)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQC |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQC)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQC = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQD)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQD |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQD)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQD = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKE) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQE)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQE |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQE)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQE = PRRI /* \_SB_.LNKE._SRS.PRRI */ + } + } + + Device (LNKF) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x05) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQF)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQF |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQF)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQF = PRRI /* \_SB_.LNKF._SRS.PRRI */ + } + } + + Device (LNKG) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x06) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQG)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQG |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQG)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQG = PRRI /* \_SB_.LNKG._SRS.PRRI */ + } + } + + Device (LNKH) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x07) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQH)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQH |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQH)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQH = PRRI /* \_SB_.LNKH._SRS.PRRI */ + } + } + + Device (GSIA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x10) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000010, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000010, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x11) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000011, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000011, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x12) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000012, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000012, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSID) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x13) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000013, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000013, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIE) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x14) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000014, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000014, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIF) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x15) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000015, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000015, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIG) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x16) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000016, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000016, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIH) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x17) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000017, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000017, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB.PCI0) + { + Device (SMB0) + { + Name (_ADR, 0x001F0003) // _ADR: Address + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0CD8, // Range Minimum + 0x0CD8, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0x0CD8, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Local0 = One + While ((Local0 == One)) + { + Local0 = Zero + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CINS == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, One) + \_SB.PCI0.PRES.CINS = One + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + + Name (_PXM, Zero) // _PXM: Device Proximity + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xAFFFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xA8000000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0xC0000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x3EC00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000100000000, // Range Minimum + 0x00000008FFFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000800000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0620, // Range Minimum + 0x0620, // Range Maximum + 0x01, // Alignment + 0x10, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S08) + { + Name (_ADR, 0x00010000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Method (PCNT, 0, NotSerialized) + { + } + } + } +} + diff --git a/tests/data/acpi/q35/DSDT.tis b/tests/data/acpi/q35/DSDT.tis index dd06ee4c348930b0684827ca05747b4f65dbd6b2..08802fbd12eae6ad99f03a8db9a0bc7f95e77cb4 100644 GIT binary patch delta 38 ucmccVc*&8=CDDs0RTDD B46OhF diff --git a/tests/data/acpi/q35/DSDT.tis.dsl b/tests/data/acpi/q35/DSDT.tis.dsl new file mode 100644 index 0000000000..a43e36bfe3 --- /dev/null +++ b/tests/data/acpi/q35/DSDT.tis.dsl @@ -0,0 +1,3321 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/q35/DSDT.tis, Tue Aug 4 11:14:15 2020 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x0000205B (8283) + * Revision 0x01 **** 32-bit table (V1), no 64-bit math support + * Checksum 0x84 + * OEM ID "BOCHS " + * OEM Table ID "BXPCDSDT" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001) +{ + Scope (\) + { + OperationRegion (DBG, SystemIO, 0x0402, One) + Field (DBG, ByteAcc, NoLock, Preserve) + { + DBGB, 8 + } + + Method (DBUG, 1, NotSerialized) + { + ToHexString (Arg0, Local0) + ToBuffer (Local0, Local0) + Local1 = (SizeOf (Local0) - One) + Local2 = Zero + While ((Local2 < Local1)) + { + DBGB = DerefOf (Local0 [Local2]) + Local2++ + } + + DBGB = 0x0A + } + } + + Scope (_SB) + { + Device (PCI0) + { + Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID + Name (_ADR, Zero) // _ADR: Address + Name (_UID, Zero) // _UID: Unique ID + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + CreateDWordField (Arg3, Zero, CDW1) + If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) + { + CreateDWordField (Arg3, 0x04, CDW2) + CreateDWordField (Arg3, 0x08, CDW3) + Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */ + Local0 &= 0x1F + If ((Arg1 != One)) + { + CDW1 |= 0x08 + } + + If ((CDW3 != Local0)) + { + CDW1 |= 0x10 + } + + CDW3 = Local0 + } + Else + { + CDW1 |= 0x04 + } + + Return (Arg3) + } + } + } + + Scope (_SB) + { + Device (HPET) + { + Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + OperationRegion (HPTM, SystemMemory, 0xFED00000, 0x0400) + Field (HPTM, DWordAcc, Lock, Preserve) + { + VEND, 32, + PRD, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Local0 = VEND /* \_SB_.HPET.VEND */ + Local1 = PRD /* \_SB_.HPET.PRD_ */ + Local0 >>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x001F0000) // _ADR: Address + OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Name (PICF, Zero) + Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model + { + PICF = Arg0 + } + + Scope (_SB) + { + Scope (PCI0) + { + Name (PRTP, Package (0x80) + { + Package (0x04) + { + 0xFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0xFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + Zero, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + One, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x02, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x03, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + Zero, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + One, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x02, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x03, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + Zero, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + One, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x02, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x03, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x03, + LNKD, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + Zero, + LNKE, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + One, + LNKF, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x02, + LNKG, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x03, + LNKH, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + Zero, + LNKA, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + One, + LNKB, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x02, + LNKC, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x03, + LNKD, + Zero + } + }) + Name (PRTA, Package (0x80) + { + Package (0x04) + { + 0xFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0xFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + Zero, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + One, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x02, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x03, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + Zero, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + One, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x02, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x03, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + Zero, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + One, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x02, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x03, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x03, + GSID, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + Zero, + GSIE, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + One, + GSIF, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x02, + GSIG, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x03, + GSIH, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + Zero, + GSIA, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + One, + GSIB, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x02, + GSIC, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x03, + GSID, + Zero + } + }) + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + If ((PICF == Zero)) + { + Return (PRTP) /* \_SB_.PCI0.PRTP */ + } + Else + { + Return (PRTA) /* \_SB_.PCI0.PRTA */ + } + } + } + + Field (PCI0.ISA.PIRQ, ByteAcc, NoLock, Preserve) + { + PRQA, 8, + PRQB, 8, + PRQC, 8, + PRQD, 8, + Offset (0x08), + PRQE, 8, + PRQF, 8, + PRQG, 8, + PRQH, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + PRRI = (Arg0 & 0x0F) + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQA)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQA |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQA)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQA = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQB)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQB |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQB)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQB = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQC)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQC |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQC)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQC = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQD)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQD |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQD)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQD = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKE) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQE)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQE |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQE)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQE = PRRI /* \_SB_.LNKE._SRS.PRRI */ + } + } + + Device (LNKF) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x05) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQF)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQF |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQF)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQF = PRRI /* \_SB_.LNKF._SRS.PRRI */ + } + } + + Device (LNKG) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x06) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQG)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQG |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQG)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQG = PRRI /* \_SB_.LNKG._SRS.PRRI */ + } + } + + Device (LNKH) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x07) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQH)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQH |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQH)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQH = PRRI /* \_SB_.LNKH._SRS.PRRI */ + } + } + + Device (GSIA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x10) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000010, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000010, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x11) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000011, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000011, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x12) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000012, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000012, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSID) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x13) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000013, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000013, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIE) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x14) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000014, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000014, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIF) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x15) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000015, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000015, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIG) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x16) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000016, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000016, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSIH) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x17) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000017, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000017, + } + }) + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB.PCI0) + { + Device (SMB0) + { + Name (_ADR, 0x001F0003) // _ADR: Address + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0CD8, // Range Minimum + 0x0CD8, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0x0CD8, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Local0 = One + While ((Local0 == One)) + { + Local0 = Zero + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CINS == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, One) + \_SB.PCI0.PRES.CINS = One + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xAFFFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xA8000000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0xC0000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x3EC00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000100000000, // Range Minimum + 0x00000008FFFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000800000000, // Length + ,, , AddressRangeMemory, TypeStatic) + Memory32Fixed (ReadWrite, + 0xFED40000, // Address Base + 0x00005000, // Address Length + ) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0620, // Range Minimum + 0x0620, // Range Maximum + 0x01, // Alignment + 0x10, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S08) + { + Name (_ADR, 0x00010000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Method (PCNT, 0, NotSerialized) + { + } + + Device (TPM) + { + Name (_HID, "MSFT0101" /* TPM 2.0 Security Device */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0xFED40000, // Address Base + 0x00005000, // Address Length + ) + }) + OperationRegion (TPP2, SystemMemory, 0xFED45100, 0x5A) + Field (TPP2, AnyAcc, NoLock, Preserve) + { + PPIN, 8, + PPIP, 32, + PPRP, 32, + PPRQ, 32, + PPRM, 32, + LPPR, 32 + } + + OperationRegion (TPP3, SystemMemory, 0xFED4515A, One) + Field (TPP3, ByteAcc, NoLock, Preserve) + { + MOVV, 8 + } + + Method (TPFN, 1, Serialized) + { + If ((Arg0 >= 0x0100)) + { + Return (Zero) + } + + OperationRegion (TPP1, SystemMemory, (0xFED45000 + Arg0), One) + Field (TPP1, ByteAcc, NoLock, Preserve) + { + TPPF, 8 + } + + Return (TPPF) /* \_SB_.PCI0.TPM_.TPFN.TPPF */ + } + + Name (TPM2, Package (0x02) + { + Zero, + Zero + }) + Name (TPM3, Package (0x03) + { + Zero, + Zero, + Zero + }) + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + If ((Arg0 == ToUUID ("3dddfaa6-361b-4eb4-a424-8d10089d1653") /* Physical Presence Interface */)) + { + If ((Arg2 == Zero)) + { + Return (Buffer (0x02) + { + 0xFF, 0x01 // .. + }) + } + + If ((Arg2 == One)) + { + Return ("1.3") + } + + If ((Arg2 == 0x02)) + { + Local0 = DerefOf (Arg3 [Zero]) + Local1 = TPFN (Local0) + If (((Local1 & 0x07) == Zero)) + { + Return (One) + } + + PPRQ = Local0 + PPRM = Zero + Return (Zero) + } + + If ((Arg2 == 0x03)) + { + If ((Arg1 == One)) + { + TPM2 [One] = PPRQ /* \_SB_.PCI0.TPM_.PPRQ */ + Return (TPM2) /* \_SB_.PCI0.TPM_.TPM2 */ + } + + If ((Arg1 == 0x02)) + { + TPM3 [One] = PPRQ /* \_SB_.PCI0.TPM_.PPRQ */ + TPM3 [0x02] = PPRM /* \_SB_.PCI0.TPM_.PPRM */ + Return (TPM3) /* \_SB_.PCI0.TPM_.TPM3 */ + } + } + + If ((Arg2 == 0x04)) + { + Return (0x02) + } + + If ((Arg2 == 0x05)) + { + TPM3 [One] = LPPR /* \_SB_.PCI0.TPM_.LPPR */ + TPM3 [0x02] = PPRP /* \_SB_.PCI0.TPM_.PPRP */ + Return (TPM3) /* \_SB_.PCI0.TPM_.TPM3 */ + } + + If ((Arg2 == 0x06)) + { + Return (0x03) + } + + If ((Arg2 == 0x07)) + { + Local0 = DerefOf (Arg3 [Zero]) + Local1 = TPFN (Local0) + If (((Local1 & 0x07) == Zero)) + { + Return (One) + } + + If (((Local1 & 0x07) == 0x02)) + { + Return (0x03) + } + + If ((Arg1 == One)) + { + PPRQ = Local0 + PPRM = Zero + } + + If ((Arg1 == 0x02)) + { + PPRQ = Local0 + PPRM = DerefOf (Arg3 [One]) + } + + Return (Zero) + } + + If ((Arg2 == 0x08)) + { + Local0 = DerefOf (Arg3 [Zero]) + Local1 = TPFN (Local0) + Return ((Local1 & 0x07)) + } + + Return (Buffer (One) + { + 0x00 // . + }) + } + + If ((Arg0 == ToUUID ("376054ed-cc13-4675-901c-4756d7f2d45d"))) + { + If ((Arg2 == Zero)) + { + Return (Buffer (One) + { + 0x03 // . + }) + } + + If ((Arg2 == One)) + { + Local0 = DerefOf (Arg3 [Zero]) + MOVV = Local0 + Return (Zero) + } + } + } + } + } + } +} + diff --git a/tests/data/acpi/q35/FACP.acpihmat b/tests/data/acpi/q35/FACP.acpihmat new file mode 100644 index 0000000000000000000000000000000000000000..72c9d97902a4bbf14896023d9ba78e0899d6517b GIT binary patch literal 244 zcmZ>BbPo8!z`(#P@8s|75v<@85#S6GV`N}p0I@+d0~9baa58LSU|?WkW?*1og9x%f zX%LTtje$V{%4cC>U=d(oVEE7fpC2R#!bS`X3`<)W7#KMi7=H4AL>L(0k`OMKWK=+y g4;FwDi~BbPo8!z`(#P@8s|75v<@85#S6GV`N}p0I@+d0~9baa58LSU|?WkW?*1og9x%f zX%LTtje$V{%4cC>U=d(oVEE7fpC2R#!bS`X3`<)W7#KMi7=H4AL>L(0k`OMKWK=+y g4;FwDi~BbPo8!z`(#P@8s|75v<@85#S6GV`N}p0I@+d0~9baa58LSU|?WkW?*1og9x%f zX%LTtje$V{%4cC>U=d(oVEE7fpC2R#!bS`X3`<)W7#KMi7=H4AL>L(0k`OMKWK=+y g4;FwDi~BbPo8!z`(#P@8s|75v<@85#S6GV`N}p0I@+d0~9baa58LSU|?WkW?*1og9x%f zX%LTtje$V{%4cC>U=d(oVEE7fpC2R#!bS`X3`<)W7#KMi7=H4AL>L(0k`OMKWK=+y g4;FwDi~BbPo8!z`(#P@8s|75v<@85#S6GV`N}p0I@+d0~9baa58LSU|?WkW?*1og9x%f zX%LTtje$V{%4cC>U=d(oVEE7fpC2R#!bS`X3`<)W7#KMi7=H4AL>L(0k`OMKWK=+y g4;FwDi~BbPo8!z`(#P@8s|75v<@85#S6GV`N}p0I@+d0~9baa58LSU|?WkW?*1og9x%f zX%LTtje$V{%4cC>U=d(oVEE7fpC2R#!bS`X3`<)W7#KMi7=H4AL>L(0k`OMKWK=+y g4;FwDi~BbPo8!z`(#P@8s|75v<@85#S6GV`N}p0I@+d0~9baa58LSU|?WkW?*1og9x%f zX%LTtje$V{%4cC>U=d(oVEE7fpC2R#!bS`X3`<)W7#KMi7=H4AL>L(0k`OMKWK=+y g4;FwDi~BbPo8!z`(#P@8s|75v<@85#S6GV`N}p0I@+d0~9baa58LSU|?WkW?*1og9x%f zX%LTtje$V{%4cC>U=d(oVEE7fpC2R#!bS`X3`<)W7#KMi7=H4AL>L(0k`OMKWK=+y g4;FwDi~BbPo8!z`(#P@8s|75v<@85#S6GV`N}p0I@+d0~9baa58LSU|?WkW?*1og9x%f zX%LTtje$V{%4cC>U=d(oVEE7fpC2R#!bS`X3`<)W7#KMi7=H4AL>L(0k`OMKWK=+y g4;FwDi~BbPjf4ARhn#RKNjV literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/FACS.acpihmat.dsl b/tests/data/acpi/q35/FACS.acpihmat.dsl new file mode 100644 index 0000000000..0bd98653ce --- /dev/null +++ b/tests/data/acpi/q35/FACS.acpihmat.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/FACS.acpihmat, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/q35/FACS.bridge b/tests/data/acpi/q35/FACS.bridge new file mode 100644 index 0000000000000000000000000000000000000000..fc67ecc40782bd7fe8921e430d7de67f0bfaad93 GIT binary patch literal 64 PcmZ>BbPjf4ARhn#RKNjV literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/FACS.bridge.dsl b/tests/data/acpi/q35/FACS.bridge.dsl new file mode 100644 index 0000000000..116dce1f2d --- /dev/null +++ b/tests/data/acpi/q35/FACS.bridge.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/FACS.bridge, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/q35/FACS.cphp b/tests/data/acpi/q35/FACS.cphp new file mode 100644 index 0000000000000000000000000000000000000000..fc67ecc40782bd7fe8921e430d7de67f0bfaad93 GIT binary patch literal 64 PcmZ>BbPjf4ARhn#RKNjV literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/FACS.cphp.dsl b/tests/data/acpi/q35/FACS.cphp.dsl new file mode 100644 index 0000000000..580d502491 --- /dev/null +++ b/tests/data/acpi/q35/FACS.cphp.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/FACS.cphp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/q35/FACS.dimmpxm b/tests/data/acpi/q35/FACS.dimmpxm new file mode 100644 index 0000000000000000000000000000000000000000..fc67ecc40782bd7fe8921e430d7de67f0bfaad93 GIT binary patch literal 64 PcmZ>BbPjf4ARhn#RKNjV literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/FACS.dimmpxm.dsl b/tests/data/acpi/q35/FACS.dimmpxm.dsl new file mode 100644 index 0000000000..4106387866 --- /dev/null +++ b/tests/data/acpi/q35/FACS.dimmpxm.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/FACS.dimmpxm, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/q35/FACS.dsl b/tests/data/acpi/q35/FACS.dsl new file mode 100644 index 0000000000..0595b4ddb9 --- /dev/null +++ b/tests/data/acpi/q35/FACS.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/FACS.tis, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/q35/FACS.ipmibt b/tests/data/acpi/q35/FACS.ipmibt new file mode 100644 index 0000000000000000000000000000000000000000..fc67ecc40782bd7fe8921e430d7de67f0bfaad93 GIT binary patch literal 64 PcmZ>BbPjf4ARhn#RKNjV literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/FACS.ipmibt.dsl b/tests/data/acpi/q35/FACS.ipmibt.dsl new file mode 100644 index 0000000000..8c019f3475 --- /dev/null +++ b/tests/data/acpi/q35/FACS.ipmibt.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/FACS.ipmibt, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/q35/FACS.memhp b/tests/data/acpi/q35/FACS.memhp new file mode 100644 index 0000000000000000000000000000000000000000..fc67ecc40782bd7fe8921e430d7de67f0bfaad93 GIT binary patch literal 64 PcmZ>BbPjf4ARhn#RKNjV literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/FACS.memhp.dsl b/tests/data/acpi/q35/FACS.memhp.dsl new file mode 100644 index 0000000000..fb6d84c152 --- /dev/null +++ b/tests/data/acpi/q35/FACS.memhp.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/FACS.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/q35/FACS.mmio64 b/tests/data/acpi/q35/FACS.mmio64 new file mode 100644 index 0000000000000000000000000000000000000000..fc67ecc40782bd7fe8921e430d7de67f0bfaad93 GIT binary patch literal 64 PcmZ>BbPjf4ARhn#RKNjV literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/FACS.mmio64.dsl b/tests/data/acpi/q35/FACS.mmio64.dsl new file mode 100644 index 0000000000..1a20060749 --- /dev/null +++ b/tests/data/acpi/q35/FACS.mmio64.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/FACS.mmio64, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/q35/FACS.numamem b/tests/data/acpi/q35/FACS.numamem new file mode 100644 index 0000000000000000000000000000000000000000..fc67ecc40782bd7fe8921e430d7de67f0bfaad93 GIT binary patch literal 64 PcmZ>BbPjf4ARhn#RKNjV literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/FACS.numamem.dsl b/tests/data/acpi/q35/FACS.numamem.dsl new file mode 100644 index 0000000000..740e0bca9a --- /dev/null +++ b/tests/data/acpi/q35/FACS.numamem.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/FACS.numamem, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/q35/FACS.tis b/tests/data/acpi/q35/FACS.tis new file mode 100644 index 0000000000000000000000000000000000000000..fc67ecc40782bd7fe8921e430d7de67f0bfaad93 GIT binary patch literal 64 PcmZ>BbPjf4ARhn#RKNjV literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/FACS.tis.dsl b/tests/data/acpi/q35/FACS.tis.dsl new file mode 100644 index 0000000000..cb35bde06c --- /dev/null +++ b/tests/data/acpi/q35/FACS.tis.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/FACS.tis, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/q35/HMAT.acpihmat.dsl b/tests/data/acpi/q35/HMAT.acpihmat.dsl new file mode 100644 index 0000000000..4abaa94f78 --- /dev/null +++ b/tests/data/acpi/q35/HMAT.acpihmat.dsl @@ -0,0 +1,132 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/HMAT.acpihmat, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HMAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HMAT" [Heterogeneous Memory Attributes Table] +[004h 0004 4] Table Length : 00000118 +[008h 0008 1] Revision : 02 +[009h 0009 1] Checksum : 98 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHMAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Reserved : 00000000 + +[028h 0040 2] Structure Type : 0000 [Memory Proximity Domain Attributes] +[02Ah 0042 2] Reserved : 0000 +[02Ch 0044 4] Length : 00000028 +[030h 0048 2] Flags (decoded below) : 0001 + Processor Proximity Domain Valid : 1 +[032h 0050 2] Reserved1 : 0000 +[034h 0052 4] Processor Proximity Domain : 00000000 +[038h 0056 4] Memory Proximity Domain : 00000000 +[03Ch 0060 4] Reserved2 : 00000000 +[040h 0064 8] Reserved3 : 0000000000000000 +[048h 0072 8] Reserved4 : 0000000000000000 + +[050h 0080 2] Structure Type : 0000 [Memory Proximity Domain Attributes] +[052h 0082 2] Reserved : 0000 +[054h 0084 4] Length : 00000028 +[058h 0088 2] Flags (decoded below) : 0001 + Processor Proximity Domain Valid : 1 +[05Ah 0090 2] Reserved1 : 0000 +[05Ch 0092 4] Processor Proximity Domain : 00000000 +[060h 0096 4] Memory Proximity Domain : 00000001 +[064h 0100 4] Reserved2 : 00000000 +[068h 0104 8] Reserved3 : 0000000000000000 +[070h 0112 8] Reserved4 : 0000000000000000 + +[078h 0120 2] Structure Type : 0001 [System Locality Latency and Bandwidth Information] +[07Ah 0122 2] Reserved : 0000 +[07Ch 0124 4] Length : 00000030 +[080h 0128 1] Flags (decoded below) : 00 + Memory Hierarchy : 0 +[081h 0129 1] Data Type : 00 +[082h 0130 2] Reserved1 : 0000 +[084h 0132 4] Initiator Proximity Domains # : 00000001 +[088h 0136 4] Target Proximity Domains # : 00000002 +[08Ch 0140 4] Reserved2 : 00000000 +[090h 0144 8] Entry Base Unit : 00000000000003E8 +[098h 0152 4] Initiator Proximity Domain List : 00000000 +[09Ch 0156 4] Target Proximity Domain List : 00000000 +[0A0h 0160 4] Target Proximity Domain List : 00000001 +[0A4h 0164 2] Entry : 0001 +[0A6h 0166 2] Entry : FFFE + +[0A8h 0168 2] Structure Type : 0001 [System Locality Latency and Bandwidth Information] +[0AAh 0170 2] Reserved : 0000 +[0ACh 0172 4] Length : 00000030 +[0B0h 0176 1] Flags (decoded below) : 00 + Memory Hierarchy : 0 +[0B1h 0177 1] Data Type : 03 +[0B2h 0178 2] Reserved1 : 0000 +[0B4h 0180 4] Initiator Proximity Domains # : 00000001 +[0B8h 0184 4] Target Proximity Domains # : 00000002 +[0BCh 0188 4] Reserved2 : 00000000 +[0C0h 0192 8] Entry Base Unit : 0000000000000001 +[0C8h 0200 4] Initiator Proximity Domain List : 00000000 +[0CCh 0204 4] Target Proximity Domain List : 00000000 +[0D0h 0208 4] Target Proximity Domain List : 00000001 +[0D4h 0212 2] Entry : FFFE +[0D6h 0214 2] Entry : 7FFF + +[0D8h 0216 2] Structure Type : 0002 [Memory Side Cache Information] +[0DAh 0218 2] Reserved : 0000 +[0DCh 0220 4] Length : 00000020 +[0E0h 0224 4] Memory Proximity Domain : 00000000 +[0E4h 0228 4] Reserved1 : 00000000 +[0E8h 0232 8] Memory Side Cache Size : 0000000000002800 +[0F0h 0240 4] Cache Attributes (decoded below) : 00081111 + Total Cache Levels : 1 + Cache Level : 1 + Cache Associativity : 1 + Write Policy : 1 + Cache Line Size : 0008 +[0F4h 0244 2] Reserved2 : 0000 +[0F6h 0246 2] SMBIOS Handle # : 0000 + +[0F8h 0248 2] Structure Type : 0002 [Memory Side Cache Information] +[0FAh 0250 2] Reserved : 0000 +[0FCh 0252 4] Length : 00000020 +[100h 0256 4] Memory Proximity Domain : 00000001 +[104h 0260 4] Reserved1 : 00000000 +[108h 0264 8] Memory Side Cache Size : 0000000000002800 +[110h 0272 4] Cache Attributes (decoded below) : 00081111 + Total Cache Levels : 1 + Cache Level : 1 + Cache Associativity : 1 + Write Policy : 1 + Cache Line Size : 0008 +[114h 0276 2] Reserved2 : 0000 +[116h 0278 2] SMBIOS Handle # : 0000 + +Raw Table Data: Length 280 (0x118) + + 0000: 48 4D 41 54 18 01 00 00 02 98 42 4F 43 48 53 20 // HMAT......BOCHS + 0010: 42 58 50 43 48 4D 41 54 01 00 00 00 42 58 50 43 // BXPCHMAT....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 28 00 00 00 // ............(... + 0030: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0050: 00 00 00 00 28 00 00 00 01 00 00 00 00 00 00 00 // ....(........... + 0060: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0070: 00 00 00 00 00 00 00 00 01 00 00 00 30 00 00 00 // ............0... + 0080: 00 00 00 00 01 00 00 00 02 00 00 00 00 00 00 00 // ................ + 0090: E8 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00A0: 01 00 00 00 01 00 FE FF 01 00 00 00 30 00 00 00 // ............0... + 00B0: 00 03 00 00 01 00 00 00 02 00 00 00 00 00 00 00 // ................ + 00C0: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 01 00 00 00 FE FF FF 7F 02 00 00 00 20 00 00 00 // ............ ... + 00E0: 00 00 00 00 00 00 00 00 00 28 00 00 00 00 00 00 // .........(...... + 00F0: 11 11 08 00 00 00 00 00 02 00 00 00 20 00 00 00 // ............ ... + 0100: 01 00 00 00 00 00 00 00 00 28 00 00 00 00 00 00 // .........(...... + 0110: 11 11 08 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/q35/HMAT.dsl b/tests/data/acpi/q35/HMAT.dsl new file mode 100644 index 0000000000..43bc9adc98 --- /dev/null +++ b/tests/data/acpi/q35/HMAT.dsl @@ -0,0 +1,132 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/HMAT.acpihmat, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [HMAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HMAT" [Heterogeneous Memory Attributes Table] +[004h 0004 4] Table Length : 00000118 +[008h 0008 1] Revision : 02 +[009h 0009 1] Checksum : 98 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHMAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Reserved : 00000000 + +[028h 0040 2] Structure Type : 0000 [Memory Proximity Domain Attributes] +[02Ah 0042 2] Reserved : 0000 +[02Ch 0044 4] Length : 00000028 +[030h 0048 2] Flags (decoded below) : 0001 + Processor Proximity Domain Valid : 1 +[032h 0050 2] Reserved1 : 0000 +[034h 0052 4] Processor Proximity Domain : 00000000 +[038h 0056 4] Memory Proximity Domain : 00000000 +[03Ch 0060 4] Reserved2 : 00000000 +[040h 0064 8] Reserved3 : 0000000000000000 +[048h 0072 8] Reserved4 : 0000000000000000 + +[050h 0080 2] Structure Type : 0000 [Memory Proximity Domain Attributes] +[052h 0082 2] Reserved : 0000 +[054h 0084 4] Length : 00000028 +[058h 0088 2] Flags (decoded below) : 0001 + Processor Proximity Domain Valid : 1 +[05Ah 0090 2] Reserved1 : 0000 +[05Ch 0092 4] Processor Proximity Domain : 00000000 +[060h 0096 4] Memory Proximity Domain : 00000001 +[064h 0100 4] Reserved2 : 00000000 +[068h 0104 8] Reserved3 : 0000000000000000 +[070h 0112 8] Reserved4 : 0000000000000000 + +[078h 0120 2] Structure Type : 0001 [System Locality Latency and Bandwidth Information] +[07Ah 0122 2] Reserved : 0000 +[07Ch 0124 4] Length : 00000030 +[080h 0128 1] Flags (decoded below) : 00 + Memory Hierarchy : 0 +[081h 0129 1] Data Type : 00 +[082h 0130 2] Reserved1 : 0000 +[084h 0132 4] Initiator Proximity Domains # : 00000001 +[088h 0136 4] Target Proximity Domains # : 00000002 +[08Ch 0140 4] Reserved2 : 00000000 +[090h 0144 8] Entry Base Unit : 00000000000003E8 +[098h 0152 4] Initiator Proximity Domain List : 00000000 +[09Ch 0156 4] Target Proximity Domain List : 00000000 +[0A0h 0160 4] Target Proximity Domain List : 00000001 +[0A4h 0164 2] Entry : 0001 +[0A6h 0166 2] Entry : FFFE + +[0A8h 0168 2] Structure Type : 0001 [System Locality Latency and Bandwidth Information] +[0AAh 0170 2] Reserved : 0000 +[0ACh 0172 4] Length : 00000030 +[0B0h 0176 1] Flags (decoded below) : 00 + Memory Hierarchy : 0 +[0B1h 0177 1] Data Type : 03 +[0B2h 0178 2] Reserved1 : 0000 +[0B4h 0180 4] Initiator Proximity Domains # : 00000001 +[0B8h 0184 4] Target Proximity Domains # : 00000002 +[0BCh 0188 4] Reserved2 : 00000000 +[0C0h 0192 8] Entry Base Unit : 0000000000000001 +[0C8h 0200 4] Initiator Proximity Domain List : 00000000 +[0CCh 0204 4] Target Proximity Domain List : 00000000 +[0D0h 0208 4] Target Proximity Domain List : 00000001 +[0D4h 0212 2] Entry : FFFE +[0D6h 0214 2] Entry : 7FFF + +[0D8h 0216 2] Structure Type : 0002 [Memory Side Cache Information] +[0DAh 0218 2] Reserved : 0000 +[0DCh 0220 4] Length : 00000020 +[0E0h 0224 4] Memory Proximity Domain : 00000000 +[0E4h 0228 4] Reserved1 : 00000000 +[0E8h 0232 8] Memory Side Cache Size : 0000000000002800 +[0F0h 0240 4] Cache Attributes (decoded below) : 00081111 + Total Cache Levels : 1 + Cache Level : 1 + Cache Associativity : 1 + Write Policy : 1 + Cache Line Size : 0008 +[0F4h 0244 2] Reserved2 : 0000 +[0F6h 0246 2] SMBIOS Handle # : 0000 + +[0F8h 0248 2] Structure Type : 0002 [Memory Side Cache Information] +[0FAh 0250 2] Reserved : 0000 +[0FCh 0252 4] Length : 00000020 +[100h 0256 4] Memory Proximity Domain : 00000001 +[104h 0260 4] Reserved1 : 00000000 +[108h 0264 8] Memory Side Cache Size : 0000000000002800 +[110h 0272 4] Cache Attributes (decoded below) : 00081111 + Total Cache Levels : 1 + Cache Level : 1 + Cache Associativity : 1 + Write Policy : 1 + Cache Line Size : 0008 +[114h 0276 2] Reserved2 : 0000 +[116h 0278 2] SMBIOS Handle # : 0000 + +Raw Table Data: Length 280 (0x118) + + 0000: 48 4D 41 54 18 01 00 00 02 98 42 4F 43 48 53 20 // HMAT......BOCHS + 0010: 42 58 50 43 48 4D 41 54 01 00 00 00 42 58 50 43 // BXPCHMAT....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 28 00 00 00 // ............(... + 0030: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0050: 00 00 00 00 28 00 00 00 01 00 00 00 00 00 00 00 // ....(........... + 0060: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0070: 00 00 00 00 00 00 00 00 01 00 00 00 30 00 00 00 // ............0... + 0080: 00 00 00 00 01 00 00 00 02 00 00 00 00 00 00 00 // ................ + 0090: E8 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00A0: 01 00 00 00 01 00 FE FF 01 00 00 00 30 00 00 00 // ............0... + 00B0: 00 03 00 00 01 00 00 00 02 00 00 00 00 00 00 00 // ................ + 00C0: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 01 00 00 00 FE FF FF 7F 02 00 00 00 20 00 00 00 // ............ ... + 00E0: 00 00 00 00 00 00 00 00 00 28 00 00 00 00 00 00 // .........(...... + 00F0: 11 11 08 00 00 00 00 00 02 00 00 00 20 00 00 00 // ............ ... + 0100: 01 00 00 00 00 00 00 00 00 28 00 00 00 00 00 00 // .........(...... + 0110: 11 11 08 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/q35/HPET.acpihmat b/tests/data/acpi/q35/HPET.acpihmat new file mode 100644 index 0000000000000000000000000000000000000000..df689b8f99c1c43cfd7d63bdede3bcdfd23b7de1 GIT binary patch literal 56 xcmeYWa1F6wU|?WmcJg=j2v%^42yh08F)}bPfY>0KaZy_X0~lQR2c{Sp7yvda3IPBB literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/HPET.acpihmat.dsl b/tests/data/acpi/q35/HPET.acpihmat.dsl new file mode 100644 index 0000000000..9806b81069 --- /dev/null +++ b/tests/data/acpi/q35/HPET.acpihmat.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/HPET.acpihmat, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/q35/HPET.bridge b/tests/data/acpi/q35/HPET.bridge new file mode 100644 index 0000000000000000000000000000000000000000..df689b8f99c1c43cfd7d63bdede3bcdfd23b7de1 GIT binary patch literal 56 xcmeYWa1F6wU|?WmcJg=j2v%^42yh08F)}bPfY>0KaZy_X0~lQR2c{Sp7yvda3IPBB literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/HPET.bridge.dsl b/tests/data/acpi/q35/HPET.bridge.dsl new file mode 100644 index 0000000000..817040df23 --- /dev/null +++ b/tests/data/acpi/q35/HPET.bridge.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/HPET.bridge, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/q35/HPET.cphp b/tests/data/acpi/q35/HPET.cphp new file mode 100644 index 0000000000000000000000000000000000000000..df689b8f99c1c43cfd7d63bdede3bcdfd23b7de1 GIT binary patch literal 56 xcmeYWa1F6wU|?WmcJg=j2v%^42yh08F)}bPfY>0KaZy_X0~lQR2c{Sp7yvda3IPBB literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/HPET.cphp.dsl b/tests/data/acpi/q35/HPET.cphp.dsl new file mode 100644 index 0000000000..4134b96873 --- /dev/null +++ b/tests/data/acpi/q35/HPET.cphp.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/HPET.cphp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/q35/HPET.dimmpxm b/tests/data/acpi/q35/HPET.dimmpxm new file mode 100644 index 0000000000000000000000000000000000000000..df689b8f99c1c43cfd7d63bdede3bcdfd23b7de1 GIT binary patch literal 56 xcmeYWa1F6wU|?WmcJg=j2v%^42yh08F)}bPfY>0KaZy_X0~lQR2c{Sp7yvda3IPBB literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/HPET.dimmpxm.dsl b/tests/data/acpi/q35/HPET.dimmpxm.dsl new file mode 100644 index 0000000000..42a7cc5fd6 --- /dev/null +++ b/tests/data/acpi/q35/HPET.dimmpxm.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/HPET.dimmpxm, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/q35/HPET.dsl b/tests/data/acpi/q35/HPET.dsl new file mode 100644 index 0000000000..42c40fd653 --- /dev/null +++ b/tests/data/acpi/q35/HPET.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/HPET.tis, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/q35/HPET.ipmibt b/tests/data/acpi/q35/HPET.ipmibt new file mode 100644 index 0000000000000000000000000000000000000000..df689b8f99c1c43cfd7d63bdede3bcdfd23b7de1 GIT binary patch literal 56 xcmeYWa1F6wU|?WmcJg=j2v%^42yh08F)}bPfY>0KaZy_X0~lQR2c{Sp7yvda3IPBB literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/HPET.ipmibt.dsl b/tests/data/acpi/q35/HPET.ipmibt.dsl new file mode 100644 index 0000000000..9637f4cf81 --- /dev/null +++ b/tests/data/acpi/q35/HPET.ipmibt.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/HPET.ipmibt, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/q35/HPET.memhp b/tests/data/acpi/q35/HPET.memhp new file mode 100644 index 0000000000000000000000000000000000000000..df689b8f99c1c43cfd7d63bdede3bcdfd23b7de1 GIT binary patch literal 56 xcmeYWa1F6wU|?WmcJg=j2v%^42yh08F)}bPfY>0KaZy_X0~lQR2c{Sp7yvda3IPBB literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/HPET.memhp.dsl b/tests/data/acpi/q35/HPET.memhp.dsl new file mode 100644 index 0000000000..2efab15846 --- /dev/null +++ b/tests/data/acpi/q35/HPET.memhp.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/HPET.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/q35/HPET.mmio64 b/tests/data/acpi/q35/HPET.mmio64 new file mode 100644 index 0000000000000000000000000000000000000000..df689b8f99c1c43cfd7d63bdede3bcdfd23b7de1 GIT binary patch literal 56 xcmeYWa1F6wU|?WmcJg=j2v%^42yh08F)}bPfY>0KaZy_X0~lQR2c{Sp7yvda3IPBB literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/HPET.mmio64.dsl b/tests/data/acpi/q35/HPET.mmio64.dsl new file mode 100644 index 0000000000..dba0368678 --- /dev/null +++ b/tests/data/acpi/q35/HPET.mmio64.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/HPET.mmio64, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/q35/HPET.numamem b/tests/data/acpi/q35/HPET.numamem new file mode 100644 index 0000000000000000000000000000000000000000..df689b8f99c1c43cfd7d63bdede3bcdfd23b7de1 GIT binary patch literal 56 xcmeYWa1F6wU|?WmcJg=j2v%^42yh08F)}bPfY>0KaZy_X0~lQR2c{Sp7yvda3IPBB literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/HPET.numamem.dsl b/tests/data/acpi/q35/HPET.numamem.dsl new file mode 100644 index 0000000000..e9d18a59fd --- /dev/null +++ b/tests/data/acpi/q35/HPET.numamem.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/HPET.numamem, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/q35/HPET.tis b/tests/data/acpi/q35/HPET.tis new file mode 100644 index 0000000000000000000000000000000000000000..df689b8f99c1c43cfd7d63bdede3bcdfd23b7de1 GIT binary patch literal 56 xcmeYWa1F6wU|?WmcJg=j2v%^42yh08F)}bPfY>0KaZy_X0~lQR2c{Sp7yvda3IPBB literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/HPET.tis.dsl b/tests/data/acpi/q35/HPET.tis.dsl new file mode 100644 index 0000000000..471cb5b940 --- /dev/null +++ b/tests/data/acpi/q35/HPET.tis.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/HPET.tis, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/q35/MCFG.acpihmat b/tests/data/acpi/q35/MCFG.acpihmat new file mode 100644 index 0000000000000000000000000000000000000000..79ceb27a038c6e29d098b98dda2e229495f96b7c GIT binary patch literal 60 scmeZuc5}C3U|?W;@8s|75v<@85#S6GV`N}p0I@+d0|IP-GXH~U09T?30RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/MCFG.acpihmat.dsl b/tests/data/acpi/q35/MCFG.acpihmat.dsl new file mode 100644 index 0000000000..8d07f64e9d --- /dev/null +++ b/tests/data/acpi/q35/MCFG.acpihmat.dsl @@ -0,0 +1,36 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/MCFG.acpihmat, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [MCFG] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table] +[004h 0004 4] Table Length : 0000003C +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : EF +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCMCFG" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Reserved : 0000000000000000 + +[02Ch 0044 8] Base Address : 00000000B0000000 +[034h 0052 2] Segment Group Number : 0000 +[036h 0054 1] Start Bus Number : 00 +[037h 0055 1] End Bus Number : FF +[038h 0056 4] Reserved : 00000000 + +Raw Table Data: Length 60 (0x3C) + + 0000: 4D 43 46 47 3C 00 00 00 01 EF 42 4F 43 48 53 20 // MCFG<.....BOCHS + 0010: 42 58 50 43 4D 43 46 47 01 00 00 00 42 58 50 43 // BXPCMCFG....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 B0 // ................ + 0030: 00 00 00 00 00 00 00 FF 00 00 00 00 // ............ diff --git a/tests/data/acpi/q35/MCFG.bridge b/tests/data/acpi/q35/MCFG.bridge new file mode 100644 index 0000000000000000000000000000000000000000..79ceb27a038c6e29d098b98dda2e229495f96b7c GIT binary patch literal 60 scmeZuc5}C3U|?W;@8s|75v<@85#S6GV`N}p0I@+d0|IP-GXH~U09T?30RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/MCFG.bridge.dsl b/tests/data/acpi/q35/MCFG.bridge.dsl new file mode 100644 index 0000000000..6ce54d7228 --- /dev/null +++ b/tests/data/acpi/q35/MCFG.bridge.dsl @@ -0,0 +1,36 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/MCFG.bridge, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [MCFG] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table] +[004h 0004 4] Table Length : 0000003C +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : EF +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCMCFG" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Reserved : 0000000000000000 + +[02Ch 0044 8] Base Address : 00000000B0000000 +[034h 0052 2] Segment Group Number : 0000 +[036h 0054 1] Start Bus Number : 00 +[037h 0055 1] End Bus Number : FF +[038h 0056 4] Reserved : 00000000 + +Raw Table Data: Length 60 (0x3C) + + 0000: 4D 43 46 47 3C 00 00 00 01 EF 42 4F 43 48 53 20 // MCFG<.....BOCHS + 0010: 42 58 50 43 4D 43 46 47 01 00 00 00 42 58 50 43 // BXPCMCFG....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 B0 // ................ + 0030: 00 00 00 00 00 00 00 FF 00 00 00 00 // ............ diff --git a/tests/data/acpi/q35/MCFG.cphp b/tests/data/acpi/q35/MCFG.cphp new file mode 100644 index 0000000000000000000000000000000000000000..79ceb27a038c6e29d098b98dda2e229495f96b7c GIT binary patch literal 60 scmeZuc5}C3U|?W;@8s|75v<@85#S6GV`N}p0I@+d0|IP-GXH~U09T?30RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/MCFG.cphp.dsl b/tests/data/acpi/q35/MCFG.cphp.dsl new file mode 100644 index 0000000000..7ffd7f30db --- /dev/null +++ b/tests/data/acpi/q35/MCFG.cphp.dsl @@ -0,0 +1,36 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/MCFG.cphp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [MCFG] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table] +[004h 0004 4] Table Length : 0000003C +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : EF +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCMCFG" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Reserved : 0000000000000000 + +[02Ch 0044 8] Base Address : 00000000B0000000 +[034h 0052 2] Segment Group Number : 0000 +[036h 0054 1] Start Bus Number : 00 +[037h 0055 1] End Bus Number : FF +[038h 0056 4] Reserved : 00000000 + +Raw Table Data: Length 60 (0x3C) + + 0000: 4D 43 46 47 3C 00 00 00 01 EF 42 4F 43 48 53 20 // MCFG<.....BOCHS + 0010: 42 58 50 43 4D 43 46 47 01 00 00 00 42 58 50 43 // BXPCMCFG....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 B0 // ................ + 0030: 00 00 00 00 00 00 00 FF 00 00 00 00 // ............ diff --git a/tests/data/acpi/q35/MCFG.dimmpxm b/tests/data/acpi/q35/MCFG.dimmpxm new file mode 100644 index 0000000000000000000000000000000000000000..79ceb27a038c6e29d098b98dda2e229495f96b7c GIT binary patch literal 60 scmeZuc5}C3U|?W;@8s|75v<@85#S6GV`N}p0I@+d0|IP-GXH~U09T?30RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/MCFG.dimmpxm.dsl b/tests/data/acpi/q35/MCFG.dimmpxm.dsl new file mode 100644 index 0000000000..dd7373b692 --- /dev/null +++ b/tests/data/acpi/q35/MCFG.dimmpxm.dsl @@ -0,0 +1,36 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/MCFG.dimmpxm, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [MCFG] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table] +[004h 0004 4] Table Length : 0000003C +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : EF +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCMCFG" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Reserved : 0000000000000000 + +[02Ch 0044 8] Base Address : 00000000B0000000 +[034h 0052 2] Segment Group Number : 0000 +[036h 0054 1] Start Bus Number : 00 +[037h 0055 1] End Bus Number : FF +[038h 0056 4] Reserved : 00000000 + +Raw Table Data: Length 60 (0x3C) + + 0000: 4D 43 46 47 3C 00 00 00 01 EF 42 4F 43 48 53 20 // MCFG<.....BOCHS + 0010: 42 58 50 43 4D 43 46 47 01 00 00 00 42 58 50 43 // BXPCMCFG....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 B0 // ................ + 0030: 00 00 00 00 00 00 00 FF 00 00 00 00 // ............ diff --git a/tests/data/acpi/q35/MCFG.dsl b/tests/data/acpi/q35/MCFG.dsl new file mode 100644 index 0000000000..5179d6d707 --- /dev/null +++ b/tests/data/acpi/q35/MCFG.dsl @@ -0,0 +1,36 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/MCFG.tis, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [MCFG] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table] +[004h 0004 4] Table Length : 0000003C +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : EF +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCMCFG" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Reserved : 0000000000000000 + +[02Ch 0044 8] Base Address : 00000000B0000000 +[034h 0052 2] Segment Group Number : 0000 +[036h 0054 1] Start Bus Number : 00 +[037h 0055 1] End Bus Number : FF +[038h 0056 4] Reserved : 00000000 + +Raw Table Data: Length 60 (0x3C) + + 0000: 4D 43 46 47 3C 00 00 00 01 EF 42 4F 43 48 53 20 // MCFG<.....BOCHS + 0010: 42 58 50 43 4D 43 46 47 01 00 00 00 42 58 50 43 // BXPCMCFG....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 B0 // ................ + 0030: 00 00 00 00 00 00 00 FF 00 00 00 00 // ............ diff --git a/tests/data/acpi/q35/MCFG.ipmibt b/tests/data/acpi/q35/MCFG.ipmibt new file mode 100644 index 0000000000000000000000000000000000000000..79ceb27a038c6e29d098b98dda2e229495f96b7c GIT binary patch literal 60 scmeZuc5}C3U|?W;@8s|75v<@85#S6GV`N}p0I@+d0|IP-GXH~U09T?30RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/MCFG.ipmibt.dsl b/tests/data/acpi/q35/MCFG.ipmibt.dsl new file mode 100644 index 0000000000..80c372162c --- /dev/null +++ b/tests/data/acpi/q35/MCFG.ipmibt.dsl @@ -0,0 +1,36 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/MCFG.ipmibt, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [MCFG] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table] +[004h 0004 4] Table Length : 0000003C +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : EF +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCMCFG" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Reserved : 0000000000000000 + +[02Ch 0044 8] Base Address : 00000000B0000000 +[034h 0052 2] Segment Group Number : 0000 +[036h 0054 1] Start Bus Number : 00 +[037h 0055 1] End Bus Number : FF +[038h 0056 4] Reserved : 00000000 + +Raw Table Data: Length 60 (0x3C) + + 0000: 4D 43 46 47 3C 00 00 00 01 EF 42 4F 43 48 53 20 // MCFG<.....BOCHS + 0010: 42 58 50 43 4D 43 46 47 01 00 00 00 42 58 50 43 // BXPCMCFG....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 B0 // ................ + 0030: 00 00 00 00 00 00 00 FF 00 00 00 00 // ............ diff --git a/tests/data/acpi/q35/MCFG.memhp b/tests/data/acpi/q35/MCFG.memhp new file mode 100644 index 0000000000000000000000000000000000000000..79ceb27a038c6e29d098b98dda2e229495f96b7c GIT binary patch literal 60 scmeZuc5}C3U|?W;@8s|75v<@85#S6GV`N}p0I@+d0|IP-GXH~U09T?30RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/MCFG.memhp.dsl b/tests/data/acpi/q35/MCFG.memhp.dsl new file mode 100644 index 0000000000..1b1f666833 --- /dev/null +++ b/tests/data/acpi/q35/MCFG.memhp.dsl @@ -0,0 +1,36 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/MCFG.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [MCFG] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table] +[004h 0004 4] Table Length : 0000003C +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : EF +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCMCFG" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Reserved : 0000000000000000 + +[02Ch 0044 8] Base Address : 00000000B0000000 +[034h 0052 2] Segment Group Number : 0000 +[036h 0054 1] Start Bus Number : 00 +[037h 0055 1] End Bus Number : FF +[038h 0056 4] Reserved : 00000000 + +Raw Table Data: Length 60 (0x3C) + + 0000: 4D 43 46 47 3C 00 00 00 01 EF 42 4F 43 48 53 20 // MCFG<.....BOCHS + 0010: 42 58 50 43 4D 43 46 47 01 00 00 00 42 58 50 43 // BXPCMCFG....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 B0 // ................ + 0030: 00 00 00 00 00 00 00 FF 00 00 00 00 // ............ diff --git a/tests/data/acpi/q35/MCFG.mmio64 b/tests/data/acpi/q35/MCFG.mmio64 new file mode 100644 index 0000000000000000000000000000000000000000..79ceb27a038c6e29d098b98dda2e229495f96b7c GIT binary patch literal 60 scmeZuc5}C3U|?W;@8s|75v<@85#S6GV`N}p0I@+d0|IP-GXH~U09T?30RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/MCFG.mmio64.dsl b/tests/data/acpi/q35/MCFG.mmio64.dsl new file mode 100644 index 0000000000..79be440f72 --- /dev/null +++ b/tests/data/acpi/q35/MCFG.mmio64.dsl @@ -0,0 +1,36 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/MCFG.mmio64, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [MCFG] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table] +[004h 0004 4] Table Length : 0000003C +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : EF +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCMCFG" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Reserved : 0000000000000000 + +[02Ch 0044 8] Base Address : 00000000B0000000 +[034h 0052 2] Segment Group Number : 0000 +[036h 0054 1] Start Bus Number : 00 +[037h 0055 1] End Bus Number : FF +[038h 0056 4] Reserved : 00000000 + +Raw Table Data: Length 60 (0x3C) + + 0000: 4D 43 46 47 3C 00 00 00 01 EF 42 4F 43 48 53 20 // MCFG<.....BOCHS + 0010: 42 58 50 43 4D 43 46 47 01 00 00 00 42 58 50 43 // BXPCMCFG....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 B0 // ................ + 0030: 00 00 00 00 00 00 00 FF 00 00 00 00 // ............ diff --git a/tests/data/acpi/q35/MCFG.numamem b/tests/data/acpi/q35/MCFG.numamem new file mode 100644 index 0000000000000000000000000000000000000000..79ceb27a038c6e29d098b98dda2e229495f96b7c GIT binary patch literal 60 scmeZuc5}C3U|?W;@8s|75v<@85#S6GV`N}p0I@+d0|IP-GXH~U09T?30RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/MCFG.numamem.dsl b/tests/data/acpi/q35/MCFG.numamem.dsl new file mode 100644 index 0000000000..30b37074d3 --- /dev/null +++ b/tests/data/acpi/q35/MCFG.numamem.dsl @@ -0,0 +1,36 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/MCFG.numamem, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [MCFG] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table] +[004h 0004 4] Table Length : 0000003C +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : EF +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCMCFG" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Reserved : 0000000000000000 + +[02Ch 0044 8] Base Address : 00000000B0000000 +[034h 0052 2] Segment Group Number : 0000 +[036h 0054 1] Start Bus Number : 00 +[037h 0055 1] End Bus Number : FF +[038h 0056 4] Reserved : 00000000 + +Raw Table Data: Length 60 (0x3C) + + 0000: 4D 43 46 47 3C 00 00 00 01 EF 42 4F 43 48 53 20 // MCFG<.....BOCHS + 0010: 42 58 50 43 4D 43 46 47 01 00 00 00 42 58 50 43 // BXPCMCFG....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 B0 // ................ + 0030: 00 00 00 00 00 00 00 FF 00 00 00 00 // ............ diff --git a/tests/data/acpi/q35/MCFG.tis b/tests/data/acpi/q35/MCFG.tis new file mode 100644 index 0000000000000000000000000000000000000000..79ceb27a038c6e29d098b98dda2e229495f96b7c GIT binary patch literal 60 scmeZuc5}C3U|?W;@8s|75v<@85#S6GV`N}p0I@+d0|IP-GXH~U09T?30RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/MCFG.tis.dsl b/tests/data/acpi/q35/MCFG.tis.dsl new file mode 100644 index 0000000000..0a92d698e9 --- /dev/null +++ b/tests/data/acpi/q35/MCFG.tis.dsl @@ -0,0 +1,36 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/MCFG.tis, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [MCFG] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table] +[004h 0004 4] Table Length : 0000003C +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : EF +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCMCFG" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Reserved : 0000000000000000 + +[02Ch 0044 8] Base Address : 00000000B0000000 +[034h 0052 2] Segment Group Number : 0000 +[036h 0054 1] Start Bus Number : 00 +[037h 0055 1] End Bus Number : FF +[038h 0056 4] Reserved : 00000000 + +Raw Table Data: Length 60 (0x3C) + + 0000: 4D 43 46 47 3C 00 00 00 01 EF 42 4F 43 48 53 20 // MCFG<.....BOCHS + 0010: 42 58 50 43 4D 43 46 47 01 00 00 00 42 58 50 43 // BXPCMCFG....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 B0 // ................ + 0030: 00 00 00 00 00 00 00 FF 00 00 00 00 // ............ diff --git a/tests/data/acpi/q35/NFIT.dimmpxm.dsl b/tests/data/acpi/q35/NFIT.dimmpxm.dsl new file mode 100644 index 0000000000..e29b770dca --- /dev/null +++ b/tests/data/acpi/q35/NFIT.dimmpxm.dsl @@ -0,0 +1,115 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/NFIT.dimmpxm, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [NFIT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "NFIT" [NVDIMM Firmware Interface Table] +[004h 0004 4] Table Length : 000000F0 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 24 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCNFIT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Reserved : 00000000 + +[028h 0040 2] Subtable Type : 0000 [System Physical Address Range] +[02Ah 0042 2] Length : 0038 + +[02Ch 0044 2] Range Index : 0004 +[02Eh 0046 2] Flags (decoded below) : 0003 + Add/Online Operation Only : 1 + Proximity Domain Valid : 1 +[030h 0048 4] Reserved : 00000000 +[034h 0052 4] Proximity Domain : 00000002 +[038h 0056 16] Region Type GUID : 66F0D379-B4F3-4074-AC43-0D3318B78CDB +[048h 0072 8] Address Range Base : 0000000108000000 +[050h 0080 8] Address Range Length : 0000000008000000 +[058h 0088 8] Memory Map Attribute : 0000000000008008 + +[060h 0096 2] Subtable Type : 0001 [Memory Range Map] +[062h 0098 2] Length : 0030 + +[064h 0100 4] Device Handle : 00000002 +[068h 0104 2] Physical Id : 0000 +[06Ah 0106 2] Region Id : 0000 +[06Ch 0108 2] Range Index : 0004 +[06Eh 0110 2] Control Region Index : 0005 +[070h 0112 8] Region Size : 0000000008000000 +[078h 0120 8] Region Offset : 0000000000000000 +[080h 0128 8] Address Region Base : 0000000000000000 +[088h 0136 2] Interleave Index : 0000 +[08Ah 0138 2] Interleave Ways : 0001 +[08Ch 0140 2] Flags : 0000 + Save to device failed : 0 + Restore from device failed : 0 + Platform flush failed : 0 + Device not armed : 0 + Health events observed : 0 + Health events enabled : 0 + Mapping failed : 0 +[08Eh 0142 2] Reserved : 0000 + +[090h 0144 2] Subtable Type : 0004 [NVDIMM Control Region] +[092h 0146 2] Length : 0050 + +[094h 0148 2] Region Index : 0005 +[096h 0150 2] Vendor Id : 8086 +[098h 0152 2] Device Id : 0001 +[09Ah 0154 2] Revision Id : 0001 +[09Ch 0156 2] Subsystem Vendor Id : 0000 +[09Eh 0158 2] Subsystem Device Id : 0000 +[0A0h 0160 2] Subsystem Revision Id : 0000 +[0A2h 0162 1] Valid Fields : 00 +[0A3h 0163 1] Manufacturing Location : 00 +[0A4h 0164 2] Manufacturing Date : 0000 +[0A6h 0166 2] Reserved : 0000 +[0A8h 0168 4] Serial Number : 00123457 +[0ACh 0172 2] Code : 0301 +[0AEh 0174 2] Window Count : 0000 +[0B0h 0176 8] Window Size : 0000000000000000 +[0B8h 0184 8] Command Offset : 0000000000000000 +[0C0h 0192 8] Command Size : 0000000000000000 +[0C8h 0200 8] Status Offset : 0000000000000000 +[0D0h 0208 8] Status Size : 0000000000000000 +[0D8h 0216 2] Flags : 0000 + Windows buffered : 0 +[0DAh 0218 6] Reserved1 : 000000000000 + +[0E0h 0224 2] Subtable Type : 0007 [Platform Capabilities] +[0E2h 0226 2] Length : 0010 + +[0E4h 0228 1] Highest Capability : 01 +[0E5h 0229 3] Reserved : 000000 +[0E8h 0232 4] Capabilities (decoded below) : 00000003 + Cache Flush to NVDIMM : 1 + Memory Flush to NVDIMM : 1 + Memory Mirroring : 0 +[0ECh 0236 4] Reserved : 00000000 + +Raw Table Data: Length 240 (0xF0) + + 0000: 4E 46 49 54 F0 00 00 00 01 24 42 4F 43 48 53 20 // NFIT.....$BOCHS + 0010: 42 58 50 43 4E 46 49 54 01 00 00 00 42 58 50 43 // BXPCNFIT....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 38 00 04 00 03 00 // ..........8..... + 0030: 00 00 00 00 02 00 00 00 79 D3 F0 66 F3 B4 74 40 // ........y..f..t@ + 0040: AC 43 0D 33 18 B7 8C DB 00 00 00 08 01 00 00 00 // .C.3............ + 0050: 00 00 00 08 00 00 00 00 08 80 00 00 00 00 00 00 // ................ + 0060: 01 00 30 00 02 00 00 00 00 00 00 00 04 00 05 00 // ..0............. + 0070: 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0080: 00 00 00 00 00 00 00 00 00 00 01 00 00 00 00 00 // ................ + 0090: 04 00 50 00 05 00 86 80 01 00 01 00 00 00 00 00 // ..P............. + 00A0: 00 00 00 00 00 00 00 00 57 34 12 00 01 03 00 00 // ........W4...... + 00B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00E0: 07 00 10 00 01 00 00 00 03 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/q35/NFIT.dsl b/tests/data/acpi/q35/NFIT.dsl new file mode 100644 index 0000000000..8da7718431 --- /dev/null +++ b/tests/data/acpi/q35/NFIT.dsl @@ -0,0 +1,115 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/NFIT.dimmpxm, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [NFIT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "NFIT" [NVDIMM Firmware Interface Table] +[004h 0004 4] Table Length : 000000F0 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 24 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCNFIT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Reserved : 00000000 + +[028h 0040 2] Subtable Type : 0000 [System Physical Address Range] +[02Ah 0042 2] Length : 0038 + +[02Ch 0044 2] Range Index : 0004 +[02Eh 0046 2] Flags (decoded below) : 0003 + Add/Online Operation Only : 1 + Proximity Domain Valid : 1 +[030h 0048 4] Reserved : 00000000 +[034h 0052 4] Proximity Domain : 00000002 +[038h 0056 16] Region Type GUID : 66F0D379-B4F3-4074-AC43-0D3318B78CDB +[048h 0072 8] Address Range Base : 0000000108000000 +[050h 0080 8] Address Range Length : 0000000008000000 +[058h 0088 8] Memory Map Attribute : 0000000000008008 + +[060h 0096 2] Subtable Type : 0001 [Memory Range Map] +[062h 0098 2] Length : 0030 + +[064h 0100 4] Device Handle : 00000002 +[068h 0104 2] Physical Id : 0000 +[06Ah 0106 2] Region Id : 0000 +[06Ch 0108 2] Range Index : 0004 +[06Eh 0110 2] Control Region Index : 0005 +[070h 0112 8] Region Size : 0000000008000000 +[078h 0120 8] Region Offset : 0000000000000000 +[080h 0128 8] Address Region Base : 0000000000000000 +[088h 0136 2] Interleave Index : 0000 +[08Ah 0138 2] Interleave Ways : 0001 +[08Ch 0140 2] Flags : 0000 + Save to device failed : 0 + Restore from device failed : 0 + Platform flush failed : 0 + Device not armed : 0 + Health events observed : 0 + Health events enabled : 0 + Mapping failed : 0 +[08Eh 0142 2] Reserved : 0000 + +[090h 0144 2] Subtable Type : 0004 [NVDIMM Control Region] +[092h 0146 2] Length : 0050 + +[094h 0148 2] Region Index : 0005 +[096h 0150 2] Vendor Id : 8086 +[098h 0152 2] Device Id : 0001 +[09Ah 0154 2] Revision Id : 0001 +[09Ch 0156 2] Subsystem Vendor Id : 0000 +[09Eh 0158 2] Subsystem Device Id : 0000 +[0A0h 0160 2] Subsystem Revision Id : 0000 +[0A2h 0162 1] Valid Fields : 00 +[0A3h 0163 1] Manufacturing Location : 00 +[0A4h 0164 2] Manufacturing Date : 0000 +[0A6h 0166 2] Reserved : 0000 +[0A8h 0168 4] Serial Number : 00123457 +[0ACh 0172 2] Code : 0301 +[0AEh 0174 2] Window Count : 0000 +[0B0h 0176 8] Window Size : 0000000000000000 +[0B8h 0184 8] Command Offset : 0000000000000000 +[0C0h 0192 8] Command Size : 0000000000000000 +[0C8h 0200 8] Status Offset : 0000000000000000 +[0D0h 0208 8] Status Size : 0000000000000000 +[0D8h 0216 2] Flags : 0000 + Windows buffered : 0 +[0DAh 0218 6] Reserved1 : 000000000000 + +[0E0h 0224 2] Subtable Type : 0007 [Platform Capabilities] +[0E2h 0226 2] Length : 0010 + +[0E4h 0228 1] Highest Capability : 01 +[0E5h 0229 3] Reserved : 000000 +[0E8h 0232 4] Capabilities (decoded below) : 00000003 + Cache Flush to NVDIMM : 1 + Memory Flush to NVDIMM : 1 + Memory Mirroring : 0 +[0ECh 0236 4] Reserved : 00000000 + +Raw Table Data: Length 240 (0xF0) + + 0000: 4E 46 49 54 F0 00 00 00 01 24 42 4F 43 48 53 20 // NFIT.....$BOCHS + 0010: 42 58 50 43 4E 46 49 54 01 00 00 00 42 58 50 43 // BXPCNFIT....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 38 00 04 00 03 00 // ..........8..... + 0030: 00 00 00 00 02 00 00 00 79 D3 F0 66 F3 B4 74 40 // ........y..f..t@ + 0040: AC 43 0D 33 18 B7 8C DB 00 00 00 08 01 00 00 00 // .C.3............ + 0050: 00 00 00 08 00 00 00 00 08 80 00 00 00 00 00 00 // ................ + 0060: 01 00 30 00 02 00 00 00 00 00 00 00 04 00 05 00 // ..0............. + 0070: 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0080: 00 00 00 00 00 00 00 00 00 00 01 00 00 00 00 00 // ................ + 0090: 04 00 50 00 05 00 86 80 01 00 01 00 00 00 00 00 // ..P............. + 00A0: 00 00 00 00 00 00 00 00 57 34 12 00 01 03 00 00 // ........W4...... + 00B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00E0: 07 00 10 00 01 00 00 00 03 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/q35/SLIT.cphp.dsl b/tests/data/acpi/q35/SLIT.cphp.dsl new file mode 100644 index 0000000000..cb7347fbd4 --- /dev/null +++ b/tests/data/acpi/q35/SLIT.cphp.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/SLIT.cphp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SLIT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SLIT" [System Locality Information Table] +[004h 0004 4] Table Length : 00000030 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 2C +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSLIT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Localities : 0000000000000002 +[02Ch 0044 2] Locality 0 : 0A 15 +[02Eh 0046 2] Locality 1 : 15 0A + +Raw Table Data: Length 48 (0x30) + + 0000: 53 4C 49 54 30 00 00 00 01 2C 42 4F 43 48 53 20 // SLIT0....,BOCHS + 0010: 42 58 50 43 53 4C 49 54 01 00 00 00 42 58 50 43 // BXPCSLIT....BXPC + 0020: 01 00 00 00 02 00 00 00 00 00 00 00 0A 15 15 0A // ................ diff --git a/tests/data/acpi/q35/SLIT.dsl b/tests/data/acpi/q35/SLIT.dsl new file mode 100644 index 0000000000..89c381bdd0 --- /dev/null +++ b/tests/data/acpi/q35/SLIT.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/SLIT.memhp, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [SLIT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SLIT" [System Locality Information Table] +[004h 0004 4] Table Length : 00000030 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 2C +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSLIT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Localities : 0000000000000002 +[02Ch 0044 2] Locality 0 : 0A 15 +[02Eh 0046 2] Locality 1 : 15 0A + +Raw Table Data: Length 48 (0x30) + + 0000: 53 4C 49 54 30 00 00 00 01 2C 42 4F 43 48 53 20 // SLIT0....,BOCHS + 0010: 42 58 50 43 53 4C 49 54 01 00 00 00 42 58 50 43 // BXPCSLIT....BXPC + 0020: 01 00 00 00 02 00 00 00 00 00 00 00 0A 15 15 0A // ................ diff --git a/tests/data/acpi/q35/SLIT.memhp.dsl b/tests/data/acpi/q35/SLIT.memhp.dsl new file mode 100644 index 0000000000..70b233c0e6 --- /dev/null +++ b/tests/data/acpi/q35/SLIT.memhp.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/SLIT.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SLIT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SLIT" [System Locality Information Table] +[004h 0004 4] Table Length : 00000030 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 2C +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSLIT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Localities : 0000000000000002 +[02Ch 0044 2] Locality 0 : 0A 15 +[02Eh 0046 2] Locality 1 : 15 0A + +Raw Table Data: Length 48 (0x30) + + 0000: 53 4C 49 54 30 00 00 00 01 2C 42 4F 43 48 53 20 // SLIT0....,BOCHS + 0010: 42 58 50 43 53 4C 49 54 01 00 00 00 42 58 50 43 // BXPCSLIT....BXPC + 0020: 01 00 00 00 02 00 00 00 00 00 00 00 0A 15 15 0A // ................ diff --git a/tests/data/acpi/q35/SRAT.acpihmat.dsl b/tests/data/acpi/q35/SRAT.acpihmat.dsl new file mode 100644 index 0000000000..8a1b47e6b0 --- /dev/null +++ b/tests/data/acpi/q35/SRAT.acpihmat.dsl @@ -0,0 +1,137 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/SRAT.acpihmat, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SRAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table] +[004h 0004 4] Table Length : 00000118 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : C0 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSRAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Table Revision : 00000001 +[028h 0040 8] Reserved : 0000000000000000 + +[030h 0048 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[031h 0049 1] Length : 10 + +[032h 0050 1] Proximity Domain Low(8) : 00 +[033h 0051 1] Apic ID : 00 +[034h 0052 4] Flags (decoded below) : 00000001 + Enabled : 1 +[038h 0056 1] Local Sapic EID : 00 +[039h 0057 3] Proximity Domain High(24) : 000000 +[03Ch 0060 4] Clock Domain : 00000000 + +[040h 0064 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[041h 0065 1] Length : 10 + +[042h 0066 1] Proximity Domain Low(8) : 00 +[043h 0067 1] Apic ID : 01 +[044h 0068 4] Flags (decoded below) : 00000001 + Enabled : 1 +[048h 0072 1] Local Sapic EID : 00 +[049h 0073 3] Proximity Domain High(24) : 000000 +[04Ch 0076 4] Clock Domain : 00000000 + +[050h 0080 1] Subtable Type : 01 [Memory Affinity] +[051h 0081 1] Length : 28 + +[052h 0082 4] Proximity Domain : 00000000 +[056h 0086 2] Reserved1 : 0000 +[058h 0088 8] Base Address : 0000000000000000 +[060h 0096 8] Address Length : 00000000000A0000 +[068h 0104 4] Reserved2 : 00000000 +[06Ch 0108 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[070h 0112 8] Reserved3 : 0000000000000000 + +[078h 0120 1] Subtable Type : 01 [Memory Affinity] +[079h 0121 1] Length : 28 + +[07Ah 0122 4] Proximity Domain : 00000000 +[07Eh 0126 2] Reserved1 : 0000 +[080h 0128 8] Base Address : 0000000000100000 +[088h 0136 8] Address Length : 0000000003F00000 +[090h 0144 4] Reserved2 : 00000000 +[094h 0148 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[098h 0152 8] Reserved3 : 0000000000000000 + +[0A0h 0160 1] Subtable Type : 01 [Memory Affinity] +[0A1h 0161 1] Length : 28 + +[0A2h 0162 4] Proximity Domain : 00000001 +[0A6h 0166 2] Reserved1 : 0000 +[0A8h 0168 8] Base Address : 0000000004000000 +[0B0h 0176 8] Address Length : 0000000004000000 +[0B8h 0184 4] Reserved2 : 00000000 +[0BCh 0188 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[0C0h 0192 8] Reserved3 : 0000000000000000 + +[0C8h 0200 1] Subtable Type : 01 [Memory Affinity] +[0C9h 0201 1] Length : 28 + +[0CAh 0202 4] Proximity Domain : 00000000 +[0CEh 0206 2] Reserved1 : 0000 +[0D0h 0208 8] Base Address : 0000000000000000 +[0D8h 0216 8] Address Length : 0000000000000000 +[0E0h 0224 4] Reserved2 : 00000000 +[0E4h 0228 4] Flags (decoded below) : 00000000 + Enabled : 0 + Hot Pluggable : 0 + Non-Volatile : 0 +[0E8h 0232 8] Reserved3 : 0000000000000000 + +[0F0h 0240 1] Subtable Type : 01 [Memory Affinity] +[0F1h 0241 1] Length : 28 + +[0F2h 0242 4] Proximity Domain : 00000001 +[0F6h 0246 2] Reserved1 : 0000 +[0F8h 0248 8] Base Address : 0000000100000000 +[100h 0256 8] Address Length : 00000000B8000000 +[108h 0264 4] Reserved2 : 00000000 +[10Ch 0268 4] Flags (decoded below) : 00000003 + Enabled : 1 + Hot Pluggable : 1 + Non-Volatile : 0 +[110h 0272 8] Reserved3 : 0000000000000000 + +Raw Table Data: Length 280 (0x118) + + 0000: 53 52 41 54 18 01 00 00 01 C0 42 4F 43 48 53 20 // SRAT......BOCHS + 0010: 42 58 50 43 53 52 41 54 01 00 00 00 42 58 50 43 // BXPCSRAT....BXPC + 0020: 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 10 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 00 10 00 01 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0050: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 0060: 00 00 0A 00 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 0070: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 0080: 00 00 10 00 00 00 00 00 00 00 F0 03 00 00 00 00 // ................ + 0090: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00A0: 01 28 01 00 00 00 00 00 00 00 00 04 00 00 00 00 // .(.............. + 00B0: 00 00 00 04 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 00C0: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00E0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00F0: 01 28 01 00 00 00 00 00 00 00 00 00 01 00 00 00 // .(.............. + 0100: 00 00 00 B8 00 00 00 00 00 00 00 00 03 00 00 00 // ................ + 0110: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/q35/SRAT.cphp.dsl b/tests/data/acpi/q35/SRAT.cphp.dsl new file mode 100644 index 0000000000..f0023db38d --- /dev/null +++ b/tests/data/acpi/q35/SRAT.cphp.dsl @@ -0,0 +1,168 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/SRAT.cphp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SRAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table] +[004h 0004 4] Table Length : 00000130 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 36 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSRAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Table Revision : 00000001 +[028h 0040 8] Reserved : 0000000000000000 + +[030h 0048 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[031h 0049 1] Length : 10 + +[032h 0050 1] Proximity Domain Low(8) : 00 +[033h 0051 1] Apic ID : 00 +[034h 0052 4] Flags (decoded below) : 00000001 + Enabled : 1 +[038h 0056 1] Local Sapic EID : 00 +[039h 0057 3] Proximity Domain High(24) : 000000 +[03Ch 0060 4] Clock Domain : 00000000 + +[040h 0064 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[041h 0065 1] Length : 10 + +[042h 0066 1] Proximity Domain Low(8) : 00 +[043h 0067 1] Apic ID : 01 +[044h 0068 4] Flags (decoded below) : 00000001 + Enabled : 1 +[048h 0072 1] Local Sapic EID : 00 +[049h 0073 3] Proximity Domain High(24) : 000000 +[04Ch 0076 4] Clock Domain : 00000000 + +[050h 0080 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[051h 0081 1] Length : 10 + +[052h 0082 1] Proximity Domain Low(8) : 00 +[053h 0083 1] Apic ID : 02 +[054h 0084 4] Flags (decoded below) : 00000001 + Enabled : 1 +[058h 0088 1] Local Sapic EID : 00 +[059h 0089 3] Proximity Domain High(24) : 000000 +[05Ch 0092 4] Clock Domain : 00000000 + +[060h 0096 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[061h 0097 1] Length : 10 + +[062h 0098 1] Proximity Domain Low(8) : 01 +[063h 0099 1] Apic ID : 04 +[064h 0100 4] Flags (decoded below) : 00000001 + Enabled : 1 +[068h 0104 1] Local Sapic EID : 00 +[069h 0105 3] Proximity Domain High(24) : 000000 +[06Ch 0108 4] Clock Domain : 00000000 + +[070h 0112 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[071h 0113 1] Length : 10 + +[072h 0114 1] Proximity Domain Low(8) : 01 +[073h 0115 1] Apic ID : 05 +[074h 0116 4] Flags (decoded below) : 00000001 + Enabled : 1 +[078h 0120 1] Local Sapic EID : 00 +[079h 0121 3] Proximity Domain High(24) : 000000 +[07Ch 0124 4] Clock Domain : 00000000 + +[080h 0128 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[081h 0129 1] Length : 10 + +[082h 0130 1] Proximity Domain Low(8) : 01 +[083h 0131 1] Apic ID : 06 +[084h 0132 4] Flags (decoded below) : 00000001 + Enabled : 1 +[088h 0136 1] Local Sapic EID : 00 +[089h 0137 3] Proximity Domain High(24) : 000000 +[08Ch 0140 4] Clock Domain : 00000000 + +[090h 0144 1] Subtable Type : 01 [Memory Affinity] +[091h 0145 1] Length : 28 + +[092h 0146 4] Proximity Domain : 00000000 +[096h 0150 2] Reserved1 : 0000 +[098h 0152 8] Base Address : 0000000000000000 +[0A0h 0160 8] Address Length : 00000000000A0000 +[0A8h 0168 4] Reserved2 : 00000000 +[0ACh 0172 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[0B0h 0176 8] Reserved3 : 0000000000000000 + +[0B8h 0184 1] Subtable Type : 01 [Memory Affinity] +[0B9h 0185 1] Length : 28 + +[0BAh 0186 4] Proximity Domain : 00000000 +[0BEh 0190 2] Reserved1 : 0000 +[0C0h 0192 8] Base Address : 0000000000100000 +[0C8h 0200 8] Address Length : 0000000003F00000 +[0D0h 0208 4] Reserved2 : 00000000 +[0D4h 0212 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[0D8h 0216 8] Reserved3 : 0000000000000000 + +[0E0h 0224 1] Subtable Type : 01 [Memory Affinity] +[0E1h 0225 1] Length : 28 + +[0E2h 0226 4] Proximity Domain : 00000001 +[0E6h 0230 2] Reserved1 : 0000 +[0E8h 0232 8] Base Address : 0000000004000000 +[0F0h 0240 8] Address Length : 0000000004000000 +[0F8h 0248 4] Reserved2 : 00000000 +[0FCh 0252 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[100h 0256 8] Reserved3 : 0000000000000000 + +[108h 0264 1] Subtable Type : 01 [Memory Affinity] +[109h 0265 1] Length : 28 + +[10Ah 0266 4] Proximity Domain : 00000000 +[10Eh 0270 2] Reserved1 : 0000 +[110h 0272 8] Base Address : 0000000000000000 +[118h 0280 8] Address Length : 0000000000000000 +[120h 0288 4] Reserved2 : 00000000 +[124h 0292 4] Flags (decoded below) : 00000000 + Enabled : 0 + Hot Pluggable : 0 + Non-Volatile : 0 +[128h 0296 8] Reserved3 : 0000000000000000 + +Raw Table Data: Length 304 (0x130) + + 0000: 53 52 41 54 30 01 00 00 01 36 42 4F 43 48 53 20 // SRAT0....6BOCHS + 0010: 42 58 50 43 53 52 41 54 01 00 00 00 42 58 50 43 // BXPCSRAT....BXPC + 0020: 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 10 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 00 10 00 01 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0050: 00 10 00 02 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0060: 00 10 01 04 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0070: 00 10 01 05 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0080: 00 10 01 06 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0090: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 00A0: 00 00 0A 00 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 00B0: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 00C0: 00 00 10 00 00 00 00 00 00 00 F0 03 00 00 00 00 // ................ + 00D0: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00E0: 01 28 01 00 00 00 00 00 00 00 00 04 00 00 00 00 // .(.............. + 00F0: 00 00 00 04 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 0100: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 0110: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/q35/SRAT.dimmpxm.dsl b/tests/data/acpi/q35/SRAT.dimmpxm.dsl new file mode 100644 index 0000000000..2cfe6994f5 --- /dev/null +++ b/tests/data/acpi/q35/SRAT.dimmpxm.dsl @@ -0,0 +1,194 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/SRAT.dimmpxm, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SRAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table] +[004h 0004 4] Table Length : 00000188 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 68 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSRAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Table Revision : 00000001 +[028h 0040 8] Reserved : 0000000000000000 + +[030h 0048 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[031h 0049 1] Length : 10 + +[032h 0050 1] Proximity Domain Low(8) : 00 +[033h 0051 1] Apic ID : 00 +[034h 0052 4] Flags (decoded below) : 00000001 + Enabled : 1 +[038h 0056 1] Local Sapic EID : 00 +[039h 0057 3] Proximity Domain High(24) : 000000 +[03Ch 0060 4] Clock Domain : 00000000 + +[040h 0064 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[041h 0065 1] Length : 10 + +[042h 0066 1] Proximity Domain Low(8) : 01 +[043h 0067 1] Apic ID : 01 +[044h 0068 4] Flags (decoded below) : 00000001 + Enabled : 1 +[048h 0072 1] Local Sapic EID : 00 +[049h 0073 3] Proximity Domain High(24) : 000000 +[04Ch 0076 4] Clock Domain : 00000000 + +[050h 0080 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[051h 0081 1] Length : 10 + +[052h 0082 1] Proximity Domain Low(8) : 02 +[053h 0083 1] Apic ID : 02 +[054h 0084 4] Flags (decoded below) : 00000001 + Enabled : 1 +[058h 0088 1] Local Sapic EID : 00 +[059h 0089 3] Proximity Domain High(24) : 000000 +[05Ch 0092 4] Clock Domain : 00000000 + +[060h 0096 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[061h 0097 1] Length : 10 + +[062h 0098 1] Proximity Domain Low(8) : 03 +[063h 0099 1] Apic ID : 03 +[064h 0100 4] Flags (decoded below) : 00000001 + Enabled : 1 +[068h 0104 1] Local Sapic EID : 00 +[069h 0105 3] Proximity Domain High(24) : 000000 +[06Ch 0108 4] Clock Domain : 00000000 + +[070h 0112 1] Subtable Type : 01 [Memory Affinity] +[071h 0113 1] Length : 28 + +[072h 0114 4] Proximity Domain : 00000000 +[076h 0118 2] Reserved1 : 0000 +[078h 0120 8] Base Address : 0000000000000000 +[080h 0128 8] Address Length : 00000000000A0000 +[088h 0136 4] Reserved2 : 00000000 +[08Ch 0140 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[090h 0144 8] Reserved3 : 0000000000000000 + +[098h 0152 1] Subtable Type : 01 [Memory Affinity] +[099h 0153 1] Length : 28 + +[09Ah 0154 4] Proximity Domain : 00000000 +[09Eh 0158 2] Reserved1 : 0000 +[0A0h 0160 8] Base Address : 0000000000100000 +[0A8h 0168 8] Address Length : 0000000001F00000 +[0B0h 0176 4] Reserved2 : 00000000 +[0B4h 0180 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[0B8h 0184 8] Reserved3 : 0000000000000000 + +[0C0h 0192 1] Subtable Type : 01 [Memory Affinity] +[0C1h 0193 1] Length : 28 + +[0C2h 0194 4] Proximity Domain : 00000001 +[0C6h 0198 2] Reserved1 : 0000 +[0C8h 0200 8] Base Address : 0000000002000000 +[0D0h 0208 8] Address Length : 0000000002000000 +[0D8h 0216 4] Reserved2 : 00000000 +[0DCh 0220 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[0E0h 0224 8] Reserved3 : 0000000000000000 + +[0E8h 0232 1] Subtable Type : 01 [Memory Affinity] +[0E9h 0233 1] Length : 28 + +[0EAh 0234 4] Proximity Domain : 00000002 +[0EEh 0238 2] Reserved1 : 0000 +[0F0h 0240 8] Base Address : 0000000004000000 +[0F8h 0248 8] Address Length : 0000000002000000 +[100h 0256 4] Reserved2 : 00000000 +[104h 0260 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[108h 0264 8] Reserved3 : 0000000000000000 + +[110h 0272 1] Subtable Type : 01 [Memory Affinity] +[111h 0273 1] Length : 28 + +[112h 0274 4] Proximity Domain : 00000003 +[116h 0278 2] Reserved1 : 0000 +[118h 0280 8] Base Address : 0000000006000000 +[120h 0288 8] Address Length : 0000000002000000 +[128h 0296 4] Reserved2 : 00000000 +[12Ch 0300 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[130h 0304 8] Reserved3 : 0000000000000000 + +[138h 0312 1] Subtable Type : 01 [Memory Affinity] +[139h 0313 1] Length : 28 + +[13Ah 0314 4] Proximity Domain : 00000002 +[13Eh 0318 2] Reserved1 : 0000 +[140h 0320 8] Base Address : 0000000108000000 +[148h 0328 8] Address Length : 0000000008000000 +[150h 0336 4] Reserved2 : 00000000 +[154h 0340 4] Flags (decoded below) : 00000005 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 1 +[158h 0344 8] Reserved3 : 0000000000000000 + +[160h 0352 1] Subtable Type : 01 [Memory Affinity] +[161h 0353 1] Length : 28 + +[162h 0354 4] Proximity Domain : 00000003 +[166h 0358 2] Reserved1 : 0000 +[168h 0360 8] Base Address : 0000000100000000 +[170h 0368 8] Address Length : 00000000F8000000 +[178h 0376 4] Reserved2 : 00000000 +[17Ch 0380 4] Flags (decoded below) : 00000003 + Enabled : 1 + Hot Pluggable : 1 + Non-Volatile : 0 +[180h 0384 8] Reserved3 : 0000000000000000 + +Raw Table Data: Length 392 (0x188) + + 0000: 53 52 41 54 88 01 00 00 01 68 42 4F 43 48 53 20 // SRAT.....hBOCHS + 0010: 42 58 50 43 53 52 41 54 01 00 00 00 42 58 50 43 // BXPCSRAT....BXPC + 0020: 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 10 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 00 10 01 01 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0050: 00 10 02 02 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0060: 00 10 03 03 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0070: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 0080: 00 00 0A 00 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 0090: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 00A0: 00 00 10 00 00 00 00 00 00 00 F0 01 00 00 00 00 // ................ + 00B0: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00C0: 01 28 01 00 00 00 00 00 00 00 00 02 00 00 00 00 // .(.............. + 00D0: 00 00 00 02 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 00E0: 00 00 00 00 00 00 00 00 01 28 02 00 00 00 00 00 // .........(...... + 00F0: 00 00 00 04 00 00 00 00 00 00 00 02 00 00 00 00 // ................ + 0100: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0110: 01 28 03 00 00 00 00 00 00 00 00 06 00 00 00 00 // .(.............. + 0120: 00 00 00 02 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 0130: 00 00 00 00 00 00 00 00 01 28 02 00 00 00 00 00 // .........(...... + 0140: 00 00 00 08 01 00 00 00 00 00 00 08 00 00 00 00 // ................ + 0150: 00 00 00 00 05 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0160: 01 28 03 00 00 00 00 00 00 00 00 00 01 00 00 00 // .(.............. + 0170: 00 00 00 F8 00 00 00 00 00 00 00 00 03 00 00 00 // ................ + 0180: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/q35/SRAT.dsl b/tests/data/acpi/q35/SRAT.dsl new file mode 100644 index 0000000000..5f4278994e --- /dev/null +++ b/tests/data/acpi/q35/SRAT.dsl @@ -0,0 +1,108 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/SRAT.numamem, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [SRAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table] +[004h 0004 4] Table Length : 000000E0 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : F5 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSRAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Table Revision : 00000001 +[028h 0040 8] Reserved : 0000000000000000 + +[030h 0048 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[031h 0049 1] Length : 10 + +[032h 0050 1] Proximity Domain Low(8) : 00 +[033h 0051 1] Apic ID : 00 +[034h 0052 4] Flags (decoded below) : 00000001 + Enabled : 1 +[038h 0056 1] Local Sapic EID : 00 +[039h 0057 3] Proximity Domain High(24) : 000000 +[03Ch 0060 4] Clock Domain : 00000000 + +[040h 0064 1] Subtable Type : 01 [Memory Affinity] +[041h 0065 1] Length : 28 + +[042h 0066 4] Proximity Domain : 00000001 +[046h 0070 2] Reserved1 : 0000 +[048h 0072 8] Base Address : 0000000000000000 +[050h 0080 8] Address Length : 00000000000A0000 +[058h 0088 4] Reserved2 : 00000000 +[05Ch 0092 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[060h 0096 8] Reserved3 : 0000000000000000 + +[068h 0104 1] Subtable Type : 01 [Memory Affinity] +[069h 0105 1] Length : 28 + +[06Ah 0106 4] Proximity Domain : 00000001 +[06Eh 0110 2] Reserved1 : 0000 +[070h 0112 8] Base Address : 0000000000100000 +[078h 0120 8] Address Length : 0000000007F00000 +[080h 0128 4] Reserved2 : 00000000 +[084h 0132 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[088h 0136 8] Reserved3 : 0000000000000000 + +[090h 0144 1] Subtable Type : 01 [Memory Affinity] +[091h 0145 1] Length : 28 + +[092h 0146 4] Proximity Domain : 00000000 +[096h 0150 2] Reserved1 : 0000 +[098h 0152 8] Base Address : 0000000000000000 +[0A0h 0160 8] Address Length : 0000000000000000 +[0A8h 0168 4] Reserved2 : 00000000 +[0ACh 0172 4] Flags (decoded below) : 00000000 + Enabled : 0 + Hot Pluggable : 0 + Non-Volatile : 0 +[0B0h 0176 8] Reserved3 : 0000000000000000 + +[0B8h 0184 1] Subtable Type : 01 [Memory Affinity] +[0B9h 0185 1] Length : 28 + +[0BAh 0186 4] Proximity Domain : 00000000 +[0BEh 0190 2] Reserved1 : 0000 +[0C0h 0192 8] Base Address : 0000000000000000 +[0C8h 0200 8] Address Length : 0000000000000000 +[0D0h 0208 4] Reserved2 : 00000000 +[0D4h 0212 4] Flags (decoded below) : 00000000 + Enabled : 0 + Hot Pluggable : 0 + Non-Volatile : 0 +[0D8h 0216 8] Reserved3 : 0000000000000000 + +Raw Table Data: Length 224 (0xE0) + + 0000: 53 52 41 54 E0 00 00 00 01 F5 42 4F 43 48 53 20 // SRAT......BOCHS + 0010: 42 58 50 43 53 52 41 54 01 00 00 00 42 58 50 43 // BXPCSRAT....BXPC + 0020: 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 10 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 01 28 01 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 0050: 00 00 0A 00 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 0060: 00 00 00 00 00 00 00 00 01 28 01 00 00 00 00 00 // .........(...... + 0070: 00 00 10 00 00 00 00 00 00 00 F0 07 00 00 00 00 // ................ + 0080: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0090: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 00A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00B0: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/q35/SRAT.memhp.dsl b/tests/data/acpi/q35/SRAT.memhp.dsl new file mode 100644 index 0000000000..a5f27214eb --- /dev/null +++ b/tests/data/acpi/q35/SRAT.memhp.dsl @@ -0,0 +1,125 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/SRAT.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SRAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table] +[004h 0004 4] Table Length : 00000108 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : A2 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSRAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Table Revision : 00000001 +[028h 0040 8] Reserved : 0000000000000000 + +[030h 0048 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[031h 0049 1] Length : 10 + +[032h 0050 1] Proximity Domain Low(8) : 00 +[033h 0051 1] Apic ID : 00 +[034h 0052 4] Flags (decoded below) : 00000001 + Enabled : 1 +[038h 0056 1] Local Sapic EID : 00 +[039h 0057 3] Proximity Domain High(24) : 000000 +[03Ch 0060 4] Clock Domain : 00000000 + +[040h 0064 1] Subtable Type : 01 [Memory Affinity] +[041h 0065 1] Length : 28 + +[042h 0066 4] Proximity Domain : 00000000 +[046h 0070 2] Reserved1 : 0000 +[048h 0072 8] Base Address : 0000000000000000 +[050h 0080 8] Address Length : 00000000000A0000 +[058h 0088 4] Reserved2 : 00000000 +[05Ch 0092 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[060h 0096 8] Reserved3 : 0000000000000000 + +[068h 0104 1] Subtable Type : 01 [Memory Affinity] +[069h 0105 1] Length : 28 + +[06Ah 0106 4] Proximity Domain : 00000000 +[06Eh 0110 2] Reserved1 : 0000 +[070h 0112 8] Base Address : 0000000000100000 +[078h 0120 8] Address Length : 0000000003F00000 +[080h 0128 4] Reserved2 : 00000000 +[084h 0132 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[088h 0136 8] Reserved3 : 0000000000000000 + +[090h 0144 1] Subtable Type : 01 [Memory Affinity] +[091h 0145 1] Length : 28 + +[092h 0146 4] Proximity Domain : 00000001 +[096h 0150 2] Reserved1 : 0000 +[098h 0152 8] Base Address : 0000000004000000 +[0A0h 0160 8] Address Length : 0000000004000000 +[0A8h 0168 4] Reserved2 : 00000000 +[0ACh 0172 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[0B0h 0176 8] Reserved3 : 0000000000000000 + +[0B8h 0184 1] Subtable Type : 01 [Memory Affinity] +[0B9h 0185 1] Length : 28 + +[0BAh 0186 4] Proximity Domain : 00000000 +[0BEh 0190 2] Reserved1 : 0000 +[0C0h 0192 8] Base Address : 0000000000000000 +[0C8h 0200 8] Address Length : 0000000000000000 +[0D0h 0208 4] Reserved2 : 00000000 +[0D4h 0212 4] Flags (decoded below) : 00000000 + Enabled : 0 + Hot Pluggable : 0 + Non-Volatile : 0 +[0D8h 0216 8] Reserved3 : 0000000000000000 + +[0E0h 0224 1] Subtable Type : 01 [Memory Affinity] +[0E1h 0225 1] Length : 28 + +[0E2h 0226 4] Proximity Domain : 00000001 +[0E6h 0230 2] Reserved1 : 0000 +[0E8h 0232 8] Base Address : 0000000100000000 +[0F0h 0240 8] Address Length : 00000000F8000000 +[0F8h 0248 4] Reserved2 : 00000000 +[0FCh 0252 4] Flags (decoded below) : 00000003 + Enabled : 1 + Hot Pluggable : 1 + Non-Volatile : 0 +[100h 0256 8] Reserved3 : 0000000000000000 + +Raw Table Data: Length 264 (0x108) + + 0000: 53 52 41 54 08 01 00 00 01 A2 42 4F 43 48 53 20 // SRAT......BOCHS + 0010: 42 58 50 43 53 52 41 54 01 00 00 00 42 58 50 43 // BXPCSRAT....BXPC + 0020: 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 10 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 0050: 00 00 0A 00 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 0060: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 0070: 00 00 10 00 00 00 00 00 00 00 F0 03 00 00 00 00 // ................ + 0080: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0090: 01 28 01 00 00 00 00 00 00 00 00 04 00 00 00 00 // .(.............. + 00A0: 00 00 00 04 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 00B0: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00E0: 01 28 01 00 00 00 00 00 00 00 00 00 01 00 00 00 // .(.............. + 00F0: 00 00 00 F8 00 00 00 00 00 00 00 00 03 00 00 00 // ................ + 0100: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/q35/SRAT.mmio64.dsl b/tests/data/acpi/q35/SRAT.mmio64.dsl new file mode 100644 index 0000000000..0065c21de4 --- /dev/null +++ b/tests/data/acpi/q35/SRAT.mmio64.dsl @@ -0,0 +1,108 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/SRAT.mmio64, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SRAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table] +[004h 0004 4] Table Length : 000000E0 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 3B +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSRAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Table Revision : 00000001 +[028h 0040 8] Reserved : 0000000000000000 + +[030h 0048 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[031h 0049 1] Length : 10 + +[032h 0050 1] Proximity Domain Low(8) : 00 +[033h 0051 1] Apic ID : 00 +[034h 0052 4] Flags (decoded below) : 00000001 + Enabled : 1 +[038h 0056 1] Local Sapic EID : 00 +[039h 0057 3] Proximity Domain High(24) : 000000 +[03Ch 0060 4] Clock Domain : 00000000 + +[040h 0064 1] Subtable Type : 01 [Memory Affinity] +[041h 0065 1] Length : 28 + +[042h 0066 4] Proximity Domain : 00000000 +[046h 0070 2] Reserved1 : 0000 +[048h 0072 8] Base Address : 0000000000000000 +[050h 0080 8] Address Length : 00000000000A0000 +[058h 0088 4] Reserved2 : 00000000 +[05Ch 0092 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[060h 0096 8] Reserved3 : 0000000000000000 + +[068h 0104 1] Subtable Type : 01 [Memory Affinity] +[069h 0105 1] Length : 28 + +[06Ah 0106 4] Proximity Domain : 00000000 +[06Eh 0110 2] Reserved1 : 0000 +[070h 0112 8] Base Address : 0000000000100000 +[078h 0120 8] Address Length : 0000000007F00000 +[080h 0128 4] Reserved2 : 00000000 +[084h 0132 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[088h 0136 8] Reserved3 : 0000000000000000 + +[090h 0144 1] Subtable Type : 01 [Memory Affinity] +[091h 0145 1] Length : 28 + +[092h 0146 4] Proximity Domain : 00000000 +[096h 0150 2] Reserved1 : 0000 +[098h 0152 8] Base Address : 0000000000000000 +[0A0h 0160 8] Address Length : 0000000000000000 +[0A8h 0168 4] Reserved2 : 00000000 +[0ACh 0172 4] Flags (decoded below) : 00000000 + Enabled : 0 + Hot Pluggable : 0 + Non-Volatile : 0 +[0B0h 0176 8] Reserved3 : 0000000000000000 + +[0B8h 0184 1] Subtable Type : 01 [Memory Affinity] +[0B9h 0185 1] Length : 28 + +[0BAh 0186 4] Proximity Domain : 00000000 +[0BEh 0190 2] Reserved1 : 0000 +[0C0h 0192 8] Base Address : 0000000100000000 +[0C8h 0200 8] Address Length : 00000000B8000000 +[0D0h 0208 4] Reserved2 : 00000000 +[0D4h 0212 4] Flags (decoded below) : 00000003 + Enabled : 1 + Hot Pluggable : 1 + Non-Volatile : 0 +[0D8h 0216 8] Reserved3 : 0000000000000000 + +Raw Table Data: Length 224 (0xE0) + + 0000: 53 52 41 54 E0 00 00 00 01 3B 42 4F 43 48 53 20 // SRAT.....;BOCHS + 0010: 42 58 50 43 53 52 41 54 01 00 00 00 42 58 50 43 // BXPCSRAT....BXPC + 0020: 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 10 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 0050: 00 00 0A 00 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 0060: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 0070: 00 00 10 00 00 00 00 00 00 00 F0 07 00 00 00 00 // ................ + 0080: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0090: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 00A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00B0: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 00C0: 00 00 00 00 01 00 00 00 00 00 00 B8 00 00 00 00 // ................ + 00D0: 00 00 00 00 03 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/q35/SRAT.numamem.dsl b/tests/data/acpi/q35/SRAT.numamem.dsl new file mode 100644 index 0000000000..e8de953ae2 --- /dev/null +++ b/tests/data/acpi/q35/SRAT.numamem.dsl @@ -0,0 +1,108 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/SRAT.numamem, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SRAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table] +[004h 0004 4] Table Length : 000000E0 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : F5 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSRAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Table Revision : 00000001 +[028h 0040 8] Reserved : 0000000000000000 + +[030h 0048 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[031h 0049 1] Length : 10 + +[032h 0050 1] Proximity Domain Low(8) : 00 +[033h 0051 1] Apic ID : 00 +[034h 0052 4] Flags (decoded below) : 00000001 + Enabled : 1 +[038h 0056 1] Local Sapic EID : 00 +[039h 0057 3] Proximity Domain High(24) : 000000 +[03Ch 0060 4] Clock Domain : 00000000 + +[040h 0064 1] Subtable Type : 01 [Memory Affinity] +[041h 0065 1] Length : 28 + +[042h 0066 4] Proximity Domain : 00000001 +[046h 0070 2] Reserved1 : 0000 +[048h 0072 8] Base Address : 0000000000000000 +[050h 0080 8] Address Length : 00000000000A0000 +[058h 0088 4] Reserved2 : 00000000 +[05Ch 0092 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[060h 0096 8] Reserved3 : 0000000000000000 + +[068h 0104 1] Subtable Type : 01 [Memory Affinity] +[069h 0105 1] Length : 28 + +[06Ah 0106 4] Proximity Domain : 00000001 +[06Eh 0110 2] Reserved1 : 0000 +[070h 0112 8] Base Address : 0000000000100000 +[078h 0120 8] Address Length : 0000000007F00000 +[080h 0128 4] Reserved2 : 00000000 +[084h 0132 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[088h 0136 8] Reserved3 : 0000000000000000 + +[090h 0144 1] Subtable Type : 01 [Memory Affinity] +[091h 0145 1] Length : 28 + +[092h 0146 4] Proximity Domain : 00000000 +[096h 0150 2] Reserved1 : 0000 +[098h 0152 8] Base Address : 0000000000000000 +[0A0h 0160 8] Address Length : 0000000000000000 +[0A8h 0168 4] Reserved2 : 00000000 +[0ACh 0172 4] Flags (decoded below) : 00000000 + Enabled : 0 + Hot Pluggable : 0 + Non-Volatile : 0 +[0B0h 0176 8] Reserved3 : 0000000000000000 + +[0B8h 0184 1] Subtable Type : 01 [Memory Affinity] +[0B9h 0185 1] Length : 28 + +[0BAh 0186 4] Proximity Domain : 00000000 +[0BEh 0190 2] Reserved1 : 0000 +[0C0h 0192 8] Base Address : 0000000000000000 +[0C8h 0200 8] Address Length : 0000000000000000 +[0D0h 0208 4] Reserved2 : 00000000 +[0D4h 0212 4] Flags (decoded below) : 00000000 + Enabled : 0 + Hot Pluggable : 0 + Non-Volatile : 0 +[0D8h 0216 8] Reserved3 : 0000000000000000 + +Raw Table Data: Length 224 (0xE0) + + 0000: 53 52 41 54 E0 00 00 00 01 F5 42 4F 43 48 53 20 // SRAT......BOCHS + 0010: 42 58 50 43 53 52 41 54 01 00 00 00 42 58 50 43 // BXPCSRAT....BXPC + 0020: 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 10 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 01 28 01 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 0050: 00 00 0A 00 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 0060: 00 00 00 00 00 00 00 00 01 28 01 00 00 00 00 00 // .........(...... + 0070: 00 00 10 00 00 00 00 00 00 00 F0 07 00 00 00 00 // ................ + 0080: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0090: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 00A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00B0: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/q35/SSDT.dsl b/tests/data/acpi/q35/SSDT.dsl new file mode 100644 index 0000000000..49df22f93d --- /dev/null +++ b/tests/data/acpi/q35/SSDT.dsl @@ -0,0 +1,205 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/q35/SSDT.dimmpxm, Mon Sep 28 17:24:38 2020 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x000002DE (734) + * Revision 0x01 + * Checksum 0x46 + * OEM ID "BOCHS " + * OEM Table ID "NVDIMM" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM", 0x00000001) +{ + Scope (\_SB) + { + Device (NVDR) + { + Name (_HID, "ACPI0012" /* NVDIMM Root Device */) // _HID: Hardware ID + Method (NCAL, 5, Serialized) + { + Local6 = MEMA /* \MEMA */ + OperationRegion (NPIO, SystemIO, 0x0A18, 0x04) + OperationRegion (NRAM, SystemMemory, Local6, 0x1000) + Field (NPIO, DWordAcc, NoLock, Preserve) + { + NTFI, 32 + } + + Field (NRAM, DWordAcc, NoLock, Preserve) + { + HDLE, 32, + REVS, 32, + FUNC, 32, + FARG, 32672 + } + + Field (NRAM, DWordAcc, NoLock, Preserve) + { + RLEN, 32, + ODAT, 32736 + } + + If ((Arg4 == Zero)) + { + Local0 = ToUUID ("2f10e7a4-9e91-11e4-89d3-123b93f75cba") + } + ElseIf ((Arg4 == 0x00010000)) + { + Local0 = ToUUID ("648b9cf2-cda1-4312-8ad9-49c4af32bd62") + } + Else + { + Local0 = ToUUID ("4309ac30-0d11-11e4-9191-0800200c9a66") + } + + If (((Local6 == Zero) | (Arg0 != Local0))) + { + If ((Arg2 == Zero)) + { + Return (Buffer (One) + { + 0x00 // . + }) + } + + Return (Buffer (One) + { + 0x01 // . + }) + } + + HDLE = Arg4 + REVS = Arg1 + FUNC = Arg2 + If (((ObjectType (Arg3) == 0x04) & (SizeOf (Arg3) == One))) + { + Local2 = Arg3 [Zero] + Local3 = DerefOf (Local2) + FARG = Local3 + } + + NTFI = Local6 + Local1 = (RLEN - 0x04) + If ((Local1 < 0x08)) + { + Local2 = Zero + Name (TBUF, Buffer (One) + { + 0x00 // . + }) + Local7 = Buffer (Zero){} + While ((Local2 < Local1)) + { + TBUF [Zero] = DerefOf (ODAT [Local2]) + Concatenate (Local7, TBUF, Local7) + Local2++ + } + + Return (Local7) + } + + Local1 = (Local1 << 0x03) + CreateField (ODAT, Zero, Local1, OBUF) + Return (OBUF) /* \_SB_.NVDR.NCAL.OBUF */ + } + + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + Return (NCAL (Arg0, Arg1, Arg2, Arg3, Zero)) + } + + Name (RSTA, Zero) + Method (RFIT, 1, Serialized) + { + Name (OFST, Zero) + OFST = Arg0 + Local0 = NCAL (ToUUID ("648b9cf2-cda1-4312-8ad9-49c4af32bd62"), One, One, Package (0x01) + { + OFST + }, 0x00010000) + CreateDWordField (Local0, Zero, STAU) + RSTA = STAU /* \_SB_.NVDR.RFIT.STAU */ + If ((Zero != STAU)) + { + Return (Buffer (Zero){}) + } + + Local1 = SizeOf (Local0) + Local1 -= 0x04 + If ((Local1 == Zero)) + { + Return (Buffer (Zero){}) + } + + CreateField (Local0, 0x20, (Local1 << 0x03), BUFF) + Return (BUFF) /* \_SB_.NVDR.RFIT.BUFF */ + } + + Method (_FIT, 0, Serialized) // _FIT: Firmware Interface Table + { + Local2 = Buffer (Zero){} + Local3 = Zero + While (One) + { + Local0 = RFIT (Local3) + Local1 = SizeOf (Local0) + If ((RSTA == 0x0100)) + { + Local2 = Buffer (Zero){} + Local3 = Zero + } + Else + { + If ((Local1 == Zero)) + { + Return (Local2) + } + + Local3 += Local1 + Concatenate (Local2, Local0, Local2) + } + } + } + + Device (NV00) + { + Name (_ADR, One) // _ADR: Address + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + Return (NCAL (Arg0, Arg1, Arg2, Arg3, One)) + } + } + + Device (NV01) + { + Name (_ADR, 0x02) // _ADR: Address + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + Return (NCAL (Arg0, Arg1, Arg2, Arg3, 0x02)) + } + } + + Device (NV02) + { + Name (_ADR, 0x03) // _ADR: Address + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + Return (NCAL (Arg0, Arg1, Arg2, Arg3, 0x03)) + } + } + } + } + + Name (MEMA, 0x07FFF000) +} + diff --git a/tests/data/acpi/q35/TPM2.dsl b/tests/data/acpi/q35/TPM2.dsl new file mode 100644 index 0000000000..8568152ccf --- /dev/null +++ b/tests/data/acpi/q35/TPM2.dsl @@ -0,0 +1,38 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/TPM2.tis, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [TPM2] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "TPM2" [Trusted Platform Module hardware interface table] +[004h 0004 4] Table Length : 0000004C +[008h 0008 1] Revision : 04 +[009h 0009 1] Checksum : 72 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCTPM2" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 2] Platform Class : 0000 +[026h 0038 2] Reserved : 0000 +[028h 0040 8] Control Address : 0000000000000000 +[030h 0048 4] Start Method : 06 [Memory Mapped I/O] + +[034h 0052 12] Method Parameters : 00 00 00 00 00 00 00 00 00 00 00 00 +[040h 0064 4] Minimum Log Length : 00010000 +[044h 0068 8] Log Address : 0000000007FF0000 + +Raw Table Data: Length 76 (0x4C) + + 0000: 54 50 4D 32 4C 00 00 00 04 72 42 4F 43 48 53 20 // TPM2L....rBOCHS + 0010: 42 58 50 43 54 50 4D 32 01 00 00 00 42 58 50 43 // BXPCTPM2....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 06 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 00 00 01 00 00 00 FF 07 00 00 00 00 // ............ diff --git a/tests/data/acpi/q35/TPM2.tis.dsl b/tests/data/acpi/q35/TPM2.tis.dsl new file mode 100644 index 0000000000..420643ab2b --- /dev/null +++ b/tests/data/acpi/q35/TPM2.tis.dsl @@ -0,0 +1,38 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/TPM2.tis, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [TPM2] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "TPM2" [Trusted Platform Module hardware interface table] +[004h 0004 4] Table Length : 0000004C +[008h 0008 1] Revision : 04 +[009h 0009 1] Checksum : 72 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCTPM2" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 2] Platform Class : 0000 +[026h 0038 2] Reserved : 0000 +[028h 0040 8] Control Address : 0000000000000000 +[030h 0048 4] Start Method : 06 [Memory Mapped I/O] + +[034h 0052 12] Method Parameters : 00 00 00 00 00 00 00 00 00 00 00 00 +[040h 0064 4] Minimum Log Length : 00010000 +[044h 0068 8] Log Address : 0000000007FF0000 + +Raw Table Data: Length 76 (0x4C) + + 0000: 54 50 4D 32 4C 00 00 00 04 72 42 4F 43 48 53 20 // TPM2L....rBOCHS + 0010: 42 58 50 43 54 50 4D 32 01 00 00 00 42 58 50 43 // BXPCTPM2....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 06 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 00 00 01 00 00 00 FF 07 00 00 00 00 // ............ diff --git a/tests/data/acpi/q35/WAET.acpihmat b/tests/data/acpi/q35/WAET.acpihmat new file mode 100644 index 0000000000000000000000000000000000000000..c2240f58dff6b2f765386b5a2e506fda4800be3e GIT binary patch literal 40 ocmWG{bPds9U|?YEaPoKd2v%^42yh08F)}bPfY>0KiGhIu0IX>T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/WAET.acpihmat.dsl b/tests/data/acpi/q35/WAET.acpihmat.dsl new file mode 100644 index 0000000000..12a4fced5c --- /dev/null +++ b/tests/data/acpi/q35/WAET.acpihmat.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/WAET.acpihmat, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/q35/WAET.bridge b/tests/data/acpi/q35/WAET.bridge new file mode 100644 index 0000000000000000000000000000000000000000..c2240f58dff6b2f765386b5a2e506fda4800be3e GIT binary patch literal 40 ocmWG{bPds9U|?YEaPoKd2v%^42yh08F)}bPfY>0KiGhIu0IX>T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/WAET.bridge.dsl b/tests/data/acpi/q35/WAET.bridge.dsl new file mode 100644 index 0000000000..48effe4c6e --- /dev/null +++ b/tests/data/acpi/q35/WAET.bridge.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/WAET.bridge, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/q35/WAET.cphp b/tests/data/acpi/q35/WAET.cphp new file mode 100644 index 0000000000000000000000000000000000000000..c2240f58dff6b2f765386b5a2e506fda4800be3e GIT binary patch literal 40 ocmWG{bPds9U|?YEaPoKd2v%^42yh08F)}bPfY>0KiGhIu0IX>T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/WAET.cphp.dsl b/tests/data/acpi/q35/WAET.cphp.dsl new file mode 100644 index 0000000000..aadebd53e8 --- /dev/null +++ b/tests/data/acpi/q35/WAET.cphp.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/WAET.cphp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/q35/WAET.dimmpxm b/tests/data/acpi/q35/WAET.dimmpxm new file mode 100644 index 0000000000000000000000000000000000000000..c2240f58dff6b2f765386b5a2e506fda4800be3e GIT binary patch literal 40 ocmWG{bPds9U|?YEaPoKd2v%^42yh08F)}bPfY>0KiGhIu0IX>T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/WAET.dimmpxm.dsl b/tests/data/acpi/q35/WAET.dimmpxm.dsl new file mode 100644 index 0000000000..7ad316b118 --- /dev/null +++ b/tests/data/acpi/q35/WAET.dimmpxm.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/WAET.dimmpxm, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/q35/WAET.dsl b/tests/data/acpi/q35/WAET.dsl new file mode 100644 index 0000000000..b48db4efca --- /dev/null +++ b/tests/data/acpi/q35/WAET.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/WAET.tis, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/q35/WAET.ipmibt b/tests/data/acpi/q35/WAET.ipmibt new file mode 100644 index 0000000000000000000000000000000000000000..c2240f58dff6b2f765386b5a2e506fda4800be3e GIT binary patch literal 40 ocmWG{bPds9U|?YEaPoKd2v%^42yh08F)}bPfY>0KiGhIu0IX>T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/WAET.ipmibt.dsl b/tests/data/acpi/q35/WAET.ipmibt.dsl new file mode 100644 index 0000000000..40cb1d5649 --- /dev/null +++ b/tests/data/acpi/q35/WAET.ipmibt.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/WAET.ipmibt, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/q35/WAET.memhp b/tests/data/acpi/q35/WAET.memhp new file mode 100644 index 0000000000000000000000000000000000000000..c2240f58dff6b2f765386b5a2e506fda4800be3e GIT binary patch literal 40 ocmWG{bPds9U|?YEaPoKd2v%^42yh08F)}bPfY>0KiGhIu0IX>T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/WAET.memhp.dsl b/tests/data/acpi/q35/WAET.memhp.dsl new file mode 100644 index 0000000000..e27f54d4dd --- /dev/null +++ b/tests/data/acpi/q35/WAET.memhp.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/WAET.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/q35/WAET.mmio64 b/tests/data/acpi/q35/WAET.mmio64 new file mode 100644 index 0000000000000000000000000000000000000000..c2240f58dff6b2f765386b5a2e506fda4800be3e GIT binary patch literal 40 ocmWG{bPds9U|?YEaPoKd2v%^42yh08F)}bPfY>0KiGhIu0IX>T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/WAET.mmio64.dsl b/tests/data/acpi/q35/WAET.mmio64.dsl new file mode 100644 index 0000000000..98f3aaf569 --- /dev/null +++ b/tests/data/acpi/q35/WAET.mmio64.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/WAET.mmio64, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/q35/WAET.numamem b/tests/data/acpi/q35/WAET.numamem new file mode 100644 index 0000000000000000000000000000000000000000..c2240f58dff6b2f765386b5a2e506fda4800be3e GIT binary patch literal 40 ocmWG{bPds9U|?YEaPoKd2v%^42yh08F)}bPfY>0KiGhIu0IX>T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/WAET.numamem.dsl b/tests/data/acpi/q35/WAET.numamem.dsl new file mode 100644 index 0000000000..738c75ca6c --- /dev/null +++ b/tests/data/acpi/q35/WAET.numamem.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/WAET.numamem, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/q35/WAET.tis b/tests/data/acpi/q35/WAET.tis new file mode 100644 index 0000000000000000000000000000000000000000..c2240f58dff6b2f765386b5a2e506fda4800be3e GIT binary patch literal 40 ocmWG{bPds9U|?YEaPoKd2v%^42yh08F)}bPfY>0KiGhIu0IX>T0RR91 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/q35/WAET.tis.dsl b/tests/data/acpi/q35/WAET.tis.dsl new file mode 100644 index 0000000000..869ebe2b4a --- /dev/null +++ b/tests/data/acpi/q35/WAET.tis.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/q35/WAET.tis, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/virt/APIC.dsl b/tests/data/acpi/virt/APIC.dsl new file mode 100644 index 0000000000..d334cef533 --- /dev/null +++ b/tests/data/acpi/virt/APIC.dsl @@ -0,0 +1,78 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/virt/APIC.numamem, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 000000A8 +[008h 0008 1] Revision : 03 +[009h 0009 1] Checksum : B3 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : 00000000 +[028h 0040 4] Flags (decoded below) : 00000000 + PC-AT Compatibility : 0 + +[02Ch 0044 1] Subtable Type : 0C [Generic Interrupt Distributor] +[02Dh 0045 1] Length : 18 +[02Eh 0046 2] Reserved : 0000 +[030h 0048 4] Local GIC Hardware ID : 00000000 +[034h 0052 8] Base Address : 0000000008000000 +[03Ch 0060 4] Interrupt Base : 00000000 +[040h 0064 1] Version : 02 +[041h 0065 3] Reserved : 000000 + +[044h 0068 1] Subtable Type : 0B [Generic Interrupt Controller] +[045h 0069 1] Length : 4C +[046h 0070 2] Reserved : 0000 +[048h 0072 4] CPU Interface Number : 00000000 +[04Ch 0076 4] Processor UID : 00000000 +[050h 0080 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Performance Interrupt Trigger Mode : 0 + Virtual GIC Interrupt Trigger Mode : 0 +[054h 0084 4] Parking Protocol Version : 00000000 +[058h 0088 4] Performance Interrupt : 00000017 +[05Ch 0092 8] Parked Address : 0000000000000000 +[064h 0100 8] Base Address : 0000000008010000 +[06Ch 0108 8] Virtual GIC Base Address : 0000000008040000 +[074h 0116 8] Hypervisor GIC Base Address : 0000000008030000 +[07Ch 0124 4] Virtual GIC Interrupt : 00000000 +[080h 0128 8] Redistributor Base Address : 0000000000000000 +[088h 0136 8] ARM MPIDR : 0000000000000000 +/**** ACPI subtable terminates early - may be older version (dump table) */ + +[090h 0144 1] Subtable Type : 0D [Generic MSI Frame] +[091h 0145 1] Length : 18 +[092h 0146 2] Reserved : 0000 +[094h 0148 4] MSI Frame ID : 00000000 +[098h 0152 8] Base Address : 0000000008020000 +[0A0h 0160 4] Flags (decoded below) : 00000001 + Select SPI : 1 +[0A4h 0164 2] SPI Count : 0040 +[0A6h 0166 2] SPI Base : 0050 + +Raw Table Data: Length 168 (0xA8) + + 0000: 41 50 49 43 A8 00 00 00 03 B3 42 4F 43 48 53 20 // APIC......BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 0C 18 00 00 // ................ + 0030: 00 00 00 00 00 00 00 08 00 00 00 00 00 00 00 00 // ................ + 0040: 02 00 00 00 0B 4C 00 00 00 00 00 00 00 00 00 00 // .....L.......... + 0050: 01 00 00 00 00 00 00 00 17 00 00 00 00 00 00 00 // ................ + 0060: 00 00 00 00 00 00 01 08 00 00 00 00 00 00 04 08 // ................ + 0070: 00 00 00 00 00 00 03 08 00 00 00 00 00 00 00 00 // ................ + 0080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0090: 0D 18 00 00 00 00 00 00 00 00 02 08 00 00 00 00 // ................ + 00A0: 01 00 00 00 40 00 50 00 // ....@.P. diff --git a/tests/data/acpi/virt/APIC.memhp.dsl b/tests/data/acpi/virt/APIC.memhp.dsl new file mode 100644 index 0000000000..9b86f7b984 --- /dev/null +++ b/tests/data/acpi/virt/APIC.memhp.dsl @@ -0,0 +1,78 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/virt/APIC.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 000000A8 +[008h 0008 1] Revision : 03 +[009h 0009 1] Checksum : B3 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : 00000000 +[028h 0040 4] Flags (decoded below) : 00000000 + PC-AT Compatibility : 0 + +[02Ch 0044 1] Subtable Type : 0C [Generic Interrupt Distributor] +[02Dh 0045 1] Length : 18 +[02Eh 0046 2] Reserved : 0000 +[030h 0048 4] Local GIC Hardware ID : 00000000 +[034h 0052 8] Base Address : 0000000008000000 +[03Ch 0060 4] Interrupt Base : 00000000 +[040h 0064 1] Version : 02 +[041h 0065 3] Reserved : 000000 + +[044h 0068 1] Subtable Type : 0B [Generic Interrupt Controller] +[045h 0069 1] Length : 4C +[046h 0070 2] Reserved : 0000 +[048h 0072 4] CPU Interface Number : 00000000 +[04Ch 0076 4] Processor UID : 00000000 +[050h 0080 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Performance Interrupt Trigger Mode : 0 + Virtual GIC Interrupt Trigger Mode : 0 +[054h 0084 4] Parking Protocol Version : 00000000 +[058h 0088 4] Performance Interrupt : 00000017 +[05Ch 0092 8] Parked Address : 0000000000000000 +[064h 0100 8] Base Address : 0000000008010000 +[06Ch 0108 8] Virtual GIC Base Address : 0000000008040000 +[074h 0116 8] Hypervisor GIC Base Address : 0000000008030000 +[07Ch 0124 4] Virtual GIC Interrupt : 00000000 +[080h 0128 8] Redistributor Base Address : 0000000000000000 +[088h 0136 8] ARM MPIDR : 0000000000000000 +/**** ACPI subtable terminates early - may be older version (dump table) */ + +[090h 0144 1] Subtable Type : 0D [Generic MSI Frame] +[091h 0145 1] Length : 18 +[092h 0146 2] Reserved : 0000 +[094h 0148 4] MSI Frame ID : 00000000 +[098h 0152 8] Base Address : 0000000008020000 +[0A0h 0160 4] Flags (decoded below) : 00000001 + Select SPI : 1 +[0A4h 0164 2] SPI Count : 0040 +[0A6h 0166 2] SPI Base : 0050 + +Raw Table Data: Length 168 (0xA8) + + 0000: 41 50 49 43 A8 00 00 00 03 B3 42 4F 43 48 53 20 // APIC......BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 0C 18 00 00 // ................ + 0030: 00 00 00 00 00 00 00 08 00 00 00 00 00 00 00 00 // ................ + 0040: 02 00 00 00 0B 4C 00 00 00 00 00 00 00 00 00 00 // .....L.......... + 0050: 01 00 00 00 00 00 00 00 17 00 00 00 00 00 00 00 // ................ + 0060: 00 00 00 00 00 00 01 08 00 00 00 00 00 00 04 08 // ................ + 0070: 00 00 00 00 00 00 03 08 00 00 00 00 00 00 00 00 // ................ + 0080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0090: 0D 18 00 00 00 00 00 00 00 00 02 08 00 00 00 00 // ................ + 00A0: 01 00 00 00 40 00 50 00 // ....@.P. diff --git a/tests/data/acpi/virt/APIC.numamem.dsl b/tests/data/acpi/virt/APIC.numamem.dsl new file mode 100644 index 0000000000..2d43338766 --- /dev/null +++ b/tests/data/acpi/virt/APIC.numamem.dsl @@ -0,0 +1,78 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/virt/APIC.numamem, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 000000A8 +[008h 0008 1] Revision : 03 +[009h 0009 1] Checksum : B3 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : 00000000 +[028h 0040 4] Flags (decoded below) : 00000000 + PC-AT Compatibility : 0 + +[02Ch 0044 1] Subtable Type : 0C [Generic Interrupt Distributor] +[02Dh 0045 1] Length : 18 +[02Eh 0046 2] Reserved : 0000 +[030h 0048 4] Local GIC Hardware ID : 00000000 +[034h 0052 8] Base Address : 0000000008000000 +[03Ch 0060 4] Interrupt Base : 00000000 +[040h 0064 1] Version : 02 +[041h 0065 3] Reserved : 000000 + +[044h 0068 1] Subtable Type : 0B [Generic Interrupt Controller] +[045h 0069 1] Length : 4C +[046h 0070 2] Reserved : 0000 +[048h 0072 4] CPU Interface Number : 00000000 +[04Ch 0076 4] Processor UID : 00000000 +[050h 0080 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Performance Interrupt Trigger Mode : 0 + Virtual GIC Interrupt Trigger Mode : 0 +[054h 0084 4] Parking Protocol Version : 00000000 +[058h 0088 4] Performance Interrupt : 00000017 +[05Ch 0092 8] Parked Address : 0000000000000000 +[064h 0100 8] Base Address : 0000000008010000 +[06Ch 0108 8] Virtual GIC Base Address : 0000000008040000 +[074h 0116 8] Hypervisor GIC Base Address : 0000000008030000 +[07Ch 0124 4] Virtual GIC Interrupt : 00000000 +[080h 0128 8] Redistributor Base Address : 0000000000000000 +[088h 0136 8] ARM MPIDR : 0000000000000000 +/**** ACPI subtable terminates early - may be older version (dump table) */ + +[090h 0144 1] Subtable Type : 0D [Generic MSI Frame] +[091h 0145 1] Length : 18 +[092h 0146 2] Reserved : 0000 +[094h 0148 4] MSI Frame ID : 00000000 +[098h 0152 8] Base Address : 0000000008020000 +[0A0h 0160 4] Flags (decoded below) : 00000001 + Select SPI : 1 +[0A4h 0164 2] SPI Count : 0040 +[0A6h 0166 2] SPI Base : 0050 + +Raw Table Data: Length 168 (0xA8) + + 0000: 41 50 49 43 A8 00 00 00 03 B3 42 4F 43 48 53 20 // APIC......BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 0C 18 00 00 // ................ + 0030: 00 00 00 00 00 00 00 08 00 00 00 00 00 00 00 00 // ................ + 0040: 02 00 00 00 0B 4C 00 00 00 00 00 00 00 00 00 00 // .....L.......... + 0050: 01 00 00 00 00 00 00 00 17 00 00 00 00 00 00 00 // ................ + 0060: 00 00 00 00 00 00 01 08 00 00 00 00 00 00 04 08 // ................ + 0070: 00 00 00 00 00 00 03 08 00 00 00 00 00 00 00 00 // ................ + 0080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0090: 0D 18 00 00 00 00 00 00 00 00 02 08 00 00 00 00 // ................ + 00A0: 01 00 00 00 40 00 50 00 // ....@.P. diff --git a/tests/data/acpi/virt/DSDT.dsl b/tests/data/acpi/virt/DSDT.dsl new file mode 100644 index 0000000000..58368ff44c --- /dev/null +++ b/tests/data/acpi/virt/DSDT.dsl @@ -0,0 +1,1906 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/virt/DSDT.numamem, Mon Sep 28 17:24:38 2020 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x00001450 (5200) + * Revision 0x02 + * Checksum 0xFA + * OEM ID "BOCHS " + * OEM Table ID "BXPCDSDT" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001) +{ + Scope (\_SB) + { + Device (C000) + { + Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + } + + Device (COM0) + { + Name (_HID, "ARMH0011") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x09000000, // Address Base + 0x00001000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000021, + } + }) + } + + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x09020000, // Address Base + 0x00000018, // Address Length + ) + }) + } + + Device (VR00) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A000000, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000030, + } + }) + } + + Device (VR01) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A000200, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000031, + } + }) + } + + Device (VR02) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A000400, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000032, + } + }) + } + + Device (VR03) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A000600, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000033, + } + }) + } + + Device (VR04) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A000800, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000034, + } + }) + } + + Device (VR05) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x05) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A000A00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000035, + } + }) + } + + Device (VR06) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x06) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A000C00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000036, + } + }) + } + + Device (VR07) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x07) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A000E00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000037, + } + }) + } + + Device (VR08) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x08) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A001000, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000038, + } + }) + } + + Device (VR09) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x09) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A001200, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000039, + } + }) + } + + Device (VR10) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x0A) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A001400, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000003A, + } + }) + } + + Device (VR11) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x0B) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A001600, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000003B, + } + }) + } + + Device (VR12) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x0C) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A001800, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000003C, + } + }) + } + + Device (VR13) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x0D) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A001A00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000003D, + } + }) + } + + Device (VR14) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x0E) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A001C00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000003E, + } + }) + } + + Device (VR15) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x0F) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A001E00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000003F, + } + }) + } + + Device (VR16) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x10) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A002000, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000040, + } + }) + } + + Device (VR17) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x11) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A002200, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000041, + } + }) + } + + Device (VR18) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x12) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A002400, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000042, + } + }) + } + + Device (VR19) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x13) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A002600, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000043, + } + }) + } + + Device (VR20) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x14) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A002800, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000044, + } + }) + } + + Device (VR21) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x15) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A002A00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000045, + } + }) + } + + Device (VR22) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x16) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A002C00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000046, + } + }) + } + + Device (VR23) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x17) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A002E00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000047, + } + }) + } + + Device (VR24) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x18) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A003000, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000048, + } + }) + } + + Device (VR25) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x19) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A003200, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000049, + } + }) + } + + Device (VR26) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x1A) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A003400, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000004A, + } + }) + } + + Device (VR27) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x1B) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A003600, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000004B, + } + }) + } + + Device (VR28) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x1C) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A003800, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000004C, + } + }) + } + + Device (VR29) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x1D) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A003A00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000004D, + } + }) + } + + Device (VR30) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x1E) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A003C00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000004E, + } + }) + } + + Device (VR31) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x1F) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A003E00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000004F, + } + }) + } + + Device (PCI0) + { + Name (_HID, "PNP0A08" /* PCI Express Bus */) // _HID: Hardware ID + Name (_CID, "PNP0A03" /* PCI Bus */) // _CID: Compatible ID + Name (_SEG, Zero) // _SEG: PCI Segment + Name (_BBN, Zero) // _BBN: BIOS Bus Number + Name (_UID, Zero) // _UID: Unique ID + Name (_STR, Unicode ("PCIe 0 Device")) // _STR: Description String + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_PRT, Package (0x80) // _PRT: PCI Routing Table + { + Package (0x04) + { + 0xFFFF, + Zero, + GSI0, + Zero + }, + + Package (0x04) + { + 0xFFFF, + One, + GSI1, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + GSI2, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + Zero, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + One, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x02, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x03, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + Zero, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + One, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x02, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x03, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + Zero, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + One, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x02, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x03, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + Zero, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + One, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x02, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x03, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + Zero, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + One, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x02, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x03, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + Zero, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + One, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x02, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x03, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + Zero, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + One, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x02, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x03, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + Zero, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + One, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x02, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x03, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + Zero, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + One, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x02, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x03, + GSI0, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + Zero, + GSI2, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + One, + GSI3, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x02, + GSI0, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x03, + GSI1, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + Zero, + GSI3, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + One, + GSI0, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x02, + GSI1, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x03, + GSI2, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + Zero, + GSI0, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + One, + GSI1, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x02, + GSI2, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x03, + GSI3, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + Zero, + GSI1, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + One, + GSI2, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x02, + GSI3, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x03, + GSI0, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + Zero, + GSI2, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + One, + GSI3, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x02, + GSI0, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x03, + GSI1, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + Zero, + GSI3, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + One, + GSI0, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x02, + GSI1, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x03, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + Zero, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + One, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x02, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x03, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + Zero, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + One, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x02, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x03, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + Zero, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + One, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x02, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x03, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + Zero, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + One, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x02, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x03, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + Zero, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + One, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x02, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x03, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + Zero, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + One, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x02, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x03, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + Zero, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + One, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x02, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x03, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + Zero, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + One, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x02, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x03, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + Zero, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + One, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x02, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x03, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + Zero, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + One, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x02, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x03, + GSI0, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + Zero, + GSI2, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + One, + GSI3, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x02, + GSI0, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x03, + GSI1, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + Zero, + GSI3, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + One, + GSI0, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x02, + GSI1, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x03, + GSI2, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + Zero, + GSI0, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + One, + GSI1, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x02, + GSI2, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x03, + GSI3, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + Zero, + GSI1, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + One, + GSI2, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x02, + GSI3, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x03, + GSI0, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + Zero, + GSI2, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + One, + GSI3, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x02, + GSI0, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x03, + GSI1, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + Zero, + GSI3, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + One, + GSI0, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x02, + GSI1, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x03, + GSI2, + Zero + } + }) + Device (GSI0) + { + Name (_HID, "PNP0C0F" /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000023, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000023, + } + }) + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSI1) + { + Name (_HID, "PNP0C0F" /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000024, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000024, + } + }) + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSI2) + { + Name (_HID, "PNP0C0F" /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000025, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000025, + } + }) + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSI3) + { + Name (_HID, "PNP0C0F" /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000026, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000026, + } + }) + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Method (_CBA, 0, NotSerialized) // _CBA: Configuration Base Address + { + Return (0x0000004010000000) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (ResourceTemplate () + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x10000000, // Range Minimum + 0x3EFEFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x2EFF0000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x00000000, // Granularity + 0x00000000, // Range Minimum + 0x0000FFFF, // Range Maximum + 0x3EFF0000, // Translation Offset + 0x00010000, // Length + ,, , TypeStatic, DenseTranslation) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000008000000000, // Range Minimum + 0x000000FFFFFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000008000000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + } + + Name (SUPP, Zero) + Name (CTRL, Zero) + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + CreateDWordField (Arg3, Zero, CDW1) + If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) + { + CreateDWordField (Arg3, 0x04, CDW2) + CreateDWordField (Arg3, 0x08, CDW3) + SUPP = CDW2 /* \_SB_.PCI0._OSC.CDW2 */ + CTRL = CDW3 /* \_SB_.PCI0._OSC.CDW3 */ + CTRL &= 0x1F + If ((Arg1 != One)) + { + CDW1 |= 0x08 + } + + If ((CDW3 != CTRL)) + { + CDW1 |= 0x10 + } + + CDW3 = CTRL /* \_SB_.PCI0.CTRL */ + Return (Arg3) + } + Else + { + CDW1 |= 0x04 + Return (Arg3) + } + } + + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + If ((Arg2 == Zero)) + { + Return (Buffer (One) + { + 0x01 // . + }) + } + } + + Return (Buffer (One) + { + 0x00 // . + }) + } + + Device (RES0) + { + Name (_HID, "PNP0C02" /* PNP Motherboard Resources */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000004010000000, // Range Minimum + 0x000000401FFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000010000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + } + } + + Device (\_SB.GED) + { + Name (_HID, "ACPI0013" /* Generic Event Device */) // _HID: Hardware ID + Name (_UID, "GED") // _UID: Unique ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000029, + } + }) + OperationRegion (EREG, SystemMemory, 0x09080000, 0x04) + Field (EREG, DWordAcc, NoLock, WriteAsZeros) + { + ESEL, 32 + } + + Method (_EVT, 1, Serialized) // _EVT: Event + { + Local0 = ESEL /* \_SB_.GED_.ESEL */ + If (((Local0 & 0x02) == 0x02)) + { + Notify (PWRB, 0x80) // Status Change + } + } + } + + Device (PWRB) + { + Name (_HID, "PNP0C0C" /* Power Button Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + } + } +} + diff --git a/tests/data/acpi/virt/DSDT.memhp.dsl b/tests/data/acpi/virt/DSDT.memhp.dsl new file mode 100644 index 0000000000..84f3c51867 --- /dev/null +++ b/tests/data/acpi/virt/DSDT.memhp.dsl @@ -0,0 +1,2215 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/virt/DSDT.memhp, Tue Aug 4 11:14:15 2020 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x000019A6 (6566) + * Revision 0x02 + * Checksum 0x02 + * OEM ID "BOCHS " + * OEM Table ID "BXPCDSDT" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001) +{ + External (_SB_.NVDR, UnknownObj) + + Scope (\_SB) + { + Device (C000) + { + Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + } + + Device (COM0) + { + Name (_HID, "ARMH0011") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x09000000, // Address Base + 0x00001000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000021, + } + }) + } + + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x09020000, // Address Base + 0x00000018, // Address Length + ) + }) + } + + Device (VR00) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A000000, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000030, + } + }) + } + + Device (VR01) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A000200, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000031, + } + }) + } + + Device (VR02) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A000400, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000032, + } + }) + } + + Device (VR03) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A000600, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000033, + } + }) + } + + Device (VR04) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A000800, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000034, + } + }) + } + + Device (VR05) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x05) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A000A00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000035, + } + }) + } + + Device (VR06) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x06) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A000C00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000036, + } + }) + } + + Device (VR07) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x07) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A000E00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000037, + } + }) + } + + Device (VR08) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x08) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A001000, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000038, + } + }) + } + + Device (VR09) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x09) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A001200, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000039, + } + }) + } + + Device (VR10) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x0A) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A001400, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000003A, + } + }) + } + + Device (VR11) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x0B) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A001600, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000003B, + } + }) + } + + Device (VR12) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x0C) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A001800, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000003C, + } + }) + } + + Device (VR13) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x0D) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A001A00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000003D, + } + }) + } + + Device (VR14) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x0E) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A001C00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000003E, + } + }) + } + + Device (VR15) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x0F) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A001E00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000003F, + } + }) + } + + Device (VR16) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x10) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A002000, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000040, + } + }) + } + + Device (VR17) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x11) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A002200, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000041, + } + }) + } + + Device (VR18) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x12) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A002400, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000042, + } + }) + } + + Device (VR19) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x13) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A002600, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000043, + } + }) + } + + Device (VR20) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x14) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A002800, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000044, + } + }) + } + + Device (VR21) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x15) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A002A00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000045, + } + }) + } + + Device (VR22) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x16) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A002C00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000046, + } + }) + } + + Device (VR23) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x17) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A002E00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000047, + } + }) + } + + Device (VR24) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x18) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A003000, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000048, + } + }) + } + + Device (VR25) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x19) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A003200, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000049, + } + }) + } + + Device (VR26) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x1A) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A003400, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000004A, + } + }) + } + + Device (VR27) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x1B) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A003600, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000004B, + } + }) + } + + Device (VR28) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x1C) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A003800, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000004C, + } + }) + } + + Device (VR29) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x1D) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A003A00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000004D, + } + }) + } + + Device (VR30) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x1E) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A003C00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000004E, + } + }) + } + + Device (VR31) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x1F) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A003E00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000004F, + } + }) + } + + Device (PCI0) + { + Name (_HID, "PNP0A08" /* PCI Express Bus */) // _HID: Hardware ID + Name (_CID, "PNP0A03" /* PCI Bus */) // _CID: Compatible ID + Name (_SEG, Zero) // _SEG: PCI Segment + Name (_BBN, Zero) // _BBN: BIOS Bus Number + Name (_UID, "PCI0") // _UID: Unique ID + Name (_STR, Unicode ("PCIe 0 Device")) // _STR: Description String + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_PRT, Package (0x80) // _PRT: PCI Routing Table + { + Package (0x04) + { + 0xFFFF, + Zero, + GSI0, + Zero + }, + + Package (0x04) + { + 0xFFFF, + One, + GSI1, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + GSI2, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + Zero, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + One, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x02, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x03, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + Zero, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + One, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x02, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x03, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + Zero, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + One, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x02, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x03, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + Zero, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + One, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x02, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x03, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + Zero, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + One, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x02, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x03, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + Zero, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + One, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x02, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x03, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + Zero, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + One, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x02, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x03, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + Zero, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + One, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x02, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x03, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + Zero, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + One, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x02, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x03, + GSI0, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + Zero, + GSI2, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + One, + GSI3, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x02, + GSI0, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x03, + GSI1, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + Zero, + GSI3, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + One, + GSI0, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x02, + GSI1, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x03, + GSI2, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + Zero, + GSI0, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + One, + GSI1, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x02, + GSI2, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x03, + GSI3, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + Zero, + GSI1, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + One, + GSI2, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x02, + GSI3, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x03, + GSI0, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + Zero, + GSI2, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + One, + GSI3, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x02, + GSI0, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x03, + GSI1, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + Zero, + GSI3, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + One, + GSI0, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x02, + GSI1, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x03, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + Zero, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + One, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x02, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x03, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + Zero, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + One, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x02, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x03, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + Zero, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + One, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x02, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x03, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + Zero, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + One, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x02, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x03, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + Zero, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + One, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x02, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x03, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + Zero, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + One, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x02, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x03, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + Zero, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + One, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x02, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x03, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + Zero, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + One, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x02, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x03, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + Zero, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + One, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x02, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x03, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + Zero, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + One, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x02, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x03, + GSI0, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + Zero, + GSI2, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + One, + GSI3, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x02, + GSI0, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x03, + GSI1, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + Zero, + GSI3, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + One, + GSI0, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x02, + GSI1, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x03, + GSI2, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + Zero, + GSI0, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + One, + GSI1, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x02, + GSI2, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x03, + GSI3, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + Zero, + GSI1, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + One, + GSI2, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x02, + GSI3, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x03, + GSI0, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + Zero, + GSI2, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + One, + GSI3, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x02, + GSI0, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x03, + GSI1, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + Zero, + GSI3, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + One, + GSI0, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x02, + GSI1, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x03, + GSI2, + Zero + } + }) + Device (GSI0) + { + Name (_HID, "PNP0C0F" /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000023, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000023, + } + }) + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSI1) + { + Name (_HID, "PNP0C0F" /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000024, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000024, + } + }) + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSI2) + { + Name (_HID, "PNP0C0F" /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000025, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000025, + } + }) + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSI3) + { + Name (_HID, "PNP0C0F" /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000026, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000026, + } + }) + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Method (_CBA, 0, NotSerialized) // _CBA: Configuration Base Address + { + Return (0x0000004010000000) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (ResourceTemplate () + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x10000000, // Range Minimum + 0x3EFEFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x2EFF0000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x00000000, // Granularity + 0x00000000, // Range Minimum + 0x0000FFFF, // Range Maximum + 0x3EFF0000, // Translation Offset + 0x00010000, // Length + ,, , TypeStatic, DenseTranslation) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000008000000000, // Range Minimum + 0x000000FFFFFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000008000000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + } + + Name (SUPP, Zero) + Name (CTRL, Zero) + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + CreateDWordField (Arg3, Zero, CDW1) + If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) + { + CreateDWordField (Arg3, 0x04, CDW2) + CreateDWordField (Arg3, 0x08, CDW3) + SUPP = CDW2 /* \_SB_.PCI0._OSC.CDW2 */ + CTRL = CDW3 /* \_SB_.PCI0._OSC.CDW3 */ + CTRL &= 0x1F + If ((Arg1 != One)) + { + CDW1 |= 0x08 + } + + If ((CDW3 != CTRL)) + { + CDW1 |= 0x10 + } + + CDW3 = CTRL /* \_SB_.PCI0.CTRL */ + Return (Arg3) + } + Else + { + CDW1 |= 0x04 + Return (Arg3) + } + } + + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + If ((Arg2 == Zero)) + { + Return (Buffer (One) + { + 0x01 // . + }) + } + } + + Return (Buffer (One) + { + 0x00 // . + }) + } + + Device (RES0) + { + Name (_HID, "PNP0C02" /* PNP Motherboard Resources */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000004010000000, // Range Minimum + 0x000000401FFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000010000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + } + } + + Device (\_SB.GED) + { + Name (_HID, "ACPI0013" /* Generic Event Device */) // _HID: Hardware ID + Name (_UID, "GED") // _UID: Unique ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000029, + } + }) + OperationRegion (EREG, SystemMemory, 0x09080000, 0x04) + Field (EREG, DWordAcc, NoLock, WriteAsZeros) + { + ESEL, 32 + } + + Method (_EVT, 1, Serialized) // _EVT: Event + { + Local0 = ESEL /* \_SB_.GED_.ESEL */ + If (((Local0 & One) == One)) + { + \_SB.MHPC.MSCN () + } + + If (((Local0 & 0x02) == 0x02)) + { + Notify (PWRB, 0x80) // Status Change + } + + If (((Local0 & 0x04) == 0x04)) + { + Notify (\_SB.NVDR, 0x80) // Status Change + } + } + } + + Device (\_SB.MHPD) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "Memory hotplug resources") // _UID: Unique ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x09070000, // Address Base + 0x00000018, // Address Length + ) + }) + OperationRegion (HPMR, SystemMemory, 0x09070000, 0x18) + } + + Device (\_SB.MHPC) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "DIMM devices") // _UID: Unique ID + Name (MDNR, 0x03) + Field (\_SB.MHPD.HPMR, DWordAcc, NoLock, Preserve) + { + MRBL, 32, + MRBH, 32, + MRLL, 32, + MRLH, 32, + MPX, 32 + } + + Field (\_SB.MHPD.HPMR, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x14), + MES, 1, + MINS, 1, + MRMV, 1, + MEJ, 1 + } + + Field (\_SB.MHPD.HPMR, DWordAcc, NoLock, Preserve) + { + MSEL, 32, + MOEV, 32, + MOSC, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If ((MDNR == Zero)) + { + Return (Zero) + } + + Return (0x0B) + } + + Mutex (MLCK, 0x00) + Method (MSCN, 0, NotSerialized) + { + If ((MDNR == Zero)) + { + Return (Zero) + } + + Local0 = Zero + Acquire (MLCK, 0xFFFF) + While ((Local0 < MDNR)) + { + MSEL = Local0 + If ((MINS == One)) + { + MTFY (Local0, One) + MINS = One + } + ElseIf ((MRMV == One)) + { + MTFY (Local0, 0x03) + MRMV = One + } + + Local0 += One + } + + Release (MLCK) + Return (One) + } + + Method (MRST, 1, NotSerialized) + { + Local0 = Zero + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + If ((MES == One)) + { + Local0 = 0x0F + } + + Release (MLCK) + Return (Local0) + } + + Method (MCRS, 1, Serialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + Name (MR64, ResourceTemplate () + { + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000000000000, // Range Minimum + 0xFFFFFFFFFFFFFFFE, // Range Maximum + 0x0000000000000000, // Translation Offset + 0xFFFFFFFFFFFFFFFF, // Length + ,, _Y00, AddressRangeMemory, TypeStatic) + }) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y00._MIN, MINL) // _MIN: Minimum Base Address + CreateDWordField (MR64, 0x12, MINH) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y00._LEN, LENL) // _LEN: Length + CreateDWordField (MR64, 0x2A, LENH) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y00._MAX, MAXL) // _MAX: Maximum Base Address + CreateDWordField (MR64, 0x1A, MAXH) + MINH = MRBH /* \_SB_.MHPC.MRBH */ + MINL = MRBL /* \_SB_.MHPC.MRBL */ + LENH = MRLH /* \_SB_.MHPC.MRLH */ + LENL = MRLL /* \_SB_.MHPC.MRLL */ + MAXL = (MINL + LENL) /* \_SB_.MHPC.MCRS.LENL */ + MAXH = (MINH + LENH) /* \_SB_.MHPC.MCRS.LENH */ + If ((MAXL < MINL)) + { + MAXH += One + } + + If ((MAXL < One)) + { + MAXH -= One + } + + MAXL -= One + If ((MAXH == Zero)) + { + Name (MR32, ResourceTemplate () + { + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x00000000, // Range Minimum + 0xFFFFFFFE, // Range Maximum + 0x00000000, // Translation Offset + 0xFFFFFFFF, // Length + ,, _Y01, AddressRangeMemory, TypeStatic) + }) + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y01._MIN, MIN) // _MIN: Minimum Base Address + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y01._MAX, MAX) // _MAX: Maximum Base Address + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y01._LEN, LEN) // _LEN: Length + MIN = MINL /* \_SB_.MHPC.MCRS.MINL */ + MAX = MAXL /* \_SB_.MHPC.MCRS.MAXL */ + LEN = LENL /* \_SB_.MHPC.MCRS.LENL */ + Release (MLCK) + Return (MR32) /* \_SB_.MHPC.MCRS.MR32 */ + } + + Release (MLCK) + Return (MR64) /* \_SB_.MHPC.MCRS.MR64 */ + } + + Method (MPXM, 1, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + Local0 = MPX /* \_SB_.MHPC.MPX_ */ + Release (MLCK) + Return (Local0) + } + + Method (MOST, 4, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + MOEV = Arg1 + MOSC = Arg2 + Release (MLCK) + } + + Method (MEJ0, 2, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + MEJ = One + Release (MLCK) + } + + Device (MP00) + { + Name (_UID, "0x00") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Device (MP01) + { + Name (_UID, "0x01") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Device (MP02) + { + Name (_UID, "0x02") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Method (MTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (MP00, Arg1) + } + + If ((Arg0 == One)) + { + Notify (MP01, Arg1) + } + + If ((Arg0 == 0x02)) + { + Notify (MP02, Arg1) + } + } + } + + Device (PWRB) + { + Name (_HID, "PNP0C0C" /* Power Button Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + } + } +} + diff --git a/tests/data/acpi/virt/DSDT.numamem.dsl b/tests/data/acpi/virt/DSDT.numamem.dsl new file mode 100644 index 0000000000..6603d31a01 --- /dev/null +++ b/tests/data/acpi/virt/DSDT.numamem.dsl @@ -0,0 +1,1906 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/virt/DSDT.numamem, Tue Aug 4 11:14:15 2020 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x00001455 (5205) + * Revision 0x02 + * Checksum 0xE1 + * OEM ID "BOCHS " + * OEM Table ID "BXPCDSDT" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001) +{ + Scope (\_SB) + { + Device (C000) + { + Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + } + + Device (COM0) + { + Name (_HID, "ARMH0011") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x09000000, // Address Base + 0x00001000, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000021, + } + }) + } + + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x09020000, // Address Base + 0x00000018, // Address Length + ) + }) + } + + Device (VR00) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A000000, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000030, + } + }) + } + + Device (VR01) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A000200, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000031, + } + }) + } + + Device (VR02) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A000400, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000032, + } + }) + } + + Device (VR03) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A000600, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000033, + } + }) + } + + Device (VR04) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A000800, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000034, + } + }) + } + + Device (VR05) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x05) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A000A00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000035, + } + }) + } + + Device (VR06) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x06) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A000C00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000036, + } + }) + } + + Device (VR07) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x07) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A000E00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000037, + } + }) + } + + Device (VR08) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x08) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A001000, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000038, + } + }) + } + + Device (VR09) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x09) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A001200, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000039, + } + }) + } + + Device (VR10) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x0A) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A001400, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000003A, + } + }) + } + + Device (VR11) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x0B) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A001600, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000003B, + } + }) + } + + Device (VR12) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x0C) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A001800, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000003C, + } + }) + } + + Device (VR13) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x0D) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A001A00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000003D, + } + }) + } + + Device (VR14) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x0E) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A001C00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000003E, + } + }) + } + + Device (VR15) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x0F) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A001E00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000003F, + } + }) + } + + Device (VR16) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x10) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A002000, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000040, + } + }) + } + + Device (VR17) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x11) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A002200, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000041, + } + }) + } + + Device (VR18) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x12) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A002400, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000042, + } + }) + } + + Device (VR19) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x13) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A002600, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000043, + } + }) + } + + Device (VR20) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x14) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A002800, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000044, + } + }) + } + + Device (VR21) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x15) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A002A00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000045, + } + }) + } + + Device (VR22) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x16) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A002C00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000046, + } + }) + } + + Device (VR23) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x17) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A002E00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000047, + } + }) + } + + Device (VR24) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x18) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A003000, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000048, + } + }) + } + + Device (VR25) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x19) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A003200, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000049, + } + }) + } + + Device (VR26) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x1A) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A003400, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000004A, + } + }) + } + + Device (VR27) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x1B) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A003600, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000004B, + } + }) + } + + Device (VR28) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x1C) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A003800, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000004C, + } + }) + } + + Device (VR29) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x1D) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A003A00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000004D, + } + }) + } + + Device (VR30) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x1E) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A003C00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000004E, + } + }) + } + + Device (VR31) + { + Name (_HID, "LNRO0005") // _HID: Hardware ID + Name (_UID, 0x1F) // _UID: Unique ID + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadWrite, + 0x0A003E00, // Address Base + 0x00000200, // Address Length + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x0000004F, + } + }) + } + + Device (PCI0) + { + Name (_HID, "PNP0A08" /* PCI Express Bus */) // _HID: Hardware ID + Name (_CID, "PNP0A03" /* PCI Bus */) // _CID: Compatible ID + Name (_SEG, Zero) // _SEG: PCI Segment + Name (_BBN, Zero) // _BBN: BIOS Bus Number + Name (_UID, "PCI0") // _UID: Unique ID + Name (_STR, Unicode ("PCIe 0 Device")) // _STR: Description String + Name (_CCA, One) // _CCA: Cache Coherency Attribute + Name (_PRT, Package (0x80) // _PRT: PCI Routing Table + { + Package (0x04) + { + 0xFFFF, + Zero, + GSI0, + Zero + }, + + Package (0x04) + { + 0xFFFF, + One, + GSI1, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x02, + GSI2, + Zero + }, + + Package (0x04) + { + 0xFFFF, + 0x03, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + Zero, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + One, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x02, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0001FFFF, + 0x03, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + Zero, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + One, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x02, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0002FFFF, + 0x03, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + Zero, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + One, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x02, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0003FFFF, + 0x03, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + Zero, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + One, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x02, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0004FFFF, + 0x03, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + Zero, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + One, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x02, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0005FFFF, + 0x03, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + Zero, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + One, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x02, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0006FFFF, + 0x03, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + Zero, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + One, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x02, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0007FFFF, + 0x03, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + Zero, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + One, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x02, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0008FFFF, + 0x03, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + Zero, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + One, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x02, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0009FFFF, + 0x03, + GSI0, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + Zero, + GSI2, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + One, + GSI3, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x02, + GSI0, + Zero + }, + + Package (0x04) + { + 0x000AFFFF, + 0x03, + GSI1, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + Zero, + GSI3, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + One, + GSI0, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x02, + GSI1, + Zero + }, + + Package (0x04) + { + 0x000BFFFF, + 0x03, + GSI2, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + Zero, + GSI0, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + One, + GSI1, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x02, + GSI2, + Zero + }, + + Package (0x04) + { + 0x000CFFFF, + 0x03, + GSI3, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + Zero, + GSI1, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + One, + GSI2, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x02, + GSI3, + Zero + }, + + Package (0x04) + { + 0x000DFFFF, + 0x03, + GSI0, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + Zero, + GSI2, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + One, + GSI3, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x02, + GSI0, + Zero + }, + + Package (0x04) + { + 0x000EFFFF, + 0x03, + GSI1, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + Zero, + GSI3, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + One, + GSI0, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x02, + GSI1, + Zero + }, + + Package (0x04) + { + 0x000FFFFF, + 0x03, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + Zero, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + One, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x02, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0010FFFF, + 0x03, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + Zero, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + One, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x02, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0011FFFF, + 0x03, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + Zero, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + One, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x02, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0012FFFF, + 0x03, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + Zero, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + One, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x02, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0013FFFF, + 0x03, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + Zero, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + One, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x02, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0014FFFF, + 0x03, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + Zero, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + One, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x02, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0015FFFF, + 0x03, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + Zero, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + One, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x02, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0016FFFF, + 0x03, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + Zero, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + One, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x02, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0017FFFF, + 0x03, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + Zero, + GSI0, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + One, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x02, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0018FFFF, + 0x03, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + Zero, + GSI1, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + One, + GSI2, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x02, + GSI3, + Zero + }, + + Package (0x04) + { + 0x0019FFFF, + 0x03, + GSI0, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + Zero, + GSI2, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + One, + GSI3, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x02, + GSI0, + Zero + }, + + Package (0x04) + { + 0x001AFFFF, + 0x03, + GSI1, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + Zero, + GSI3, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + One, + GSI0, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x02, + GSI1, + Zero + }, + + Package (0x04) + { + 0x001BFFFF, + 0x03, + GSI2, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + Zero, + GSI0, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + One, + GSI1, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x02, + GSI2, + Zero + }, + + Package (0x04) + { + 0x001CFFFF, + 0x03, + GSI3, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + Zero, + GSI1, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + One, + GSI2, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x02, + GSI3, + Zero + }, + + Package (0x04) + { + 0x001DFFFF, + 0x03, + GSI0, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + Zero, + GSI2, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + One, + GSI3, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x02, + GSI0, + Zero + }, + + Package (0x04) + { + 0x001EFFFF, + 0x03, + GSI1, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + Zero, + GSI3, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + One, + GSI0, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x02, + GSI1, + Zero + }, + + Package (0x04) + { + 0x001FFFFF, + 0x03, + GSI2, + Zero + } + }) + Device (GSI0) + { + Name (_HID, "PNP0C0F" /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000023, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000023, + } + }) + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSI1) + { + Name (_HID, "PNP0C0F" /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000024, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000024, + } + }) + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSI2) + { + Name (_HID, "PNP0C0F" /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000025, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000025, + } + }) + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Device (GSI3) + { + Name (_HID, "PNP0C0F" /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000026, + } + }) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) + { + 0x00000026, + } + }) + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + + Method (_CBA, 0, NotSerialized) // _CBA: Configuration Base Address + { + Return (0x0000004010000000) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (ResourceTemplate () + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x10000000, // Range Minimum + 0x3EFEFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x2EFF0000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x00000000, // Granularity + 0x00000000, // Range Minimum + 0x0000FFFF, // Range Maximum + 0x3EFF0000, // Translation Offset + 0x00010000, // Length + ,, , TypeStatic, DenseTranslation) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000008000000000, // Range Minimum + 0x000000FFFFFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000008000000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + } + + Name (SUPP, Zero) + Name (CTRL, Zero) + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + CreateDWordField (Arg3, Zero, CDW1) + If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) + { + CreateDWordField (Arg3, 0x04, CDW2) + CreateDWordField (Arg3, 0x08, CDW3) + SUPP = CDW2 /* \_SB_.PCI0._OSC.CDW2 */ + CTRL = CDW3 /* \_SB_.PCI0._OSC.CDW3 */ + CTRL &= 0x1F + If ((Arg1 != One)) + { + CDW1 |= 0x08 + } + + If ((CDW3 != CTRL)) + { + CDW1 |= 0x10 + } + + CDW3 = CTRL /* \_SB_.PCI0.CTRL */ + Return (Arg3) + } + Else + { + CDW1 |= 0x04 + Return (Arg3) + } + } + + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + If ((Arg2 == Zero)) + { + Return (Buffer (One) + { + 0x01 // . + }) + } + } + + Return (Buffer (One) + { + 0x00 // . + }) + } + + Device (RES0) + { + Name (_HID, "PNP0C02" /* PNP Motherboard Resources */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000004010000000, // Range Minimum + 0x000000401FFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000010000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + } + } + + Device (\_SB.GED) + { + Name (_HID, "ACPI0013" /* Generic Event Device */) // _HID: Hardware ID + Name (_UID, "GED") // _UID: Unique ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) + { + 0x00000029, + } + }) + OperationRegion (EREG, SystemMemory, 0x09080000, 0x04) + Field (EREG, DWordAcc, NoLock, WriteAsZeros) + { + ESEL, 32 + } + + Method (_EVT, 1, Serialized) // _EVT: Event + { + Local0 = ESEL /* \_SB_.GED_.ESEL */ + If (((Local0 & 0x02) == 0x02)) + { + Notify (PWRB, 0x80) // Status Change + } + } + } + + Device (PWRB) + { + Name (_HID, "PNP0C0C" /* Power Button Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + } + } +} + diff --git a/tests/data/acpi/virt/FACP.dsl b/tests/data/acpi/virt/FACP.dsl new file mode 100644 index 0000000000..2c73796f89 --- /dev/null +++ b/tests/data/acpi/virt/FACP.dsl @@ -0,0 +1,196 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/virt/FACP.numamem, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [FACP] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)] +[004h 0004 4] Table Length : 0000010C +[008h 0008 1] Revision : 05 +[009h 0009 1] Checksum : BB +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCFACP" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] FACS Address : 00000000 +[028h 0040 4] DSDT Address : 00000000 +[02Ch 0044 1] Model : 00 +[02Dh 0045 1] PM Profile : 00 [Unspecified] +[02Eh 0046 2] SCI Interrupt : 0000 +[030h 0048 4] SMI Command Port : 00000000 +[034h 0052 1] ACPI Enable Value : 00 +[035h 0053 1] ACPI Disable Value : 00 +[036h 0054 1] S4BIOS Command : 00 +[037h 0055 1] P-State Control : 00 +[038h 0056 4] PM1A Event Block Address : 00000000 +[03Ch 0060 4] PM1B Event Block Address : 00000000 +[040h 0064 4] PM1A Control Block Address : 00000000 +[044h 0068 4] PM1B Control Block Address : 00000000 +[048h 0072 4] PM2 Control Block Address : 00000000 +[04Ch 0076 4] PM Timer Block Address : 00000000 +[050h 0080 4] GPE0 Block Address : 00000000 +[054h 0084 4] GPE1 Block Address : 00000000 +[058h 0088 1] PM1 Event Block Length : 00 +[059h 0089 1] PM1 Control Block Length : 00 +[05Ah 0090 1] PM2 Control Block Length : 00 +[05Bh 0091 1] PM Timer Block Length : 00 +[05Ch 0092 1] GPE0 Block Length : 00 +[05Dh 0093 1] GPE1 Block Length : 00 +[05Eh 0094 1] GPE1 Base Offset : 00 +[05Fh 0095 1] _CST Support : 00 +[060h 0096 2] C2 Latency : 0000 +[062h 0098 2] C3 Latency : 0000 +[064h 0100 2] CPU Cache Size : 0000 +[066h 0102 2] Cache Flush Stride : 0000 +[068h 0104 1] Duty Cycle Offset : 00 +[069h 0105 1] Duty Cycle Width : 00 +[06Ah 0106 1] RTC Day Alarm Index : 00 +[06Bh 0107 1] RTC Month Alarm Index : 00 +[06Ch 0108 1] RTC Century Index : 00 +[06Dh 0109 2] Boot Flags (decoded below) : 0000 + Legacy Devices Supported (V2) : 0 + 8042 Present on ports 60/64 (V2) : 0 + VGA Not Present (V4) : 0 + MSI Not Supported (V4) : 0 + PCIe ASPM Not Supported (V4) : 0 + CMOS RTC Not Present (V5) : 0 +[06Fh 0111 1] Reserved : 00 +[070h 0112 4] Flags (decoded below) : 00100000 + WBINVD instruction is operational (V1) : 0 + WBINVD flushes all caches (V1) : 0 + All CPUs support C1 (V1) : 0 + C2 works on MP system (V1) : 0 + Control Method Power Button (V1) : 0 + Control Method Sleep Button (V1) : 0 + RTC wake not in fixed reg space (V1) : 0 + RTC can wake system from S4 (V1) : 0 + 32-bit PM Timer (V1) : 0 + Docking Supported (V1) : 0 + Reset Register Supported (V2) : 0 + Sealed Case (V3) : 0 + Headless - No Video (V3) : 0 + Use native instr after SLP_TYPx (V3) : 0 + PCIEXP_WAK Bits Supported (V4) : 0 + Use Platform Timer (V4) : 0 + RTC_STS valid on S4 wake (V4) : 0 + Remote Power-on capable (V4) : 0 + Use APIC Cluster Model (V4) : 0 + Use APIC Physical Destination Mode (V4) : 0 + Hardware Reduced (V5) : 1 + Low Power S0 Idle (V5) : 0 + +[074h 0116 12] Reset Register : [Generic Address Structure] +[074h 0116 1] Space ID : 00 [SystemMemory] +[075h 0117 1] Bit Width : 00 +[076h 0118 1] Bit Offset : 00 +[077h 0119 1] Encoded Access Width : 00 [Undefined/Legacy] +[078h 0120 8] Address : 0000000000000000 + +[080h 0128 1] Value to cause reset : 00 +[081h 0129 2] ARM Flags (decoded below) : 0003 + PSCI Compliant : 1 + Must use HVC for PSCI : 1 + +[083h 0131 1] FADT Minor Revision : 01 +[084h 0132 8] FACS Address : 0000000000000000 +[08Ch 0140 8] DSDT Address : 0000000000000000 +[094h 0148 12] PM1A Event Block : [Generic Address Structure] +[094h 0148 1] Space ID : 00 [SystemMemory] +[095h 0149 1] Bit Width : 00 +[096h 0150 1] Bit Offset : 00 +[097h 0151 1] Encoded Access Width : 00 [Undefined/Legacy] +[098h 0152 8] Address : 0000000000000000 + +[0A0h 0160 12] PM1B Event Block : [Generic Address Structure] +[0A0h 0160 1] Space ID : 00 [SystemMemory] +[0A1h 0161 1] Bit Width : 00 +[0A2h 0162 1] Bit Offset : 00 +[0A3h 0163 1] Encoded Access Width : 00 [Undefined/Legacy] +[0A4h 0164 8] Address : 0000000000000000 + +[0ACh 0172 12] PM1A Control Block : [Generic Address Structure] +[0ACh 0172 1] Space ID : 00 [SystemMemory] +[0ADh 0173 1] Bit Width : 00 +[0AEh 0174 1] Bit Offset : 00 +[0AFh 0175 1] Encoded Access Width : 00 [Undefined/Legacy] +[0B0h 0176 8] Address : 0000000000000000 + +[0B8h 0184 12] PM1B Control Block : [Generic Address Structure] +[0B8h 0184 1] Space ID : 00 [SystemMemory] +[0B9h 0185 1] Bit Width : 00 +[0BAh 0186 1] Bit Offset : 00 +[0BBh 0187 1] Encoded Access Width : 00 [Undefined/Legacy] +[0BCh 0188 8] Address : 0000000000000000 + +[0C4h 0196 12] PM2 Control Block : [Generic Address Structure] +[0C4h 0196 1] Space ID : 00 [SystemMemory] +[0C5h 0197 1] Bit Width : 00 +[0C6h 0198 1] Bit Offset : 00 +[0C7h 0199 1] Encoded Access Width : 00 [Undefined/Legacy] +[0C8h 0200 8] Address : 0000000000000000 + +[0D0h 0208 12] PM Timer Block : [Generic Address Structure] +[0D0h 0208 1] Space ID : 00 [SystemMemory] +[0D1h 0209 1] Bit Width : 00 +[0D2h 0210 1] Bit Offset : 00 +[0D3h 0211 1] Encoded Access Width : 00 [Undefined/Legacy] +[0D4h 0212 8] Address : 0000000000000000 + +[0DCh 0220 12] GPE0 Block : [Generic Address Structure] +[0DCh 0220 1] Space ID : 00 [SystemMemory] +[0DDh 0221 1] Bit Width : 00 +[0DEh 0222 1] Bit Offset : 00 +[0DFh 0223 1] Encoded Access Width : 00 [Undefined/Legacy] +[0E0h 0224 8] Address : 0000000000000000 + +[0E8h 0232 12] GPE1 Block : [Generic Address Structure] +[0E8h 0232 1] Space ID : 00 [SystemMemory] +[0E9h 0233 1] Bit Width : 00 +[0EAh 0234 1] Bit Offset : 00 +[0EBh 0235 1] Encoded Access Width : 00 [Undefined/Legacy] +[0ECh 0236 8] Address : 0000000000000000 + + +[0F4h 0244 12] Sleep Control Register : [Generic Address Structure] +[0F4h 0244 1] Space ID : 00 [SystemMemory] +[0F5h 0245 1] Bit Width : 00 +[0F6h 0246 1] Bit Offset : 00 +[0F7h 0247 1] Encoded Access Width : 00 [Undefined/Legacy] +[0F8h 0248 8] Address : 0000000000000000 + +[100h 0256 12] Sleep Status Register : [Generic Address Structure] +[100h 0256 1] Space ID : 00 [SystemMemory] +[101h 0257 1] Bit Width : 00 +[102h 0258 1] Bit Offset : 00 +[103h 0259 1] Encoded Access Width : 00 [Undefined/Legacy] +[104h 0260 8] Address : 0000000000000000 + +/**** ACPI table terminates in the middle of a data structure! (dump table) */ + +Raw Table Data: Length 268 (0x10C) + + 0000: 46 41 43 50 0C 01 00 00 05 BB 42 4F 43 48 53 20 // FACP......BOCHS + 0010: 42 58 50 43 46 41 43 50 01 00 00 00 42 58 50 43 // BXPCFACP....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0070: 00 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0080: 00 03 00 01 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00E0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00F0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0100: 00 00 00 00 00 00 00 00 00 00 00 00 // ............ diff --git a/tests/data/acpi/virt/FACP.memhp.dsl b/tests/data/acpi/virt/FACP.memhp.dsl new file mode 100644 index 0000000000..0083b95ef7 --- /dev/null +++ b/tests/data/acpi/virt/FACP.memhp.dsl @@ -0,0 +1,196 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/virt/FACP.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACP] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)] +[004h 0004 4] Table Length : 0000010C +[008h 0008 1] Revision : 05 +[009h 0009 1] Checksum : BB +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCFACP" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] FACS Address : 00000000 +[028h 0040 4] DSDT Address : 00000000 +[02Ch 0044 1] Model : 00 +[02Dh 0045 1] PM Profile : 00 [Unspecified] +[02Eh 0046 2] SCI Interrupt : 0000 +[030h 0048 4] SMI Command Port : 00000000 +[034h 0052 1] ACPI Enable Value : 00 +[035h 0053 1] ACPI Disable Value : 00 +[036h 0054 1] S4BIOS Command : 00 +[037h 0055 1] P-State Control : 00 +[038h 0056 4] PM1A Event Block Address : 00000000 +[03Ch 0060 4] PM1B Event Block Address : 00000000 +[040h 0064 4] PM1A Control Block Address : 00000000 +[044h 0068 4] PM1B Control Block Address : 00000000 +[048h 0072 4] PM2 Control Block Address : 00000000 +[04Ch 0076 4] PM Timer Block Address : 00000000 +[050h 0080 4] GPE0 Block Address : 00000000 +[054h 0084 4] GPE1 Block Address : 00000000 +[058h 0088 1] PM1 Event Block Length : 00 +[059h 0089 1] PM1 Control Block Length : 00 +[05Ah 0090 1] PM2 Control Block Length : 00 +[05Bh 0091 1] PM Timer Block Length : 00 +[05Ch 0092 1] GPE0 Block Length : 00 +[05Dh 0093 1] GPE1 Block Length : 00 +[05Eh 0094 1] GPE1 Base Offset : 00 +[05Fh 0095 1] _CST Support : 00 +[060h 0096 2] C2 Latency : 0000 +[062h 0098 2] C3 Latency : 0000 +[064h 0100 2] CPU Cache Size : 0000 +[066h 0102 2] Cache Flush Stride : 0000 +[068h 0104 1] Duty Cycle Offset : 00 +[069h 0105 1] Duty Cycle Width : 00 +[06Ah 0106 1] RTC Day Alarm Index : 00 +[06Bh 0107 1] RTC Month Alarm Index : 00 +[06Ch 0108 1] RTC Century Index : 00 +[06Dh 0109 2] Boot Flags (decoded below) : 0000 + Legacy Devices Supported (V2) : 0 + 8042 Present on ports 60/64 (V2) : 0 + VGA Not Present (V4) : 0 + MSI Not Supported (V4) : 0 + PCIe ASPM Not Supported (V4) : 0 + CMOS RTC Not Present (V5) : 0 +[06Fh 0111 1] Reserved : 00 +[070h 0112 4] Flags (decoded below) : 00100000 + WBINVD instruction is operational (V1) : 0 + WBINVD flushes all caches (V1) : 0 + All CPUs support C1 (V1) : 0 + C2 works on MP system (V1) : 0 + Control Method Power Button (V1) : 0 + Control Method Sleep Button (V1) : 0 + RTC wake not in fixed reg space (V1) : 0 + RTC can wake system from S4 (V1) : 0 + 32-bit PM Timer (V1) : 0 + Docking Supported (V1) : 0 + Reset Register Supported (V2) : 0 + Sealed Case (V3) : 0 + Headless - No Video (V3) : 0 + Use native instr after SLP_TYPx (V3) : 0 + PCIEXP_WAK Bits Supported (V4) : 0 + Use Platform Timer (V4) : 0 + RTC_STS valid on S4 wake (V4) : 0 + Remote Power-on capable (V4) : 0 + Use APIC Cluster Model (V4) : 0 + Use APIC Physical Destination Mode (V4) : 0 + Hardware Reduced (V5) : 1 + Low Power S0 Idle (V5) : 0 + +[074h 0116 12] Reset Register : [Generic Address Structure] +[074h 0116 1] Space ID : 00 [SystemMemory] +[075h 0117 1] Bit Width : 00 +[076h 0118 1] Bit Offset : 00 +[077h 0119 1] Encoded Access Width : 00 [Undefined/Legacy] +[078h 0120 8] Address : 0000000000000000 + +[080h 0128 1] Value to cause reset : 00 +[081h 0129 2] ARM Flags (decoded below) : 0003 + PSCI Compliant : 1 + Must use HVC for PSCI : 1 + +[083h 0131 1] FADT Minor Revision : 01 +[084h 0132 8] FACS Address : 0000000000000000 +[08Ch 0140 8] DSDT Address : 0000000000000000 +[094h 0148 12] PM1A Event Block : [Generic Address Structure] +[094h 0148 1] Space ID : 00 [SystemMemory] +[095h 0149 1] Bit Width : 00 +[096h 0150 1] Bit Offset : 00 +[097h 0151 1] Encoded Access Width : 00 [Undefined/Legacy] +[098h 0152 8] Address : 0000000000000000 + +[0A0h 0160 12] PM1B Event Block : [Generic Address Structure] +[0A0h 0160 1] Space ID : 00 [SystemMemory] +[0A1h 0161 1] Bit Width : 00 +[0A2h 0162 1] Bit Offset : 00 +[0A3h 0163 1] Encoded Access Width : 00 [Undefined/Legacy] +[0A4h 0164 8] Address : 0000000000000000 + +[0ACh 0172 12] PM1A Control Block : [Generic Address Structure] +[0ACh 0172 1] Space ID : 00 [SystemMemory] +[0ADh 0173 1] Bit Width : 00 +[0AEh 0174 1] Bit Offset : 00 +[0AFh 0175 1] Encoded Access Width : 00 [Undefined/Legacy] +[0B0h 0176 8] Address : 0000000000000000 + +[0B8h 0184 12] PM1B Control Block : [Generic Address Structure] +[0B8h 0184 1] Space ID : 00 [SystemMemory] +[0B9h 0185 1] Bit Width : 00 +[0BAh 0186 1] Bit Offset : 00 +[0BBh 0187 1] Encoded Access Width : 00 [Undefined/Legacy] +[0BCh 0188 8] Address : 0000000000000000 + +[0C4h 0196 12] PM2 Control Block : [Generic Address Structure] +[0C4h 0196 1] Space ID : 00 [SystemMemory] +[0C5h 0197 1] Bit Width : 00 +[0C6h 0198 1] Bit Offset : 00 +[0C7h 0199 1] Encoded Access Width : 00 [Undefined/Legacy] +[0C8h 0200 8] Address : 0000000000000000 + +[0D0h 0208 12] PM Timer Block : [Generic Address Structure] +[0D0h 0208 1] Space ID : 00 [SystemMemory] +[0D1h 0209 1] Bit Width : 00 +[0D2h 0210 1] Bit Offset : 00 +[0D3h 0211 1] Encoded Access Width : 00 [Undefined/Legacy] +[0D4h 0212 8] Address : 0000000000000000 + +[0DCh 0220 12] GPE0 Block : [Generic Address Structure] +[0DCh 0220 1] Space ID : 00 [SystemMemory] +[0DDh 0221 1] Bit Width : 00 +[0DEh 0222 1] Bit Offset : 00 +[0DFh 0223 1] Encoded Access Width : 00 [Undefined/Legacy] +[0E0h 0224 8] Address : 0000000000000000 + +[0E8h 0232 12] GPE1 Block : [Generic Address Structure] +[0E8h 0232 1] Space ID : 00 [SystemMemory] +[0E9h 0233 1] Bit Width : 00 +[0EAh 0234 1] Bit Offset : 00 +[0EBh 0235 1] Encoded Access Width : 00 [Undefined/Legacy] +[0ECh 0236 8] Address : 0000000000000000 + + +[0F4h 0244 12] Sleep Control Register : [Generic Address Structure] +[0F4h 0244 1] Space ID : 00 [SystemMemory] +[0F5h 0245 1] Bit Width : 00 +[0F6h 0246 1] Bit Offset : 00 +[0F7h 0247 1] Encoded Access Width : 00 [Undefined/Legacy] +[0F8h 0248 8] Address : 0000000000000000 + +[100h 0256 12] Sleep Status Register : [Generic Address Structure] +[100h 0256 1] Space ID : 00 [SystemMemory] +[101h 0257 1] Bit Width : 00 +[102h 0258 1] Bit Offset : 00 +[103h 0259 1] Encoded Access Width : 00 [Undefined/Legacy] +[104h 0260 8] Address : 0000000000000000 + +/**** ACPI table terminates in the middle of a data structure! (dump table) */ + +Raw Table Data: Length 268 (0x10C) + + 0000: 46 41 43 50 0C 01 00 00 05 BB 42 4F 43 48 53 20 // FACP......BOCHS + 0010: 42 58 50 43 46 41 43 50 01 00 00 00 42 58 50 43 // BXPCFACP....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0070: 00 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0080: 00 03 00 01 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00E0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00F0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0100: 00 00 00 00 00 00 00 00 00 00 00 00 // ............ diff --git a/tests/data/acpi/virt/FACP.numamem.dsl b/tests/data/acpi/virt/FACP.numamem.dsl new file mode 100644 index 0000000000..aee15bd4c2 --- /dev/null +++ b/tests/data/acpi/virt/FACP.numamem.dsl @@ -0,0 +1,196 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/virt/FACP.numamem, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACP] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)] +[004h 0004 4] Table Length : 0000010C +[008h 0008 1] Revision : 05 +[009h 0009 1] Checksum : BB +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCFACP" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] FACS Address : 00000000 +[028h 0040 4] DSDT Address : 00000000 +[02Ch 0044 1] Model : 00 +[02Dh 0045 1] PM Profile : 00 [Unspecified] +[02Eh 0046 2] SCI Interrupt : 0000 +[030h 0048 4] SMI Command Port : 00000000 +[034h 0052 1] ACPI Enable Value : 00 +[035h 0053 1] ACPI Disable Value : 00 +[036h 0054 1] S4BIOS Command : 00 +[037h 0055 1] P-State Control : 00 +[038h 0056 4] PM1A Event Block Address : 00000000 +[03Ch 0060 4] PM1B Event Block Address : 00000000 +[040h 0064 4] PM1A Control Block Address : 00000000 +[044h 0068 4] PM1B Control Block Address : 00000000 +[048h 0072 4] PM2 Control Block Address : 00000000 +[04Ch 0076 4] PM Timer Block Address : 00000000 +[050h 0080 4] GPE0 Block Address : 00000000 +[054h 0084 4] GPE1 Block Address : 00000000 +[058h 0088 1] PM1 Event Block Length : 00 +[059h 0089 1] PM1 Control Block Length : 00 +[05Ah 0090 1] PM2 Control Block Length : 00 +[05Bh 0091 1] PM Timer Block Length : 00 +[05Ch 0092 1] GPE0 Block Length : 00 +[05Dh 0093 1] GPE1 Block Length : 00 +[05Eh 0094 1] GPE1 Base Offset : 00 +[05Fh 0095 1] _CST Support : 00 +[060h 0096 2] C2 Latency : 0000 +[062h 0098 2] C3 Latency : 0000 +[064h 0100 2] CPU Cache Size : 0000 +[066h 0102 2] Cache Flush Stride : 0000 +[068h 0104 1] Duty Cycle Offset : 00 +[069h 0105 1] Duty Cycle Width : 00 +[06Ah 0106 1] RTC Day Alarm Index : 00 +[06Bh 0107 1] RTC Month Alarm Index : 00 +[06Ch 0108 1] RTC Century Index : 00 +[06Dh 0109 2] Boot Flags (decoded below) : 0000 + Legacy Devices Supported (V2) : 0 + 8042 Present on ports 60/64 (V2) : 0 + VGA Not Present (V4) : 0 + MSI Not Supported (V4) : 0 + PCIe ASPM Not Supported (V4) : 0 + CMOS RTC Not Present (V5) : 0 +[06Fh 0111 1] Reserved : 00 +[070h 0112 4] Flags (decoded below) : 00100000 + WBINVD instruction is operational (V1) : 0 + WBINVD flushes all caches (V1) : 0 + All CPUs support C1 (V1) : 0 + C2 works on MP system (V1) : 0 + Control Method Power Button (V1) : 0 + Control Method Sleep Button (V1) : 0 + RTC wake not in fixed reg space (V1) : 0 + RTC can wake system from S4 (V1) : 0 + 32-bit PM Timer (V1) : 0 + Docking Supported (V1) : 0 + Reset Register Supported (V2) : 0 + Sealed Case (V3) : 0 + Headless - No Video (V3) : 0 + Use native instr after SLP_TYPx (V3) : 0 + PCIEXP_WAK Bits Supported (V4) : 0 + Use Platform Timer (V4) : 0 + RTC_STS valid on S4 wake (V4) : 0 + Remote Power-on capable (V4) : 0 + Use APIC Cluster Model (V4) : 0 + Use APIC Physical Destination Mode (V4) : 0 + Hardware Reduced (V5) : 1 + Low Power S0 Idle (V5) : 0 + +[074h 0116 12] Reset Register : [Generic Address Structure] +[074h 0116 1] Space ID : 00 [SystemMemory] +[075h 0117 1] Bit Width : 00 +[076h 0118 1] Bit Offset : 00 +[077h 0119 1] Encoded Access Width : 00 [Undefined/Legacy] +[078h 0120 8] Address : 0000000000000000 + +[080h 0128 1] Value to cause reset : 00 +[081h 0129 2] ARM Flags (decoded below) : 0003 + PSCI Compliant : 1 + Must use HVC for PSCI : 1 + +[083h 0131 1] FADT Minor Revision : 01 +[084h 0132 8] FACS Address : 0000000000000000 +[08Ch 0140 8] DSDT Address : 0000000000000000 +[094h 0148 12] PM1A Event Block : [Generic Address Structure] +[094h 0148 1] Space ID : 00 [SystemMemory] +[095h 0149 1] Bit Width : 00 +[096h 0150 1] Bit Offset : 00 +[097h 0151 1] Encoded Access Width : 00 [Undefined/Legacy] +[098h 0152 8] Address : 0000000000000000 + +[0A0h 0160 12] PM1B Event Block : [Generic Address Structure] +[0A0h 0160 1] Space ID : 00 [SystemMemory] +[0A1h 0161 1] Bit Width : 00 +[0A2h 0162 1] Bit Offset : 00 +[0A3h 0163 1] Encoded Access Width : 00 [Undefined/Legacy] +[0A4h 0164 8] Address : 0000000000000000 + +[0ACh 0172 12] PM1A Control Block : [Generic Address Structure] +[0ACh 0172 1] Space ID : 00 [SystemMemory] +[0ADh 0173 1] Bit Width : 00 +[0AEh 0174 1] Bit Offset : 00 +[0AFh 0175 1] Encoded Access Width : 00 [Undefined/Legacy] +[0B0h 0176 8] Address : 0000000000000000 + +[0B8h 0184 12] PM1B Control Block : [Generic Address Structure] +[0B8h 0184 1] Space ID : 00 [SystemMemory] +[0B9h 0185 1] Bit Width : 00 +[0BAh 0186 1] Bit Offset : 00 +[0BBh 0187 1] Encoded Access Width : 00 [Undefined/Legacy] +[0BCh 0188 8] Address : 0000000000000000 + +[0C4h 0196 12] PM2 Control Block : [Generic Address Structure] +[0C4h 0196 1] Space ID : 00 [SystemMemory] +[0C5h 0197 1] Bit Width : 00 +[0C6h 0198 1] Bit Offset : 00 +[0C7h 0199 1] Encoded Access Width : 00 [Undefined/Legacy] +[0C8h 0200 8] Address : 0000000000000000 + +[0D0h 0208 12] PM Timer Block : [Generic Address Structure] +[0D0h 0208 1] Space ID : 00 [SystemMemory] +[0D1h 0209 1] Bit Width : 00 +[0D2h 0210 1] Bit Offset : 00 +[0D3h 0211 1] Encoded Access Width : 00 [Undefined/Legacy] +[0D4h 0212 8] Address : 0000000000000000 + +[0DCh 0220 12] GPE0 Block : [Generic Address Structure] +[0DCh 0220 1] Space ID : 00 [SystemMemory] +[0DDh 0221 1] Bit Width : 00 +[0DEh 0222 1] Bit Offset : 00 +[0DFh 0223 1] Encoded Access Width : 00 [Undefined/Legacy] +[0E0h 0224 8] Address : 0000000000000000 + +[0E8h 0232 12] GPE1 Block : [Generic Address Structure] +[0E8h 0232 1] Space ID : 00 [SystemMemory] +[0E9h 0233 1] Bit Width : 00 +[0EAh 0234 1] Bit Offset : 00 +[0EBh 0235 1] Encoded Access Width : 00 [Undefined/Legacy] +[0ECh 0236 8] Address : 0000000000000000 + + +[0F4h 0244 12] Sleep Control Register : [Generic Address Structure] +[0F4h 0244 1] Space ID : 00 [SystemMemory] +[0F5h 0245 1] Bit Width : 00 +[0F6h 0246 1] Bit Offset : 00 +[0F7h 0247 1] Encoded Access Width : 00 [Undefined/Legacy] +[0F8h 0248 8] Address : 0000000000000000 + +[100h 0256 12] Sleep Status Register : [Generic Address Structure] +[100h 0256 1] Space ID : 00 [SystemMemory] +[101h 0257 1] Bit Width : 00 +[102h 0258 1] Bit Offset : 00 +[103h 0259 1] Encoded Access Width : 00 [Undefined/Legacy] +[104h 0260 8] Address : 0000000000000000 + +/**** ACPI table terminates in the middle of a data structure! (dump table) */ + +Raw Table Data: Length 268 (0x10C) + + 0000: 46 41 43 50 0C 01 00 00 05 BB 42 4F 43 48 53 20 // FACP......BOCHS + 0010: 42 58 50 43 46 41 43 50 01 00 00 00 42 58 50 43 // BXPCFACP....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0070: 00 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0080: 00 03 00 01 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00E0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00F0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0100: 00 00 00 00 00 00 00 00 00 00 00 00 // ............ diff --git a/tests/data/acpi/virt/GTDT.dsl b/tests/data/acpi/virt/GTDT.dsl new file mode 100644 index 0000000000..1ab06dd3c2 --- /dev/null +++ b/tests/data/acpi/virt/GTDT.dsl @@ -0,0 +1,61 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/virt/GTDT.numamem, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [GTDT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "GTDT" [Generic Timer Description Table] +[004h 0004 4] Table Length : 00000060 +[008h 0008 1] Revision : 02 +[009h 0009 1] Checksum : D9 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCGTDT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Counter Block Address : 0000000000000000 +[02Ch 0044 4] Reserved : 00000000 + +[030h 0048 4] Secure EL1 Interrupt : 0000001D +[034h 0052 4] EL1 Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 0 + Always On : 0 + +[038h 0056 4] Non-Secure EL1 Interrupt : 0000001E +[03Ch 0060 4] NEL1 Flags (decoded below) : 00000004 + Trigger Mode : 0 + Polarity : 0 + Always On : 1 + +[040h 0064 4] Virtual Timer Interrupt : 0000001B +[044h 0068 4] VT Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 0 + Always On : 0 + +[048h 0072 4] Non-Secure EL2 Interrupt : 0000001A +[04Ch 0076 4] NEL2 Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 0 + Always On : 0 +[050h 0080 8] Counter Read Block Address : 0000000000000000 + +[058h 0088 4] Platform Timer Count : 00000000 +[05Ch 0092 4] Platform Timer Offset : 00000000 + +Raw Table Data: Length 96 (0x60) + + 0000: 47 54 44 54 60 00 00 00 02 D9 42 4F 43 48 53 20 // GTDT`.....BOCHS + 0010: 42 58 50 43 47 54 44 54 01 00 00 00 42 58 50 43 // BXPCGTDT....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 1D 00 00 00 00 00 00 00 1E 00 00 00 04 00 00 00 // ................ + 0040: 1B 00 00 00 00 00 00 00 1A 00 00 00 00 00 00 00 // ................ + 0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/virt/GTDT.memhp.dsl b/tests/data/acpi/virt/GTDT.memhp.dsl new file mode 100644 index 0000000000..d78bb092c5 --- /dev/null +++ b/tests/data/acpi/virt/GTDT.memhp.dsl @@ -0,0 +1,61 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/virt/GTDT.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [GTDT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "GTDT" [Generic Timer Description Table] +[004h 0004 4] Table Length : 00000060 +[008h 0008 1] Revision : 02 +[009h 0009 1] Checksum : D9 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCGTDT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Counter Block Address : 0000000000000000 +[02Ch 0044 4] Reserved : 00000000 + +[030h 0048 4] Secure EL1 Interrupt : 0000001D +[034h 0052 4] EL1 Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 0 + Always On : 0 + +[038h 0056 4] Non-Secure EL1 Interrupt : 0000001E +[03Ch 0060 4] NEL1 Flags (decoded below) : 00000004 + Trigger Mode : 0 + Polarity : 0 + Always On : 1 + +[040h 0064 4] Virtual Timer Interrupt : 0000001B +[044h 0068 4] VT Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 0 + Always On : 0 + +[048h 0072 4] Non-Secure EL2 Interrupt : 0000001A +[04Ch 0076 4] NEL2 Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 0 + Always On : 0 +[050h 0080 8] Counter Read Block Address : 0000000000000000 + +[058h 0088 4] Platform Timer Count : 00000000 +[05Ch 0092 4] Platform Timer Offset : 00000000 + +Raw Table Data: Length 96 (0x60) + + 0000: 47 54 44 54 60 00 00 00 02 D9 42 4F 43 48 53 20 // GTDT`.....BOCHS + 0010: 42 58 50 43 47 54 44 54 01 00 00 00 42 58 50 43 // BXPCGTDT....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 1D 00 00 00 00 00 00 00 1E 00 00 00 04 00 00 00 // ................ + 0040: 1B 00 00 00 00 00 00 00 1A 00 00 00 00 00 00 00 // ................ + 0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/virt/GTDT.numamem.dsl b/tests/data/acpi/virt/GTDT.numamem.dsl new file mode 100644 index 0000000000..5c3c2a83db --- /dev/null +++ b/tests/data/acpi/virt/GTDT.numamem.dsl @@ -0,0 +1,61 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/virt/GTDT.numamem, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [GTDT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "GTDT" [Generic Timer Description Table] +[004h 0004 4] Table Length : 00000060 +[008h 0008 1] Revision : 02 +[009h 0009 1] Checksum : D9 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCGTDT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Counter Block Address : 0000000000000000 +[02Ch 0044 4] Reserved : 00000000 + +[030h 0048 4] Secure EL1 Interrupt : 0000001D +[034h 0052 4] EL1 Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 0 + Always On : 0 + +[038h 0056 4] Non-Secure EL1 Interrupt : 0000001E +[03Ch 0060 4] NEL1 Flags (decoded below) : 00000004 + Trigger Mode : 0 + Polarity : 0 + Always On : 1 + +[040h 0064 4] Virtual Timer Interrupt : 0000001B +[044h 0068 4] VT Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 0 + Always On : 0 + +[048h 0072 4] Non-Secure EL2 Interrupt : 0000001A +[04Ch 0076 4] NEL2 Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 0 + Always On : 0 +[050h 0080 8] Counter Read Block Address : 0000000000000000 + +[058h 0088 4] Platform Timer Count : 00000000 +[05Ch 0092 4] Platform Timer Offset : 00000000 + +Raw Table Data: Length 96 (0x60) + + 0000: 47 54 44 54 60 00 00 00 02 D9 42 4F 43 48 53 20 // GTDT`.....BOCHS + 0010: 42 58 50 43 47 54 44 54 01 00 00 00 42 58 50 43 // BXPCGTDT....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 1D 00 00 00 00 00 00 00 1E 00 00 00 04 00 00 00 // ................ + 0040: 1B 00 00 00 00 00 00 00 1A 00 00 00 00 00 00 00 // ................ + 0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/virt/MCFG.dsl b/tests/data/acpi/virt/MCFG.dsl new file mode 100644 index 0000000000..f09c86f487 --- /dev/null +++ b/tests/data/acpi/virt/MCFG.dsl @@ -0,0 +1,36 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/virt/MCFG.numamem, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [MCFG] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table] +[004h 0004 4] Table Length : 0000003C +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 4F +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCMCFG" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Reserved : 0000000000000000 + +[02Ch 0044 8] Base Address : 0000004010000000 +[034h 0052 2] Segment Group Number : 0000 +[036h 0054 1] Start Bus Number : 00 +[037h 0055 1] End Bus Number : FF +[038h 0056 4] Reserved : 00000000 + +Raw Table Data: Length 60 (0x3C) + + 0000: 4D 43 46 47 3C 00 00 00 01 4F 42 4F 43 48 53 20 // MCFG<....OBOCHS + 0010: 42 58 50 43 4D 43 46 47 01 00 00 00 42 58 50 43 // BXPCMCFG....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 10 // ................ + 0030: 40 00 00 00 00 00 00 FF 00 00 00 00 // @........... diff --git a/tests/data/acpi/virt/MCFG.memhp.dsl b/tests/data/acpi/virt/MCFG.memhp.dsl new file mode 100644 index 0000000000..b03a6384e8 --- /dev/null +++ b/tests/data/acpi/virt/MCFG.memhp.dsl @@ -0,0 +1,36 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/virt/MCFG.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [MCFG] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table] +[004h 0004 4] Table Length : 0000003C +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 4F +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCMCFG" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Reserved : 0000000000000000 + +[02Ch 0044 8] Base Address : 0000004010000000 +[034h 0052 2] Segment Group Number : 0000 +[036h 0054 1] Start Bus Number : 00 +[037h 0055 1] End Bus Number : FF +[038h 0056 4] Reserved : 00000000 + +Raw Table Data: Length 60 (0x3C) + + 0000: 4D 43 46 47 3C 00 00 00 01 4F 42 4F 43 48 53 20 // MCFG<....OBOCHS + 0010: 42 58 50 43 4D 43 46 47 01 00 00 00 42 58 50 43 // BXPCMCFG....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 10 // ................ + 0030: 40 00 00 00 00 00 00 FF 00 00 00 00 // @........... diff --git a/tests/data/acpi/virt/MCFG.numamem.dsl b/tests/data/acpi/virt/MCFG.numamem.dsl new file mode 100644 index 0000000000..303df803f5 --- /dev/null +++ b/tests/data/acpi/virt/MCFG.numamem.dsl @@ -0,0 +1,36 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/virt/MCFG.numamem, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [MCFG] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table] +[004h 0004 4] Table Length : 0000003C +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 4F +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCMCFG" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Reserved : 0000000000000000 + +[02Ch 0044 8] Base Address : 0000004010000000 +[034h 0052 2] Segment Group Number : 0000 +[036h 0054 1] Start Bus Number : 00 +[037h 0055 1] End Bus Number : FF +[038h 0056 4] Reserved : 00000000 + +Raw Table Data: Length 60 (0x3C) + + 0000: 4D 43 46 47 3C 00 00 00 01 4F 42 4F 43 48 53 20 // MCFG<....OBOCHS + 0010: 42 58 50 43 4D 43 46 47 01 00 00 00 42 58 50 43 // BXPCMCFG....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 10 // ................ + 0030: 40 00 00 00 00 00 00 FF 00 00 00 00 // @........... diff --git a/tests/data/acpi/virt/NFIT.dsl b/tests/data/acpi/virt/NFIT.dsl new file mode 100644 index 0000000000..947ba0f6a4 --- /dev/null +++ b/tests/data/acpi/virt/NFIT.dsl @@ -0,0 +1,103 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/virt/NFIT.memhp, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [NFIT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "NFIT" [NVDIMM Firmware Interface Table] +[004h 0004 4] Table Length : 000000E0 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : D1 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCNFIT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Reserved : 00000000 + +[028h 0040 2] Subtable Type : 0000 [System Physical Address Range] +[02Ah 0042 2] Length : 0038 + +[02Ch 0044 2] Range Index : 0004 +[02Eh 0046 2] Flags (decoded below) : 0003 + Add/Online Operation Only : 1 + Proximity Domain Valid : 1 +[030h 0048 4] Reserved : 00000000 +[034h 0052 4] Proximity Domain : 00000001 +[038h 0056 16] Region Type GUID : 66F0D379-B4F3-4074-AC43-0D3318B78CDB +[048h 0072 8] Address Range Base : 0000000088000000 +[050h 0080 8] Address Range Length : 0000000008000000 +[058h 0088 8] Memory Map Attribute : 0000000000008008 + +[060h 0096 2] Subtable Type : 0001 [Memory Range Map] +[062h 0098 2] Length : 0030 + +[064h 0100 4] Device Handle : 00000002 +[068h 0104 2] Physical Id : 0000 +[06Ah 0106 2] Region Id : 0000 +[06Ch 0108 2] Range Index : 0004 +[06Eh 0110 2] Control Region Index : 0005 +[070h 0112 8] Region Size : 0000000008000000 +[078h 0120 8] Region Offset : 0000000000000000 +[080h 0128 8] Address Region Base : 0000000000000000 +[088h 0136 2] Interleave Index : 0000 +[08Ah 0138 2] Interleave Ways : 0001 +[08Ch 0140 2] Flags : 0000 + Save to device failed : 0 + Restore from device failed : 0 + Platform flush failed : 0 + Device not armed : 0 + Health events observed : 0 + Health events enabled : 0 + Mapping failed : 0 +[08Eh 0142 2] Reserved : 0000 + +[090h 0144 2] Subtable Type : 0004 [NVDIMM Control Region] +[092h 0146 2] Length : 0050 + +[094h 0148 2] Region Index : 0005 +[096h 0150 2] Vendor Id : 8086 +[098h 0152 2] Device Id : 0001 +[09Ah 0154 2] Revision Id : 0001 +[09Ch 0156 2] Subsystem Vendor Id : 0000 +[09Eh 0158 2] Subsystem Device Id : 0000 +[0A0h 0160 2] Subsystem Revision Id : 0000 +[0A2h 0162 1] Valid Fields : 00 +[0A3h 0163 1] Manufacturing Location : 00 +[0A4h 0164 2] Manufacturing Date : 0000 +[0A6h 0166 2] Reserved : 0000 +[0A8h 0168 4] Serial Number : 00123457 +[0ACh 0172 2] Code : 0301 +[0AEh 0174 2] Window Count : 0000 +[0B0h 0176 8] Window Size : 0000000000000000 +[0B8h 0184 8] Command Offset : 0000000000000000 +[0C0h 0192 8] Command Size : 0000000000000000 +[0C8h 0200 8] Status Offset : 0000000000000000 +[0D0h 0208 8] Status Size : 0000000000000000 +[0D8h 0216 2] Flags : 0000 + Windows buffered : 0 +[0DAh 0218 6] Reserved1 : 000000000000 + +Raw Table Data: Length 224 (0xE0) + + 0000: 4E 46 49 54 E0 00 00 00 01 D1 42 4F 43 48 53 20 // NFIT......BOCHS + 0010: 42 58 50 43 4E 46 49 54 01 00 00 00 42 58 50 43 // BXPCNFIT....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 38 00 04 00 03 00 // ..........8..... + 0030: 00 00 00 00 01 00 00 00 79 D3 F0 66 F3 B4 74 40 // ........y..f..t@ + 0040: AC 43 0D 33 18 B7 8C DB 00 00 00 88 00 00 00 00 // .C.3............ + 0050: 00 00 00 08 00 00 00 00 08 80 00 00 00 00 00 00 // ................ + 0060: 01 00 30 00 02 00 00 00 00 00 00 00 04 00 05 00 // ..0............. + 0070: 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0080: 00 00 00 00 00 00 00 00 00 00 01 00 00 00 00 00 // ................ + 0090: 04 00 50 00 05 00 86 80 01 00 01 00 00 00 00 00 // ..P............. + 00A0: 00 00 00 00 00 00 00 00 57 34 12 00 01 03 00 00 // ........W4...... + 00B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/virt/NFIT.memhp.dsl b/tests/data/acpi/virt/NFIT.memhp.dsl new file mode 100644 index 0000000000..84511bff96 --- /dev/null +++ b/tests/data/acpi/virt/NFIT.memhp.dsl @@ -0,0 +1,103 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/virt/NFIT.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [NFIT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "NFIT" [NVDIMM Firmware Interface Table] +[004h 0004 4] Table Length : 000000E0 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : D1 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCNFIT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Reserved : 00000000 + +[028h 0040 2] Subtable Type : 0000 [System Physical Address Range] +[02Ah 0042 2] Length : 0038 + +[02Ch 0044 2] Range Index : 0004 +[02Eh 0046 2] Flags (decoded below) : 0003 + Add/Online Operation Only : 1 + Proximity Domain Valid : 1 +[030h 0048 4] Reserved : 00000000 +[034h 0052 4] Proximity Domain : 00000001 +[038h 0056 16] Region Type GUID : 66F0D379-B4F3-4074-AC43-0D3318B78CDB +[048h 0072 8] Address Range Base : 0000000088000000 +[050h 0080 8] Address Range Length : 0000000008000000 +[058h 0088 8] Memory Map Attribute : 0000000000008008 + +[060h 0096 2] Subtable Type : 0001 [Memory Range Map] +[062h 0098 2] Length : 0030 + +[064h 0100 4] Device Handle : 00000002 +[068h 0104 2] Physical Id : 0000 +[06Ah 0106 2] Region Id : 0000 +[06Ch 0108 2] Range Index : 0004 +[06Eh 0110 2] Control Region Index : 0005 +[070h 0112 8] Region Size : 0000000008000000 +[078h 0120 8] Region Offset : 0000000000000000 +[080h 0128 8] Address Region Base : 0000000000000000 +[088h 0136 2] Interleave Index : 0000 +[08Ah 0138 2] Interleave Ways : 0001 +[08Ch 0140 2] Flags : 0000 + Save to device failed : 0 + Restore from device failed : 0 + Platform flush failed : 0 + Device not armed : 0 + Health events observed : 0 + Health events enabled : 0 + Mapping failed : 0 +[08Eh 0142 2] Reserved : 0000 + +[090h 0144 2] Subtable Type : 0004 [NVDIMM Control Region] +[092h 0146 2] Length : 0050 + +[094h 0148 2] Region Index : 0005 +[096h 0150 2] Vendor Id : 8086 +[098h 0152 2] Device Id : 0001 +[09Ah 0154 2] Revision Id : 0001 +[09Ch 0156 2] Subsystem Vendor Id : 0000 +[09Eh 0158 2] Subsystem Device Id : 0000 +[0A0h 0160 2] Subsystem Revision Id : 0000 +[0A2h 0162 1] Valid Fields : 00 +[0A3h 0163 1] Manufacturing Location : 00 +[0A4h 0164 2] Manufacturing Date : 0000 +[0A6h 0166 2] Reserved : 0000 +[0A8h 0168 4] Serial Number : 00123457 +[0ACh 0172 2] Code : 0301 +[0AEh 0174 2] Window Count : 0000 +[0B0h 0176 8] Window Size : 0000000000000000 +[0B8h 0184 8] Command Offset : 0000000000000000 +[0C0h 0192 8] Command Size : 0000000000000000 +[0C8h 0200 8] Status Offset : 0000000000000000 +[0D0h 0208 8] Status Size : 0000000000000000 +[0D8h 0216 2] Flags : 0000 + Windows buffered : 0 +[0DAh 0218 6] Reserved1 : 000000000000 + +Raw Table Data: Length 224 (0xE0) + + 0000: 4E 46 49 54 E0 00 00 00 01 D1 42 4F 43 48 53 20 // NFIT......BOCHS + 0010: 42 58 50 43 4E 46 49 54 01 00 00 00 42 58 50 43 // BXPCNFIT....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 38 00 04 00 03 00 // ..........8..... + 0030: 00 00 00 00 01 00 00 00 79 D3 F0 66 F3 B4 74 40 // ........y..f..t@ + 0040: AC 43 0D 33 18 B7 8C DB 00 00 00 88 00 00 00 00 // .C.3............ + 0050: 00 00 00 08 00 00 00 00 08 80 00 00 00 00 00 00 // ................ + 0060: 01 00 30 00 02 00 00 00 00 00 00 00 04 00 05 00 // ..0............. + 0070: 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0080: 00 00 00 00 00 00 00 00 00 00 01 00 00 00 00 00 // ................ + 0090: 04 00 50 00 05 00 86 80 01 00 01 00 00 00 00 00 // ..P............. + 00A0: 00 00 00 00 00 00 00 00 57 34 12 00 01 03 00 00 // ........W4...... + 00B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/virt/SLIT.dsl b/tests/data/acpi/virt/SLIT.dsl new file mode 100644 index 0000000000..34276fca96 --- /dev/null +++ b/tests/data/acpi/virt/SLIT.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/virt/SLIT.memhp, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [SLIT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SLIT" [System Locality Information Table] +[004h 0004 4] Table Length : 00000030 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 2C +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSLIT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Localities : 0000000000000002 +[02Ch 0044 2] Locality 0 : 0A 15 +[02Eh 0046 2] Locality 1 : 15 0A + +Raw Table Data: Length 48 (0x30) + + 0000: 53 4C 49 54 30 00 00 00 01 2C 42 4F 43 48 53 20 // SLIT0....,BOCHS + 0010: 42 58 50 43 53 4C 49 54 01 00 00 00 42 58 50 43 // BXPCSLIT....BXPC + 0020: 01 00 00 00 02 00 00 00 00 00 00 00 0A 15 15 0A // ................ diff --git a/tests/data/acpi/virt/SLIT.memhp.dsl b/tests/data/acpi/virt/SLIT.memhp.dsl new file mode 100644 index 0000000000..a17f948af2 --- /dev/null +++ b/tests/data/acpi/virt/SLIT.memhp.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/virt/SLIT.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SLIT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SLIT" [System Locality Information Table] +[004h 0004 4] Table Length : 00000030 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 2C +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSLIT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Localities : 0000000000000002 +[02Ch 0044 2] Locality 0 : 0A 15 +[02Eh 0046 2] Locality 1 : 15 0A + +Raw Table Data: Length 48 (0x30) + + 0000: 53 4C 49 54 30 00 00 00 01 2C 42 4F 43 48 53 20 // SLIT0....,BOCHS + 0010: 42 58 50 43 53 4C 49 54 01 00 00 00 42 58 50 43 // BXPCSLIT....BXPC + 0020: 01 00 00 00 02 00 00 00 00 00 00 00 0A 15 15 0A // ................ diff --git a/tests/data/acpi/virt/SPCR.dsl b/tests/data/acpi/virt/SPCR.dsl new file mode 100644 index 0000000000..3c271412cf --- /dev/null +++ b/tests/data/acpi/virt/SPCR.dsl @@ -0,0 +1,57 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/virt/SPCR.numamem, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [SPCR] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table] +[004h 0004 4] Table Length : 00000050 +[008h 0008 1] Revision : 02 +[009h 0009 1] Checksum : 13 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSPCR" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 1] Interface Type : 03 +[025h 0037 3] Reserved : 000000 + +[028h 0040 12] Serial Port Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 08 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 01 [Byte Access:8] +[02Ch 0044 8] Address : 0000000009000000 + +[034h 0052 1] Interrupt Type : 08 +[035h 0053 1] PCAT-compatible IRQ : 00 +[036h 0054 4] Interrupt : 00000021 +[03Ah 0058 1] Baud Rate : 03 +[03Bh 0059 1] Parity : 00 +[03Ch 0060 1] Stop Bits : 01 +[03Dh 0061 1] Flow Control : 02 +[03Eh 0062 1] Terminal Type : 00 +[04Ch 0076 1] Reserved : 00 +[040h 0064 2] PCI Device ID : FFFF +[042h 0066 2] PCI Vendor ID : FFFF +[044h 0068 1] PCI Bus : 00 +[045h 0069 1] PCI Device : 00 +[046h 0070 1] PCI Function : 00 +[047h 0071 4] PCI Flags : 00000000 +[04Bh 0075 1] PCI Segment : 00 +[04Ch 0076 4] Reserved : 00000000 + +Raw Table Data: Length 80 (0x50) + + 0000: 53 50 43 52 50 00 00 00 02 13 42 4F 43 48 53 20 // SPCRP.....BOCHS + 0010: 42 58 50 43 53 50 43 52 01 00 00 00 42 58 50 43 // BXPCSPCR....BXPC + 0020: 01 00 00 00 03 00 00 00 00 08 00 01 00 00 00 09 // ................ + 0030: 00 00 00 00 08 00 21 00 00 00 03 00 01 02 00 00 // ......!......... + 0040: FF FF FF FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/virt/SPCR.memhp.dsl b/tests/data/acpi/virt/SPCR.memhp.dsl new file mode 100644 index 0000000000..81e00457cc --- /dev/null +++ b/tests/data/acpi/virt/SPCR.memhp.dsl @@ -0,0 +1,57 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/virt/SPCR.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SPCR] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table] +[004h 0004 4] Table Length : 00000050 +[008h 0008 1] Revision : 02 +[009h 0009 1] Checksum : 13 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSPCR" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 1] Interface Type : 03 +[025h 0037 3] Reserved : 000000 + +[028h 0040 12] Serial Port Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 08 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 01 [Byte Access:8] +[02Ch 0044 8] Address : 0000000009000000 + +[034h 0052 1] Interrupt Type : 08 +[035h 0053 1] PCAT-compatible IRQ : 00 +[036h 0054 4] Interrupt : 00000021 +[03Ah 0058 1] Baud Rate : 03 +[03Bh 0059 1] Parity : 00 +[03Ch 0060 1] Stop Bits : 01 +[03Dh 0061 1] Flow Control : 02 +[03Eh 0062 1] Terminal Type : 00 +[04Ch 0076 1] Reserved : 00 +[040h 0064 2] PCI Device ID : FFFF +[042h 0066 2] PCI Vendor ID : FFFF +[044h 0068 1] PCI Bus : 00 +[045h 0069 1] PCI Device : 00 +[046h 0070 1] PCI Function : 00 +[047h 0071 4] PCI Flags : 00000000 +[04Bh 0075 1] PCI Segment : 00 +[04Ch 0076 4] Reserved : 00000000 + +Raw Table Data: Length 80 (0x50) + + 0000: 53 50 43 52 50 00 00 00 02 13 42 4F 43 48 53 20 // SPCRP.....BOCHS + 0010: 42 58 50 43 53 50 43 52 01 00 00 00 42 58 50 43 // BXPCSPCR....BXPC + 0020: 01 00 00 00 03 00 00 00 00 08 00 01 00 00 00 09 // ................ + 0030: 00 00 00 00 08 00 21 00 00 00 03 00 01 02 00 00 // ......!......... + 0040: FF FF FF FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/virt/SPCR.numamem.dsl b/tests/data/acpi/virt/SPCR.numamem.dsl new file mode 100644 index 0000000000..faf6729797 --- /dev/null +++ b/tests/data/acpi/virt/SPCR.numamem.dsl @@ -0,0 +1,57 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/virt/SPCR.numamem, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SPCR] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table] +[004h 0004 4] Table Length : 00000050 +[008h 0008 1] Revision : 02 +[009h 0009 1] Checksum : 13 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSPCR" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 1] Interface Type : 03 +[025h 0037 3] Reserved : 000000 + +[028h 0040 12] Serial Port Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 08 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 01 [Byte Access:8] +[02Ch 0044 8] Address : 0000000009000000 + +[034h 0052 1] Interrupt Type : 08 +[035h 0053 1] PCAT-compatible IRQ : 00 +[036h 0054 4] Interrupt : 00000021 +[03Ah 0058 1] Baud Rate : 03 +[03Bh 0059 1] Parity : 00 +[03Ch 0060 1] Stop Bits : 01 +[03Dh 0061 1] Flow Control : 02 +[03Eh 0062 1] Terminal Type : 00 +[04Ch 0076 1] Reserved : 00 +[040h 0064 2] PCI Device ID : FFFF +[042h 0066 2] PCI Vendor ID : FFFF +[044h 0068 1] PCI Bus : 00 +[045h 0069 1] PCI Device : 00 +[046h 0070 1] PCI Function : 00 +[047h 0071 4] PCI Flags : 00000000 +[04Bh 0075 1] PCI Segment : 00 +[04Ch 0076 4] Reserved : 00000000 + +Raw Table Data: Length 80 (0x50) + + 0000: 53 50 43 52 50 00 00 00 02 13 42 4F 43 48 53 20 // SPCRP.....BOCHS + 0010: 42 58 50 43 53 50 43 52 01 00 00 00 42 58 50 43 // BXPCSPCR....BXPC + 0020: 01 00 00 00 03 00 00 00 00 08 00 01 00 00 00 09 // ................ + 0030: 00 00 00 00 08 00 21 00 00 00 03 00 01 02 00 00 // ......!......... + 0040: FF FF FF FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/virt/SRAT.dsl b/tests/data/acpi/virt/SRAT.dsl new file mode 100644 index 0000000000..f267aabc67 --- /dev/null +++ b/tests/data/acpi/virt/SRAT.dsl @@ -0,0 +1,57 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/virt/SRAT.numamem, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [SRAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table] +[004h 0004 4] Table Length : 0000006A +[008h 0008 1] Revision : 03 +[009h 0009 1] Checksum : AB +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSRAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Table Revision : 00000001 +[028h 0040 8] Reserved : 0000000000000000 + +[030h 0048 1] Subtable Type : 03 [GICC Affinity] +[031h 0049 1] Length : 12 + +[032h 0050 4] Proximity Domain : 00000000 +[036h 0054 4] Acpi Processor UID : 00000000 +[03Ah 0058 4] Flags (decoded below) : 00000001 + Enabled : 1 +[03Eh 0062 4] Clock Domain : 00000000 + +[042h 0066 1] Subtable Type : 01 [Memory Affinity] +[043h 0067 1] Length : 28 + +[044h 0068 4] Proximity Domain : 00000000 +[048h 0072 2] Reserved1 : 0000 +[04Ah 0074 8] Base Address : 0000000040000000 +[052h 0082 8] Address Length : 0000000008000000 +[05Ah 0090 4] Reserved2 : 00000000 +[05Eh 0094 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[062h 0098 8] Reserved3 : 0000000000000000 + +Raw Table Data: Length 106 (0x6A) + + 0000: 53 52 41 54 6A 00 00 00 03 AB 42 4F 43 48 53 20 // SRATj.....BOCHS + 0010: 42 58 50 43 53 52 41 54 01 00 00 00 42 58 50 43 // BXPCSRAT....BXPC + 0020: 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 03 12 00 00 00 00 00 00 00 00 01 00 00 00 00 00 // ................ + 0040: 00 00 01 28 00 00 00 00 00 00 00 00 00 40 00 00 // ...(.........@.. + 0050: 00 00 00 00 00 08 00 00 00 00 00 00 00 00 01 00 // ................ + 0060: 00 00 00 00 00 00 00 00 00 00 // .......... diff --git a/tests/data/acpi/virt/SRAT.memhp.dsl b/tests/data/acpi/virt/SRAT.memhp.dsl new file mode 100644 index 0000000000..3f311e6be0 --- /dev/null +++ b/tests/data/acpi/virt/SRAT.memhp.dsl @@ -0,0 +1,107 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/virt/SRAT.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SRAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table] +[004h 0004 4] Table Length : 000000E2 +[008h 0008 1] Revision : 03 +[009h 0009 1] Checksum : 5C +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSRAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Table Revision : 00000001 +[028h 0040 8] Reserved : 0000000000000000 + +[030h 0048 1] Subtable Type : 03 [GICC Affinity] +[031h 0049 1] Length : 12 + +[032h 0050 4] Proximity Domain : 00000000 +[036h 0054 4] Acpi Processor UID : 00000000 +[03Ah 0058 4] Flags (decoded below) : 00000001 + Enabled : 1 +[03Eh 0062 4] Clock Domain : 00000000 + +[042h 0066 1] Subtable Type : 01 [Memory Affinity] +[043h 0067 1] Length : 28 + +[044h 0068 4] Proximity Domain : 00000000 +[048h 0072 2] Reserved1 : 0000 +[04Ah 0074 8] Base Address : 0000000040000000 +[052h 0082 8] Address Length : 0000000008000000 +[05Ah 0090 4] Reserved2 : 00000000 +[05Eh 0094 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[062h 0098 8] Reserved3 : 0000000000000000 + +[06Ah 0106 1] Subtable Type : 01 [Memory Affinity] +[06Bh 0107 1] Length : 28 + +[06Ch 0108 4] Proximity Domain : 00000001 +[070h 0112 2] Reserved1 : 0000 +[072h 0114 8] Base Address : 0000000048000000 +[07Ah 0122 8] Address Length : 0000000008000000 +[082h 0130 4] Reserved2 : 00000000 +[086h 0134 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[08Ah 0138 8] Reserved3 : 0000000000000000 + +[092h 0146 1] Subtable Type : 01 [Memory Affinity] +[093h 0147 1] Length : 28 + +[094h 0148 4] Proximity Domain : 00000001 +[098h 0152 2] Reserved1 : 0000 +[09Ah 0154 8] Base Address : 0000000088000000 +[0A2h 0162 8] Address Length : 0000000008000000 +[0AAh 0170 4] Reserved2 : 00000000 +[0AEh 0174 4] Flags (decoded below) : 00000005 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 1 +[0B2h 0178 8] Reserved3 : 0000000000000000 + +[0BAh 0186 1] Subtable Type : 01 [Memory Affinity] +[0BBh 0187 1] Length : 28 + +[0BCh 0188 4] Proximity Domain : 00000001 +[0C0h 0192 2] Reserved1 : 0000 +[0C2h 0194 8] Base Address : 0000000080000000 +[0CAh 0202 8] Address Length : 00000000F0000000 +[0D2h 0210 4] Reserved2 : 00000000 +[0D6h 0214 4] Flags (decoded below) : 00000003 + Enabled : 1 + Hot Pluggable : 1 + Non-Volatile : 0 +[0DAh 0218 8] Reserved3 : 0000000000000000 + +Raw Table Data: Length 226 (0xE2) + + 0000: 53 52 41 54 E2 00 00 00 03 5C 42 4F 43 48 53 20 // SRAT.....\BOCHS + 0010: 42 58 50 43 53 52 41 54 01 00 00 00 42 58 50 43 // BXPCSRAT....BXPC + 0020: 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 03 12 00 00 00 00 00 00 00 00 01 00 00 00 00 00 // ................ + 0040: 00 00 01 28 00 00 00 00 00 00 00 00 00 40 00 00 // ...(.........@.. + 0050: 00 00 00 00 00 08 00 00 00 00 00 00 00 00 01 00 // ................ + 0060: 00 00 00 00 00 00 00 00 00 00 01 28 01 00 00 00 // ...........(.... + 0070: 00 00 00 00 00 48 00 00 00 00 00 00 00 08 00 00 // .....H.......... + 0080: 00 00 00 00 00 00 01 00 00 00 00 00 00 00 00 00 // ................ + 0090: 00 00 01 28 01 00 00 00 00 00 00 00 00 88 00 00 // ...(............ + 00A0: 00 00 00 00 00 08 00 00 00 00 00 00 00 00 05 00 // ................ + 00B0: 00 00 00 00 00 00 00 00 00 00 01 28 01 00 00 00 // ...........(.... + 00C0: 00 00 00 00 00 80 00 00 00 00 00 00 00 F0 00 00 // ................ + 00D0: 00 00 00 00 00 00 03 00 00 00 00 00 00 00 00 00 // ................ + 00E0: 00 00 // .. diff --git a/tests/data/acpi/virt/SRAT.numamem.dsl b/tests/data/acpi/virt/SRAT.numamem.dsl new file mode 100644 index 0000000000..b6e59b1af0 --- /dev/null +++ b/tests/data/acpi/virt/SRAT.numamem.dsl @@ -0,0 +1,57 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/virt/SRAT.numamem, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SRAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table] +[004h 0004 4] Table Length : 0000006A +[008h 0008 1] Revision : 03 +[009h 0009 1] Checksum : AB +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSRAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Table Revision : 00000001 +[028h 0040 8] Reserved : 0000000000000000 + +[030h 0048 1] Subtable Type : 03 [GICC Affinity] +[031h 0049 1] Length : 12 + +[032h 0050 4] Proximity Domain : 00000000 +[036h 0054 4] Acpi Processor UID : 00000000 +[03Ah 0058 4] Flags (decoded below) : 00000001 + Enabled : 1 +[03Eh 0062 4] Clock Domain : 00000000 + +[042h 0066 1] Subtable Type : 01 [Memory Affinity] +[043h 0067 1] Length : 28 + +[044h 0068 4] Proximity Domain : 00000000 +[048h 0072 2] Reserved1 : 0000 +[04Ah 0074 8] Base Address : 0000000040000000 +[052h 0082 8] Address Length : 0000000008000000 +[05Ah 0090 4] Reserved2 : 00000000 +[05Eh 0094 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[062h 0098 8] Reserved3 : 0000000000000000 + +Raw Table Data: Length 106 (0x6A) + + 0000: 53 52 41 54 6A 00 00 00 03 AB 42 4F 43 48 53 20 // SRATj.....BOCHS + 0010: 42 58 50 43 53 52 41 54 01 00 00 00 42 58 50 43 // BXPCSRAT....BXPC + 0020: 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 03 12 00 00 00 00 00 00 00 00 01 00 00 00 00 00 // ................ + 0040: 00 00 01 28 00 00 00 00 00 00 00 00 00 40 00 00 // ...(.........@.. + 0050: 00 00 00 00 00 08 00 00 00 00 00 00 00 00 01 00 // ................ + 0060: 00 00 00 00 00 00 00 00 00 00 // .......... diff --git a/tests/data/acpi/virt/SSDT.dsl b/tests/data/acpi/virt/SSDT.dsl new file mode 100644 index 0000000000..cb220787b4 --- /dev/null +++ b/tests/data/acpi/virt/SSDT.dsl @@ -0,0 +1,205 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/virt/SSDT.memhp, Mon Sep 28 17:24:38 2020 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x000002E0 (736) + * Revision 0x01 + * Checksum 0x3F + * OEM ID "BOCHS " + * OEM Table ID "NVDIMM" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM", 0x00000001) +{ + Scope (\_SB) + { + Device (NVDR) + { + Name (_HID, "ACPI0012" /* NVDIMM Root Device */) // _HID: Hardware ID + Method (NCAL, 5, Serialized) + { + Local6 = MEMA /* \MEMA */ + OperationRegion (NPIO, SystemMemory, 0x09090000, 0x04) + OperationRegion (NRAM, SystemMemory, Local6, 0x1000) + Field (NPIO, DWordAcc, NoLock, Preserve) + { + NTFI, 32 + } + + Field (NRAM, DWordAcc, NoLock, Preserve) + { + HDLE, 32, + REVS, 32, + FUNC, 32, + FARG, 32672 + } + + Field (NRAM, DWordAcc, NoLock, Preserve) + { + RLEN, 32, + ODAT, 32736 + } + + If ((Arg4 == Zero)) + { + Local0 = ToUUID ("2f10e7a4-9e91-11e4-89d3-123b93f75cba") + } + ElseIf ((Arg4 == 0x00010000)) + { + Local0 = ToUUID ("648b9cf2-cda1-4312-8ad9-49c4af32bd62") + } + Else + { + Local0 = ToUUID ("4309ac30-0d11-11e4-9191-0800200c9a66") + } + + If (((Local6 == Zero) | (Arg0 != Local0))) + { + If ((Arg2 == Zero)) + { + Return (Buffer (One) + { + 0x00 // . + }) + } + + Return (Buffer (One) + { + 0x01 // . + }) + } + + HDLE = Arg4 + REVS = Arg1 + FUNC = Arg2 + If (((ObjectType (Arg3) == 0x04) & (SizeOf (Arg3) == One))) + { + Local2 = Arg3 [Zero] + Local3 = DerefOf (Local2) + FARG = Local3 + } + + NTFI = Local6 + Local1 = (RLEN - 0x04) + If ((Local1 < 0x08)) + { + Local2 = Zero + Name (TBUF, Buffer (One) + { + 0x00 // . + }) + Local7 = Buffer (Zero){} + While ((Local2 < Local1)) + { + TBUF [Zero] = DerefOf (ODAT [Local2]) + Concatenate (Local7, TBUF, Local7) + Local2++ + } + + Return (Local7) + } + + Local1 = (Local1 << 0x03) + CreateField (ODAT, Zero, Local1, OBUF) + Return (OBUF) /* \_SB_.NVDR.NCAL.OBUF */ + } + + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + Return (NCAL (Arg0, Arg1, Arg2, Arg3, Zero)) + } + + Name (RSTA, Zero) + Method (RFIT, 1, Serialized) + { + Name (OFST, Zero) + OFST = Arg0 + Local0 = NCAL (ToUUID ("648b9cf2-cda1-4312-8ad9-49c4af32bd62"), One, One, Package (0x01) + { + OFST + }, 0x00010000) + CreateDWordField (Local0, Zero, STAU) + RSTA = STAU /* \_SB_.NVDR.RFIT.STAU */ + If ((Zero != STAU)) + { + Return (Buffer (Zero){}) + } + + Local1 = SizeOf (Local0) + Local1 -= 0x04 + If ((Local1 == Zero)) + { + Return (Buffer (Zero){}) + } + + CreateField (Local0, 0x20, (Local1 << 0x03), BUFF) + Return (BUFF) /* \_SB_.NVDR.RFIT.BUFF */ + } + + Method (_FIT, 0, Serialized) // _FIT: Firmware Interface Table + { + Local2 = Buffer (Zero){} + Local3 = Zero + While (One) + { + Local0 = RFIT (Local3) + Local1 = SizeOf (Local0) + If ((RSTA == 0x0100)) + { + Local2 = Buffer (Zero){} + Local3 = Zero + } + Else + { + If ((Local1 == Zero)) + { + Return (Local2) + } + + Local3 += Local1 + Concatenate (Local2, Local0, Local2) + } + } + } + + Device (NV00) + { + Name (_ADR, One) // _ADR: Address + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + Return (NCAL (Arg0, Arg1, Arg2, Arg3, One)) + } + } + + Device (NV01) + { + Name (_ADR, 0x02) // _ADR: Address + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + Return (NCAL (Arg0, Arg1, Arg2, Arg3, 0x02)) + } + } + + Device (NV02) + { + Name (_ADR, 0x03) // _ADR: Address + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + Return (NCAL (Arg0, Arg1, Arg2, Arg3, 0x03)) + } + } + } + } + + Name (MEMA, 0x43D10000) +} + diff --git a/tests/data/uefi-boot-images/bios-tables-test.x86_64.iso.raw b/tests/data/uefi-boot-images/bios-tables-test.x86_64.iso.raw new file mode 100644 index 0000000000000000000000000000000000000000..bd43ba50a3b25bdf4108cf920a26acc93cc45555 GIT binary patch literal 425984 zcmZP=1*0J_8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*O42;e$1_p+V3_hNIp%DtWfwN1Hzb|fS1z1pCfH0sGgoBM_WME(fVFnHk z1}=yKE)fU~BE>+25`zSYVqlP9-~cf=7~B{^npl_^7(jX%8Spr0REiEE;O^?@8SL-r z>*(&P;2G?%U}@bvNV^m7NR0ZD_@m@7ED1bKUgD1^8= z;!BRS@w<_Mp{0R|k*T4fsfmH9fdL1GfB_m{z)&%oXlWBSL&sE5Q8tQ4Ltt=(0HpqR z^-&1%5AqE0R|pPpb@p`gbao8!^!Fp$iIPOC991|P0;3@?8UmvsFd71*Au!+}@E=nD z54bx<9WWXKqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsK)VoN1kbTE($0cW zlSe~fGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n20R47J%0(%a{2*x%BTZI zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz4fA0+@U3%ULA3%~(0$d+Z6S zU^HNmg1Al!vM-;30cr*VgwN;X=^q>);^?I3<``ma$e_aj-7Y8z+t-h(p3BMKKSa+N ztQKPMC^;GeqaiRF0;3@?8UmvsK+O6Emuo@oB8zn|VU^E0qLtr!n zMnhmU1cr79ytbK;o1IpymzG$~SL4m;m$zz&LuP<7Idhxm;j!r(V z!ETNrhDHhs3VibWqHESD9Vp=r+rqb-o#CuN-0KfUPtJ;+m3;j#BqOs}A+uN^FTX?~ zQ6VWmza%j!CsiROvp8E%K_MU~HL*BVAv3QywFpH%EhoRApi&_*FNK$@peVJtSRpa5 zQXxCFQlTVYp`@r%Au&BMGfzQJPfvjtdU7C=OGlZcgh1%3AOAssHGzS>fq`=Y1NVpj zr05@2JJds9H2#Nr3{vKPq(Ys8f#FcxOuw0a5E^2xtD7h6WJLjpI82@iqF|I94S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c1*0J_8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*AwY2m=)rdP zD=1*y->-*IfF=*I8gx`E)Ce?rW{84Oax?@+Ltr!nMnhmU1V%$((1ie^dPlGSA@w)z z`X6%s52*f+Ff&mAofCw5J`f9ogVmt(?x=%CLtr!nMnhmU1V%$(Gz1tJ7<{A14~7Qv zwZe4 z9aaF@00Qg>mJAFD3=9k$mJAFs1k{outyhv-QNn=mGqT@d<|r^QB6p1H*+EAUC%1E;VLg;GcTnut(<) zkIwTR2j6pecK$T{?_v3&SklAtdaa0O^AE-jjuIA^4i82j#sePzkH3C&*fGST^Fydd z=ha}3&fgx*Zw!vHGx+qTsOWUQ^5{J1+xg%{urLEdcZiCPM=$R#RR#u+|A#$V4|ItL zb_kc=_Gmt0;L&*_I@U4faJWb3d7sXcu7)SWJUXxWbRP0(ek0-2>!K0>iY<;8>ynOaWbt{o3HgY&27(A<4!LWJ(0c6egG{FO&cO|NrecV@a_~x9(O$h?`_Rj<=|6 zU|?YQ|DS;Y#GU|k;LBa0G-nGo-L4pDMz>%}{ja70=Aw5c1)2@!yd2zLy1zubA|3X;MBz5GMx{U+gnsXHW^;> z`2P7NKR*LQ<6{R!P+s}L%imJT0cNR|@Ow1>;Novp=44=ac^M>lyhR08OFHfXMFPml zD_~CUhD44h<8hDwC$M?c1L3LWAG-W4s*DT_<>nsEKeYH;+(2wmkJbbHEgGOK()>e# zzeS9Zf#G$4NAnMD{uV}%-c&PwUQq14d2{K37qxnYxe@hv}ZAJVo zovdJu>HIAcEDQ`UKeB_NEW2+rTV}B|9!ec89bVga=erRS<`vTqxqD=x8och z{4TdZ@efN89?dTdJeq%SmOFW5PXVVBE)T{FAd^5UKo)><05PfK^%fuPJ>ZP~?KlU2 zYZ4D6#e$3h`Kz-<1?2LV-GBf82RQ(g3qWZQrpeXt(#t8}uzq~fqxrOeNAqcghSLq- z4mWso-Yn(uXny#&;jF`JW{=LB9-Swe9|)AHfWko1qk9h|ta{5iJd))-I=6tiuXQ|< zV;Np6p{nVY_h>%O0SZ%4IKAfZ=#B*kl1JyM=0_|Z&A%8oX}d~3ar}P8vH6L@w}VVB z{H~9_9c(BK_3S+9dGIB(OUDTn#*P-1#S9D#C0riO5AQ>>RO{_Zv2RBmN(DWdPcnIY zzr738@N?Xv``W~#^F-%8FjrN;fq}up7IdqD2fxd`*ODHs2TIvJT5ne}b>7|uY5^XD zn9Kn36u7wPyyw$7Mdb!4{de}L8~~LRopZp^^dkEQD3T$Ppuz|g&>r0oMZT?m?t4 zmrtOQ5Tp`RD(wM#o}oknrrq$8$Nv)^-@kb`-OGB7ke|Ltn{&DHRvtKpMx$2nl3>C5kO?d5e)Ms0mtssgGZ zK(Wuioeh-C1wc8y^8VtmuP^+$85lf!eOVkkkGXGC&O8&JdLZ5QC>PL?r^m;O-1j2>>y;Izv=EKn%{# z5ETayg98@lp!Ts#XNro3OJ|9SLT8AIg-_?pU233)LCClN|6l5Yf~WOusU$4eJi6ID znvZe7^BD)YTxveb0j>qUFflOjZwp|B8Sm4}n*?z$x_^B-UxFONzb$|TWGnx6fzA*W z1O9CR%%EmE|279Euq!%UR1{vE`uhL>OHh`BCJAVc?`B8O&CpnDJy5CYu?uvm#Q*>Q z>pc_?dGvby_h|m9P_FCI%d4x&z~IxJb5Y~9phxo$)^bUYUQtP~n9d;|Ye-h$Z*>7R z+@Tr6r|+2`)|fdP)!H@S2HVS422i%c4DZ__3=FSp zF`VwxtGg8>lZ+wrIsik+r&qTXq}a@-SGPt4i#^CLf>t=kA@wP!WcTR2p~?U%gqnXa zdPsf)WleC6(YOR$b1*Re{|^!a)gB&=EnqQlSD?8CT=Fn|J1$Tv?a_J9v)7fe@fqko zTx9!RdwP6_q~O=_pn3pg3{$B`g9Ss0zmFxP%}{K_zfZ`68DieSM;x4|Jd!VYv_cYm zi3Y4P;NRx)-=p(T%gNGXueX3&>g)#xK$Urb4`UCw=K+d-kVy=s<{+bt;NI!p0`9%|bl!&tfn)On z<`*;HgM;BU2h=1sNaFSEyyMvT1mrd!Ye>KpiF-8eQ2|9OD8l($^FWPh1x9ei=gQD> zfWPGn0|P_%9a#pDW$W_({A9BF_=-K&$^Po@XeQ>0B zB%kz9?g1x%P~i>s@Q-&O4^IL6-m~+t5AzyumS})Ba(sKe7)we${~z;g{>NOJp_|Nk#ff~28&z(X67CSdkL z(gI3GkOetR0v0qNhk^3Ii?46NaRl-Tu}ytYiUODYx*z}l2Q^?oZNnE|-hevxu%>8< zs&DJ;7LC(1H-Q4EDQ`Ug5Q7w9ny@2IR_dp_dPpr7@mX~>A`sKMc7+} zVxP_%pf)TxgUs~!{`)mAs8R)4{?g>*|NkD1M?m93pg|_bSjRZW_`{$PBhYXYXrL+B zr}MB!^Bav9K45p2$T@%pN;L~fF23{ZeBse~)79|g zF3>$>FY@31|L@U!L?b#bJ{Dw>1!y2H!l&0qB?83Kc+vMCtia-MXm}WGBoJibYETUc z>b4wxu>i#E_2cm9JpN(|nC;Es(Ru7e2Z(KXjDN}j56i#&Qw~AxQM?d)INYc6IM}$( z%O1^d6khbc1_g7840H@p4&rzfkmL11dHCxquqzZmBbXnf<2*Zm#J^ksN`cL91U!zr zsBnO*jBXbdP>ZePn@95z0mQ&1$hkTY3*;QW9b+s(3LguQ6`;U=G3ga(2n=b}84+nd6o(6km_Kw32NElGa&oGapcj-E1|%^@Z!-+uxph(nr+!Zc@6C3m*QZ% z|AS012HEWbGNn`Yo;(A?iwy`JXXQba94P$lL2b`o-m@SbmLMHMARXP#2_BuS3qZQ6 z5W4!|x?~}`rh|0ZgLK__0ZAB!2ci!kV+^_d|?%2Qp?K$e5`hV_M&qvKt; z^#YXleN;3&x>>i&F)$dO^z6Lh()sCsfCi|y(NP7;aNRzjKFedn10LTmdorH!QGD## zdB;=pjN|tsAUE(&J>Yrp4UZ?|k&;A@Zq@=hQ19!}{{REe&SNhe!EPz>@NNB8>HOj< zgr~F<)GmB+8Nw6s=oJkUXJGK{`~VRb2RW*jH5n3(*TfhYc7dwy7q!p-|Mxifl*gy@ zl}9g+wvXl`&|HHBe+wwfcyzOVlVxD|A7J3odGy7p=b#`c$?|A@TbcSI4q_41+878A zWbJ)11_sa07Z7U~JpcdSrjoJH zh8IN;t3df}K4@YLoZp-vA?6PXF>nESkGz?nDq z$^ZY|tU8hm3@*J1jJ}Ldd^#V#H~|{{>pcA8#1n7`z{~Myh#ejv-4{W2=sy9qEFSrG ze)I*`!Y>Se{QvLK`qs1aNQo%en=k)|f@&~OGoQhS-{XNt=gk+jAmf{lDEM?fKqPgK z&hud&&2KC~^M4UOoh~W~pt30Ag$vvb|G^0*8`OpBwyX}k8ajdkWg=kii$_Kg8_7^5R{)C!*($+2rz(kgR6${ zFi>_jcyazWDCiG(bRI5M_vjW?1?%Uv0a^X;-~azFqCxiW;Dn~amnooZ)6L2U9`||c zYWT$Pt>J&4?1BslkM4p3PsVQ^t^fI37J-^1t#A2TW`g@YPxxCvtxsQ&NIOWXTXZj^ zI`|IGRzE#EZ+LX(s3^S90R>LC=zNGQix{YAehHd?6b4CjRttD^W=r^VCM)=KW^24i z`vFRYQsN8@oy^_L-!F7Bce4tJGccreIAfd$zN54p>jYkVdi08dA_0`USm6?R0A|(JLASmADL%VDahB6Yyw0Ch_ti$Pc}uMPdvLT_Q{!AAUvq?lOQ~h@uJAaUwZ&HUI}7+0?7FHAmeQi#-~7yU-$so^&oe(94LVrZ;UX0 z8$Xik%OS=e<_Ei;5oG))knwl#gPeTRqw~{?<$plT!!Mj5#`}W`cCQy8cOi_w0+9o` zJ{)X3v}%$7xe`>w^s**Ete7Xvzz`i5zw0Xl1H;R5kS(CbXI%W@!!K9<`TyTBIM_8P zL?K!=F;+n}QA0IF(@H@#k&D4CzbH4cL_yJ3K|`Y~KQl!^OH;u>lR-ZtKQ~oBCows{ zSiiU^S--TPxTGjGF;~AZHMdm1C_lGYKQ$%WNZ&UlH6S}(-zPJvD6yzgKQuKh(j zG~FjN$vHpIzqCXj#??z^a4JnpOD&?7T~3L`sR2cqc_luXN%}B`XI@EaQC?z>UNS>? zW=cthf{lW)1%rlLPGWkof|^2|hCzjap+b#UU2@3Mx3G~&|(l2hW{GAmM397~)^Gjmen1CmpG z6Du-vOLHBIlQT1eONuh{(tT3%(n~TlNi-ldFEcqmB^AX81ucc*%&OGz@MOB7HC5$6n;CPYdi(h-;%H5pV5EGl$W4NTyKQH833 z5r_w2fH=sQLDj%0MITC-q$ntWm{uSHWK;x0aA|UKYH=|`cw$jrW?s5NXkK<+etDjP zdroCR23*u7H7B(sRlzMWGpDpD6)qfJl!-+Yn*BoZ^A&<~6LWIl%7aT1b5a#t5=#;p zeDV`h6kLmn@{1Te^U4x)GE)=+5{nXZQ%h2d7((-kOA89}i%L>c7@QJQ6rcuz@-2g3 zeu+X*YGO(ygG*{zW^yXj5Qs|xitj}Yk$A=inha2dZkai$@bLFZ%u6p#OiyKS&d)6<%FoR# zPECPCRvN#23%CtuU}$7)Vrph?Vd?1P?BeRCp`j7#=@;Ussh|-I^09v!B&swu71TiG zxgn%TCb#Nx!d9K=B{Lvd3(0|yG8WxdBxTs0<&s&JS)329{R}8^BdE4>$t(*sGpR5( z3QEmQ%*;zkEdo0f8axmOLITAA45$z^AZvpY)1WmBvUM)0#U+_};M9T5PI#;ZgEI$K zCCEmgwM0N=GDIV$1W222Vg=a+EKI+mEvU((0pr>!K%DB6ny1MCYfvEk?w222QsiHj zT9lJmpa9kc^}UV))C3(^g{z>Y2{B3sVI;UXX3&6C^JF{SIlrLNCp8b$mNL*}(13AK zoDQnYK&32}fJ-b%1ZhQX@__;xUim?i&;V3yrmcU@@h)HD@R7hkn`w)!=%;pDiNdnU(P;6-u zPUn~!H5n8!!^X3iP?$hFF|d560bzjh3bfS;NjA{tou(#(7DR=Dje8apC zfb5zQKuEXjl<6y%zW!7o1rGnpey!ANef8o|yMUUh)t+r>4^ z)7dpXz%j%lJ|M_H#NXN92h{9SQ-Emz6&VHw28N(oM3Vs=qi971C4mJ>ub^1+$xH$d zZy-0iAWczhjVb5+yyAQ;*&Hg4qY%*W$S=yQ%FioF%mH;{a!NsseNaFdXey|wDQJYH z7L{Zsqe&WQGC1X6jva-jC%P0RmZOJ+Q%;Gl9k?LUbIL5qO)LNzj}mV|`Q@H@Y59&t zMTwPoCBY$WW2<1u5L{9O;y_1XLh^%BOG=CKG;M7`qCu&JrI|&kDGaKKRtg2+hDBmt zr9yUUr9w%*LTW{32^UxjnkiGkc{nu%oKrP4719zjb5c_vN}MwDAthXKNNRD3t!jZn zP;p9up#h9#1Y$vy2InSa<`)|of}|j9V~8aFj9QXfTvDuGnwplW3u5Y)w^c1 zz}W(1ZwOe-#nma)J>K2f*~CIW!psC!HXu7)AJwtwT(EY1$I_B~_tZSls2qyd7$(Rw zFfoAUoE)6^89*4cfKi`cp245Np&?BV);mj^;J2@mneBS5^9J*`JM^~~Eiu%c`?^E- zvfwN+h6(ES2Yp>c|9+Y>UB_#t-qYRZ6&_D1e38-d@yTVuJxUA>$89InNLGh%vY~V%l%4^l*FovyQ2G{>ehQ_(LuqF41R?{&HYi^h z%9n-GT2R^wN_#`;C@7r=ILMXikN^gbI2ch&uD18%3KY`Nkq4Yl} zEvyOgw;Gf-fYP>5+8atoLg`c}T?VCpm_hWDLxQ#(f;P~oSTZnxu%DA5XdM{bs6mya zQIox1N=^>konVFmWDnqi!bLjuiqcBvvS_ z&{$!x!eWKP3Xc^5DY005}kN4)?5 literal 0 HcmV?d00001 diff --git a/tests/libqtest.c.orig b/tests/libqtest.c.orig new file mode 100644 index 0000000000..a1d33a1d0c --- /dev/null +++ b/tests/libqtest.c.orig @@ -0,0 +1,1106 @@ +/* + * QTest + * + * Copyright IBM, Corp. 2012 + * Copyright Red Hat, Inc. 2012 + * Copyright SUSE LINUX Products GmbH 2013 + * + * Authors: + * Anthony Liguori + * Paolo Bonzini + * Andreas Färber + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#include "qemu/osdep.h" + +#include +#include +#include + +#include "libqtest.h" +#include "qemu/cutils.h" +#include "qapi/error.h" +#include "qapi/qmp/json-parser.h" +#include "qapi/qmp/json-streamer.h" +#include "qapi/qmp/qdict.h" +#include "qapi/qmp/qjson.h" +#include "qapi/qmp/qlist.h" +#include "qapi/qmp/qstring.h" + +#define MAX_IRQ 256 +#define SOCKET_TIMEOUT 50 + +QTestState *global_qtest; + +struct QTestState +{ + int fd; + int qmp_fd; + bool irq_level[MAX_IRQ]; + GString *rx; + pid_t qemu_pid; /* our child QEMU process */ + bool big_endian; +}; + +static GHookList abrt_hooks; +static struct sigaction sigact_old; + +#define g_assert_no_errno(ret) do { \ + g_assert_cmpint(ret, !=, -1); \ +} while (0) + +static int qtest_query_target_endianness(QTestState *s); + +static int init_socket(const char *socket_path) +{ + struct sockaddr_un addr; + int sock; + int ret; + + sock = socket(PF_UNIX, SOCK_STREAM, 0); + g_assert_no_errno(sock); + + addr.sun_family = AF_UNIX; + snprintf(addr.sun_path, sizeof(addr.sun_path), "%s", socket_path); + qemu_set_cloexec(sock); + + do { + ret = bind(sock, (struct sockaddr *)&addr, sizeof(addr)); + } while (ret == -1 && errno == EINTR); + g_assert_no_errno(ret); + ret = listen(sock, 1); + g_assert_no_errno(ret); + + return sock; +} + +static int socket_accept(int sock) +{ + struct sockaddr_un addr; + socklen_t addrlen; + int ret; + struct timeval timeout = { .tv_sec = SOCKET_TIMEOUT, + .tv_usec = 0 }; + + setsockopt(sock, SOL_SOCKET, SO_RCVTIMEO, (void *)&timeout, + sizeof(timeout)); + + do { + addrlen = sizeof(addr); + ret = accept(sock, (struct sockaddr *)&addr, &addrlen); + } while (ret == -1 && errno == EINTR); + if (ret == -1) { + fprintf(stderr, "%s failed: %s\n", __func__, strerror(errno)); + } + close(sock); + + return ret; +} + +static void kill_qemu(QTestState *s) +{ + int wstatus = 0; + + if (s->qemu_pid != -1) { + kill(s->qemu_pid, SIGTERM); + waitpid(s->qemu_pid, &wstatus, 0); + + if (WIFSIGNALED(wstatus)) { + assert(!WCOREDUMP(wstatus)); + } + } +} + +static void kill_qemu_hook_func(void *s) +{ + kill_qemu(s); +} + +static void sigabrt_handler(int signo) +{ + g_hook_list_invoke(&abrt_hooks, FALSE); +} + +static void setup_sigabrt_handler(void) +{ + struct sigaction sigact; + + /* Catch SIGABRT to clean up on g_assert() failure */ + sigact = (struct sigaction){ + .sa_handler = sigabrt_handler, + .sa_flags = SA_RESETHAND, + }; + sigemptyset(&sigact.sa_mask); + sigaction(SIGABRT, &sigact, &sigact_old); +} + +static void cleanup_sigabrt_handler(void) +{ + sigaction(SIGABRT, &sigact_old, NULL); +} + +void qtest_add_abrt_handler(GHookFunc fn, const void *data) +{ + GHook *hook; + + /* Only install SIGABRT handler once */ + if (!abrt_hooks.is_setup) { + g_hook_list_init(&abrt_hooks, sizeof(GHook)); + } + setup_sigabrt_handler(); + + hook = g_hook_alloc(&abrt_hooks); + hook->func = fn; + hook->data = (void *)data; + + g_hook_prepend(&abrt_hooks, hook); +} + +static const char *qtest_qemu_binary(void) +{ + const char *qemu_bin; + + qemu_bin = getenv("QTEST_QEMU_BINARY"); + if (!qemu_bin) { + fprintf(stderr, "Environment variable QTEST_QEMU_BINARY required\n"); + exit(1); + } + + return qemu_bin; +} + +QTestState *qtest_init_without_qmp_handshake(bool use_oob, + const char *extra_args) +{ + QTestState *s; + int sock, qmpsock, i; + gchar *socket_path; + gchar *qmp_socket_path; + gchar *command; + const char *qemu_binary = qtest_qemu_binary(); + + s = g_new(QTestState, 1); + + socket_path = g_strdup_printf("/tmp/qtest-%d.sock", getpid()); + qmp_socket_path = g_strdup_printf("/tmp/qtest-%d.qmp", getpid()); + + /* It's possible that if an earlier test run crashed it might + * have left a stale unix socket lying around. Delete any + * stale old socket to avoid spurious test failures with + * tests/libqtest.c:70:init_socket: assertion failed (ret != -1): (-1 != -1) + */ + unlink(socket_path); + unlink(qmp_socket_path); + + sock = init_socket(socket_path); + qmpsock = init_socket(qmp_socket_path); + + qtest_add_abrt_handler(kill_qemu_hook_func, s); + + s->qemu_pid = fork(); + if (s->qemu_pid == 0) { + setenv("QEMU_AUDIO_DRV", "none", true); + command = g_strdup_printf("exec %s " + "-qtest unix:%s,nowait " + "-qtest-log %s " + "-chardev socket,path=%s,nowait,id=char0 " + "-mon chardev=char0,mode=control%s " + "-machine accel=qtest " + "-display none " + "%s", qemu_binary, socket_path, + getenv("QTEST_LOG") ? "/dev/fd/2" : "/dev/null", + qmp_socket_path, use_oob ? ",x-oob=on" : "", + extra_args ?: ""); + execlp("/bin/sh", "sh", "-c", command, NULL); + exit(1); + } + + s->fd = socket_accept(sock); + if (s->fd >= 0) { + s->qmp_fd = socket_accept(qmpsock); + } + unlink(socket_path); + unlink(qmp_socket_path); + g_free(socket_path); + g_free(qmp_socket_path); + + g_assert(s->fd >= 0 && s->qmp_fd >= 0); + + s->rx = g_string_new(""); + for (i = 0; i < MAX_IRQ; i++) { + s->irq_level[i] = false; + } + + if (getenv("QTEST_STOP")) { + kill(s->qemu_pid, SIGSTOP); + } + + /* ask endianness of the target */ + + s->big_endian = qtest_query_target_endianness(s); + + return s; +} + +QTestState *qtest_init(const char *extra_args) +{ + QTestState *s = qtest_init_without_qmp_handshake(false, extra_args); + + /* Read the QMP greeting and then do the handshake */ + qtest_qmp_discard_response(s, ""); + qtest_qmp_discard_response(s, "{ 'execute': 'qmp_capabilities' }"); + + return s; +} + +QTestState *qtest_vstartf(const char *fmt, va_list ap) +{ + char *args = g_strdup_vprintf(fmt, ap); + QTestState *s; + + s = qtest_start(args); + g_free(args); + global_qtest = NULL; + return s; +} + +QTestState *qtest_startf(const char *fmt, ...) +{ + va_list ap; + QTestState *s; + + va_start(ap, fmt); + s = qtest_vstartf(fmt, ap); + va_end(ap); + return s; +} + +void qtest_quit(QTestState *s) +{ + g_hook_destroy_link(&abrt_hooks, g_hook_find_data(&abrt_hooks, TRUE, s)); + + /* Uninstall SIGABRT handler on last instance */ + cleanup_sigabrt_handler(); + + kill_qemu(s); + close(s->fd); + close(s->qmp_fd); + g_string_free(s->rx, true); + g_free(s); +} + +static void socket_send(int fd, const char *buf, size_t size) +{ + size_t offset; + + offset = 0; + while (offset < size) { + ssize_t len; + + len = write(fd, buf + offset, size - offset); + if (len == -1 && errno == EINTR) { + continue; + } + + g_assert_no_errno(len); + g_assert_cmpint(len, >, 0); + + offset += len; + } +} + +static void socket_sendf(int fd, const char *fmt, va_list ap) +{ + gchar *str = g_strdup_vprintf(fmt, ap); + size_t size = strlen(str); + + socket_send(fd, str, size); + g_free(str); +} + +static void GCC_FMT_ATTR(2, 3) qtest_sendf(QTestState *s, const char *fmt, ...) +{ + va_list ap; + + va_start(ap, fmt); + socket_sendf(s->fd, fmt, ap); + va_end(ap); +} + +static GString *qtest_recv_line(QTestState *s) +{ + GString *line; + size_t offset; + char *eol; + + while ((eol = strchr(s->rx->str, '\n')) == NULL) { + ssize_t len; + char buffer[1024]; + + len = read(s->fd, buffer, sizeof(buffer)); + if (len == -1 && errno == EINTR) { + continue; + } + + if (len == -1 || len == 0) { + fprintf(stderr, "Broken pipe\n"); + exit(1); + } + + g_string_append_len(s->rx, buffer, len); + } + + offset = eol - s->rx->str; + line = g_string_new_len(s->rx->str, offset); + g_string_erase(s->rx, 0, offset + 1); + + return line; +} + +static gchar **qtest_rsp(QTestState *s, int expected_args) +{ + GString *line; + gchar **words; + int i; + +redo: + line = qtest_recv_line(s); + words = g_strsplit(line->str, " ", 0); + g_string_free(line, TRUE); + + if (strcmp(words[0], "IRQ") == 0) { + long irq; + int ret; + + g_assert(words[1] != NULL); + g_assert(words[2] != NULL); + + ret = qemu_strtol(words[2], NULL, 0, &irq); + g_assert(!ret); + g_assert_cmpint(irq, >=, 0); + g_assert_cmpint(irq, <, MAX_IRQ); + + if (strcmp(words[1], "raise") == 0) { + s->irq_level[irq] = true; + } else { + s->irq_level[irq] = false; + } + + g_strfreev(words); + goto redo; + } + + g_assert(words[0] != NULL); + g_assert_cmpstr(words[0], ==, "OK"); + + if (expected_args) { + for (i = 0; i < expected_args; i++) { + g_assert(words[i] != NULL); + } + } else { + g_strfreev(words); + } + + return words; +} + +static int qtest_query_target_endianness(QTestState *s) +{ + gchar **args; + int big_endian; + + qtest_sendf(s, "endianness\n"); + args = qtest_rsp(s, 1); + g_assert(strcmp(args[1], "big") == 0 || strcmp(args[1], "little") == 0); + big_endian = strcmp(args[1], "big") == 0; + g_strfreev(args); + + return big_endian; +} + +typedef struct { + JSONMessageParser parser; + QDict *response; +} QMPResponseParser; + +static void qmp_response(JSONMessageParser *parser, GQueue *tokens) +{ + QMPResponseParser *qmp = container_of(parser, QMPResponseParser, parser); + QObject *obj; + + obj = json_parser_parse(tokens, NULL); + if (!obj) { + fprintf(stderr, "QMP JSON response parsing failed\n"); + exit(1); + } + + g_assert(!qmp->response); + qmp->response = qobject_to(QDict, obj); + g_assert(qmp->response); +} + +QDict *qmp_fd_receive(int fd) +{ + QMPResponseParser qmp; + bool log = getenv("QTEST_LOG") != NULL; + + qmp.response = NULL; + json_message_parser_init(&qmp.parser, qmp_response); + while (!qmp.response) { + ssize_t len; + char c; + + len = read(fd, &c, 1); + if (len == -1 && errno == EINTR) { + continue; + } + + if (len == -1 || len == 0) { + fprintf(stderr, "Broken pipe\n"); + exit(1); + } + + if (log) { + len = write(2, &c, 1); + } + json_message_parser_feed(&qmp.parser, &c, 1); + } + json_message_parser_destroy(&qmp.parser); + + return qmp.response; +} + +QDict *qtest_qmp_receive(QTestState *s) +{ + return qmp_fd_receive(s->qmp_fd); +} + +/** + * Allow users to send a message without waiting for the reply, + * in the case that they choose to discard all replies up until + * a particular EVENT is received. + */ +void qmp_fd_sendv(int fd, const char *fmt, va_list ap) +{ + va_list ap_copy; + QObject *qobj; + + /* qobject_from_jsonv() silently eats leading 0xff as invalid + * JSON, but we want to test sending them over the wire to force + * resyncs */ + if (*fmt == '\377') { + socket_send(fd, fmt, 1); + fmt++; + } + + /* Going through qobject ensures we escape strings properly. + * This seemingly unnecessary copy is required in case va_list + * is an array type. + */ + va_copy(ap_copy, ap); + qobj = qobject_from_jsonv(fmt, &ap_copy, &error_abort); + va_end(ap_copy); + + /* No need to send anything for an empty QObject. */ + if (qobj) { + int log = getenv("QTEST_LOG") != NULL; + QString *qstr = qobject_to_json(qobj); + const char *str; + + /* + * BUG: QMP doesn't react to input until it sees a newline, an + * object, or an array. Work-around: give it a newline. + */ + qstring_append_chr(qstr, '\n'); + str = qstring_get_str(qstr); + + if (log) { + fprintf(stderr, "%s", str); + } + /* Send QMP request */ + socket_send(fd, str, qstring_get_length(qstr)); + + qobject_unref(qstr); + qobject_unref(qobj); + } +} + +void qtest_async_qmpv(QTestState *s, const char *fmt, va_list ap) +{ + qmp_fd_sendv(s->qmp_fd, fmt, ap); +} + +QDict *qmp_fdv(int fd, const char *fmt, va_list ap) +{ + qmp_fd_sendv(fd, fmt, ap); + + return qmp_fd_receive(fd); +} + +QDict *qtest_qmpv(QTestState *s, const char *fmt, va_list ap) +{ + qtest_async_qmpv(s, fmt, ap); + + /* Receive reply */ + return qtest_qmp_receive(s); +} + +QDict *qmp_fd(int fd, const char *fmt, ...) +{ + va_list ap; + QDict *response; + + va_start(ap, fmt); + response = qmp_fdv(fd, fmt, ap); + va_end(ap); + return response; +} + +void qmp_fd_send(int fd, const char *fmt, ...) +{ + va_list ap; + + va_start(ap, fmt); + qmp_fd_sendv(fd, fmt, ap); + va_end(ap); +} + +QDict *qtest_qmp(QTestState *s, const char *fmt, ...) +{ + va_list ap; + QDict *response; + + va_start(ap, fmt); + response = qtest_qmpv(s, fmt, ap); + va_end(ap); + return response; +} + +void qtest_async_qmp(QTestState *s, const char *fmt, ...) +{ + va_list ap; + + va_start(ap, fmt); + qtest_async_qmpv(s, fmt, ap); + va_end(ap); +} + +void qtest_qmpv_discard_response(QTestState *s, const char *fmt, va_list ap) +{ + QDict *response = qtest_qmpv(s, fmt, ap); + qobject_unref(response); +} + +void qtest_qmp_discard_response(QTestState *s, const char *fmt, ...) +{ + va_list ap; + QDict *response; + + va_start(ap, fmt); + response = qtest_qmpv(s, fmt, ap); + va_end(ap); + qobject_unref(response); +} + +QDict *qtest_qmp_eventwait_ref(QTestState *s, const char *event) +{ + QDict *response; + + for (;;) { + response = qtest_qmp_receive(s); + if ((qdict_haskey(response, "event")) && + (strcmp(qdict_get_str(response, "event"), event) == 0)) { + return response; + } + qobject_unref(response); + } +} + +void qtest_qmp_eventwait(QTestState *s, const char *event) +{ + QDict *response; + + response = qtest_qmp_eventwait_ref(s, event); + qobject_unref(response); +} + +char *qtest_hmpv(QTestState *s, const char *fmt, va_list ap) +{ + char *cmd; + QDict *resp; + char *ret; + + cmd = g_strdup_vprintf(fmt, ap); + resp = qtest_qmp(s, "{'execute': 'human-monitor-command'," + " 'arguments': {'command-line': %s}}", + cmd); + ret = g_strdup(qdict_get_try_str(resp, "return")); + while (ret == NULL && qdict_get_try_str(resp, "event")) { + /* Ignore asynchronous QMP events */ + qobject_unref(resp); + resp = qtest_qmp_receive(s); + ret = g_strdup(qdict_get_try_str(resp, "return")); + } + g_assert(ret); + qobject_unref(resp); + g_free(cmd); + return ret; +} + +char *qtest_hmp(QTestState *s, const char *fmt, ...) +{ + va_list ap; + char *ret; + + va_start(ap, fmt); + ret = qtest_hmpv(s, fmt, ap); + va_end(ap); + return ret; +} + +const char *qtest_get_arch(void) +{ + const char *qemu = qtest_qemu_binary(); + const char *end = strrchr(qemu, '/'); + + return end + strlen("/qemu-system-"); +} + +bool qtest_get_irq(QTestState *s, int num) +{ + /* dummy operation in order to make sure irq is up to date */ + qtest_inb(s, 0); + + return s->irq_level[num]; +} + +static int64_t qtest_clock_rsp(QTestState *s) +{ + gchar **words; + int64_t clock; + words = qtest_rsp(s, 2); + clock = g_ascii_strtoll(words[1], NULL, 0); + g_strfreev(words); + return clock; +} + +int64_t qtest_clock_step_next(QTestState *s) +{ + qtest_sendf(s, "clock_step\n"); + return qtest_clock_rsp(s); +} + +int64_t qtest_clock_step(QTestState *s, int64_t step) +{ + qtest_sendf(s, "clock_step %"PRIi64"\n", step); + return qtest_clock_rsp(s); +} + +int64_t qtest_clock_set(QTestState *s, int64_t val) +{ + qtest_sendf(s, "clock_set %"PRIi64"\n", val); + return qtest_clock_rsp(s); +} + +void qtest_irq_intercept_out(QTestState *s, const char *qom_path) +{ + qtest_sendf(s, "irq_intercept_out %s\n", qom_path); + qtest_rsp(s, 0); +} + +void qtest_irq_intercept_in(QTestState *s, const char *qom_path) +{ + qtest_sendf(s, "irq_intercept_in %s\n", qom_path); + qtest_rsp(s, 0); +} + +static void qtest_out(QTestState *s, const char *cmd, uint16_t addr, uint32_t value) +{ + qtest_sendf(s, "%s 0x%x 0x%x\n", cmd, addr, value); + qtest_rsp(s, 0); +} + +void qtest_outb(QTestState *s, uint16_t addr, uint8_t value) +{ + qtest_out(s, "outb", addr, value); +} + +void qtest_outw(QTestState *s, uint16_t addr, uint16_t value) +{ + qtest_out(s, "outw", addr, value); +} + +void qtest_outl(QTestState *s, uint16_t addr, uint32_t value) +{ + qtest_out(s, "outl", addr, value); +} + +static uint32_t qtest_in(QTestState *s, const char *cmd, uint16_t addr) +{ + gchar **args; + int ret; + unsigned long value; + + qtest_sendf(s, "%s 0x%x\n", cmd, addr); + args = qtest_rsp(s, 2); + ret = qemu_strtoul(args[1], NULL, 0, &value); + g_assert(!ret && value <= UINT32_MAX); + g_strfreev(args); + + return value; +} + +uint8_t qtest_inb(QTestState *s, uint16_t addr) +{ + return qtest_in(s, "inb", addr); +} + +uint16_t qtest_inw(QTestState *s, uint16_t addr) +{ + return qtest_in(s, "inw", addr); +} + +uint32_t qtest_inl(QTestState *s, uint16_t addr) +{ + return qtest_in(s, "inl", addr); +} + +static void qtest_write(QTestState *s, const char *cmd, uint64_t addr, + uint64_t value) +{ + qtest_sendf(s, "%s 0x%" PRIx64 " 0x%" PRIx64 "\n", cmd, addr, value); + qtest_rsp(s, 0); +} + +void qtest_writeb(QTestState *s, uint64_t addr, uint8_t value) +{ + qtest_write(s, "writeb", addr, value); +} + +void qtest_writew(QTestState *s, uint64_t addr, uint16_t value) +{ + qtest_write(s, "writew", addr, value); +} + +void qtest_writel(QTestState *s, uint64_t addr, uint32_t value) +{ + qtest_write(s, "writel", addr, value); +} + +void qtest_writeq(QTestState *s, uint64_t addr, uint64_t value) +{ + qtest_write(s, "writeq", addr, value); +} + +static uint64_t qtest_read(QTestState *s, const char *cmd, uint64_t addr) +{ + gchar **args; + int ret; + uint64_t value; + + qtest_sendf(s, "%s 0x%" PRIx64 "\n", cmd, addr); + args = qtest_rsp(s, 2); + ret = qemu_strtou64(args[1], NULL, 0, &value); + g_assert(!ret); + g_strfreev(args); + + return value; +} + +uint8_t qtest_readb(QTestState *s, uint64_t addr) +{ + return qtest_read(s, "readb", addr); +} + +uint16_t qtest_readw(QTestState *s, uint64_t addr) +{ + return qtest_read(s, "readw", addr); +} + +uint32_t qtest_readl(QTestState *s, uint64_t addr) +{ + return qtest_read(s, "readl", addr); +} + +uint64_t qtest_readq(QTestState *s, uint64_t addr) +{ + return qtest_read(s, "readq", addr); +} + +static int hex2nib(char ch) +{ + if (ch >= '0' && ch <= '9') { + return ch - '0'; + } else if (ch >= 'a' && ch <= 'f') { + return 10 + (ch - 'a'); + } else if (ch >= 'A' && ch <= 'F') { + return 10 + (ch - 'a'); + } else { + return -1; + } +} + +void qtest_memread(QTestState *s, uint64_t addr, void *data, size_t size) +{ + uint8_t *ptr = data; + gchar **args; + size_t i; + + if (!size) { + return; + } + + qtest_sendf(s, "read 0x%" PRIx64 " 0x%zx\n", addr, size); + args = qtest_rsp(s, 2); + + for (i = 0; i < size; i++) { + ptr[i] = hex2nib(args[1][2 + (i * 2)]) << 4; + ptr[i] |= hex2nib(args[1][2 + (i * 2) + 1]); + } + + g_strfreev(args); +} + +uint64_t qtest_rtas_call(QTestState *s, const char *name, + uint32_t nargs, uint64_t args, + uint32_t nret, uint64_t ret) +{ + qtest_sendf(s, "rtas %s %u 0x%"PRIx64" %u 0x%"PRIx64"\n", + name, nargs, args, nret, ret); + qtest_rsp(s, 0); + return 0; +} + +void qtest_add_func(const char *str, void (*fn)(void)) +{ + gchar *path = g_strdup_printf("/%s/%s", qtest_get_arch(), str); + g_test_add_func(path, fn); + g_free(path); +} + +void qtest_add_data_func_full(const char *str, void *data, + void (*fn)(const void *), + GDestroyNotify data_free_func) +{ + gchar *path = g_strdup_printf("/%s/%s", qtest_get_arch(), str); + g_test_add_data_func_full(path, data, fn, data_free_func); + g_free(path); +} + +void qtest_add_data_func(const char *str, const void *data, + void (*fn)(const void *)) +{ + gchar *path = g_strdup_printf("/%s/%s", qtest_get_arch(), str); + g_test_add_data_func(path, data, fn); + g_free(path); +} + +void qtest_bufwrite(QTestState *s, uint64_t addr, const void *data, size_t size) +{ + gchar *bdata; + + bdata = g_base64_encode(data, size); + qtest_sendf(s, "b64write 0x%" PRIx64 " 0x%zx ", addr, size); + socket_send(s->fd, bdata, strlen(bdata)); + socket_send(s->fd, "\n", 1); + qtest_rsp(s, 0); + g_free(bdata); +} + +void qtest_bufread(QTestState *s, uint64_t addr, void *data, size_t size) +{ + gchar **args; + size_t len; + + qtest_sendf(s, "b64read 0x%" PRIx64 " 0x%zx\n", addr, size); + args = qtest_rsp(s, 2); + + g_base64_decode_inplace(args[1], &len); + if (size != len) { + fprintf(stderr, "bufread: asked for %zu bytes but decoded %zu\n", + size, len); + len = MIN(len, size); + } + + memcpy(data, args[1], len); + g_strfreev(args); +} + +void qtest_memwrite(QTestState *s, uint64_t addr, const void *data, size_t size) +{ + const uint8_t *ptr = data; + size_t i; + char *enc; + + if (!size) { + return; + } + + enc = g_malloc(2 * size + 1); + + for (i = 0; i < size; i++) { + sprintf(&enc[i * 2], "%02x", ptr[i]); + } + + qtest_sendf(s, "write 0x%" PRIx64 " 0x%zx 0x%s\n", addr, size, enc); + qtest_rsp(s, 0); + g_free(enc); +} + +void qtest_memset(QTestState *s, uint64_t addr, uint8_t pattern, size_t size) +{ + qtest_sendf(s, "memset 0x%" PRIx64 " 0x%zx 0x%02x\n", addr, size, pattern); + qtest_rsp(s, 0); +} + +QDict *qmp(const char *fmt, ...) +{ + va_list ap; + QDict *response; + + va_start(ap, fmt); + response = qtest_qmpv(global_qtest, fmt, ap); + va_end(ap); + return response; +} + +void qmp_async(const char *fmt, ...) +{ + va_list ap; + + va_start(ap, fmt); + qtest_async_qmpv(global_qtest, fmt, ap); + va_end(ap); +} + +void qmp_discard_response(const char *fmt, ...) +{ + va_list ap; + + va_start(ap, fmt); + qtest_qmpv_discard_response(global_qtest, fmt, ap); + va_end(ap); +} +char *hmp(const char *fmt, ...) +{ + va_list ap; + char *ret; + + va_start(ap, fmt); + ret = qtest_hmpv(global_qtest, fmt, ap); + va_end(ap); + return ret; +} + +bool qtest_big_endian(QTestState *s) +{ + return s->big_endian; +} + +void qtest_cb_for_every_machine(void (*cb)(const char *machine)) +{ + QDict *response, *minfo; + QList *list; + const QListEntry *p; + QObject *qobj; + QString *qstr; + const char *mname; + + qtest_start("-machine none"); + response = qmp("{ 'execute': 'query-machines' }"); + g_assert(response); + list = qdict_get_qlist(response, "return"); + g_assert(list); + + for (p = qlist_first(list); p; p = qlist_next(p)) { + minfo = qobject_to(QDict, qlist_entry_obj(p)); + g_assert(minfo); + qobj = qdict_get(minfo, "name"); + g_assert(qobj); + qstr = qobject_to(QString, qobj); + g_assert(qstr); + mname = qstring_get_str(qstr); + cb(mname); + } + + qtest_end(); + qobject_unref(response); +} + +/* + * Generic hot-plugging test via the device_add QMP command. + */ +void qtest_qmp_device_add(const char *driver, const char *id, const char *fmt, + ...) +{ + QDict *response; + char *cmd, *opts = NULL; + va_list va; + + if (fmt) { + va_start(va, fmt); + opts = g_strdup_vprintf(fmt, va); + va_end(va); + } + + cmd = g_strdup_printf("{'execute': 'device_add'," + " 'arguments': { 'driver': '%s', 'id': '%s'%s%s }}", + driver, id, opts ? ", " : "", opts ? opts : ""); + g_free(opts); + + response = qmp(cmd); + g_free(cmd); + g_assert(response); + g_assert(!qdict_haskey(response, "event")); /* We don't expect any events */ + g_assert(!qdict_haskey(response, "error")); + qobject_unref(response); +} + +/* + * Generic hot-unplugging test via the device_del QMP command. + * Device deletion will get one response and one event. For example: + * + * {'execute': 'device_del','arguments': { 'id': 'scsi-hd'}} + * + * will get this one: + * + * {"timestamp": {"seconds": 1505289667, "microseconds": 569862}, + * "event": "DEVICE_DELETED", "data": {"device": "scsi-hd", + * "path": "/machine/peripheral/scsi-hd"}} + * + * and this one: + * + * {"return": {}} + * + * But the order of arrival may vary - so we've got to detect both. + */ +void qtest_qmp_device_del(const char *id) +{ + QDict *response1, *response2, *event = NULL; + char *cmd; + + cmd = g_strdup_printf("{'execute': 'device_del'," + " 'arguments': { 'id': '%s' }}", id); + response1 = qmp(cmd); + g_free(cmd); + g_assert(response1); + g_assert(!qdict_haskey(response1, "error")); + + response2 = qmp(""); + g_assert(response2); + g_assert(!qdict_haskey(response2, "error")); + + if (qdict_haskey(response1, "event")) { + event = response1; + } else if (qdict_haskey(response2, "event")) { + event = response2; + } + g_assert(event); + g_assert_cmpstr(qdict_get_str(event, "event"), ==, "DEVICE_DELETED"); + + qobject_unref(response1); + qobject_unref(response2); +} diff --git a/tests/qemu-iotests/core.12067 b/tests/qemu-iotests/core.12067 new file mode 100644 index 0000000000000000000000000000000000000000..0ddb68f76aacbf14f48ba13b2ce9d4d52fab0ebf GIT binary patch literal 22716416 zcmb<-^>JflWMqH=76xVp7|#SI$iTp0!l1yg3Cd?-U|=W_gK`)c7#vg)Y!C~q-+_UF zp&&U7#AgrykwOftAWDD%VtxQfz7!&_z`($uz`y`97o--fzkq>(VFFYhWR?R10~@mb z4Gatn7ohSA4h#$m4yf`M92gibEDQ%}VNhUU0AUpUA6yt16w|19{B<|X#1AE-RY{{>8_;SZ9( zP>nF3feF?A4IuZ|BIMD-{{YDSsPZWGU+`jN_yCm$*)M>WK0)#fbqMp({r>>uek6Hx z`#*r<7gZj`eg<{o}WO&es+x`S^Murcl@+kHfcr!9EG(q%(!dC$;d_nRGPYfFC2n1SI(fX!a}k zF)|cvfY^_%esBQkhst9!KfsTXVF8l-0<`>};K#_|uo+@LR6mOU3j7!u0-*BP(g#RB z0V)sDuYi{R8$kZwg4_HFAorunqlC`_ko%G316Wbh#|A$}h7UU-=7Z|e0JQpp!Jm=A zVHZRmQNnKm$b2Mu^zvbWKO@5fBzcVd>(9vW0aYHw`~&`s z3=9X6+{cU>KNtKN83c|X$)m;31Aj&a1yp$y^FR1AG8iDqKj1+%pCN#eLEs|9d}#hh z37>)hMurBcJT&}J%x?%_WSD>?zkvnS{0RY!3=Y>I=3|Th4FQY{2~c@#<{t=PWGKKR ze*xq^Bzg4sc@V(JumMRPJ$^m}FftrKl}GU(Lm(r=1tj?cXz?Qu$jC6^7Q}y0_oIZL zLLei<0#tbv^9=$S88$%WLFEH_{REP~0F?)s?|_!R9Re8{1a9NDKOm5iK><}B#r}jq zMg{{UdGzor2xMePK$1rfzlK0Yh5}T16!RwpGBPwE$s3@Rp9?_#zYB3cw0=PezYBqk z3=g34ApfJ6KMw*K89pG%UqI_0dQ~DE?~*Vq|E5%40KsLJ%Xv1SEL|wEVRIB>x?^`3Hg+ z88$%Wv6+7%h>_s{lKcTQ_dfu+?-#^;sD2dpe*oE!DvuI=48e>H3y|f}^G`4%!-l^Q z^Rb1GK`^RGY%Bf|kyc@*;%LKqn?K;@zCN0E03VPyCKl?U06-hT)H z*{^`x{sfTysPZW07l7LAs`SU4{|?-|HBv= z67a|?gfTJ{Ajw}qD<2HP7#SQwA?8EVA4>iW0GSV!2W4_}`$6&rP06TM)*`Z~!Wg&3usj1*km8`~tN2YXG@F4B~!}Ji7T4K;effj}m_iK>kCLXAnV+ zpA8`SEZpWF0EI8AJc{`j!WbDEP~}m^*B*p1GE6{~M+yHAVT=q5pz_f8K`~z-oRQ%G zR37Ai2DI`?0VJOdaX(Z)iun%Vj0_K;@*w>f@f*&_@BvAF0owRfLO3JCgks$0H-s}X zY=FvRGk*feeW>y%;jLWWJc|1_fZUHNj}kryK<-D9Pe2Qw3*n3m0j0Rz{~?@_ zp#Un6&HW4!pz$?`er)mr5uoukh&;CNH;7%4Et^E)X!N{Oc zjiMhVd=erU84OV6QNpJHL0ON%fQbQwVe%k%OkjYF13UW%xq{Sig9s>wu^p5c z1eEm|807UC7$#IRFqA1n6l^eq&;sfZ8ks!MQ5yD^fq`MiTL^~9O%PcUuFb%}0Ky=# zWCjL?|NsC0*Dy&B0~tGwNs(dCg%|%p@}Ti&kQ-|l7#Nrt7#Lt~WC&tlU~qF_c)|RF z8Qoolskx=PnYrm8vq4xtBR@A)KexCjqg)CkzUs z1q_gJC77E)NpS;r<#$D}8!EqplHUK{ulK{^UXX!-Aq5()CI!i1pfm;212T(?fq{V? zq)(voI|qnnU|`^6U|md3-#kYKr8qj$9g^F*W>KHsW z4jcal(E*j;Kw-cTQ2C7^q4FCzyg=jE7ocOzAo@Y=H;}&=9@KsVjXi_HjR7>qoB$mM z2GIp|5WNL;-$3KT;P3>E6T`-WL3BXFHyMz7K;yp&4c}xzY|vOPY`hjke`x#$p5g(I z(KdYphc9TnH2^v$3ZfI5zA=IIHhp7ofR1H?=z!*Lpm<^kX#U2K(EJS)S0EZbo(US) zoUriQWl(s6$1oRtdkkWO$0MO*f($FafyNheK<0zS85>qY!VNTL2pbm!(Gxa&%LA#I zu;CkMybm0V^yhz%OsngAU?0?`W& zK*C|cfo}{O4txWpTM!K&g9433eK-IKPw=?Y!Ed0l2Rz0EA4fX!4K!wC2r?fuc4Tnm zn-Pc&8YhB{1%c>>i{H+I#6jaf6E1$c0%C*4dSK%@AUfgNH!qMlXbh*|+BY8%yW!e5 z_?Qc5?B&2UhfyObw zegTbV7~K8_%Jbl{3)uJsh%UGdu?sXN(Qq4L7ij!p19Xf4L_fIuO$lT^Xk6jL-EZJ& zN6;9;0q8gYi2m^5n+_-~fyM>|K7P{&u|fTOSYIAQH+=pED)Yhp_X(dN=79R@6QKQR z5WV61H+zs>pg#D4@829jY*2r@0oo@9(Gz}s(*cQ3`1K9cSJnlwL49UezZgVc`1=hU zU!cD5gTLR5L25w#URd82L>n-C2fN3B;XA0$ssd62>YKv)pCI~y%=hCUzdVrn4(eB) z1hExlzr*{8puXY(x$hDny`X;K1-b8_vJl+I+W_r{f#?GY-=)E76uvWDQ1}im2QDal zhxf%meX<3r-@)kt)c@L``rQ|#euL_Fh6B+46o?kE{ay%i1E>$BVEerc#0K?;V0|7C z-C+A2Bnj0pn8P?)V}?Y{T)=Nf!ngM_9}?pQ2f0L zlNoS z=#wp6kX)3iSDdeBsAr^Siee5qGRZ}i1tq#hdPYX*t|CXKI5j6Tue1W}JQSyqE|Hd& z2{Oh^&p^)z#VFDxiW7@-K;F|c)-%vEKrxIwsiM^4{G2kZp+=rmc4}p5NoGzl$j63g zv5Hr&D9N ziclhgc)^04WDMQJi=`A}(M+shUU4y~+{LJo$q>h822oY3>oqBc&*lgdlaC@Cp`xX?t;5G^ZFBAbjg;gcd- zP?AxUnwWys9CGE-lau3%bxrjQ^$c~53=B;T%nU8SA&Qc>sHrL!tNTe2EiOq(*475O z65LorOGRW$f-)vnw~;Q9o>y7|XrQ_UQpf}>h&2U-bT{|Bpfiw(fSNCOlTWCsom(Efie1`P%^24(O*YtY#MFbrBd0m7g*ENE>H zsLxZv$iM)@pmkLs43Y!2bwL&jZN^ zJS|DN!^+D5!z|$p3}6gZ6Zo_Qw1g3)4F!Yj2Q4EEdRmf#Y<`Cv0|N+y%m(=lG|#J_ zlcEb>U|AN`@9qa)aR%!0fWsQJ&JUzl1iEe#EPwl8RnND?=wsdybCPEq`S*iC zQo$Lt){zms)fT*NlH&{~%N_?WhQme~J_afbLJXV>B^i{NI+?r`BN$IL9b)7VoWpV6 zv4@Anfx+#FV25^dr$^EQCr+m+N~{cQh8`f#Rf8PFz`#($$iPs`$iPs?$iPq!6>DH* zU}$D!U}#}vU}$4xU}%Sic{d{iLk}YZLoZZaA0q?9Bt`~?$x!}uMh1qNj0_C385tPn zFfuUAV`N~M50zU0r9pOs@FFOG36utjEn{S0Si#7^u!@m^VKpNI!x}~ghP8|g4C@&g z7&bC8Fl=IEVAujxzm<`JVH+a@!)`_fhW(5T3Sw;qimEU%?rh430mlao=AetCg`*YH-Q?KUKoC`8}CHH?` z?#DvSyFbE0+b*y5etbZ=BW;8Ev&Fv}%q1hNLXXSjPD!^g7i4DWEHJ(4KI`yBB`(!% zCoWZn=XT(x`*n{s?U`OcLdes<;B!}4rb@BRmN*;bwJkGNM{I;(<9y|J_I~8^)Y_xv@Xb!{;+<&%BIcYH8v_!nKdieEU){^Ja7PsDS3{Z0 z8hyw47{1yr50q{^du^iG?H$?=m+qYP;Rm-pd*i+fGj9rZc1vW&_Z_~^VE>zEW!;*^ zn&thAv+HNocr$jSBU8#BJOXUyl$a5$yCZO@b+4h73}_fF+*vwqO{*V@5% z4Yxjbj8o!AO*56_O`>OF;z)Q~`)z1tO66hG_CvK^YoJo*B(NPVhojhysvN{osNI z!G8zJSP(7)NZt~>;0huD;ya<~cR-Wp1Pw?)l!Ns*fixlUAA<@8B)%FN-w>3!k>odn z3OFRbH+ZobL;z$oWWgDNe;&;}VQAs=5NUt}q`wnX7(=v!-MbJ?KdAoKD78P zLJLn3H1%v~?(IMeKWnu3YD81dist?v(4uuD_k^ISpN(doDq8#(qlIrWTKvyPa~~^O zc?ghe1Ag20z`r2 zpMnSw2kKufH1$bn<=1XB|Ei(c{}3&FiqXt3M^nEEE&RFA%7ZpE^VrbLD?!Uo@6qz# zZnXIJMhpK%Xy)xj3tu-h|LdTc*MMeU44Qdz`NN9l-y}5qk+(I0+J1M?;%^ID`oDx09?#J1Uy7#xIy5bUD3I30 zXz{fYBnXm(rq`ut?!AX5Uw~%c8#MQsp{4hHH1`Cem6yNKPe zA0D8UN59bAdjw<%$S`RB)kcdiO(gYvB94do1RRg?@i-pm<8VC6#{%g;T1;kPP%-}b zAC~k$W0pRXSr`&1focLs1_!K<&I2;f2u{iMwG=ubk z_M$XQW?|4V{`ntlB}@<0Z6ld-P)P}UAe|BxAe$1_Ae$1lK{h4qfow{cfLuzLgIr2j zfm}-10=bm13vwx84Du;q2J$Ik3Gyjn6Xa9E4#=m3eUMKHQ&30=3s6W2YfwlD+n|sV z_CO&eOh7Ru%t0|FtUxg(Y=L4**agLuFb1WRFaxEOumq))un9^jVIM$PIR$d|Vi9z| zBaX;8JR=XHj)8$8gMon|-6lT_mi*Ef7#L2>$b<8X7#JANBk{qNx?Jj&1&W8o_*7KD8$O9^A0nHQGemJ-G@GcQcRDJ4vJ zW?t9<@02iU5I;I4%x!Xh*oT6YFdMG?unjgTVX5)?VFuwTVagzRqm(eMnR#I!^iskM zLFQ;dvtVIOv;gavFx$b;N}?|)v{hm=&XyJ2z1z`)S( z;D27&tN)1j#o~Mhc7}Ygz746V;CP1VhtUgu;n&X#)qkJ>Q@=bzewY|TewYH(ZP@HD zw}piFfi#HwVQOIZpCMqs8r1#=X{h#t%t>R&5Bowuzadn=LppZ-GQaWr-vX+C0}lPJ zP3)A*7X#(*dM zLFo~s{=g!Leh?dmV~h*J8VK0Gsw_V&n5`g;VF4ukklmlfkRP^!fPRMmd0{V~g#hY--;2u(j5aOkfg zp#KRp{TLKshX0(ed0{1A^TH0`3IESf{Rc`g_49no3w!c4FKhuG{oOG4w_xgD@+U9s z!JoXa20Z#tltap|1zni>LGG9Mo)?yYN53{(LD<>K{ICnXnEE}w=Y@gvJK)hD1}$F$ zreNv^`TxWByf6hk`oI6p3)}cNFRWk&rhbJVd0`;^40!YlSm%ey+vSIu+vSJ(+vSJl z*yV?H+U18Wv&#=VV3!}p8k8UA7?d9t9F!j>6qFyP7?dAo5R@NgACw;!7?d9tV3r=X z!8AQgz%)H9mQd9p(99^UL$Y zHk9Xw9WT!hJ71n3cBec)>?JgvY=7)j0AbY3ghk=G3&QHw`<7QxB$eEcR2I|Vaoth8sB5_X34+C}8 zCd|wa19c(Prsao$x+YH3^20z~uHb3;VW6%-{C2yZ%2v?9u=Hu-8y^ z$Yvt5L1vx&pC9)1e}34{|M_A6|AW$UK^QkfK^Q+nLD&ZZ`Xv|&!n7C)!W^sUXaNsUVD>tsu;jsUXamsUXaasUXagsUXaU zsUXassUR$fsUR$rsUWP1wID2lsUR$xsUR$#sUR$asUWO`sUWP5sUWP2sUU0`Q$g5V zrh>3#Oa);ZnF_+TGZlpGVJZka$W#z^jHw{(G*dy?1*U?qt4sx9x0njT?lTpHJz**c zd&yJ~_Kv9_>=RQ#*f*wvus=)%VT{ZLVQkC=VJoHb!`?C$glUNvgk??35BtSf5XQ}1 z5GKT25GKi75GKc55T?Rh5T?ak5T?&u5O%CFKkV9^{4i7If-r05f-nc>g0LFKf-q3O z&V{)k%$vC&EQq-PoVS%_3&Nt9A?XF47Z?~AKYje3&Qp=7lch_E(n{>ToCre ztsrb3$UcyNMGL}~GZ%!dXD$fa2Gt|Q3`z4Ky$7LUAU9ycAT?*13&Jil7lhqoE(rU` zToCqxxgd<=US8PSX^^(}59Wd}PL_f&c9w!LDVBmTL!`Xw#ZnL!$Wjm%$5IfM!%`4d z!BP;`$Wjp20aY^{N`v|tyJQN&_Bj=V&4G&P_!NXKgtD=@4J0<{cYYX1-6yX6u$jN} z!^%1!^#!Or(KCj`1*i=NYDa?9D=o|qTh3Atwwk3NY(3QM%`63BJ6H`Y$R93Ds>*1**fXeFP}vSL|07F5*guwnFh16T zFgezOFg@0SFk4oL8Q!b~Vg9TIVNt9FVJT2CP%UTe&m9-#jFKa>A zVb+4M)2szyS6BlOMKgPJY;t=KQep&G}(R=j4a&pOYV!+L0fY z*O4Cuz!+6s3!D0SYB0p@8EX4mH_sly1 zNq3;U1Ij}%zC2q&nAX(1Ff~wr7c}+?N{di7Xxztwtsu;vtsu-DT3><80{Ib???L`? zV=DlsX-}vgkl0XbKZD8@P@WBBD+v3|oF5hn^-DBcL0B4;od=~s{>xD+2%D)?5Vk_8 zAnb%vLD&nWg0MeI1z`fp1z`%x1z`rt1z~B*1!1Mi1z{7F3&IvC7ldt8E(qJLTo86q zxghMeazPlgN$OX64AK2!C z+vx@Vx!`uXL2xd(oh}fP8+OXBAnemV$XF=I3=lpIJ>!rEx<5pM39?Tl4oY`JX$205 zxFwWMgwooa5b-s95PBz+mgk4?O`voclx`Pn*r2ruV55n0G;^+ zIzJH9e*eKJ!~j}S0h&hn`tN`KnZjhSzd|M^gZ))fk__%=ILR?EfchDrJ_M+L@Wi4T zeBKi1j73nNr-Pe;0n{!A^({dCg_zgL;C{xGt;yhi#tBmf22ei()Q17}BS7)}`~UxZ zP}uzY|3BZvnE`YLV?L;F^Wp#h{Aufx!+!n$pT8Q^2?8l50)y57!jyfm%>O=NRn+$d zi`l+27{`9!a5d`thoi;cFXZrl7x*9jonfWucLq1M?*UgBzhAh`|J{MR^814q{NDwx zM}Akh8u>loeAM>|52C&c)X0Ai_{9GGgDU^`0@>K_7s8yrU&s;s9x$K#JA(=H_XT_0 zzdKCg`>wD;_WOtD{NEEa`M)=a@_)auo$31pJLc~O^WDEcn8Ek`f>-qS2Nkj34OZ}d zPgo}V{eo}w_l9pV-#-Y*egB}#|J|Y3>HC5x=I;$JW4;IYMt=_|bo}m6EB}4L#;ETC z+;ZO)lAXQ_w99^PI4$t~f>g}+2lgW072HI=ZwTQ0-ta;8yMYzU_XeNn?+30&e!t)y z{at`p?)!%mQQrmLM15DtEcq@VBllfkLg@DeX9d19WV3x=@P_~UgZX^lC-BOBS9mP@ zeZ$e>?+ykW-yak^egD86^L@gF$nOD@*}gk0ko{h;oA3L94+7reFC4;_X%Ze-yQ0+zdM|c{LXMQ3Vgnn zz>o0nAI?O6XSl`nU0?^(_YadJzh3~k^OEfM4UGKX6?~$wADt^!E$)BHtf0IDTii z0t&0B?+*NO-x=-(eh3ksOOKUnDaeM6qZ_Y3@T-vdgVzAu<0`uzZ( z-1iMieBT9*6@OQF9re9nhUj+zR{rlBbVa^1$j5$9Xbt+l;YrN*2k&LS7hH1x&XD5p z-5`kh`-4`t?-TMJz9-z4{eIyB=l26YoxV35i~64MKI;1eJGt)(7Wv;lRM>wHFk$|F z!Gh&`fw}7Rl5*b{2+Mu{a9rR!!|BNH z1%IQz9}tWEz95GA`-Efc-xvIs{a%m{icjY6AO7-ve{h!l`+==_-x+r2eOIuK{mvjO z|NX;mzV8f6M87|{$obvjXz}+4&iUUDSh9RqSQh!+z=QvL11L}4k^L@kBIU%X|mrRoEP}cu+05?!X(-61<#|tH$3D2K0z(^d%~s2?-NR# zz6UIe{r*6m`MZL;(|3oP0^c3t^S^)i?*3f>6rUL--xW4Secy1H{rdtzx$h5FIefpc zA?iEBG`{Zw;{4w~6a{@hz!LNQz-IUF6AJjhe>fNUeSvPt_k!QD-#7e={?4$@{ky?a z+3yW!1ilA63;cdycggn&$`Ri;m@t1Au+IN(u-E;&LO%a@hZ)@86K2VNXE5gf{y~WU z`vqy{?++YGz6)^4eRmLY`tIP(|DEA_)OUgD+}{n(MSkCKI`X?hMbP(vH*DVxcISOx z@HYIrKoIlyfZZkEAME1$uJAPG`-R%(^!ou(x$gqKCEp8H@O@Xf z7WLggI_A4T2HSTA2D$GEUeVtt^k;uRV8!-bz*OmbgMr-l3kA&I6IQu@-*6-H`virE z?*XR;zAIeg|E?eq`~84X{`U`VLEjyuIKDqv?f89xnA3NMmeQ~Ssg$qwnoGmxw3LP& zU@Hha(OeqV(^?u<(^?wl12vDKr8JD;4-2^5SWsIUcA%v+tfZ+l>`q;2m`!VG*n+0g zup@P)VG~+P!#3QG1eZxS8cV}g)R%?{fXuBg4ZBcW8rJeq=KC9vyXs5B0#=uXf%3?Y zw=&;n)R%^FG?#|SG?#`MfXow@{cg}y8phCE8up~IG%TR4H0(%IY1o$f(y#@fc2Heu zSVn7U*ox-Tuqz;Qn@ht=+DgMxKz^);gu$P;GT(DvZ4KK~R~pt(R~jbMR2n7#GNZ0E zEa7Nr*pJ52u!82&FopWku%7zTu$b1;urqa~VGebrVN2>DX29x5Z1fYPIaQFnz=YB; zP~?)vof>vvb!ymz)u~|tt5d_COvE2&0;^KP6jtLfYgKC40i-annOqvy z%M9tez})m%Qb^uuN(Inecvn^VIaKhB0hJ zm4li8;bdx9!!d;1grf*HObt4{;ShE;2aw!?t_PX#G8upPg47^5YWQE6f*Jm7T#z}KJ)HQ%8{O@oF&EIPnp~6;}S{i0E6MtC<8dC$! z-NF2{zy>o+U~&)4AaV&-5PAcY50eMcxY9pJZm8i0(@Mi?X5kM%(AXjJ`fmegNZ7#q z>R^lD7eM7Ec&3FtuuThFV4D_Z;De9{=^+$;0wJjCL3)VA1xRker>BL0pFw&R!U(%V zVMb}#pV_5hKP4b}9Hb9~C(ObuKVann51zR^kY02Q8n@j88u&t!xR8q7eGB%dg*C*d zg>6`$7RC^csfJMaFF^D6KIphHn)QQ%n=rF9?9M#=>Gu$s?hja*7B&G#7!L~1Q_&Hi zG=^+kz}(U>L+E^ohy^5Vn@U60eq4oyr=2vUK68M|dqKqupnO-T{9C9vviZnt(A))b z`@G;MQkrFCUVA5dQEiEv(^Mdf00tqP)58Mp zr-vmxNDupPDJ{(5YFb#qm9($}m(#*Nh(OE%=|RR%=9Pvyu%(A>5W_Bi;Zj-{sD1e0 zXqfw>PvgW?rL z!|;;%rC}Sa5oUnIzd-pdP&+uGYqPgN`SMWy7bt(fHN+kr9|(OGjSpHY2I}hdK;=Q} z#z6cdP(El48HoP}$_K3{1Mv-fA?AVBmVx*wP(Em#8Hhgv$_K4E1M$y5`JnY@AU=y9 zM8B?eJ~#|*pnNST|CSv@-U7;Rfy&oeL&9(cln)9MbPSr;1K+&>l~8z#l%_!E1|abb z_%je~dr(`CFC#2~6HV-IdRW6>gc-2@lffT|n8TO!Fb7doJqmmoVGT(3K%Ig?Z9r3F z@DXArx@fL7&OQF1C$7$f(C}D?lsUw@F%z+*dXN! zMj2rn%u&Ta;>dV{UPf3#D1J4_>hZA^^oTQO$>P$m00L@3G@%%>G@$xp?r}H$eJBk`zavAhT4oU1w8gPEGiAVv#b=nZUEU$0ZU86KIB5mrX2;4@CL0<0EOWTD4#PA68=1e z5c#k?2yFu8Bbx_eFKC7MAABeWNC1jKYZyRhn?Sh?2i8H+6^#$hgkeF2FLQcErTWLat0f*A;Vu$fCt{!v&`8a8J|X;=nytsKmp z56ckw2R6P9E5GWBAo&NT7Dj`@8O8?DCd*61REi*Z?n-ff*zBVGFe9ive~RRG4a%!@-QO0~<5KCTz$E+ps<(EMPtH_8eGR8un*ZDR_MkvV%6P zC=DxyuFvGCgyfqlC|?80-&6vL8?#b~JhFZeJ7Q&N7|TjX-{&uM?KemqgauZX!q4`3jzH8AN?#!R!Fr+UL2P>A z2ZuAlHXMey6Puk4%S*%dtS<$x9YdBESX~-+5}J-+=?Oi3A*%um8?<%}v{nbk2h-}AVF?K!yQ!#+r5h6TuHhOw-JHmW~YP=w){|DxX_+zk#s9T^1 zp+RAn^xS%mRrIBv#m18fLQ%fB1pc2~#ut(EXbbkQo+$ zw4V$n?*J78*$)yMjN!Lnb!ph24W;09-XJ%^aKI)+UI*#=^1gWoq^+|7 z$_J@I$1^sShCP{(AJ&2{!N9;^a2}HW(4{t9Mu-cbsVO*vkb~)SIFlJB02P058dd(l z>CCX`i4gZHpvl4X(}afFwcvDSSOJuc&7KFFOT+%`#Gif#I{bnMarh~0Ee+eVd2ojx zDE>fkKPc1R`qHpJTkwZp!j$~57GVdF7celWoh$G%~ki6HRirA0&fH5mf zK^DQsFaWe3NjNJkKoFuvK|Cu=;St1~0}K$cvMKpt1z$45K0JhoCp?DIB3WS%c(TF- z9%Y72V1}rLng8K)X4r<$5OpvyWSV6cem{fMg6i*rCz)XePjH*FV0&rUodfvI8tCxL z9K_-GU`J_K&Gx|^exUdpwCQhCY1p0}rC~ckduBn27K#OSVYdI#$NypN|0S~^_2YhM z+x{HXtW#4U<1f#ke5lcI3KTAI4g&*2%PvHl;Xe*N$mcx5^n&(kxqvpk!vvsofi-HL zh6*zz*dU3UBC(+g9MHrFwQoW8gS0jnVVVUJrzLhU$qL(m!=GS#_mqa!pzUV|iz5-B z{c!^sejxin&KZp1=dial?9OidRO~#I4xIz3 zuWm#6@pB;KU9X^gwz-i0D&t&;S@(d&i1vlLF!~<`LTmw|i z1ZM~zNjuK-*s%b-w&fF)&*lWt#|x!Zp|lQ^c8Ah_P`V3BXF%yTD1F2kVosk^0eH{y z3n+gMR9?mfBEQNB;+_yFe;1Tr1LYrq@)tn)C!qQ-Lg@!k`6E#IXHfnZDE}Ljuiy%? zkJ%YwUjmd53O8g7IwJy^-*Tih?6x#SFHAfd+NOl@k071B2ol=@&4VB|2rIaw>R&oF z4;&^SIS>Y&X90^t5Fd251u`EbMhGVy#8DofTO7`CW^wq7lZ(S)W-QphIQ+oA#o<5p zEezc@T&KSBB$W0Dt;vg{)u0Rt9Z4Cj5Z$J|V?cD;2gX{tAy^h#{ zVh>1o6px0$Xb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kW!5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S`WG8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiQ~MnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q!DtAKhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinC>RZa(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7zLvtFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;6Cw1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtqq) zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mg(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!83@Fd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?3PwXRZa(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7zLvtFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;6Cw1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtqq)hQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mg(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!83@ zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?3PwXRZa(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7zLvtFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;6Cw1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtqq)hQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mg(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!83@Fd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?3PwX< zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zM!{$ZjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz$h3Efzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5EuocAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmwWGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhl}jE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1Jg3%Bd4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=CQ7{?;qaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFbYOPU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V+JV2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQKHo4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVB~qaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(6pV(zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjDpb+7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fl)9T0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqhK@yMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU=)moz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kW!5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S`WG8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiQ~MnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q!DtAKhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinC>RZa z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7zLvtFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;6Cw1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtqq)hQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mg(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!83@Fd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?3PwXu$Ev||0@)SS$`(h9JHIK3Dc7(keTf#KCC7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c1*0J_8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3^7mkT zz{XouA_W9c4Y(n-i0HHL1Q{3@K<5;Sii(PYOaZwIL{kIvFfcg4%yEFasX%&BIE)RG z!$yPL^+9@3xPt7WaFF*p7#J8bQ*;ZmGa=_|Vbep5n0M&U**pvkAS1!bL2luYSrl%d zuqd3Ea09vPMgQXP2x%mD73YJ^qJ+qQwuF(9fx#h1W>Glk97j+%fy`SVvnU+ICX`M< z?#j$fOiyKixC<1InJKAxC7EfNsVTboMd^uonN^7;nfZAjV~NHuCI4%J+{Ge`>Mje} zMd6@uGbUgX$X%eYdLajK7bqT6@>2-tA}pP9Zvr^H=AgOjg6yJjP?(t!FaqSRw9K5; zyu{p8kWz4X<&~rs<)xN@_~hb00q(k>@G_A@4X+HjMd6?@BPJd}VI`q}2(RMQ#`K#JCF-Rxi#jhL;l*7ZMB%4Aqy`G=j>-KWOd(dq;jzxH*`C zn*fCuD6AUf5%CyMlv$QolIopW8Csl}o*Ix^lu2?C8UQ~c~E$LQG$dQDE?sjKx|^l zufpW~awDXA$g#8}BOg?Nd8bx-!s;XvLvOj=hGXdI{s1V=s}rBT(Bm}xikpUWyp!5YdoI(aD9`~p~;t>>9 zFylaMV$ywu(xUJk&t<-Y8cU$`l?aPR=hUJS&*I`zGO~c8f_w-lyh2nLh4Vtgt3!2B zxPscEaFDy)Q}a@b5_9|#b5pU_DxmNJxrsxKHtGJ2DkQu>@dpbp5Sy5EU!b}ud;yZX zP{J!XwJ0+&$FDRuiKI}w-J5Cw3a=e%i^3(K;dMg|Qci%}1#=@V8Wdiju!>NJgqH#X z1A}vF5vW<1oLG{I;VNpUKO1#Oc!J^==0*_P2*$xdgWL@Y%MVa@gVGUEIy z3p5sm7pN}^CuBItU7)a1&_uWk*3bZ%LoUAe`LYokmhiIBToeupGeYKq+yx4&9Z2qS z$t+4uF3B&d3@$0k%u6R^1Xg*uYyUijkYqsNbwP7c_y>bU;h-=>lETUaxeF9l0a}Rg zDoM>rElI7Qz*P(kY`+^G$T5I&8N^ypIAv%p3TMz>6b@oTL~)ZKcY(s{1(Lgb9V2jS zAW|lx$%K)MfrH_U79>A{!V0Dp#3rVE1BF$CHX^(ViZb&`5|eULDG0GV%O9QcXyG+O zdr`Q7&Z2OTyI^j_MT5c%6jl;C2zOC4y#8oI!V46Ca5rc#3MVGKKw-53$z7#+pmt<& zVh#o2waP1sUjZ$=PUtKOPtb*=F}NFXFhJo23M&s?+Ju*mE+o7_@dtAPh)qm*fx_wm zlDkSv(kv(lDzNo;x6fRlgce>ubQgtB(1WBgup&GJD7-*nRiQ_l@QTrcgcmsepzZ*% zi3u-oSm`6&m6TgRX>c(-T)JLY5iPtl^cRI6(1)fms2g!npzs2P)e0ncQ8PdG=tIH_ z6n`)`fY`)@mw^7Fa0dfKcx5J?t-}y7Yzz8 zP*@q5(I&h^%pl z8*$N~@B)QZf;nx%%f%cLUZD7cxdFr`W*h(%RzHy3RbgUa;Fyw9lv<2+hzMppUi!iu z&n8~9^d(@iD13zlB#q(K%)r0^3NKJtO|YO%c$HW{!V46CFt>o%#LTyW!b-yu;jR=| zf183-R((P_3{-ycSR%?V2g^m_H!LA(EXc(#IJK}eH7^T*d{Oz4jSYxP*_D+A;K#)B{LwgsHBpD;9>~e`g9(8`YNzm6wYA{ zNn<#i0~ZFl3lvr#klY2Aq>uqB@2^-v!V46CFylaMV&>aGVbx)c2(Qw-%(VQX+@RFr z{L-T2RI-Nn-|zh+fL?wruwE2yVFO8HFgN0&LE!}oD+L>byKt!`RU8yvEH;qv0>vLp zKZs4tJToY)b|AScGl0_4i-FjLl{Q+I9nFIlUJQ1Sej3PKgv}V5SDRz+X0>vN9Eg-f9jDv#)xeF9l67~pp5o$}~FbYNZ(1+X!=<{s`_KU(N zI6~U1D2lOgK<)yC)dnPYl~fj_>Sj{5_9Ol0VOQjJMWA*)$odoZkTyPujSqv|1qv$< z2Sj+4CFYc3ueI=*gerI9;|5M%1^99&29UcF93bfn6mF=hF?k?&fx_wmlDjZfktf2z z!QgPj0g}Ez;RG_}hr^<95Sy6xJt(Xy91-C~t#|~juK>9Pgh6fr(I5;9HxL^a289D9lDnJ|i!+m*^Ye;J ziV`#PO0ep~DK|U^-#U(|VNu{85hXMIy zB>viMyrJmhaywiXg)_JlpT0n0W#NVhFG7BS`5PY%olkR+af6hrpnM2YAK(Vblf;Yz zfWqnmlDk0qsewVM{)OA3aL_my%v~UJ!QlpC;K87H1cg36qYb| zg4m#Z4&!5^LGA{HWrimrJd08ji}Ulysjp%U#NK?HZl1a6jn2k+?5>U18Ist z%^`<67jkb6D7 zklckYU%<>JME7mxb^(=lFm<5$n+M*D!V~<6&#$1cO7KC1S6XQfcp)0hOmgU`#7ljk zaWfYmNIZhdwF;0OzK}AGn0N$*)en#!&^!w{j=-S@lx3^P-Gkf(b0aPqR8D}x z%EJ%hE>O7(a}y|?W#*-qW)^3pra;SHs+PL~3=BGcknj|Mx*6n75Sy5C1QeDJpza3M zV}!~?klBQ=;1?M;Z0omv_(9SiLH(dO@LLpK;SUK$!zuvbE^4;xzW77p5fn}!r)UH$3J0-?iAPXatw3@Y zNIx|&s9o0+04Ya6Zh@Hz3ODc6%7D_Mg8brCPpkthpzsn1SQPFMhzKu2dSK?`qhG%k zIgLCX11fhx>LUUn;RRyj!ytEo!s-T+yWs1^J@eA?9g~w&i;GE4XLGKck3dgf9|9MJ zTLeSW7(O?Fs_3jgC z^nSyI;6>pKp^$LIr4J?!axW+h140ntmq5=h^klCe{xg2#I3@i-%NQFuZ)@!D7lDoj;%-Fj(Aft)GZ4(|R@*}GZT@-!-_}=;g$L$VK5Fq85b{>n?%FMd1!n)DJIEIiV5-DJMYj2MUykC`eqQ_#GsH zhC$&43acAP?gEz+XzEDig65+@`EgGaBtOF31u_Q|Zg6+uhzyXsKw(u7jR>#I6x~FM zHb*lsFtDH8qJX~tz9V{3ct9*9yg=^5he7TFg%w8(!d+RQfo0vy;(XoY1u_>DX2h(!0fp5CBzL9eCT8YPxHLlS=Hf6O1_6OB zv5@=-Dpy~C>_~#dBRt)M$|8_s(J&}|fx;>y4iR3NR6O6oCk_%`p!5#1x*-md_K9it zgTjg-9^tOsRM2KZ-K6{!@{b0ntGId}l3 zUlR|RkAj8QhWJI{pfIyA!9PL;ibqgb86+UWtEf0Jr8pB5>g3}&y7M_f;U$u=D4ZR1 zhD$7DY|0~HQ8*~f3=NG;t(r420pLAVNC*R`g)MCC>#`K z#H24!SS2JP!V9-ANRt7DmrEk5yDAbFg@eKjPf&p^0fiSRtbWkOT?}{7+y$}}6lTPP z7bvVIBq72JI;03Pf^3|AtECWq9D7C5qHu>~NI5~sU{H90!b&3<;jW^TJiKc&37H9! ze;j?j8`PfQNrv>CKq(QL<| z9MJoDE7BK*cVt4slaK)*cZ0%GBLm`YP&}6;6;tfA(=JN>pnSoT0qIW(q(jO-2arAK zi^4;kg7Mk`au+Bp4}jD|%bDWL^t{B9(xOzyoOICnC>gnge1|E|Q}A;h$Xz!w7KMv2 zFfhQ}^&w+XI4ImOb)brX+yx4&f=ozwfyZrO&Outq4T@j5dr^%biMLjEu{9f#4w!pE zLZGk&(fBaPy`V7U$bz^R6u*SR9-nzIxzo-H-stI0A!||igyKcv$ZmwGN2fvV0)^oM zBzKji78R3v-Ws~O6I%_pGcQ1hg7U$RtVQ83vLSf_A%mR-au+D9EV2>dg!0at{<%AQJ+z7lnh^_*>_Y{WGAjx4S21}< zw}7mK#`Kg!~E$FHl$o6hOiYlwY9x*Ri?_ zRKG#eUua%tVQDJ4J56Nbh1EgpwlWG9g@fDxa(6?)qHu}AMd6?@CC1&Luw*ENxEqvT zpe{l=ISu4qLS_*w4_XKGqySQmgTfc455y*>{R#@>8Bq6v@(VOwLY+)cOJIjvF( zsXsvB1ae12>7sBDJ0ufwzAi`%8wR-x6jnD--9?r2H9`H~J!tL%xd9Yz#JCF-Rt05< z@FJuKWHuq3erw4>^zprpvPI!L$|2!JNIxjNKw-sEj&N6LNixMwo1XA_p9)gC2c;{J zTNKJ6X$-{1he7TFh1CKiccnwla-_&@(fPk`sUlena~DVm6mB3I9|pM#6jl}$i130| zOepm!J~Ob%)qH;Q4%@oQfC}Qn3lvrtklcl@eS*ym*u*^7`u{*LCtg%63OA^Nq%mxI zki|gZ1q!Q-NS&Rh4g3wfLZ*^Qv^#HSY|2XZec3^zdC3#y+8)wLjf zgzy9DsmbW;8c$R$3ja|}d^m!_(4!g>jv#kYa~xEs8d9Hw(i_Mx3DuCaM@%~s6jl$A z+y&B44GgLWj#MuS2kmczxeH`2DBR$20usQ2LGcI*tBM*#coEWr#TX2s-cuX5q36>H zHH*SO)Iq`vLj#%s$X(#DsztafwW1`C+T3lFa199DMo+$vt=}`3!lVDac(1Y8Qn^)GZ1Jg&QILAa@DWE(&+3LxdM0 zJ;cf*?=uC36HFg68zzQMgWLrQs~bq}0>vYaWjW~Daq?M2_p5>Cr(p^};RRz8>n>1O z71Sfb3#onWlUYpOI-6BL)3VXieMkMG@Qg;{(-$bLI2sV{f{yQ#?IuvT++48zG^l=h zQxBQ<0_8)HxIzOYPeR9-aoPcjM^IQTKynv+{0&}FflMR~!^Zb_G(hT2n7b}CED8sO z8zIv`?gE8XKqDl)@Yb8K`3ORW;*m!m--o#uqy-d~AQ~SAxfc|MFQD!P)lY=N9-nzI zxtk5;7~}g4O^d=KIwA23Q-_NNxeFAA4NZ`61i7n>TI2f;h=rh_d;oI8j3!8)0I~65 zkh?%(CDDv<7d+kJ(?~!L6px_%V9*RncQAK(G%pGVg&P6w;PbISVRZuPE_~?@GVVsm zMEvrwao;t~kbWr4y$_lfg@eM9m~l){7$&qJ!m%VHvpBRMC9wqC0&o1zfy>VMZoVHB zjxH^z?y6{66b=eYLY*T}{DQ*p2a>z;QY%U*b=Q(F+4f8h3=VhD+$GSuC>#`K#JCF- zRuftg;Z>AcmYceAK5!NOAnrUj;usYMP&}?^T@#{7#H2rPSav|%4Jwb5i*j7^N{TAs?Q_zTA4AL3bJ0u=3=Ch|A>*YmcY(qW z6sCmC28AamELWhpi@-1|$auWC$bYslXdJhv1L7`FzBtfxI-r*yzp8` zf+T1hSEUou?*rvim{t&*nE6&vSlvK!7reQI)USt`Nh~d881fuBzkC zuMh3wbwCunAa^NrL(&&0++gZ((I9t$!fFAMyQmdjpmpXjdqLrZjSUk+r$O!lg_T7Q zBD`FRi*FoLE!}otBhVmcu|n7;8uamV21M;7+~%K34y{5MB~FCcY(r+p%39Mm;Bts z%)9`KQh%zVCdPU*iM~bQ8WV{RFHl&`Kyp_BK93M72QmXW9zp2}q;*3dB#nXC_%JBE zKw)Ljj|eaFZdyUL1!M*`cX{+L3I~N7s%lIg$X%eYI)UV_LQG{Oi-63)=B@|*i^4%+ zM#w;ryFg);FaZ%>S%fqZArCTx8L58dF3>s!Y~uLL#wN#k zz5Wn-d3#{uqVNxsh|dq8Fm#v%@h_;oSe%-Q^{fPJ_Tv&uKQ(10@;nfz+yJSKm;@<9 zKx}*%6po-Uyn*Ddf^^U!bETl$NbzaKEB8+<*BQCIg}Do)2^4N18XpF^3lvrblM&$s zsyE3`aS+?qAMRU*9*-T97lj8*B|f}BVZ|{8;Vw{F2{D~~5@ZH)`2k8-Ak!44K++h9 zjSqvu3lvrhklY0-lkn*wMh;{KHh1lqvM3xBZiLJLxeF9l7E=-71uDY{=_4c$G6Ok% z!NLoq4-{q~8XpF^3lvrtklf{*Ukd8J5gMw&XDoyM^upOfpiV4Q6{y|+V(OxBgPFv~ zBPgsgrXj)$Y81s3hX{j%&ooFs36$PJ1~yECqN%XhjeM^eC|nC>K>Aa}x*rs#AE53B)mIP~Qci-x zm1E|ja9IWh22ec1OhjhG#L#I_xProT!%W=a3Jx}uP=%Zq>5p^?Ik}mA=1c!9%e4#Hi?=_@fO zG%pi;PZg-=2{V~6t@P~uIrQ}v8gmwfSImW^F+wJQ!V45uE0ElUmc9~mbW8IxNjwJn z#C>KVE(Q*Vo;i^40>vN5EeGa6;*yx~5}30n++i*vyg>S?fkEplBIYg%7iVB#fVm4~ zE-2hUG(HRpFHl(hfVvA*bz_f5h$*1*8J|2v6=CvI`Sa`O<%qz%Md2&vLBf-e2_Sca z!g9hqM0jG4XA+B(8>d}C`J!YVB%VR(4(1jRo0xb8g{8)Pgu9&cb93|a$SrXpw$~X% z^2#Hv4+NDXAQ^}Gkh}q6G_jP#A82x)+r0 zpz#YW@5oDjFLuc1Au>f-}?eQd3+KOA_&U42PV?|1OMi z^n|60!Y{0Xq&*zk;KHEr0)^EBBzIA5eGO8*1qvsSr9YM~3Wu>ld|VjhE>KuiEJK7B zBz?hCA88Fts73FDZbX6d!-Qpv!j%{p7+`MMv20N|DBPgRa8e+5fx^mSImBI{{w*|p zLCO!f^AMQ>ZVeYS3z9<|Nwm2OQl>oUP z6sA8g-R}x=UU6woVo7QWhATntPfjf=$xO>kPAo|Uc?oJFY1Ef=CkxPgy1)v^`3NBQ z8?0CqeqzOM#D9a~ct0Y10CS)eD@}T{CQ&vFgLr{3b z^nuvK)Q6xj_gD#WHz@xn7v+#0jxf8+Zk&(=g=fM_M0)O6xhPy=)uM2ayI|^Y(V*}I zg(b%-h`W%|Gg5d4rItZYK?N#+AoT{&`JXU8sD8>=y(nB_4e{kIC=6df-3tmwm|2w4pm1bZ18IMN z>Lr+Y$ZVJxIt>a(P#Dfwg9t|~MJxkSIN~kG(9K8ZPhoHgMQ_J#ShFa6!a7Kuimo1= z4{|Rk3=P&o+zSfFRA^~RUdsbw1DB-W2~fH3u@;gZLGcQbNmvVsV-Oo32Du9qh7X|b zLQ0P)t^#ILU}T0ig=y-XCirZFNw1B4n_$K<)*FVZ}N`IAT{xx+rMf zRLnX^c>@YRm@G37Wo4A&#v1*6jnEo+=bM>L03*R-&k?Z0p#!k#UD&FG8-m_PJ`S93af&R_`)kV71q8% z*N=-oRiWtwdiv_vxG3CV6C{n{(gza*K3Q2WL5h?+4FDMKxwj365Sy6s25=behPW3Lj@aA_HIis*O5yRv z=;y3z>|PWev4{Bb92ABtklaPh^96c#L&6JG?}0pZU^k==BqqEBb}tHd*n{%54 zV;>~Ez>4q?Aa{Yns$ef7yddpDircFCK11IcX6z*_<_;dgc%L52^!Td!j4a(0N2O#&Lf$|H?JY+UZ44nqWGbpSMK-~qZ zk1@gvdJh^{+|WQ5(SOLy&kIT|EG1$3cZH41OZ0xhjRT9qKOBbSb#(Wk^Fi(v0EPKM zL^#r-UjT|%klh6bA#n_12Aw+mV-4);s8tNzL0_+O@WX{V6m5U1wLCP0ccpW&jC>#`K*mWU9LE!}o zD~H1ncY(@9X!!y^2MO7EpzAtOK0f+F%7bI* zT+ zW)UYAg*TibJ{^F<@CK5*sCnPio)ggW?>MAP{%``4cZlgPfx@cbBqF@1dEZpXNmO@r zoLm$R3O8cT$pwWK$0>xnsCnPio0E|HraxWt>5T7qZ!uutDoZea@hU7sxzNn3;nZcrd8^ z0)-XBS%kYl@u+J_LE*)~z_3YMcNY3MfyCKG;U4E8Kt*oI`|HX-S#|1x^B6 zcX#{D1)%kMU=C3gUyp4MgL^Aa{Yn>I9Ozpz)ZKpPZNj9t^-|01mlTy?0%a z$7Mn5Za_*OoFhKGKw*_|9uZz(cUkBL6lInrmZXAQM*2biqK)-$(A#en=NE-{T!N%A zkQ?z~PIag$Xwg3fg%ijf0v8sA!`L7`E(~%PD6A%2KngE-K*3u=xU}OG|JmN4 z4Qf}exBzLF!Q67-!lH0cxZ%_Yl>oU56jlxwA@0K0E-Qe$7pj>I>O=C(H$zV!SsXJ#Pmx+Va0J7;Vx)CCFCWTHCSn_oXwu-{ZfU?i^6wY zCO$ua!fFAMyRceBh9Ib4+Hx7vF9nqwFe5;0xTj%)Xf!B&fx^n-3PyOj<|P+Z7L=r> zkW;{|vQ`g7FV_ODEDGOo6;igLIRk?Wau+D9E+Dxp72=@G{563oU!fZPQNtA?wP@WNMqK;29Bo&k_Ee4=YW=dLo$xC$Bfg1Z-Vx9Sy0 zeg&z+g+cBGg`veYhbAVMH_y|}h0yx}?|Z9+tG zlc4Yfg=NNdNO*$Wgg@fFM!#Qwakh?%(H3P|Aa7hXopzx}>0SPZq{K1R^v55&U zP*@q<#0am%)M7&;3$j9sfnnJ%w@CEx^0>Ju{J~8~8iTnJ7Yzz8P*|Nnau+VOq>6*W zYt79?;h=L#K=B9D4`Lgd!Fbqdkh?%(m2eAdcv%{e8D3>s?ik@!0kY#ZB#mKr4MG&; zE>Kwg0O^6Yj}Wqyu|VN<=N2TqK=B7N4a6oUyg*?!;WoDLGBPzIGrXp0rDKHGirb6A z9qvHV7|e~hXi#{8!b;-~!d-4 z!xt2`0rwH{UYwXi>T+(3ASu7mG81_`36u^q?k@`8@Boq~F*KkFfWi?JhA)uaRgjvT znU+b>VQu~dn>2AgYNV-FI3n<*My9OZ&au+D93?4$Vg4&ma#){#V;bDNx0NwAh<{@PK9+ci-%0X;GYtTU9 z2nxf5N04v?xhp%h(g*2iD4201(eG|P<7ak24X+B29giV-f{|Tzyg=~>(*t4?6JDUOn(!DAUIj&IFeAvO)1Dk)1f5H{;xQyYfYKMt zFp#@oY+N)byg*^)@C4#6eE9)f4jUTj2DnAwGLE457NOX!=;d(4lSSb#o)KT(fx_?x z)V-i|N4@b)7P$LC^}>fIi^4meLh1;(1P%r$96@1N@Dvh`V0RI^lo5wn$il{N7#KkF zAR$j7{TfhM!Q??~LRNs>1qv&UX9#yCmX>4$C#I2K2!q-e!I#ZI?G=S*i@@i#fWiyp zE{kW2!a?o=vGHM$yFg*J1L`hNx&x;#wDWC1;}5xs$;d+z_>9FVH<|CE4Je;nfZ7Lh zFGvF@jzKg&4010h3^SfX!V&IXLnB>ZB=>>b3-$*npCqM%4_hX6OakPNo92HU(ep{e z^F`qsUJ#!iL1D}A0^(j!dZbo+1-V@S%C{i*O1yyNVGtW128AOi3}+y@3trEX6Hrjg zUX)8e2lZp2Tn3oCKzvZRfoOafA@e-28Kx}*%6kedPs(1wnFL-`1 z*M;ndhc2E2<%itF!LgSCX1SVntHdy2%lAuQJR|(0FUan?>OqZ;4NLps>1u zEn=stZ&h5+RUSU7@$4k}4< z$+xPW2Yf#@%uS$hT<~^Lc)&YI*#Z;CMT6W63PXi=5ch)e11`0sii5(@0%|TOUSax? z*)TD58ssie7+!$thlit~kuE5_oDw1HBhbSUCXQ|%A^udqx%KGf^NV+j!Ye*O(j+1M zAoqg8FylQU9Fr2$J&9ithuwzu8FM(1&#eN*D@bL-dq^CE*!VEWU7#>z_<-UrO0Mt# zTle$)Uq$3|??CR7_^>G44gc zE;yi;-D-c9#E-bXh5;0h4?aTbEo3)Bm19sKcY(qx;S(afFcgs~04hIRK0)TMLFo!+ z42TW)I7|?Y2Du9qRzHy31uJhs`$otuCqmE9{fu5t2z*`?UhtLp{0IuG37-++1zJ~4 zX#(5+Hw0vK;qQEpmJi#7f3k)3MY`6H@++i2eFAMCqQ8p@f9_^s1c9I5*)#0n-sFa!?m50K3eWgKeEI@~RmV4^@G8oo zG`JY1&)9&H?m_tw6gCUKLGmPsjSqvu3lvrg-%;E}X|iYdnQw=Z?m_Od_zp?;pm4+I zCXgJ+U7)bqf#fcbI5jXR-Ou?BN%x>|0-1T?`=W3Vo0xPD3afx0DB(qwctlS3Ah&?r z1;Vg!1F>;oPIIU!VCg4_>Toj)0oA~qv3af^ni0~=~ zy9acd82Q0=xIc9>a(NHRhoG>T@e`6KL2P^&6kedPlK6%0F3OTV)8&)zk;{9Ky9|Co z(mg2L@VN;j2XYrEtTrII3nWer3`+M?enHYbD4alMp7^yW9KMF01=OzuIpN1|;?ox>tSbH> z!VBsytn14_W)p+kKTilp&yN%SEDE>y56P2+%m9TKIIR96+(o^41H^sQpl|}YMdR#`S z*mWU9LGBXxyC^*2A0)g$E9B7Q5!rd5{&;C#K~a85YH|q$N0VIBd=EYswc;P-z7>$W z7yN^iBcL!vxDY!F~ryx+rM9GRuERc>@Y> zm@G2?EaFy8@nKWJPAU%11}CPdeo1+6gg1-aba2vKF1dn zt}wkIHYmJcd~7txU7)c2f#fby!WWyFATgmoX~m#;7hql-E&{rrLJC?YF%zFoL1DFm z84_NgbP8X!juyXA_u?(DKyJc^6Z#fmoJ(|od2#p$mc`&ak54a14it`{FmzynxEB<^ zgw{BK^bx`lO(u+>dwEn?An~ig3`uhlEQ`ZIY+}ksP#E4oau*>xiIoS9JMCdv91dFN z0dfmWA1K_28FvDORRJp^yaI~yD=I;QPUKYJP|H&${F#qlZg;RQ4i8|5gcnp9P6`x{ zps?a#L%6HJIUunl!v}O}W?pegQDSBu>C4zcPxuufuhRjgD+RX2;XBwMX$+@>pb{W= zfx>D5lDi1yZKzhf6vzxv{I#$x4hOB~0EHDy1Bgv14TIbT3M&hCr0@d8V?cgRW^yIW zD3a+_HkTbh=}U%vaX1eH0|O|$V1|I)1x_n?>;Sn76jm3I+(k$a%zS+GN}J0E(9_oo z_Ql~6oW#c?D6BF#kirWbR6dD$>7|M3WUewvU|djw+|LE2caT3CI3Q^s#Kwm~;ROmS z22ON$;nPJ}F6Zo~M0VtHb9PAi1=0x$HxP{vgWLrQs~Je{0*wPh?`Hs~fJ~B3REF60 zu4VE?^n2Jga4ru2!9{#{fx^mw3lUy~@(RRe{3NWr7vX}G_n>qI(&51cNn^y6_n@#k zf#fcberjM)etf{SI2^S87UnLHxu9?Z(fBYZ9zkJM!3_y7P<;-Lyh>1EUz7`8Hwrzs z3Y$1Sv$4s^hP4);=hF$?i^DniAmNBj53(4@z2Gq9fw&h`pBI4hDN^GDSp$*m+yE2Jdm^pV&lUgcY(ri1%|rD)2+xi^vZMcabxPKT&nsH01mM%AX*ASnxygDu|5_gTfIMhC7hl zRS3%o_%srbvp@9dBrjr^iUH)V3;dA$017t(+8IFZ0)yF6V&Y(xOasm89{rJ@3wxMLM?^HV(=lNPIkk!m2?K5niFisYQPIC7Bd# ze_-flxM_!;?q>)t4u2p7N&AF+2?{SzSV;&W+?5A*Q&1`;tI;pSg&kvZU~n*inhOdi zkXt;27Kg*wAU-Y(au+D9PC)g8$`43b1*N8?7NzDv0}V7zms(MflbM`Z5|Ua$ddCIo z0MT|QY0!G$HA0Z~IIHkQ{QWL^{8k7r z4tEeGJ{&<|_yfsZ`AGLj6YUT*g+`r+T0r9;cZ4C~1xjxqB?2Olv`0*Mfx>En2qL^7 z>CUe-Hz}38N}hp%;nT%GrO4|ELGD^10x8!(;RbReJ`9RSP*`b*BHV>fJt=a?>ybg> z1k;PmhKZrmAa{Yn>Hw0v2!%1a8QA#t-NhL9uiOw_96mz|5|7yQAd7+A1q!POF+_M} zCYn-uOc2BEHSgtQk@w+?E)FjcTO7_I4o&;Wj=;hOxeF9lACTN-WB?isz@nH0A%lby z450gkuZTg~YoM@#X$P^1X|I98szV$RUS*lZnUtOO#K54%d9qv?ExZgXi#{8!b(8`;Vx>17mEZWyg=~>a|4J?On8C9Y6p_Ll5z_uPG1j~uGdvW3$F_j zi^DS{A!!WeMqD%~yg*?UAW56>GLeLY7byNj})X_ z1-T36MqD%~yg*^qAVr(-N|Azu7byN1?$PizCfx>D7lDkThiYav#!@>8Q_Mm!uiu7XedT~%W5AxgzX-JtL;uMV6 z4p2OT!pcJi5nlNPC7Jnoi8-Ki_rd3?f(#@PTWboQ1Ko$BBLf+42e~Uj29mx&;YP@8 zkh?%(^#I9TBsu}7a?m|1u>91q!qYuMh=Dc!AOt%nKkkG37ldtT+@A?t+FF=t^9eQ6$r!_U%24-0uK|mxAKr z@EwYfv`@%DPSP0abqps>nNMuZokx(jALK6>rnMb_x;i3a7x;Sam^8+XhJya3l2%4`WCl4Uowd~yqO>U%nc0uk+P=(|N zP*@_X#l{AOBPa|XAh`>hI&#E7>t&CqLh=JBoIqy$P+c4jViQw8fx@an4G~@-{nWsq zaxF#;Qa^#*0y7g7ZlGlr&^c6?FbWL{FK}3?Biu!(EJQH?2dBMPaUXg<)lgp?{y~HI z`~V886-e$XN-YF=2ZxQs3Ac4Cg3o8@QC}R+&cMI`DmOqn52!=R5Re6)E+7%?7!+Ot z>Wjl2G!WrcoSB!NlL`$rLIpNESIJ6M%%1A8EfS0)-MP%R$)ujfYex-sIq#gjJcaSj_T9C94V&lUgcY(rc z2h?5o>H)|-YM`d4M`CdXK2veaRT~|#MqbwrbMFPM#o?gv#H|w|19C4Y3mn4>udv`{sutO0jzXa$));WXnFDU#nbRl^e#Kwm~;Ry=M7f^SB z;siOoU~U7on_%vBs)Sw&i_c&ja^D$RH-pOQGrEhz`9Sye=qwIr(1VoIpzsWWh6ye^ zK<)*FVS^qb9C27hvM{KePSJyu)1dH!831AvQ%-}zP(mN!E^OflGm}_a&bFCHlmWEj z5TXM#Uu>YiIQ)PS@$m}^s|`r*DlSbo64+(=@8i`#?us!)4X+7?i^D--M$9>2;IJ}6xT`ob9TbC^MHHMA`6%M0KFD2P z(A=eAv^X3TW~N}*<0e4m1SqUlAi1kF4|GCVeo`3}q0+9?BCSJGpI8eSlmfWnNx z@y6hOpMcTga0g>Vco8b|KxPxd-x-=WqqpZGj2DM@m_YI)A^o860)^ELBzM8ed&o`~ zLMC9BZ`c)i33=TTsN4dn{9p_z!$53&800QcSQVHc!VBgueEJBEiGc7Q}}aD6AGBxeGks z18HiIy@zw=M~662JEO&PaX2q%pOy)<&NhXlF<2VLWdSI>Kw)KJh6peCI1B}y2H3b! zfElE}07~zmpv^E_91aRM5E~x`xeF9lFQD!MwSVBwp~JWl%)Jcei^F%ALc)}gdqH8? zV2%h!T8tZk+%>}-;vP^~;&T&74it`{FqE)BxC5y&kdcY!b{+>rVtAR!D43NKJtc~~OCi%=fIFa(Q0&B31- z_n{cw4exq+yx4&2T1Os#e5#9Jo{m}I9$UTQnsNu0t*M^E>KuiSRuj- zi!!o=K=XMqR*>`s3M-Hy6RZ}8gV@BRFK}2{Q{P>n{>T?JcY)jn3O8ch1q!PbNbZ8v zn<=S9_y*`e7U01LPbct!>VY0>NV*5bBS`rHYe;xO(lBm2K=CMGy*S*#1`%EbMfoYE z$)L^MAd|?$_h!`}Rz+G@3v*Y54J3^bG8N=5P*~kSau+1LipkhDgRpI;^K3rk`8<%j zKG-Y{@337Q4hl1bO6)9?%nY1(jbRwu{3-_f3Jq31$L_9Sj|lg)|#r zG6)*vE>Ku;*dg2n3ok-rtq4;vSz?wCUxLO5-q=FMaY5mwU>=d@sQ!6jzc{?X0a6zQx%dTxmKVU* zU!&UsibqgbWjG+h3tbJld{8|4I6&eN6jm^EKx|^-5foMojtF-pReGnAzk?HE`oXg8zg<<(+iRVg%>ESP9V7p)Q+a0Y6Ka}F#X4! ziJeu3OY z$aGLVg2F1ojW*$B;|2*YQ2fDs0AdqU-h;yG1CqN4Sc)LkL!k0>f&1cc3lB)y3Rj4O0df~8 ztQ0&D?!uvzWMNP}#Nq*oM^IS73;?l-N%x?z+JWS*qSUhdZ1RVK!PXxyw44TN=gjed zv~xh=b-`nCc!uZVaFDx#Aa;QFsDd@15uoq_g;jtjZNkgM6B1sa_=8yuViS|@L1Fa* z$z7#+*?IZpc`#$hq7}Dt^@GCej3*+z7`!0m1jt>X5IgXO7bvV6yl4|%DPEB90>vN9 zgCI6B?Ho{8Nq8gNMJVoJ=HsJZz3|sXZ|4|zFAo3VLwtS&h1CWmcY)GctgrC5E~x`rF&3VdH5j03*oMy)WqU^vJ#s1F1AWgJ*49U zUH|X3I6T1zlDGJ?mk83h38?=FQa{0$_;>_|l^?=ggu)nPJ|X-n{kjbLytjtm;&6!& zNZKc)9~6(Euv&rSuF||>if^zpTyj<(G%wlX2Z={eIDy=9z;AIlh)qm93ivG!ckoAq zS9WTpbAE0?QGRYF*$Y&5_&dA;xl6?#)m;((i^D2Zb3W`Sx?-4dB+-BJ&tTl+vLR$~xI;LkyeDKB$X%eYG6+S4S3zn~ zZe|JSj-%3~lA=_y<`?8_4)ucCIUZ1RLG@xn=;H7np^!R~7H$nY0|NteFIF(J zt3d1i2$@B!JgEP6BovbFKw${e2VxV5UhujZP#9K(A;K}WA~~ltB{c=b!7xLKq}6kT z&Va&k0@PekIIakTv=>3{B4i9GenDZV5e{(|X#D^^!jUH&5{{twhPe^MCZ?VTh2a6H zdqL|^vAGv!Cb6`1qSq1hbK-7 zJWNb@fx_wolDk0qsewWBZ&xB9^KUSBfy@Pk8)}?@L{Tv)-GRcYBN7o_g!G`AfSqTc zniPWG-&_z0$q&eG#I75%&kqz<3Q-7mB_)#Gtc6>X@vKDP1PC&vGA}^r0J-Zz)Z%c4n8o3+a6`yq zvOw+vg;hW_BD^qFktYIL*I*J2N%x>|0-2H#y*M1iCZ@avh1ClhxC>MdoI!IJ$Zeo- zBgS2zuxf}wgja521;z3BL69+(8EL#96pu4vAn6_yULg13!=QKsg_T4s!d>{(lOhKS zuRk%6cm$;@xZaq>;lz|*ps;$;k8qc}UucL=Fx(Wf7^bz6D+NFsfsu6Yh=qg~k`PWN zHQN=)>q`xwZg7ZO91dgSbOiJq&7fe%fYPL#%w!6taj!47`G;I?g6uvKw>bPp{Niw8 z!UYr_x%nxjIpl5xfqHV=g?~qwk;il5AaN29zc?HeCQxNKDUdq~z=7dfQIMaPO2!e+ zV6$h>tT~5#P8G7HHwNaCO}5iOn4x$&155 zVS-01SPJeALIY}G)wqdJ9PXHqyf_>bCb)G%WI*mng_azY1WAC&aaU~NA(65;926!H z+i;V}?w}+{0&%!wLCWHAP?+F$0YnDmj^zB*w6x6ROtK481_p-P=?ovRg@;D!;&4!y zKy1TJg4~f`l95^zP?VXQ3YuOcZ#<--f@cZne9H}~koE*DzkqB8g$anphb0*p82qug z1LQtz;`q$MCRb6xvjn*x3aW<#(iVp&q!VAxQnTN=B@NPU1JySm_ufc@)IEgq1}Hp0 z>ZyT2{Y;y5NIw(i4v@K^a6t`okSHn!xr2}zR2|rPHf)!e(CgtB>5Ib~G9lrCT^B+W zi};a zF@W45kqv3fgTe)$8$fa(cTg)lK>Hm*W`Zy%96&S(BeOw#Y#8JYm(29k;u27ugG~i- zVo&DuKSoa<8aa!@BXWt4mlUu&;Hi~3i_uhZ=B%{^jYDn7SsX6Kz`y`XpCBa{av*6H z#Kwme85kHK;Q@CC(k?T|ePR%I;xmP?9DD9UOHjFQk_%af3Uen&Cn($?ZUFJHV??}R zcPDmTn4-_K_FMvm*MnTh{yb2=2C4dyOI&z?+6&lRfN&qkH1aWf?p#acb24D=YsiD7 zEkY)P-9d%%gY?BV|B&kgm^(P~7l(twidc70TJ+4&YezYE2;`0l`HRCf3Kxfi!h{%i z6cAEGggnR$ZBj7K<^? z9lSpuCSy4KZ>cGmz5<%pDOWi^D|(6 zD|38%4ZS>NC|?{tqk@F|LW6!WsN4WKyrUdahJe`kFep5zHP4HjK49(;s8}2h3Kx8C z0Lg*e0ZJcP&HU%OIH+c^N(5?x=$F&yn4PZa<6< zaz|Kd5$M=sm=Ia?#8$)g$oT~nA0UGqsv&U$V&lUgcR=$C`Hc_Iy`#x9kE5hhXjq)6 zUK|b!7lQ79m8N8;QpmUoXg!xs4dk2}Pvp5_SCWP_=C_M1FlN347djBmo z(DC1DNZJ7D2Zaftbq*kRK<3#fiWUa9gS$4eA+2iwg-1dy#4R9qfZT%*gWQ2no)kGy zcpRyPga;@-V0uApLgV3}aTAz&Y&1c6CI*I$)qdYWdO_n^ps|q&sh-~r(mlaq0;!(g z6H+|CKdOhQ5ocgv0JRSiZh3y6a1){iq!)yLLDh&s)jYWE`Q6|)s+uWKHJ~yAWLLmR z&+iM)dVXg(>G@sYgy;7Q$2`A3fVzj1fq?;}h9S%I`-dDFQ={I1aL`Tau|!mI$Odq8JBfb4SE<@r5fH$?ux zPS5WGJ3YTMulEIqg)-D%26H^WE6n!%9x&7Md%z;k?+r6OzcWG20o{cRGUvb+&+i4B zA?ASG2*S_mAnpO3djV1tu+j5-!zNTUn`$6xKxavT)Ht+xem7|L{LWDC`TatJ=XZm8 z&+n5PAZkG8M1uTo@ZR(Lg*TqxKRoyRF7Vp(yTS|4??O;D0t^fcAT_} z9nbF@?sjs)v~a6R&`Z<1zJjx&qHH=J1|5F!-znHi<9HbUG{y}^Y z_8`;#1~T>SAXDE5GWBUpB`Ges^f&7eTZ)ND1S5rMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU}%K^XgR@2W(J0G z+k!9<`#@SMmJ4YAK2>OO@Ghwq3{?=+3n1QKI;YVKBhwph|49TfsVNm}BOuka$B17lt&3{4iIj{7h&%n2-VS2XcJW{LKr~_>vdKkdhi^2vzTZ z!#o+Ne|e$m4iuo;3$kCHAwNuvAwNtZB{hs4s%}FnraDlhEP$r_3WoeJQ=@_~gFIAq zAT?9|=ZC34<3kN<-h(tubs+zKftshyRuFc!GC%A>FJ}08e9sG$_?{Q$kenKJq8t*x z3%W4Xf$|4PT|zP>%s~5E6*i=XS?pOH?(k|WIG=*t2NHjHBZp>>LG52 zY6nw{Q2Rg}Q2hYHAU3GQ1)@P1BnHADHnKQ~57Q13Pk@Fyh>eUZaEMR9A-)2K_yHW^ z9ETwBjcg}2Hpso8GYVcDg6#bTsR8*PM1!yb4s$GUhzH;h&%hzxfJ1x+4)F~*#82Q5 zXE=;M9N_*xyg2;DLCE@7kpCrc=rh0}?tw!*0f%@64)F;%#8==DKY&A=;|P9#gW?v1 z;r>6eI2@D)Kw=>OgJ=*|z+sLB4)FjS;u$!^8*qrvz#+Z?hxiE`;tWUehXdUIM;C{` zIE)nkIP@9d5cj|#o`6HV0*Ckn9O5f*h#$Zq&T$OCzd>;e!f^kC_Wd70_#Y$(!U{Od zvA`i7fI~b3hj;@Hage(}7~}?Iyx|zcjmTmk_6Z!~*vtT_hv6B=7KelC6j0uOaTH>9 zBLf4&3}~GKuG5Y$4u5b85}qLQKp0eJg35nby(@7XBJTjDJ)m>|l#YPX2~fHLN`uS- zo!9dMR9~M!*xvz_p8%z2Kt&u1eCr2rEfs#2T+>f1jM~C`!h}~ z4$nA_u%81eF94+_ptJ&%)_~FmP}%}YJ3wg;Q$BcOBwlx~31F#EyhPaxUf0hONs zrDs6t1yFhgl->ZPcR=X_Q2GRvz5u0fKxvSDFbqlq4^BYtz61Fk6b2wMV%mW}_AL%i zKx;pM^bu+Y8th*jJ_CzBLhZne{fomdpy>m(gFx*rh6Y4i2;?_VI|+0?5=h>_7Sd+} ziG##IG$?JG99SGqs2vGv#|S{v3)mh81_lXedjn(+ItHCZ1j6Xzg!l)3WPJmv0ktDR zZC3QW29iU^36V>}VPc^Diy-{s^y2Ux5lg~3PA?93IK4Q$;`HM14W}XL9K4Se_?nj91c>0u8&aq0kw@m zYS8r&NqE7gV?g zi35jgi^E}Q5M+kJ@x|ewaulQogcDvxgZBo5kiTJR8YBn9qN1Xrpgt7nEH;=J$Zi;$osoe76g~>=rQq?w0L4XMKY{!OzOV4? z;_wP3$UbV&y|o8q7llta3-SL1MM#3^ZPC|m(5{vaD64l`GyU`e_3@(T#aA0QzAfPg&1dHn8IARzBRKt6$hd;|5RhlMfZuUqC?q00H?21mqbm;}0JN z0`d+7K>ml}16QE^ z-}8&ZUtETS326K$ZW(D)8$`~Wn50vf*njo*OApMb_+fX3f|#y^0@zktSPxIw`GHx`G#xQ2*-0W|dr zXnX@Sz5^OR0F9r3#xFqQH=yw+pz#-=@i(CH51{ccpz#@Q67WCh?91y&{zp@Y$jABHE~g!I8c zasT25#126Y1_lji{|2OQ6px0$Xb6mkz-S1JhQMeDjJy!|$iTobL1s}nc>M1%q#Xqc z1&`H)*Vus64K+N`5OVJY$lV}6JAe$u`gZ3*R>jm=#p!*q^AhdE) zPJVK>p`{VBLNxZ8P>9>6On~h10GorRhFmT@EN&t8lHfCo6Lg>t69Xd@;!`>*H%vnS zbb`@I1_p);TQlM3zH-zr1)l-7LJX2tL0;!jNc(!AqcjY3Ucm;HCE;t%zxe-jVPx`R zsq7$-{9wS2tPBhSuVlW1aD@1ha1aLhZxj<30*ovS3@={Fd8Na zZ~(Oj94>%Zn0Udu(l7>SJ_7X*K`KVqW`IIr6px0$Xb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQRO& z0f~$yqvtgYuP7b$&1eXWhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#^#40?;!N zB%m}&nu$~l+P}a6J+A@824To~4F)EbxXgIGIJ^gXP6JE{NFR(%5e>cX6Le<70vW_U zdwgapGB7ZJ_TFD9hMXM{BLdMU5Vj;7wD(jJB(JLsVP|OMn4w;X4U~DwHz0sz9FBBaOeDs z|Bn~`j2cwuB0wDuN+YCVP<%~fU|<04>+wK}XQ+{6Q=s$((+pyR>`6c}UnO!0_+DI) z984XE2Du-Uo$_tVVj0~^H1R!^V-0|Sl;&6OMfYj||U|;FB_owsGvD8D>eXlXT=@(U=QIGUht21Pt5AQ$ZV z3ZjrP==>afaXBhC{6hegUn?0H7!+Q}ddg$w>UL?ALpXwHtkcyAN!1J6xW$EZ!StTCtWSZ_Dxn7s^{J)d!EZY^Wq={C#AXr0>NfQCh8`FV|;dWqYYwCiT7qDOPTK`pO}48Ec20)`I{|i)(^KwoUPrWu6X;w&&N7zkLHTVRTV~^$`pI= zr=vGNV`JsIb8RYe#~-J>J62fp-_u#>l5yW{M;V4IKerdZv0tHa+i}N&&Mt|W))i|H zKiE63=*XEAffw&KNrkVvvhumx@d&B?E4Hs(=)HNSLa*}Av>D5MZ+~89^RxB@-*2hz zo&UTPGwTAf(-OD+6LuMblSQD*uf7ZIjt?P}wKKQ(Fea`b;COq$OUWWCIvmtw@&vgFz zSnAZX9RZ?jnE~;hch%js0y9_H#&0^I5+IQ+5+cb|ex6m5_ra9?F8^+>TRhvs>Bx&u zo|`NyMb=JIUi0Wgww5A`Zd8`UWe%A&8|rEp+?>D9sMpK5c469MhV%%t??2yVh^$?Z zdN1#>Zh2tZKA%NDBewZjJ>221Fzet_wfJY2M>Bel*+rdV-f|}OZ@u|qU$H68y^}=^ z7nCorGbj>IZrrZTykS{7vtN99%11xf`=@dymLwhh!Oob!dw-?g*2$dZX{8z-wfZ~E zJA@2x6;)dc>G9rSI`{60SBX#fyt)@@$CVr_53LSdt&#jx&-mhM=EB)89j;3GUHM=d z-JiSnrC)W`6W4jBnN}aSJvI8#d;i}?A)QBCuG^g7dMd7b&t>iPrz*Z(cV2tz)QPJr z=Wjdum$zu%P0gieGs`bobV`49GZXx_$v!|%W&2Kzax?xpuTs{fxtjNXEIuF4_gRE_ z4(H-Or<(p$ewo^q{>*A;zvsgV7vx?!2MZRy-dC`xW1)xAwl|C?k3KjV`rLZgL^EsO z>eZXhX3sv>lC;TO&1`{pY!lm$R~l;{i%j2I*1dIIz5JHl)um2mt3{f{er}%kz4P{k zQ)|BRO6{vs8h?#T_Tine+%MM>P#hEp?yg<1WZsDY}=HWt=L$6gc{oSGB0rG2h| zFGta~Z2@hUIsaR%nrvxsMXo|crN<+qJ44k-?@Pf20fpG)&>sTjS%1X0O6_4e$rPC@ z)4|#H!+&qnoNqg;nJNYM9QiM?`Q5Xnt4_a~a6YO)lKtr#v&JOJ-CPTw+b@{4ysg|L zEzlrvHS?##5q+&Gk6(5q6o_14<6ina#xhg6>bdR2lhaJ&Htms5da=Oq*~IqXc_Byd z&y4%-{Afdj`;(M5(=A`NRcV}Jk4?O%{GvAC0w?>Rpcm)Ao?u_PDujR9<+At#S_j!})z>_d zk(^yxk=?6zv14P=>lqu4O?x&|k3rvsWrkm|=#eHx(RTrp?>&3CTXyNfh&TCF1-E`z zw-oHPbd}t;EPV00{Nqsk=Ngtwz$~^_gGke9tFTc=)yd{O^09BP7CAyCrp9 zTa7|@MVFoZ!)kMOrS~l!KIhZpt9m6Wg&%LZ!}j~ozYN}2tM^x2U&q&}$&-*YMXtBw zjq^L@)iD84EdsmmO3ydZ66-#_DtP%hA+|Fw=VpBW!#ri?x~snbmt1z#@7u=VS-oGh zaAWdAkGx0Ki{EN1I0fBaKT%w}HEREAtxeHPhrfBw3o-nS7e8bLX z-_kx8e0*BpX=s;h|1$6Fttm@-ZUs14_Fi;l`|>|nzbK$cIR`o z?BYwzJy~-<8(OAo2>IP#n|@_l&S1zI6YK=G58J*7LvkzpbTvV6kZb{5$Vz zh3vMs5xX4Ui@(-U_#-VEc*)Ol2P@O8BOGGCJ}Flza_v(QJ+Rb_z2)eZPjSD#&yKaT zUibFxkq%cG6Q&gb{g*F0gi9>7am>s3u&;T#OWTqsq4ze2oeBG+e9cMc!0`p4g7aN( z{(PR2yZuxO$1yI(=@~oupJ=-H+)CCCc3QaNf28Hp&+bN7M8B1ltv5E5l9;Wr{QmZ| zv{!Am-ApGX>lfWH)^Sd^_wDJdFfNEXV%(cm0rGS5vR-5 z`$>-_{4x#;AYL=bxJ7KjbP45MH) z1V%$(NQOWH^c3BLi`o?HD(J{0~tr|)pV93D0K-~FRkddO5{0s~`Uden1;ediA z;UEl=86`(UU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1n3D?@G~%QfCl#= z>xmkM|H_zAAL0rD&I3bfG-}kXqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?3PwXMi^sASx;Y=e@eU>d~cNLcpuKu2lVi<67P zH>fNLUvvJ&|0fG?K3*)99R!je3>e)X3Q+g|fYKm0as*66@kb8WA3qNdCVvQWFfeGe zmxh71wt%uI$larOGz3ONVCaQFLKvhh9eOSwb@6Bj4E+$O7zX*Tae$)%yt>}Fd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiQ~MnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q!DtAKhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinC>RZa(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7zLvtFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;6Cw1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtqq)hQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mg z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!83@Fd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?3PwXRZa(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7zLvtFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd70xg+Rk|neRc%*}qprED3+bz`$U^z`%e_qXSf&;epI| z4m|46^}@`*P`?yxz6#VFm^zSI8=lL2*I-~^FkoO{;9Si99pna(J`moZvLxL92>bVr zoGh^Tn)5IIPwH#ZEV?s8WOSRQ0dKyhZ+7um9}AT=QMl3giaH6Ztc>;}1Kjd^C+j)*1U z0Y;f&AaR%;ka`dXg%QXdDnGKmWyqF&bx~*j4rBi|%LJRpaCUJx$SjcFb!rfKkRFg7 zAR6Q@kUWV0p)D^Aq#q;>aw7;d7G77+75YL~U;fz6&*n-?}iY)Lr7kF0MXJuS6) zVIaD!79u~PC^HPC7lfHWhC$;5tOvw5-24_K2g1@tnPDIykoh3DurM$%Oj?==HV?!H z$$`uUu|e2DzU*t_B82%MGeCZU*#lC$U|ne#$Q+PfHW0zUzyRZer7iNZ?s?B2n*$FZSg!h+1)PvXzAcuf30|P@_X=WJ6z5Xi@?uD5H zRtF6ikl25y!$5w7*^7$?#XrajP@HARBgMab*;kNRaCa~;Fo4X1#Xm?7Sk7?sTaf!- zoP?wiSp37~L5i3ldO=K(S`Y@sKPV2Z+7a;&(*tuWNFJmX#Q)Zo7Y35&wqp4X5(k-; za^}T?B6RQ zmW01zU|_IdU|>L&hp`=?;tUUDzH{JF2U8EDVdh_`UkWx~1!@jV9%R;r=Q7_l7#J7~ z7#J8h7qfo{xdEgPgg2-x3HLw3{=Fk73oQQT{EPn+yrRMEXa)$#gHQ~O3=9m63=9mp z407KObd-j1L@o&j`Rm5qTreACC&+w|8`^s_!;a0(4FjpW+?4{B2N@GkoEi2-x9uxP z4M@FYR|;4S$o(L@LGD>&o*A|yVo7*_QDzuO9Hs}P9)v+*1agPUkF0MQx@})w)S17- z*uTv(!R9fXT^tTF3#50Q8bltX2V@6`2Du9)58{7l%L@bP2Z@8+2*MzHKzOAE#5|DN zWo>z2v**?3g>lp`4QKd~^$nz_r8X}NM3>b<147q%+N3@gxY`wEl4Q=1pY07^&<3=C@*W`>=r&0_%B2{H$S z_m@J{gV>>%RiwUYI#xbRZa(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7zLvtFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;6Cw1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtqq)hQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mg(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!83@Fd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?3PwXWsFCe_yg$94yYrz`$S$Qpdo+5DlgCpmaHuu0gW{WS<69jB_#jcaWVRcY*K* zl_lZ+N7%o2W`p!0<3 z&kWlUu_QdeC^HNs4$}it55k}@0=YxwN7lCt+i722)S17-*uTv(!R9fXT^tTF3#50Q z8bltX2V@6`2Du9)58{7l%L@bP2Z@8+2*MzHKzOAE#5|DNWo>z2v**?3g*ntM4QKd~ z^$nz_r8X}NM3>d(g-L+IXfpfviijoQq6`cS0wBXcVhjunAUzyR3=EGavwvr}uoNuM zzywhMG9Tm?W(EcZP`rReFD(sckb{IdNDhP@?5BNAT$CC1! z8K!&zy{LAzyR|%SnR^m@c*CyWME(bxgRD6 z5(CMDFjN6V-{Dbs>4KUpN7UZWFCn0GB7XNU0 zkRm1q29RD56QmY|LGcfYL#uW~{KNEs+z7%Td5~HV`&(OH7)YMmisd^<9Aws#GcW#w zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1cq-2FbN2tj0M8R z1V-u65Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S`WG8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiQ~MnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q!DtAKhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinC>RZa(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7zLvt zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;6Cw1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtqq)hQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mg(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!83@Fd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?3PwXWWv z1A_$v0|T-;0R{$!4bNr1J1{UX1TZi#Fg%d?&Vi=RXp8vwC7Z>;;*1Oo43;2u3=9m> zP&yAvmqY0qBs)N6g3Q-oU|^_VU|`@}%>EtZ29Uczc!SE4aQ`Fh-#c=$z~Tn}%f3$V ziUzaM&2MC2U;x>l%OLmtKu2j9N92-lkiTxs%>}bT{sNh=!oa}L-kTYAY;JBCNZsYG z6tFzVc>%?lVPAZgeFdojsh8|Z0js$YyCfWBH^@C}%rnDwL@WspFv<)AiNo}O)Ppc6 zj6m*C`H}T4!*|(N7j@?EF!pb=Ot5(jXBUTq%mV3Mrv{M+=>gdRqCxHg$%FVG+Va9c z`a$9#H-a$89uQt>0WlAxc3E2<*z9?=d0{U~mWDI@$odA-(^8uk2BOPq^THHBVKkZj zdqu>Oa8U*Z1__X1ATb6829O>OCI*Jbli9yBJXi{rXJCRT0GSVR3mXFi11Mg=qK}q_ zGw?yeoZ-?^aQHa*FZ-IfC^PKG{iWd`vtDdrQ!cU0m#6>0CGP#OfEpgGQf(_hzBy?LE1ramf?>S z|NhIq!c~G4FfcIWoPY5j7XMHo1_r~;Z$W-~aT1b7VDS%^2N}Wy(F!TnKo}$sQVU{#Ys(7*$#Yw=dRZa(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC70c;`A@LcA5&~o(7H4E&V6X(KV_;y2hSGUZx*ST^AlV_oz`y`9UxR^x z0b~c~V)pMKJ3;OO;SDNF!u^l1fA7f20*kLX|Kk4yuV^qE-TX!d1_qG*xeRjO4|J4< zaYQZ&2l?y9+*~jl8TKW1+gFepkb23k z6tJ3#h$Z15yFu<*W1bndBVtK-fKg@`NF1gIq#lGpVFYrA%8#sX8L`{Gx~MaMhp~T~ zWrEFPIJ-C;WEM#8IyHzqNDs&k5Djt{NFK!h(3Tel(hm{`xeF*bg~(4R$_xYP1!0gl%sj9j5XW%yTaX+GOBZE^ zfrLQjgWST(z`!tRX(re_5FaE5G6Td0VTbr_UlSK0%m!sWLGmEA zApWgXCZsBsPjiLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz5lk2rwzIpo|5=#so&`(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!84;9Rff285p<(M*ICkI~GS>KNp&?10xa~zDpcNeTE|hh)X4-szyU#Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q!DtAKhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinC>RZa z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7zLvtFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;6Cw1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtqq)hQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mg(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!83@Fd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?3PwXRZa(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7zLvtFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;6Cw1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtqq)hQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mg(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!83@Fd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?3PwX< zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zM!{$ZjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz$h3Efzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5EuocAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmwWGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhl}jE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1Jg3%Bd4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=CQ7{?;qaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFbYOPU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V+JV2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQKHo4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVB~qaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(6pV(zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjDpb+7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fl)9T0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*AutL?Ltr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3P$Xb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2A{7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c1*0J_8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqhK@yMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zV5o-x!zdUHfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5EvGKNkD*MsE<>O zx_>kTMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3P$Xb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2A{7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c1*0J_8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqhK@yMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU=)moz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kW!5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S`WG8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiQ~MnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q!DtAKhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinC>RZa(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7zLvt zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;6Cw1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtqq)hQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mg(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!83@Fd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?3PwXZfNh# z3_CVAHw>iia#spio`HdZA)q)j?919)UqNa>>Lt5Uz-mD52iXmB&l>a0upJRg!UK#l z!$9INJs|ZU3<@KVJ5+vTeal#T>#K`8^LH5gw^=6GJchH2!$D?&^sZBb$b;Taq zcY)+V{10t;VIch=agZB97-SC!gV+-o7#KD@m-!CDAbo3|%X|lg9m9{TZ>Kkle_yg$ z{5wc*S#4gJ1SpIqvwyFMSQ0MEz`!5?G5{pTz`*bzYDxIbQg*O83{6YI8S)qzKz=zp znf*J=EzArI3}CZC`X((2XNY42hdIcdAndUI*4M;EnPETrmxOaLF)+ODV*d^@17sga z4y5M6G4}5ub3jJG z0CGP}4kQNB1Hus1Q1XGycaU~aoMo&>ivRVuzM`9d=lqNRu=oe*0h?gB`7Ov#FHSASOsH2rp~P3j@WWRXcRZa(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7zLvtFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;6Cw1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtqq)hQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mg(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!83@Fd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmwW zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhl}jE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1Jg3%Bd4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=CQ7{?;qaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFbYOPU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V+JV2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQKHo4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVB~qaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*U^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(6pV(zXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjDpb+7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fl)9T z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAutL?Ltr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3P$Xb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2A{7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c1*0J_8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqhK@yMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU=)moz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kW!5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S`WG8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiQ~MnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q!DtAKhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinC>RZa z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7zLvtFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;6Cw1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtqq)hQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mg(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!83@Fd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?3PwXRZa(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7zLvtFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;6Cw z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtqq)hQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mg(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!83@Fd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?3PwXRZa(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7zLvtFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;6Cw1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtqq)hQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mg z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!83@Fd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?3PwXRZa(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7zLvtFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;6Cw1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtqq)hQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mg(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!83@Fd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z3PwXRZa(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7zLvtFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;6Cw1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtqq)hQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mg(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!83@Fd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?3PwXRZa(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7zLvt zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;6Cw1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtqq)hQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mg(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!83@Fd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?3PwXRZa(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7zLvtFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;6Cw1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtqq) zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mg(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!83@Fd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?3PwXRZa(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7zLvtFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;6Cw1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtqq)hQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mg(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!83@ zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?3PwXsk9=6@mn2N~_D!vCG&fZX>95lg~Bav-t)|Ns97(IER@{*eXC`y7Pm zWjGl1E%Ki%*!>_iC)p~$i$pF77x*vx9i-pc?)My!I4I2a6rE>S_gD7&fsWEJkQ~U2 z0})HY*Uig?^Ent87}j*-A4r^m-8Nio43>ux2jt*p!SpsCG?~VnxXNKB(jv`n8 zNYV#t&lp542?x=jw&Mow%I~0dpTp+k?9>Pci-U6CL0Cnffk9cHfnmexsBdpz@pCZh z+l7Ns-$2b~kloaH6heJz`|Op1X4ls1svWYCck25QG6ixJH}aO*3B zKm!8RZa(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7zLvtFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;6Cw1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtqq)hQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kin zXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mg z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!83@Fd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?3PwXz$@T#(r> zPA(4jKf?aKBPZ)S$Zed9*}sF#2FZc&29+gnd62ll`K)gfyrRKs*yiMh9q1?xD{4py z>o~PId`HBR@VD<}zw&kO_E6=0MZ1`>zq0SD--SFb=} z1PTY0A6efr&SrgcQD^=RWB)eG1e?cjc5yh!ERf!HY7lvl9*`X%8svVEJc$3HEiVkD zA0!TPBM8IoVqjpHz`(!&iX#vP>09$$<~u0t7=C1ZJG~haHz2)bwRvF@3=9m6li9yl zL@Wsx1;r`IFpwC?jPNDlH%r;S?|3EiJ)mGo_=b8$aD1Pg%>Etb7B*;W*BmKg7h&kfk|*)0h#q5jR-uyuQJI`4Nf9Af>jo+TCe~$@P2dgI(YCBfh>zse3{(X)IL_fOv z8x6lXlpm{q=P889pIi9u?9*53-`_Yx_?N7ml7e2Tf6u9e@SUSG{_J?E{=J43yZ!qj zT^>yZ`R6G_{lc~4s?kr>zvnbS`1aEmbmcr(|9(dlqMy0Gbm^3b>fdcjAo8Y$AKL_8 ztABsP0Fn26c4qqe`|96ydLiAE|$z^8v!QDs`W~=%xC185W58j+K|ZMDMGA zf8zv^NB6HwNXRYkyXxQXBtzt5mua1md!YVZXETH^T;CVO|4RM)ngj@+x3S<`^F8(N zGSKk3-p;T6`<4248zG2&{?m7w2fbGRzJ?jXM~^>r{|LVoZ20!#ai!)xX~ngP4aNKQau@i9(aj^oM~_eR^uQOA z>pu0h`ga~_h<)h!WoBgE%;k60zwfDl$fL&}dVHh1Cv18Zqg=AqcOPSjesp<4=?Psu zdU{2d*L)iLe}c32_c=-s`_S_TB&wV{reeDhq#G9d2TakX-z>?8H>cgi68r|8A@{d=tbJ?AZizj}RY zk)M^yKmfVjDES+eAYAhhE;Hm%obdzdj4E(ERQb2?<~H z@&P?PO2x81U9?{FyU%Kf`RM5zJw2h9hmi{0Gpg5Xe%FbI=ts{#^CV~JFG<$=-s29D zNB1v!dPbK==cAY3=-(B}5cS+&^XGFqX@9qghnSC^-vb|O{Nr%e z{+_cHq8`2eMK>RvKWAp0Uh@Xc?>({*^U>we>qm5XuPv*iA6IC8pVJAkA6*{3{GG4z zuJ~|;=69Wi5cTNwJ$ikKUS3aHzw}v}llJ#JoY>uqUjC!I=XX!NyIqpj_dkCi_D|#a za^d89&F_C4A^gCc$Zsn_?G;7r=0|-w@p^B$=Jz?zAnMW0KYG&KJ-=M@JI^ER^62W( z`H~xJesh8H?|+E?-bja!lbhAQ-#HH9qqo0|1E(%Jzd`f+95w9jMK`~u^z^DJE$ZLz z6ku16Uf-bW-*d8ZN^FwW_ZT;be)RSTdV2<4KOw$oh@N0#vex%MJ`nTK>nqXIeFiGqCoqZ5_LhUzn^8*xopDuOO{=Vl3L_fOxD1S5r zMnhmU1V%$(Gz3ONU^E0qS_u5d0tPA!6yC^uPvDpR4zmA&o7ndUK4RY=go=UrATjXT zOb~-a{O|w&|0HSwE8h^28U|wAIQQZ|XzebD%@DODd`IMxa4;L4_<^)e5nT?64_Ze! zLkwaDXg%zQhkxT1OJxTkDH$;4fgf4lI{s#T1JR(Rn;W<*zk}9QI&419P7Oybc_{ZC zgq8If7(m$IXV$kjNbxh}$_tFR0=eTu`{HmAedarHVN4CT4zw9QKL^&YkQK^^Pzd~< zHFcR3f=@NpRm?c2n%ScUji?X+?S%k&7*tk(Xi)V=3Jp>_ibq3$Rv{3xXUjK%%uHU8 z`OkN6`L=J*mTx7JnVcX#=bkO!kmW)AEqk_n6M?D+@sZ{4?B4Qi)t)WigplOt@7eNg z>cnZ_Z6YA`llN@-RxFP&zkSb^Z$(J<)$G~wZ5opLpgmi@2|~>SnO^`>kEB0s&z5h( zP+TX3g3B%{fj6v{eeM%q?d#-2Zp7H-EFq*$fXK5Z@?gGr~RDo4;w~ zY=(yiNM0sqGu(e5zEI9)xcfkSuqAkimg^h7iCo>u15>i@`i5_80yDWleB0|AzAd@F z0q&m2>l?n!0;z}kAH?swz5#AOh!4_-58HoV2{-TLx0T)EzVe$m)O-+M z{`*R}e?ffV?C`bi@qt8d;#kRu}!Zpg8QfD+M;ituPyqvMbm&Aq*?0P zqHoCNfz&^_w&+`nLo-O4!Tj2yZ<^N^!Tk@?FL!;>x9QOI2;z%eUj&bT5TEP%B6xU! z`2Vggf`lMNAzoUhs01oz+dj;3$1olS86f%w6lO>p;s_@13j zaQ}e#$okK8G<}orY=ZkAByZc<1ot0^Z`|4RO#+(UL40KOApJ0R;-c%dn!Zgw`52rY zL27!mn!Zgqh2YNw$s_TXX*GSDg2dmf)%0yD691bP!vEG0q*Khi?@7sS7& zh42rEe?|)tJ|O-9EkyW%_#ijp!*e?t;NcHax4fePUcQ6)8#@}{Xn@BTi2tyo0Uo~~{?(2Kc>IC* zAUp8kSqtmn=|^f|-M7?*b#VWI_|XgN;P!#|6BgFN?E~?V)qh%0_pNnd-8WeM29mE_ zSO<3xh>vU@NPYgoI=KHq^7z~ek~`0Za9;se-M6D$2={^bySWhV1M$~$A?ye7L1y5? zu52~%@Tg<0`F4}F1|A+D{(06KczA&L)@(KK_y_SHv(~`<1LEtm)qE?0*3Te5viwZe zns2IXHSq8R$s^lW%v$qJ6678!Nc#XJ&&yWxtr&^V2;w7||DCl4o?k)g-?G-g%L5P} z+5I5%@r4CQ?&{MDxc@=?zfUXR>38qbif_pBApZTQ72hteIR`GU)<3QI_VH;2JpMuQ zAT#jc{9T3c@MGRp_|17&A>97YJ5l){`P5y7@bCliBX~E(nv*GRo@n2hJ!|em{A6jO^-3Q_yw9JO5 z9}pi|f1+jfx2u-faQB1ck=29bT|th3;vW{(-$DH-7|pOF3(NqqM(>{K4N8-n)ef&1b8=*ck?c+BOB>BR$kKa6z_?2lN zzfJZ;sBcdD_^lvi5`6ljC+*|6rrH#E|8RQR$8QNY+~NJl#c3bE6(gx%llJjjDH4Bc z+Q)BYNc??iAHP)~@sa(%IQ8SV=V>3m9eQmA4xe?YAHN}oA4vXg+DCZ(_&fFEH{|dF z$qS`_{8j`tAH=_$_7PrRg484XA0&SqrxDCx&;(>;{* zGBs+`J(Tp6wCUbASETsQ+H?;kJr!-bhmxMEK;|K(r~cuZ^4TeQTd_#ZdjgQo|O`d=XPkkT{j=6m0ok@y0e?|o}Q;!AJ7_pKF)ueSN#w>Bic z;pTha+L8D+o9}(=MB=+|zK4=uf;Zno$uBXR?|o~kL-;>^^Sy5+(DVdyZ^7n!-x})? z^3@>sBJtZc-$Ti7{UG-@Ak@zS=`Td^mxAm=;&0e|4<$eD+AA%`p<5@ z_bm}gK5NT8cz!*+@!q%CE%&}1f#zQjpJ&TGczzYwbnhF}mV5B_Dv1AM^F4U}1o7X1 z!UvikL43b0_r56}d=2jJgUovX3LofrCP?0K%e`-hk?b?ta_^h+IfQ!EE%&}%M3NWV za_^felKi#J_u%bska?gm$A>p>z76*;NZoy4!5dZDw z+i>@S_`f#ahKCo3&%WjMx1&(^g7_j^Zo~Z#;wx{t4fhX-pSI;T-2I)KZ+|n`avL7r zAb!l2+wkxP@q@P9hKDzZ@3!SOyng`VTWz@w?{9$k$mZp3zD=;bA7O#8pV{K}H$Mx6 zeIUM*1;RcMALIvoIRDlyxPQ!U-TIb%>lWO-AU;05Ah}wV>u~+tD%Zau^PehT|8`2{ zI=nv(lHaFt9qxY+zgXouJp4fF+d=A~=?}z5mItZdqH-M`z92rbeP5NYf6G+44)5QC zG=GEm$ok{ku6;x1 zgXBSG;=}W=T>NHoU=MhH1*C4{m5V6jn+8`e!u?lp<>I%SS1!WGtC_D{{B|6~hmMaL zUb*;f$CZol@oIr97r&`oy$JU&NWa9@i}3UU;`3d-2oEn1pXKUBc>II-KdxMa$0vyY z?#e~@cnXOB>hU9R|AX`&J9Y$~enI@m<454(0pkBV zb_71Y3NqjS_z`&cfaH<&*B(3a?c=c{@bO!ade`Ge;Nb^SZ+ZL(e0&PT*E@a$K7R$` zD}m&p=?TP_IDP~kz92p*jPPQ~gK+e2tw4;NiV_$ANDmI}gC^ySL-OH@lq&;O+&fH`;js?p_cd**uVbWb;7s_}mJT zOFOk6?w)Ta_kW8zwIA+&5I^A5ez^T0zRRioaQi`gt5f^o?gjBdX5zyMdv?Lwhc|ZZ z`u1V>E_izx#6P`z7u-FfyHVv2?ArAWS>9mxu5aOccEQ_=ApQGy?}ED@B>!ypu5VMI z?O~99zdgI)?OBj|w>`Vy?P(By>+W4}|A6%0+r10k9tY{a3Njzso&xc$_w0hVH$nPW z?%oB@Um*SSckhD7FNklvXBWIZ4pKj5_pWb~pz~=Ud1U)Q@|t^g!Q0~?zQUee@b)%{ zFR^DAygvcrckSKvr#g$2Z74d~pksGZCx&4x2v*@$JMazr*IML3|If%I~oGX%Ih1tnxc-{v5=Q5v%-; zJU;>wqbF8dWcR)0jV!o73$oX6k=^%@)LuB>Ws%+YDIa*j^QR#B-;3UoGp9!Tdm<8lb&dA-BqaW>8tw1NNc@vE+TT-<_%~{_zo#PcpVw%APebB= ztI__Rj>KoJ)&8D=#22a6{+@}%SFY9mUVy|ms@48ph{SiS)&72YeKspB4tzlJ7uUn{ zLu9S?_aY>ITCMi?VkCZXt@ig4Bz{A!_V-dGes8Vz_cA2@tXl2wXa3E=b&a z62uQe@R9vO$o>KGkR~JqLgP@O^n}R z>n}m}mo_oN%X<*Np@|VCJ$5%Ses4lDZ(0*0O8Q*V#E4QpA;-T)Bja~u^&mcS_=ET$ zJMm#5wSVyb(+<^t-#FC%!TSRs{vXwU@b)~2kIyWSoae@0-(c-U5Wi&OFSz-N8-IPv z+V~4@K8PQ;@fX~D5IV`j-{I~9@w1+Phr18N$LAK1T=~(@@ct=?Uw`y7%6v}e(a-Sy zAxM7W(a-SyCWt@#=;v=ONb?)Zj(+~ufyCc<^fSu*#Ga#{QRW{`9Q}+k|8Vi>XO#Je zJ4ZjG%s)Im`Wa<@;T_0+r1^!PAoHR9SCIRdj(tX%A3)~6Kl1q-vj0K+tH(ZnYlhBe zfcV_UKEvb3{pja!4#z&j$J>7$`TPypf9UFUj(+}j_Sk25{}m)}eC#uPJRPJT*?%DU zBga0&`}-jNo@1Zk^I0JN#$%tqH9^A{#LqwW86N*2_bog2`CB7&egq^x@7QN}e;mX| z4nGio>aox8@d6M(`PgT8`T?2ObL=y`KMs-)KlT}(9zpWR=>sJ1d+akj{et9Gj(vvD zM}Yj>a_lpFJOZR%^w?+k`~*n866Ag)|AFFg6cZ2XU47gb89}R|AbOY?n8Eiv1jsNj zm@qIfWCTIF4kio=4D1XV46+O|V0nmY2pJ*C#sI?LPLKctSl&R5jRA&1tFI0G85qDO z2{3@KRXCu>#sI?{j0_AQ43Y;elmlTAMg|5LR$*XZ0AY|g2nReZNmnA~Lp8CBvs9J=>p|FF$a~#=!o$*LjOo_N6Qlmo`r-dY0SLMhXZLH>p+XHZ~ZV0ee5UXX!-VF^qUYTkV`{pZm5 z>(SIJAejepPY;^uBa*MdNQnMx`5ccJl>(D+4Y{3~dDAvC@kntwx)+ylxF zlhM>Wqp5$6q#hJsI!Jtw{trm%LE-xf&AdNI>OuMq(BwCu$=9ICXQA=GqwznW@wYHB zFf8b2VK4{hXC8**ObiSU`dJu212sYnJPebW7#JM-Sr{~+@=KW*7z+AX7!06%aZmvV zb(0{&$NxD@3=9o@EDUp?^6F^v0U-Ha7KS%a`6ea?28DhW2GBi3Ap2rK=J&BMfCgqj z{7eQ0h68F040=%Y4Ds>lx%qkV#U+VFCGqhL@tz^R@hPcAsp*-;C8X;4GxO5&8PZcrN-}d(^V3oiD;eVBD~d}JOBmAf3sUnK(lT>W^YR(u`54%$%I!)Dni` z%=E$xluM8(yB6SyGUh!jPSrlfw`nUz}G^l$lqO z26j5gs+7zk29RG;GK=Di7{Go33FW5df*hHfnwy+kzz`n~;e&O7Imrc;P)>140Wzlu z#>q|0$;nR!IV+W+EG@qX>RyKU)QZd!hN8s06o$m4{Gt+uWQfA}_~eqxg4FmVklPtx zypsIVf`Zf{uvl?P5y&w)#i^;;3@JH@DJeyuphzyLWGF4pNlh(aNXY?vfFUIZXuX+^22Njb)P#rYuf3W_qz5=&C!jr9x-LHr=caIhnd^$d;l zj2Ya0Je{25jr0uRECV>p5J}zyE^4fY#0F(?76w)ZHU?G(Q2ULQfgQ}^0FxjdCj%=3 z7nBE51H&L43{Y{9Y7n250i+tlgQ)`15E&2)l>6BjxS=+IL|_=?22k4*gqavXBm{$s zRnWeE5RRW)&IxLl$uKZ5a6-!;P_f6vz{mjFqX3hGm0ch?P-_;n{{kcj@++*|Vq{=q zxXHx80BRS3$~?%N95;g{GeitBXUECl47Z1k;R#ed$Q;O=5*LFnR6RsL2V6g74v(E7 z5-Jaw^I~I2hVmiivx3bBxdAc<$ik2hwGY%T1ubGVQDb8O(H2nJ0ZO|-X%8sv1Em9? zbO@Brfzky~x&%rms6))nfzky~x&%sBKT0F-_J zrQbm54^a9Gl>Pyw|3GO54T$?hptJ&%R)NwQP+A8{8$f9jC~X0yZJ@LRly-sAIZ(O) zN|!+C1Wky&IZ(O)N|!+C3MgFzr5m910w}!(N^gMDTcGp~D7^6~&Q=s$=C_M*CFM!fZp!5nT zy#`8efYMu_^bRP!2TC7+(np~52`GIAN?(A|SD^F_D18S?KY-Ftp!5qU{RT>ZfYM)} z^baWg2TC(&L*kJIN^?MI9w;pUrA45$1eBJ6(h5*o1xjl`X&oqS0HsZ!v;~y5fzl38 z8dR2z;?WQo4S~@R7!85Z5Fiu+1!39W6vDEBxCdcn5_^@49t)C<0OXcT-~qk&(44OBm9 zP+mZ@;9H1h!M7Qj1>f#y7JO6CD)^S7h0qV`FM+VkLWr9|Zc12K@GW;?!MCb~1>f2i z7JQqsu;AOmg$3W%EiCx9dtt%16AKHzT}4t4(t`^>h%EfJAhPgVLgZ-t561Wh^)o@3 zVJRa1J(vZVH*C!P_Tfn_{dQnt?l*(Ux!(dN=6(~HocpcebI!MfUpe1C z{LA?!z?%E*19$GX1fiU74}@~QO_0p_rXZa2?E!DjHv`_BZwY)k-#+l=eA^(I^X-9T z&Nl(6oNo?NIo}Q_=6rKd%K7#|Dd*b+<(zL5x^upLXvz7;(3|s3peN^B!u0HK7p7%@ zQ<$9nEn#x@w-1xEzbQ<~{>CsZ`~9J)vcGMZk^Sw#% z(3<^Cpe_5GLr3;EhOX>y0$thP7IbBQdr+PI&7nH`TSHa$w+&U<-yF)bzcrL+f16O5 z{p~|-_BVx^>~97&+20P-WPh7rmGkX@YtFX-kDPB8ta83J~9~99|v%eL*&;Hi%KKt8*_u1bRK4gD8 z@FDx#gAdu?1U_be3;2}%ZNjJQZw8;Uzg_s8{Y~IY_BVwu+20JlWPeNelKt&LZ_c-b zzMO9x`f|PHLTY_xvHwJ~=Zws_@zbWYCew(12`z@h0 z=bHmapM1_Y1MZw}8~Ag+9can~9mk=YE?|ko(QSG3OgYan82|#W~*$uH=3zxSIP-;acvu3Do-vS=zertG|`|ZNB+;0W1a=%@8oBJ)`eeSn_54qn8%yYjr*yVmxFv|tk z0l3P=gx}fU3VvsQ+weR4Tf^_{ZxeoJe_QZ78?Fb$28|Jc(lkgNdb)OCU;q{GVB^8+ zCPU0a&nF;tpz*W?)3d*U#=}5qA7mbS`Uj~44MRCpWq$+BZGh4>NF93G2B`zhl?L3) z{stOD1Eo`tI`p*KzyKO2WMFvkDf=5p4=C+})S;(;kUG#@>V`Mj-#}x0;J5>Y4O;wx z%m5wkD)1y5Tz7)T@j&$!Xnc+jIyMLj2T*{34oWkSU|;|(cx{==!XU}O0G^kYW`N8W zgN_FUjj@631C@PW|NYOmFwFi28Vl_(%l-y(PlsXlH_!&oN@fP|{0YcxQ1~z;6n+DR zCur^k6rP}YA8`f-1_!t7Zy@#z>+El!xtRGgs{V`oNo-V%#byr?_?k}0|Uc@zX&$E z8K61%gbNkl7&5EAmw9A=YxBtdHq9gZ+cJ;rZ`(Ywza8_){&vkH``a^*>~G&ZvcIu; zW`7g&%>Jh4nf=YoGy9vHXZE)+&+Kn$p4s2ZJhQ*Gd1il`=9&F%nP>L5ZJycRj(KK( zyXKkw?U`rxw{M==-`KpezlnKee^c|y{$}Qt{msoQ`&*b-_O~>z>~CdW+27i{vcFC9 z%Ko;@EBo6vuk3Hfyt2Pt^UD7A%q#obH?Qn(Y~I=5#Jsb=sd;CAGxN^==H{LKEzCRn zTbg(Fw=(bSZ*AV$-==wIe_Q6A{cW3f_P1l++25{tXMcOqAbUM4s{fzlc5JWlj*8|9CNz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2Ba3ISZ}{|opb>;ET6f<{_EY{>e5X$C29-x%4C7QfjT zKo~S;0$NZ78jG3mmyKZpFFP1_FflM_Fr%*j_xQ)g;K9cZ#$W>(A@ZQ{BoKzJ{Rh#Y zwf`Ut5(i<>`u~J8Yz#1bg@u6ugh6s3Ow9U!WcL+-)}}H+#)Cj^2blpH&jF3`fY$$q zN{2qx+0PoLSRHdW!RAcoV!fX0qMV@4p%#K75bXsLvP1_J}*kqeDd3{4Rp zQVK5I4IE62i|pnwfz*P=m|)>1$H2fK59NTy*g#B05W&E}pbXvbpa$iGD9}1xO$G)A zZ3YGgG{^nI~sQ#6|5IuKXrGZ@$1X)`3htH)PH$1(Wv^*Hos(dsp3yRcjaj=^x#X|zOp|5 z+^N>-{I}9xJbW`{^2^`#`8PiqcFtSF_r!dT;?GU4Mr)12if?c`h|qJO{O(JNpS{`$hn_3E4Q_17l9W#2UKbo*0yQ~3deQ9L zfM#D1Iv=VRM1l4t%mOi>7-arwC>un9_(;})_W`7$nP-M(Kl-}yHZ=A1X#7NwMNka# zKPdj8T(EsNU>vA_(f0xHq1pcqO?@;o1H%LZRt6^)(7qFH23uwZh6^&R44@4+LJZst zy`VLc0;~*k7$Ne%85tNR)G;xD!UiOt#>~JFV9ClL3bvn{L5zWc;fo`<5M!9l#J~_B#L58L4+7F}0m`RH^2&@13>t90IKv}G1_pyVCWc_B`Q9M= z3|JZLq5P=~3=BMQ^3ui2(vPP@-xW%O`yC7mltQ~WMp6{sA6I`1=Vi{GCz)q zfm;;fzw?X?3<|YO3`|h}J^-z2U&X-C1eMPL`M;crfr$yCzLbH1VSx|>11MZU_RVEv zU~s5rVu*&Czm%DQK|%mh<_a)~GwcAZs~2Wv0OehfdT~Yuh6@K67;Zz=Z)9d**ny-T zw2#E0jETVq>K+YH`hfdKjA1(?1H*!9CWaEI{39j?h7ZE53=^Q{%|o$YjDd@hfg#`k z0|RJJ6UcrKkb8@n82&*0!w(9-IwtU*E|5HEY`gyusn1rJD3exkqusTo?8HsECw&yPA^R?N@2)N&CSg(ONFeLhb@FJE-A_bty>3c zPtMOR$jnJKf-i7~EO&?Q9)K>lM^*{3Bso7XEi)a;2CbJbErD=S(h}oA`v4$31S_pH zCkMQj0c=)!Y6)oXKxSTgUTJO;%v%Ui@K%HP)Vz|S%+z9tQOWrQmGQ-;NyQ~anRzgq zL1KA{xv44WGGL=%isN%Ki=oa#5r-HI62fW*C}h#iMHNFb7!v9rX^5#1J~X0o6I04E zi&Gg2N-{uO8{%_IOHwO9TL`ila&r?4(8Npga`Kb28FEYWKyr|c4iH1LGE0yG7sP{D z1B!rT&~6b>v>=p1BoS^(EH2JW&x?oaL#PC)i7(A7Ely1V?X1Wzs)WepCT6FC9>9^?YZ`h9kWvrsX}`hPZtn@~Pvy+13%Qz#!|9t+q!P?-o>-_OMG9%??Q zZ47ERPT^$-&kHVq(g&dQ5h#5EN}qw!SD^GADE$UXe}K|Ip!6Ro&AP}&AcJ3wg{D1C(=V*UYsb_O;U28JUbT7!Y%1c+8XG0MRB43~NBNFayH|5G}^QumwbmGcfD`(Gm;{dqA`#14D508;%#} znHd-w4{v8=XXtJQRmiOeN?2cjYT)K09MO=L?ElT69P@uMDD8mK<^RQ?8SV@a^W_83 zWaVN|YRdpgzq|nEgL*Ok zJ+BPV^#02RFdrn90cuvhECBOCy^##iRO!nEFdw8e!-Ii=;bj1r58g!{0OC7<`5>(s z5g@(+m=EfWWF&z23Sd6Ss0@&YUJ8KuE}&iL1t59QB>DfvAfq!XK>QD&i*gtHfaF0- z2VOn^^FdZ+bb#b9fcYUHc~EG+JOJi{tj?GLlHUO4$AIJ)fcOi*e2`NzR)F{uz5Sn4bgEe*nZ!0P{gk%{T$#2Y~q{AbHUC*Ow0e{{Ii{yc*tl zKFsi2aBqsrlkON5lTH^Ej?NRRpi-dIMTMuEx%EJadzeQ+7Q_D%6`O7s6^R$y`572G zk2N0=c&*p`QczwDzMMb9bLv&oc9V-I^gCieD8NnD<6;Z zVLlGGV|*+OpxF5!$H3qb_UFF}sO)m&<7j2_;Nxj$_Tdv~V{zmYX=Zif3t;}i#3$l> zm`}j%7$1-0aXt>mqkN#03W`kwc?JfH$Upz~9YOkiK>FSJCNMK!VB_Kw zaXic?;D}^`BS=dN0|P^eJOe{X%AfxcQ1`YnIm68WyTP9?f%!Be7sL_BMmTXZ^z znJ3={My9P;+~v*R2Ucz-1z%n62t+U zf$$4BJl**|Ff*Itjn^6#28KBj|NifR=CM{LG{3lj(pMoiGu%L73X0bQDhvz~Qvd#g z#%MrgKe8EMcYw--cx*^{)5JZKw_Z$4NA9Lr2qW~jr(AAqd%Vm(>^TO*pa&!izqk_ zKxNb(RR)G0nScL5<0&9>+d$#h%3xV7P zYRUXjWnkDN^Y1^XK>^a=4$|Mo?8qn3%;L|dz*NM=C*XLPkH_&CABW>{J{C{{0)@GW z8Uurf?7#n@aSxEbRwlGCbK`ShX2(`6IC6u+qeP8?Aw=Qde-_Yq4!CS}1eL=~QCv_r zJ99I+!q`sSjv%J^*eH#0$f&m@&z#EW6|#n(a)j5!0qnFa;Ia)=w|8MH9$mq8bB6{4!vwQ`|3PD$pzuVbNY&Zrq?aw9sT=cwmRf=b%Qok0t}d8@qr1GvQ$X4nst_>cVGJi6sa#fX3=9X{{{08_pg>{P z%;d)h@&_ooNAYL~&>{o^4i$c50AZ-%3-(sP_W?kKP^b`z@^3y8<=r2l!Mh; zKvSCU;Y-jr3uv7N?f=Qy^ z72HI=ABZaYRxm^KyMk`Xw*sw_ZwEdId|&X3`+LGN+3%qB`VPt^-zKP+e7j&T0$#I! zAdmn1g$tbD6%KHG-=HhWsvHwU$nZxizQzZ*;y{XU_9|GU5rrtcTFGlA8s9H{uF zaiHQG&w&c?`hSHA)HK5Z5{Eesjh=9f{riT)?B8MZA_nkYg#T#D1|9eA1aGzllfSVf zJup#{{vqfS;B>pb_ozm5;Dhs-TUad_D`ReWhZPq5TKOeq$BA7sKlwD8R(w{lewRCO z*Zyk>XC+qiJYOlEZ*^wdHB}+)-@ZqM^|AtD;_cOp!f*L5f2SO=rRUA&Dn76BQ(HBc zeY$&{$A4zbRHx~yj0K&K-?6C?wF|nl!sGN*skD2MlG~f#{PM`&(HXZYq{Z-AqUNEA zC$GL=n`paD#irNux8Bs6&LYvNR^!%WZhsKts6(Q4VO%9zA;9AeIao^?3 z2DKk<>)le<_F2XIeri*~*T-=!PeSg@TeBphKRm1HcDUu+5I6CO9Yzs<&Z>LfG0yBf zJ>@*(#V7nRUpH&KnK|{6Bx|fjck#}r>KD$t+~ME5&}W|L{$tNS-L9?Sof#8y^a}gp z11hCAU7u<^uR3==_(o{gqqS!Z1ikNGpCpv}YL1HfM$b9l!!my<8AgVy*Pq$(sqKg6 z*ED5=a$#eUzsxI7c}1DAJ)ix5_L60Fnk7xY8NY8kwNu3Q(bM_6kDOKBeK6{C$-1KC z6AlwfKFU}viPV)1-Su1CN7*^RIP(W{cVe>Bq0*SOu384CeR9GJ@4dUL&3HwA*A2zW zkC)E%aF_1A<1_d9gmus2Pm6V{WNzTl{(V^V=gxOiZ`5C_7tP=B{X^kj#UEVLmTYZT z;at+@w|MO-4Yr?=saO2}uUc@{&A>-1Ht$+heCz9)XKUu#Obk|@A+KJ4Eq0R6era!R zpC?B-6%TI_a^I-*!l1Vxaz$Xkuj7fQT_;37tmhJ+{4R69&SvkI=~MSFE`ghQub%*?B6|IFfQT+aA?v#id16yzzC&!DG#rTc`W( z7P>lX-)6y`LQS(5yuYmd=B;#~iVe%pPvM=RLg)OmN_<>4O^z*<{LFtbX^H&8V@FPM z?73Zh^ZERliCZiUH{a84d%MZ!-(vqA@Aw#n9QNp*y?J?Ek>^pK$a3R9QXRMC9UD&m z>0Bzbtz~VLg1$||pF%a?my*g^T%1=w2m7A0jXQf>#GvrfGMgIlDfQV8zwbU>(dgwC zq9oMwHaU3ywSv%v?XLshWZ7T2oy5qv%*Xyo^naF{&9hh9yr}#2h^6mS@YRbKH=iyl z(aoXxL87w;!7!NHymF5}NBd79t z$;sB&{Jd$73#>HiZ?N?(D(z`7yCxO=;lS#1=>{(+PYsFJe(G5py^8Z(&+hHdL%HIY zs5)HSQ+Dd{B9RG#&d;^k6Bf_-utHAcbIa2t7pLu3i=1vKWoUTH%W~Ow?iDz==S=br zjzdfn|8cFj@;`NIR`%JM8SBYdBGHd*;{pj7X*r%Ac$quD)^V*naSTr1OmnwtY<<1$nFVjSOa1PTG3( zgxLP@kg3nto|yPZB4^HV6?LB8f4{8t^megXK4?!@H7I&IdH3W$pASEii0Lbt{w`FU zVdhkqB=OZJ-3^xCoBp(x$tJ*PdsFp3iREXmS{nY*I(#s3r&n?JwPFMJ!i`UU9#HX8 zzZQDLN;T)}$q&-!mgq6|>Y487FJ4+1Ql6RR6!y*f`zM7w_ZN!BA={1Fzi@syEpfkj z2Y=wLG?xyc(D?4IPyhOp3QtG;-+Ov;pmRV)ic+o#a{~WT)oJxD&$Lb&hRxfRe?+vV z&08Xq%iPgn$usXdqj__T)ADZ|KUKHE>|p)h)mrycUQe!9V&;svzl!ZrTi7*r@tXbO z{`ayvWYwF@5g{P?7CC&+j65`xVo*Jt5+u zPRyR^;@onoMT=)_`FKl)^}J5*j=eIEZnM4!m;M(d{m$5INt>?uFQGH(Zq~1op3UC1 z$*TPnca&0%o8xhAxlG4{dONRME{|Rj(RJxV_7X#Pl?~ffc*maopbqjm9^ zYwv@*+TD+u)s>FTQvIo(rYNCdn`^?Yt7-AgQM^5Kg?@BU-BYH0U+P7T=CGzma@@Sv zvgViM<}c(_=@_{OVP2BO(&!J-TLO zt7=vrmsoO^Z^qtP72mf__g~lNBEN9!A)_rG{;m#HFAFvMs#o%vAA4Qgd98fj@m(@( zAHCO2o~D#JHCv$PV58l<5@(^_WbY`=T`T`I6g_`#YVCEqNhvRG`ua=jPVZE1S=cd0 zyu4)M(zbVxuJB4e&imlh&3aq5tu6V3zuvJQH=qAVtZT@t`2OL$<%Xd286JV63po54 z!-Nx7wRKfbNIjjrZ9VHfrP7xCjbSV2TU5WbU=d1ei{`W8*dUqP|J1 zyO^Fc#C_nWhZJ=U7weOhW?ventEkC-k-or`AjWo=wy zqZ_m&a^vG~i{4&K-1m!rKaW_~(k1hMtzN(D&wSqHS` zS;u6#j1Gdw1FP9ntxg zJ}Y;ARQ*|C^E*8JNdCFcOHclq?0@K9WD=wIG4YPSJGae$@h)v|V!Xf9R{L8bj$eG{ z9eAW*wq_ou{eSg|q4U%iZJVFjae6xAcAbil^eqfu46X(oVq^Z?_xsp~Ta#0{jays) z@iS=3-;8855PZY(*Ftquf4ouEdkw8D?OIiP^Y#>P{wk%9-@1>ka;s@9ekwOjOFinQ zVc$VX7K@&FWwu>cnO3m$Nmc#0oo%i9{f#km{p9?A0;jFFgf`W-uHb*HY`HrqBiSQ0 z>7t0 z9gfud!7)>54!@R2x&8&oYUeBWw2DW64>9Lpem-^k~BME*|c-dRg|Zh%@3FmAX(KZ_wZPxiu{{|(?M0T zw(`Fut@ay--2bQk%4|}1hsMoa&2nF(eYuy-x_M1UrY-OFrkAzuOAh)xGO&Q+DtEH-mhOxWIB_#miWGOV*l&9>S_J+CcePU%_8^H zq_;ZN>|=WM^3wBqaWB@^xqEaE^lIpIIBpeI+$_)jajxLuBmcE!Je0fZ)ZIcNcr>?| zy;$(uY3lT^H?3w?lxnxi9DW&9WdFNGMan^Keu`fGT)RC5f3{q5Sp1ivMq5~QPu1ls zPp_)AulmQ+5Omo|_42dnf&rde{CbbSZ|lh5X@#p{vXPbK3Q-&77p_Rj>JS z<)m7j$-gYx7Z~{O{1|?_)$+*{kKL;ug-)CI;PI2IoV+hC9-nLZ=E8mAvAK7R-CDF%swyS9-5c&~ z+O>|8^Jf1gW@crB1do)xbG6n@Rr(lkIr_DNr1as<#e0ldG}g?PP_Jy`5!&mk{P8JA z&&rd<*1tu!|1t1*!(5j7{*>C}DO*=0%&g8UeQ8&!`R`JTS%?4n^+{g!R-7|*>(gTY zT>7-mn$xpZ{JU1g>(coJ8*b$~AM4!8W&BW}b56MGmRk)`qBTDsa$&TVk_e4Y`L%F=&+-VH&CBOMy?5Y|)5iu=>s(bETd{3vcLJt= z36hA~b$WeP*IHi3g1FcJ|1{e_dd1{#w&LKq#>i{-<+uAz{}E^L{jk1tvXz+I#XAp@ zjEoi-A6O@T&p>P+_qP?P3)Xn2uGWD_6X*;ekXgafP2}`n$T@?N)Me$*-!8s#t1DA=)3RC7z7LD_@v-!ArM~I64uK9Bf z8zokK4{z=FSs)!RC~v@G`|8e7<;^0!TT3sw;JNVDF#RoA zQ!NkZ&X34fcJxqMJb%)=ciJEMuU0U{`DQFvQBm^~n0fo$mE5SZ4q5 zfMh9?Rra?Bptvx|{+6(`@Eb!w;kP3fE53zTLE;>w6f`y`ajD|lo{Nw;V*?GQF)%Q6 zz$Rosia`4fE<@x&T#)@B8W;93&He^57nHuXoM!;1FI;Lt;-E8eLH9I(_Bnv~pmcNw zNT>=zVApIb_L1v-zLFx3sEZgred2~KVFD!3>^rQ2CSX6&6 zxK{C9;%3G76SphAGi=EEzGG9?cZMBV-xKy`eV3SE`~Acu+wTQaZNCf5u>J1f!0`Qp z6T|lft_ytnV`x z?*HboWdFAx%l3cUuq*5Pik17nF*L0F#!ztW+m51Z-y|xoeak4l_H9Gc%5N7gSA36X zU-?a-Yvs2I2@T&4^sM~0Be~%lC_jVz4)Y(fKVW$typD@_o>#;N)CIyE;&pPdfyjF9@)H83zEYc*C&TT){a8lgRCAT zUkY*`^nNjr{?qG{!#1ej0v)u?&^t3ZjAMOrSRs=8v)3nwLDs55%tQ7M$h?I0$zibj z=0N6!tWOSu-JcHPd#z6ngWWd<;vZU<90t4Zb?eOJFl6@^qlHJw%;YeK^~qtd`^`Z5 zk;4mQzX`}b=>2;jc?}RBdOsV8&#*o@40b;uD7>$%OAdqGhX>Lxw>~)xc3&D;J%I>! zWUBoBt#lozxCE>8W~%)D6^RcP#6v{Ou07+Bx4RdqVC51@Q&6bG{cq{R85k*3N;a z7m)qoAooG#LFOU*2jpKi?VRtEkj(q7mGiv~$-N)6a=ydv-v*h#9~58E@&RQ2X6+n! zdIa&2^@HqNp`8Q2zYru3ig$cC=2R9ueLX*!^*!iR7Cihxe2-IEaQ}h$Hm9=S_JjBa zr?TMj0phEj%7VuSh>y>1kX&Ok!aVQhEP`#Kx&7gA^Y`?He^=`dhr1u0zoswzyG(yL z+&>`siT&Yl_k#Gy@*wrC{o(NYHbL@L{o(NZ0OAYvhr`o5h+ohj4i6s?Keay`9{wPH zWPdn3yg+Q{&0By1Mxv&h!1bL9}4$B zNZqdcp>X$u_($%C!ovf^zi>Yk?jI2U*8NbpeIWjy`=Rjg?!F)To$Wy={C>;X_d~xU z+Xs?IRu7W@a6c3t9w7dc`=RjrmO*@E^FaEM2eCoet`ZSm%PT^^n^YqF3*!H)2!*G=LlvRlwJH(e1(KJm zMEDQH7pg>rFNn`ki3ooXAK5$*ALIsn*miFq{JwdRx{SSn@c0nk8~8nLZy-GWK>VP+ zf$;DK@!j?Y!s8pn2bnRFFs}Xo8#qCG{uvm2iXfo@yZ=vtK_0waA0i4NS>hNNKp5Oe zhTi|TCys$(PaXuX0qr?0VnVt9?@Sy6!C4j~K-Fnoo9fdPa;av)61{(ofmxiB&?fG|iesLu+bLF-9CjR?^Gf2q0u^$aZ7 z%CaBm-Y(?LxWF7`C=OBsS_=kJ4^jgP2~eW~qX5zbQV7K$ zd07Sq2GH_qkPzrR0FYh~TMgO-7VxY?3{S+h0%I?YaKmA=kr&+n;gcYCfg z@88qEZ>Myu3fX{~j$=5S5Fnr); zU;u440`Z$cd(n9q7>+Q4(hV;|9g;jqKj@A-1!o3^g;4pENbUjM@rJP%n^t$Qfp04V z?WZou&jC?+pxeCCl8Y(}NwSEwng5Mj4oIT z*^Qi<2M&YyA_gdnp*Xc9JGC;t2+BYk$pSeCG-zuE5(jGq@sM}q`UMB$x-SfVH&{TB zXP9G%Dn1_p5c2Ho2QvIllIBqIYe188p%tXzZb z!3EtV2@(UD334aMJP^P2d@?5k12e-%kfjWex(L)!KadAGi}wVS{*e#i-^piSU}I!p zc#zM)z{kYE@C3wXVPJRxqB$5C-hgOs28ItHnva3u3y2nDVE6-~B^ela3K$sJLHmC} zGz$ZR2#987V2}XOYzz!CAexUHHXxdxfx!Vp3otOafM`Jm1`iM|#K7PKqJDf`K6cL`yL+q=0B?=-yLMz&9TLoX)_|-TdMI|Nr2nebpI)6 zKj(n$Kkb%LIh-~D0bhU)1Zg~EoyNe>+XdRt(c6^Gz`&q+qWK3~nRs{89Y|F2hIT&f zO;LH#$)ocB!pXzEWemN0K-CPx3(!TgjfZ}xGBAX~3;-FUd7|^_!5>V)ore#;mhVkb zdBb?);*S#H?n!?@23{)R>~v9K0hxBGH$_DxI`(ky7VvRJp`A~IUxfev|G)9@@>B)} zkj{qP;D$u0N_X=Mkmds=e7(&l{{8>o$)fUt=imSTFU2%0TIV;I`#=|% zHXe!wnbmaU-~a#J9IYoyIbXW`|Np{R1(zii>t&JwimqA_&9i1IA~X~;eqBOKGAXU@NoZrqxlC*Y9||iOVR)T z|M!7*PQPyKEn{f@0rD42aoU8|1N`$3@NYZN>%#EA6Kve;r6Bi1{PX=j#In>*yVreS ze}#tc1oZ!!QqlIhk*&C-Up=K=fzeLut#7@kn&geUyzqd-O)6F+OEw<1YjEA z=^ahkS#}h2(|vPj`-r3L-vBGST9)qyjA-OVpd+u>9Zr{pt`5| z4F^PlvJ%uM5Cs#U<;9EaKj84`gDZ?;11o&J1su+B;mbl`;pQU{{jd@+6q4Sag0l64 zUmzbDB!YYt(_PEc?aBl7Q|X$|%Su&x1DN@@IWTvI^4O@9u(TW~l|AkX+St$VItCto z{M#5>4wO8%Q7L(Bc%a*t=QVdPIP@BRsg!UxA7JF)Cc@Zqsq{nh4|b?#{`Njr1_p>? zwh8F!I$bw3zv1~`%JE{+PjCo*bLC*}blt<>BE-zV&|ARL_z!es9)J5W76yjqV{*q` z!8frtKl`BhrPoD;zxlz3<~J?)hKJ5%6O552!Ib%$=?rovsUxyRHC5EPv|* zCI*HVXMTXH?oQVo{4I|_CcfdwV)|dY<3$TZTkC<&WBe`6OrRj*33yTW12jOpEjav<|S>Ogux=7P)wxdUVl$V`yEAax*dkXn#gAaRf$kQ$IYNIgg| z$Xt*eAiF^3gUkfk2T}vl2T~6*3uF#REl3Wg9%LTKT##8Xy&y9|_JZ1xAbp^=DrkQy zsJ{+U4{Fm2Lg$@9c7pbufcA@k>;?7hKotYX9+3SYyFmL+KyCmPO`yFmAbUV|g7&3= z+yNQ`0NDx3wjg^!?gZ_X0jUSMA7lk0l5!k2gp1a4YC_#4#=$_^I)oH2HAxT6OyxJU|;~*2XZIK4WKXtg$F3EKzc!EGlJGLfb0gj1>|2) zT!6v?WFKgsGRP00BP2lMKp_8v!Uq(dpfCjOg9Z5?5yb z_+gZ0wg$C_K>qr$`Tu{={qGyL{r?Xd&wH@_|9{Xqa~pR4|K9>S_ifkz{|d|u3>yyo z{~y52z+iCj|NkY-3=9ru|NsBO%)oHq?En8BEDQ_*cmDsM!NS0B;m-g6Z&(-@4DS8^ zufxi~@Zs_Q|8rOw7zCdD|9^m$fnmY3|Nj-(7#Ip({QsZ8#=sEp>i_=*YzzzzZ~p(k z!p6X`;oblL7VHcR58nO%pTf?-FyX`h|7+M87!G{+|Nja*1B2Pe|NnV77#OTR{{OGQ z!N6em@&A7l4h9C0|3GB{V^t6XV+{wRG!F|)2WV`Cfq?eBu z&t1Y&!C)_Ct!1R51Ufwiw7h1<*8l&tK@kkzCkx)w3O=&~yieATFM+9)FU5&3!<8?` zk*^?tFCmwU599C?5AH-PqR!krj0_B*S|VlJ|No$|9?;&@R?t55c4jxw-eag84or@G z9xi-7j(h1A68%Pi;mBZ%(QRc)KfGqCG7vjhl;ldZ=!k6H~=iq_GC2riV zd@e409*%rIE?_&Hu_*H9_9Lvwix`ufxdX85?Dyhk0PQ2*!pOj&vi<*m&{!Cb@K7k_ zQ*qL+_4!9LRg}gZN||`4j^A z1ibk~9Qh<1`D9%96g>C@9Fe!%yK*~&rQE<$44@N|t}rn$wCw%=pC6QQ(cPfHhU5k( zZl+5}TyJjBu>=Swx^Xjr+z2`g$mJw;-B`iQz)*1V|NkyfVTA6+-^gxs=Vp3@>c#>V zB)%)ejVC~5&2{Rz5meU7urM&(x&Hru46eNG%%{N|z=$m=Fn~^qieX`3_;cg`|2?3> z6zoT|vLS%)0TWXu-y0@Jz7I?ud=HrNk=V|BPncZ!UNAZFyii3=3=AtC|Ns9CsvkK&F)wCB&N<*SctB-13mXGN%G3YJYfZ8sgwhgE~1!@CLATf|%Kv@LDhP4quY;fLUU|;~X>p*-E2DO<$`41Eh5+DKSdErndoB}0D zIEO?As5(K{0%{Y2+Ir~X=zLH+5?ySl@fWwYfoa0-$&X@j% z&muVUumXG*!GA`yy8r_!!DkVG4h96J4NzJDr8%GH72vZ7-aM-SpG5#FTR`aylwLu1 z0fw+a?g9j*D^QvRr7_T%1U+ovefaP@0ePNPfX^fVxs8-~YWes7KjK?PbL`vzHa$++J3E3wv4dE$wB+x3ZTN-`ZYQ ze4F;N;@h&9kT`-`JxYy+z-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2+%nM zaIOEp;00O#-vYYei2=k`VBlcTV31{y0WUp4cBaY)Mg|ZDkEsbTfaNFrW@MPa%>>44 zSQr>)$U*M+11)v{jdeWu&B*Y8n+c3TbA=!b8qWfaZ-B4~BLf2rgT@3w7$gqDpm9KC z^FiY+pj#I}av%)aAHcJckpYHPxEL5f7$gV6#Ox11Hot&{fdPa;dO>4LAR1&RXsivi z_Me|A=%F=_hFrdS-t>p&k6k*X+I)^OFfddyFff4T0zqS#I}}(N7(5u5l_VUzLL1&+ zU}DMO3K3&q5$IrHU^wc)$iT-a5TGWJ;h``=TY^J~lYvE%MNp%keZd2VKn@880R|_L zIV^&VY|@Ovyb1!`hd3BLCU7w^FlM#8G%9gCXlh{6YH4x+U4s$G!NR~a!HPj~83!xl zycQM)2L=%aH!g++3=9bZC5#R&3<3-fL<8=oG4i}KO8Q2*Z85{x%1U%A`1Q?ke7#JKH zJRXX8>NqGcFeorGG@NLAz}O(5#Js?PNs&Q>Nf8tluryP}z`#(=z`#($z`#(;zyMyS z4w3_{X9xM95yW9&U}yrZK4oBFXoK=WR67F$Ll*-BLpNxZ9s>jT-m-}x2?hp+DGUq@ zp!?mRT!!fk4B)xJ*$fN}^Pqyrdl*3HP=n691WAEb{ek9GL2M9S&cML1l7WF?6$1mq z8U_Z2wID$#UI(SuGcYiK?u!HMgV@f%zyKQigG#}voeT^NyBHW4_A)Rq?1PGe7GfP_ zU|;|(g*(E)z;K)avWEX8R31cu?wbSA$oB_=_-7ax7|t>T1 z0NQ(SlYxQZ4g&+jeUL&11_sc%)K3@~7@jdOFo5*i;1tS9k6DU(a)qyBxMg|5}(0!gr;v9?& z44jM%41A0X4E&4?41%Eh=NK6ngrRCc3kX50{v@G%kU3IFY|vg68Ab*MIjERCBLjmX zl&u7s`(&km}6Jo@1Q+3i_ZDwhqwMoT4cw2^6VSQ zDWSGGj_vjf`=%fAYEZjg`)s>)PHfU{>1M5oY-<~*{Zi!9YFF{PFML$`k85Gh%ZiJ~ zi+7x0Y+HXqxOPhp*X4-sf2^-x@sa<1gjtRIx=GZb=rh)eNo_lvCprXeOIf6B_bBdE z9`6Z5p~UZ+Nt^fzPchEqymU=BW}#(d)Z&%y1S%pZo$sfSrLtzhFKr~YppV|W9QSM1 zdcc*mu2Aubx!Qdd>sPy2qI^G;&)n5{GM#<(o&(o1f4`gj=!CG4#l6hBZj~R&j|;wB zI1^MEej=*9wAM?v^h2;7&yRq)?yP4wyGrrM7W^`(T7LYkR^aBS^Geh5G+*`i<{xn~ z5L4&2MRyzQ4$ghI?oa26E|niK zg-JGkit}wuZtBaJ`5Ly)d}g!x#qBEr$6h~N^WW*}k~4pguU~cjS$+M#XvhyE;f-@E4Y^|W^N_ykJI{k&O7kik` z-l+K8t?RfVpV3R>oBGQ%zHv2LZVTpp#>Zr#a4OYZP5H<}k9|G|=O<)$rW!T#t(ZQ| zzkL4MXI~!|`?8r{tKwxYy`uiJQ8`49MWeLK*mM8i9Xl6aoVr15{yJ9HLW_v#MZO#@ z?BO@fTFQSM_7b=}H+u6$@f{I*0=};NIz&z z2$T!f531W>e9&A|Ca94C6#%K1K;yrH%7G}5{0B7m+k+-tL6XqDXzgh369qMTkmN!2 z43rCY&w4cbOhA)wPz50S_MpjoqxtVNnti-z?)iykUIA!g7s>oLph;jPz8KOZD9C=~ z_6LX$ZlofqzlWwj0nL4<(A=+u7QcLG?wg0E9@hQ-`EquP9 zxz`-r_y(BuEf0dfKcg71YEe?QT}Ck)NMM$kG6WCF;&)oA8FM@v7CK?4m+ zCQ^Wb%-@6N-&JV->4a&9hQ|^#`;F23vjWY(B52|9A5DKZXi^($2gp5jXzs~FGp`uU zzu>#!ko0$8pXz6J(ntP1U{D;2R*Bs3}Q8e{u(fq#KcO9NUz~$ z0`GqV^%uZvqc2v2*G5acuLiG;mbh6BUK?#Gj=DDb!=2i1;O+)1WN#g)KLT1CJ%_sn zyf)f|s|LI_Is-HxzyLXm1!M;(xRLK^6S0J>i3SZFeE9!AKZvacye1l{s|nJA7lY;; zVG0s5YrcKZsQvapw)R`VX@Tz_)M~#qXmNZ$kX!Q&ba&f>^8()uX7PQWz$N#+fV=ja zKn5G+p0wTk-v!QdfB!Iz@B4wv{NEXLYQ8aKvwcs{sr@#=sOtNJB)0Dhv}?X?I9u~A z;APpj31@1)IcU~?o3MxfJLn!b14EAQ3Vd?k1#WPEe~`fW9dsXDLGQJ132)iJ_rhIJ zsQu=!nfv>NuQlHavTD9Ag57-I9nRN$dmzd2{lGk)?+GvXzZ>wCd^4zE z`);6A`z>HH8~8rChNPNr2dvn>7yRY>K4B8ycZZt--zPZLd{fA(`KA!h|NVd$=l2JJ zHQx-b@_uj7ul=?_r{>#)r#0UgjQPJ$cqQ;X;RO5l4O98PgYJcU(8~7RL5kzM!ed$R zS(FVTEZ-fJYQHTAsrkm>#sgZ!`o(Ltr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1cqV= z;9CEGfFHExpMhZk_y7K?-^46xhoh@eB+g3|?XZUH^Y2mw^F>O_&%M z_OL+4IY9k(&{$wd9s>gmgVq^?Flbx@G|mCSptIUx7_{~ughApU3|im+C5(XqhHV%b z7(f^#2g1ax?}xb!MC&jyFn};fFKBE5M1#f@LF0_>exVE;v!*nb#9s-knc;O`114S-C3j&*Rt*=BT5w=N z3DDUlAU}c5U;_z(&VT`(5eH(!)_Q=>Xan&qX}2RfStbbcG?tQ64Ma-j3$ zKx(WR7{F)kfY_ij;6VEhoER7woIwI;7<$wcGvy2pOZmf}5cAo?qGOT_4U1 zshd)%#F)q)r4hSry)tOMY^9Z)HE7*3no}8SK#2t^2wLaz7mbg!3=q6-ECdv3Na`KY z_%qS;%b>}3q46i8sn0~?qpu?qMAHu%*Mm9-e3!!xH2s&+_(^DdPgjwa8A zZXcR_FdCl)P5oUodGvK^YtZBmq47_m@mQ4 zIKm+F6M_u944`%PH$oA7(B6*^LJSO`G%duy%>dfZ;ULVw06OOo#0QP1ra%{S2{G_6 zfc6kf*R1RzqV_--D?N4Cf2H&kvfuuf_nSmk1pMha318ChL zH-j7Kj4>w$hJIEEznYPO;SZ8}Q)UJR1v3VQkK7RXos0|&1|kd$IZ*R|gYJ9~Wnf5! zng`mOF#$a)P3=E!7^=CnMwTL3ZuZ4kuVSy0Byx$BA40Dk5FJfk3-~esD0)-=k zIKv}G28Ihh4B#{3K=y%d)|&u6$PRQqlsH2S=zM%n1_n{6`<0m)7#1inFjR{|`~zB7 z+=662=$y4DNPHbe28IJj{Mjh>i!m$(*)Pn%5C!$mGA0Iw3g}u&AqGwcj5{vUGV?MS z;%Rl$MOs>Bd_hraL40y%T6}I|az;vO0Ryri3MalSu?R^ZC%?F~C>28>J|{mJELc)m zkQ$$ppO>DJUz(HyQ3w`8=cnc5Czc?z6y#^-m83#!0;@01%quZ7K`1CiHNleNwf`kiP9NkK=1iHPsrFprD1)#e=z*m)I z7nh{w7BH0Nk^Vxp^h|1tkoL$;qk3#SE!=DG*7})gVw-T1io9UUFhdDnl;Feev<&i&j9MPb|sI z&toVqNi0b#W=P8~NCk0ksY6wn3=;6 zpPG_blE@GrpHy5NUtE${RKgISnwJ8)+axV56LhnQ8H2lzr;~HMk)9#^_7WpK6ND(7 z1!^uafbJw=0Fz7%$oG`6Ld9TmAX$)F7zWi(AU5be66#>k{5uOn1E}l+8P34K0J*z_ zm0>?r400zc3&UwBA95!wGs9IVA9A+|6T^LI{RnEeg4&%oav}5O51=#y^iC5ND9r<< z1)#J9l$L?gDo|PjN*h3F6DVy1r5&KO2bA`K(%?H&m?3wju<=6gOc8|MnIa3lGesME zXNnvHLqt9U13M!FLkx&kXJAMG(M${sDIl7KfguA#vobK`fN0S9h#;DsfuRIMb1*Pe zfM`wzh8hsf#lX-2qPZCuT0k@p149Rh=4D{$0nvO63==@K4Fkgz5Y5lPFatyjFfhyk z(Si&N3qZ6G1H%#!EzH2M0z`{2FsuR5q6`chK(rVG!xj)N&cLt(L`yI*>;ch|3=9WA zv=jrw5fClSz;FUY%P=sU0nu6v3>QGODFee55G~KZa05guFfar+zu|ac&&0scc=&W8 z=*|_;A-3QO`vFPTyImiXk?f%lex&X)qs*~0dg6!6r6_m=G7t^@Ba z0d?R(Tl7I=X4v+YWN<_FmVn$2+FNpqs}8)k1Y{nrutOII&1b{JKxgg?_|$zfn9BEE z!A%6bZ^U7NEO>7SXurpTU)33mM8eGVc1b>AF3>b_mDV+QX%0J|j? zVh)JC!3h%2AT|tx*71Wdj6X_`hQL6E09)G=OZmiO+-Kb-XP!1&-cot+k^Y7L7hZL_ z+=qJGZ#@>)^WeOf^7La~!WKi}XK}kOp5sv5l)HmphI9F|jAQfHO%dokn|gsGnf;ZN z!u&mal5Gc8@qAsQlizu0f8TCd!?S1NZW~oPu?VbO*|c|q!pe!ubOKjDEO(cj=e~B? zuJnUq>BS;?Ci-Tpf6koXcG%%%`c7vb(N#j7TMR-A=3O|?lfkxZzg_yCd%2A(p4PEP z_N=JOIBRky3 zp88EhtR3 zO27LjitSvZ{JO0F-d7jrz*7viihMrJ=YMSa#v?F!<-{#YNphFY?N>c1VqFlY`~U3p z#x;qvmV5I)KfBmWKx2z%pybg{(oE4sg`zc8GZkvMK2DU)Uta3&G3TN9sdG98B~_*m zO>JdXh_cT(5LG7Jd~w6;0^x>mX@gw{-0yI+I{g;^T%te!^ZHHw6<<~>CfUT+MqS!B zt=?6LzoR(I&4cOEhv}~))6BTi-=7rPqg2amzADUi+stV%9y6*r?@$eUd?9G+M_;3p z+sbq9Z}=U$(&x^t_F{4Cj7-KW0h{AiAO5)|LvKm2g$;+#`K+D&)(2dR!?JG2&leWV zwB9xGaY*>D&by)Z6>*!~C)Mq?0ORYUy|L>YA;;p~rTV zA=#oLL%{9)RxY`eOI+WBEaG<+&v}+4%3fo& zwa+7}^sY?bD!yWk@{0OflM*Ec?5i1d%}*C?XWlkp;(>QFLh~h8 z9P)c`-*pmC&5ZeZeSHqQ&cFOqU9{p-{Y2~P-#dQn^xbX|&dZ_fDlIKNvd9YUa4MEX=YA}Ze|Jtn3s`Q zoWY=%Qkhp=nG2yyiXbv&sYS)0xj(QnC?~#%L9Zw^2c#atD99;c&;!po>XoEclrZRl zXT|l3^1(B5dZ`)lX+?>-sqq;pMGSBrL`OVidKRn$#?DGEV$cI=1=~`T4|Y*vZe}ur zUV45BM2bN#skj*I#Q2odq|$Wo+$qSB5H3hJC~SzupyO^p=fZ-*40+ucOh0H%7l;kI zW9Qrd|KNLdK<7S!a0DX*19V!A0i+IuLHBck%mkSSx)%+E6IdYa6;K-iqz1IM1T@hI z(hE}efsKIygh6c-kX;}QQVXI%>$Uzv?Y+gtzyQLak$jL|kUU5~2!qzKfbRbRu|aJT z5C+}12eJ=j7KjF^4`E;ct!4n7*~+kkn*o9uQ2haF>%>CUf!2Z*@GvldFsQ8rvKMqj z5y(7{x-`&Po(zyRdZ4x%2qWLK1yTpHHxWtQ0$v6N5LN&=79NDhQy_Etdc1z81Jj|0LrAdMhJ&~_w<37Sm- z34_!juMY&tfiTRxJ|y!DA{ZDzI0BS_K#Gve15L|;+OeSU0<~E|7-j}YDU1y|I~H^V z6-XVZEepahIb?O9`=&we1F5@{%fJA_*wlg67s1ql=5|3CG_wRU3xq*yr$F=}XqhkXq2h6-*riXlknfGQSK}2F@QK zHt5V*khvgx6+mhV7#Ipbfew;{uJr;jZ$rZw#0Fu|S|Lz7AH)V>kewhJbUq=-UJx6E zRSFmw8o&!mK|Ij>If4e+3E?p?EGcDR_zB~n*@YxL${Y=W(GVC7fzc2^1Gv`z7np$7 z{4+4{+=Z0NCJd1E|1u2H3=k27K~wfIGJr6+xQ4F(XF12n0K@q^yEg-*v%mB4PK=ll0{r~UYX_KxV5C6fR@NdV$YRS}1sn;W$85qF#Due1_P&;ZR zhen&zinfUX>B_*+ zBg?Rw^X@`Hkrp8a{f0S=pryE0O^g8&4veb8hZQ6>SRz6vI6ml@ps;|2fq|7xfx$PS z!f=rQ0|Q6HBt?b^6P%9t^D$@~)HRi9L0)GLiWy%9$Qs-r5C@8b85kHqOQ9ne7#JcM z7#KinvqAU&f~4aZ7#QL~3@8TOQwcf{B8366HW?(G&cMKs$-uyn1>!I;Fl0k%P+Jem z1XFno3=E)k#~==<2~iAUFfcHH+ApP0b~*HZ1P~W?A3z-g0|V#|0MOaEpzsB)gaOIJ z&i@CU{SR6V13JqT`3?Y(ntteA0Fyx+=v@HQpy&V30O=q&#$(DVF3d{F!9I`mwB5Fd25Kd3DQV&4N1Nay^6xS+HCLG&ZgT?4YLy}P26 zQ@&l(ViBIB`RtCa?Sr?|@Ayb|U7HbN?h^UFbJd0&^CxQWimnU0YhwODxb0|z+!Ibm z(EbbWH#@KYdeSlJ_N{l8uDli;wriY{o~*oReJw=wpZKL0f1igmh#S7-jrf=SYqt4} zwDUd1lg}Fa@91k>bTLfdMQBgtjH$doS`IP_rt4ffy6B1A)s=U`X~&kG9+E4M z_ps}Hh^hD2vTaE+>9sVe&1u-RtuHp`*^JGr)Pz!x_Wb^&{4L{(+^nmvpI={`d%&FA z@7KOPpZk}~u39+jcc7Zv>HJB-WdZm9Xu0o|*1mpl^X%%Gih;A2#hkoazxz%h-|?*( z85&pi?%4CorOhLz^z7kppuH#O>g11ByfU2cT*UlM_>bI!w)y}e!|4Uf&hXBBeK1*5 z$irrvb#F>{mCx29zE)nt2aI=rWZXNS!tFjiSZay4p?Nfi<=w@a3hPDJY&;)&(l%*D zeEi8r+!JKhzWsdh#K*q^zQR-PtYna^?D(N4&v@O(^ZNSP`+}b7o$x>2)#zGyq2#;(>x*3`OiYHFS8q6- z+V^0oiTJshmi8@-+RtAt{!Rg>n#~Lf^r1Ok(Bd_o3Ss5e9@_upcf>hT@bNKf^ z(me)BW60P6)JcX4fcED=ZU=z~fcT&^4dH>-_cJh{pL>hGf5!xL@C{T0NWTG^`Rr)t z=qjS|C!q1gL4`PydCh3@XOa3WAp2IL$@ieS=Lj0#7tMX|z?C4xLXdd}(aiq|sw^PV z;B$VzqNxYnI}Viw%OjWTpgm(Opb84A0AzkQn*NPw?&kq@z>(Cy0Cn1s__xsbp#3vY zX|Vl5X!3Gs{+)_uACmLH`>~kNAjmCe27QTPc!iN#f zJ+Qh3WG5&*<2WI|KL* zC6M}!ApaoQSIWb{V35Jc0BSdZ0BX$M`haU_Kg<$iz89-y3 z8c6z|voJ6?xG^%Ma6r_*<78ksaG4Q&?-eL~IhYw3KD>t9R|GP@frWuV;1L5uE7ZJh zE(V4RE{qJI_8v$cbXS z0Hs?He<>>i!-MGz49B41(FnRn49UIyAoYHX3`tP?UokN-9C*dR0NQH{(qF~Jz>wg| z$N*|%f%pobG2Imm450fNK>U|%3=9tM7#KipP!JzfAr@FLFn|_xgZPU;>0=iILk%+| zJPxoiFdTTpz)%5oPbfD7gMvRJ!zbweH_*B86Brp8CPDeaYzzznOBfgoSRne_%N>5>o z44{4mNd5;m14BU!BZDr~f7>`17#c1k_Vf9l?L7kn=t46PznqhSA>bPW1L*E45Z@A1zo#-X zY=FAw4v2pRQiupJNHAD|;@66SVLsG7wcHF07xpqRY=f##W@TV-=w@IjgXRZj4hDt; zI~W)eq4J>prv@$v_bvqOarq9}yA86RnT3Ht2g&_rpzx4mWcUS553!sK3=Iz%7(jCe zAoX6H3=9im85sCq4v z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85p9|8$m>%IwWg{%!1@N4)6n*Vf=st4~M z0QGz)@j%w!%!Sfxp!6;t$o&y-c_3^2LE}!KHU3XBAooXr=2nr{_;Z|tjAMYz2e0vO zgskyTm;zbjZ_ox=KDrGD{$9{3Vzf7+`DsL2Kx8 zlp$;SK|`{jHT}yLLe}(y&RQcjRt%M7(G<>^ox9;18qWW(F ziuK=ALK?m)RMmgG5!CQa2E-0&_;#S8{+mEj{kI8?_1{cD{H*$KAF}Gdf!6tNxLx9p?cJ8VB z7I44rTSHL8w+~0^zD?L$_szhn{@a2db>A5FL(~@()_*g|um2XXv+kQi1tbmwcGP`4 z5Zv(XKu-O)1o!%HAF}JeO~|kRrchS@4KxQoA)(Ga^)O~YXQ}-=wP2IP&HFe+0*3^A#TT}OK+M2p=%huF=+qS0e z+p#ru->$8x`}S;2-M4RR>b|k9t@|dnw(gtS+PZIMYwNzbt*!eOwzlqD+SFtFtNV6rUEQ~9>*~HeTUYn(+q$}M zZ0qa3iLI~urnbKBo7wuhZ*J@BzJ;x?`%L7}U-xa<`nqr1*4KSI zw!ZG$we@x1o~^I@_HBLLH?|FR-^4c5eN)>|_swiW-8Z)lb>G4^)O}0aQ1`8DL*2Kw z4Rzn9ZK(UUY(w3*Z5!&o9ota%?b?RAZ_hT=efzed?i<_2x^H3|>%OUNtovrRvF@AO z#=37|8|%KMZLIrNwz2M8+s3+Y(>B(9Teh+8+qR8$-;Qmp`*v+(-M42O>%M*4Soe)> zQ{6YQO?BVYHr0JI+f?_>ZByO1uuXN}(l*t7E8A4}t!-1?w`rT|zAf8S_ifvzx^Kre z)qT6RsqWjeO?BVCZL0gmwz=+`*yg%#YMbl6nQgB7=C--+TiE8hZ)uzBzLjmR`_{I( z?%TA@b>Eh4uKTuabKSRNo9n(^+g$hU+2*=$-!|8MW7|^qO>9fuH?=Kw-^{kueRJDV z_bqHo-M6$YkhF%LhnBvAq_+>(>b@PghNcFzPy$^8Xbr-<`fmYG>%JwwtN*s)aox9B zZ|lD~ysZ0H^sfG!!N`pm;{-c+?+q5K!9rU%TpSg2;mvV zgOn6R)qhin#;)%Gnt7o0svte&Vo}Zp@ct`BPDmN4#R)0D%{d#sfu=^>IUBx#)+q;b zHhcp`K?-NXH_+LT@`I^sO(JXm=gH3Dq>FX}Lw`+(RzZ!cCIt#rNHWw+9<_)lA=s{>}JhAZKm%#+in^tcM1e> zUu21XGN*a={i<$9mtWn#o^Q$CAU&&L*Sz^1Prg14&Q@y6nN~lA{Y&N*nI8{k?ECXN zK0jeYq}9Y36P$j0$%$MOZdk5)p5?mVa>2&BrI)xKD}A_PwrJ^&_%FWE#h+J9nQ%}` zasJo08^7@|1jyW;Gh_S8YMBE*%5lL{c9J)OAF96Pj|ejL_%ip$$x4@r(TWCd z7hAlNkqpf_b?IaJgL@}=HqMEgF;o7M1j~olvL%yk?&_bcX!U!%L+G;8-Z#jgEtiGr7!)s_nGOV^uOC5aHjSN_fBt=Wj^uG<6TN`pu>#b z%|}z7PE+o`oAE`!@=)OZ-TwDZGHuoVk?_9o$zgG}HKy{<*KOh0&McI+D{e`PH=DX> zNd!wtWL`;?)q_i1Z}v)=JMzDZa}J%Pe=X=~Sl@(Gsa7rRt~-{`{8pv4g0>{x^Me&bPod4V?@r^ti^fzv|Raoq-H^b+3PcC05P_?&r?xd8IK_5u@;AAFO#E7#{N*|Oh0{M?XuNJ&kvadZ^5Wvn_Pk$~+N=Cp%bmcqq51Bk z#Kl!PQ(QOgD8BVIs*}6@=^B}G$1N;I#e&bKHpd88^Cv#{oW6O!h|{;5rZYMAwx`Yc`-(;O7T?x~ zQPUN|Rz7lx+OKkFpOwnp?~eJir+l(go%(vV6Qg^ulyS6FK}o?hv#(-T9&ML?AIr>#pma`5P2(H+mEqG_0~fziPCMfF zr`hp|?B&bRi8a-;+RmN)=lj;$pR;r2k~3lDemi7O?w%Vpd)eaWo2Lc-ef{J4UpuRv z6&zQ>jc+xD=iI?VAcEm_>4+Vt**v@P3|18Q#()oGpS-d{Bdqv z!*iu;*fClTnB zm$=D~Z~4{-t-3kZ>rchAR0l|S)zk={Q<5i(w)1VR zx;W{==0)lO&B{-vOb@&MNBr*=PMf`3lUFhq8kg+ocNVp`)c<#B%f!R;&(D&%T=dVc zU&!a_U6VM$|K+cZ*VZ<* zyIYn#$aKx>dZU?{*yI>_p?s}v*1eu{4_EJUFMDj<^gx&U&eThVm!2j(h=~exSZJ#D z?#mCxpC`;Tr4{0Tm2dAk!}#~g-m^E~+y8B?m1|n#@uh6O)ElWC`}Xa7t5o9>b3JHt z*|{_a%bbpk){LgmbIMQ8EK!!;6m@<6Or}IePP58+6Pl_Y@Ctm}n#bpO_|crpHXA3d z^kinAr?yqeuSNQozSY7)hX6stJ3PNtXYWbRlFfAf(RsVZ>au81uKK})Z#*39EH14o zU4BxtSbNLu4IRxTYA!lw8y_X?{rNU62T*7M8L@Z4kZ?&vg ztNQ!u{cqpT>b>j{tz!Qmrk7b7^<#1ND(g=x*t{99b~Lg7&p)kNI%!D<+uIphzeQsw zi0d45?>K(t+2jdvZ5N|ArMpGBG8ElD?eSoCS}tehR}P=UzfUSmOyO?XC7fpx-OAF$ zCRujMe6yjn&ZQ~mr>)G4X4%XctN+0L>$a2!2R_tlXdg6uYW&b^)mj11SGwCDi9T)< zU0TI3eL~1{uH_#=`z`kU3bOl|y{nCZ@fiOLBL;?^XA?FJ>pf=a`6YVbZEfJ4WK`X3 z23oQL+A0LfeIcpgDB(y=FgHQ1@to)FSUSGXTv`gD@ZJdSp-= z4zy+k)W!wbn;^o#0K%ZYGRQ6v2KCiJH1b}vWr_?8APia$0n!VS2k8f4&~_|PKN-XZ z^_4*wwAK~mCXg722B`<6YU4Z2SUv@{JgW&py3_L^56m476??giB0dp#eH~7@`4ruNi2J z0)#>9ydkoX@CLDw_nI+)7W`x~GL#}Y5Y&zasROm$LAHRx1$iwxNDhQS{sqy_I^?}(pfME?hRK1H!q}j=1i23s{ygUx89*2& z2UC|(dhJ_8`^s+uT`RvG=vnzKW3Dau+yPwT5*63J9hhbN9i&div>L1yo7jn}YbfTS z^YwEwlR&sQu{g&Fbhaz#aC?xW8tT4PBs6?e@N4+CBe?-=26%jefq~&e5~Oct;n(nO zg9lM)O}+IuLgve@&+1?6}8vCePGM}1}e`$>#yV)7#KkL)T6QP+lj`yZ%djW{cc$Y z@HpCkh;9Z3&^Veva>F-BQ|KhT{i)g zA`#{(>^NN)HRl2`XFBfa4p$W5U90+NwPgM=wa?nqwUw>^1~aGR4? z_iYK34N?cfYx3&8ZONTu~NR(wic-8U14 zx^D;gLHPuf3m`g0py4=U;r?$6*t5as(17m!0M-4V%0Zpgql?dk;WsAYpPUV0S~t{c|#t;K>h^7D4#~E&$a43L{YZ1EqVA zy`Ve_lENkKv1C6ye;~7eEZhHW!>+9FD^?=pv56teBeNMAR(@kBxb|&F(Y0@&dI?mI zf$FslO)I~F+;-t|1-R}4xs4RH*z{u)1BDL=7pLZA=9N}}YBoc#T^Fjq1*A88dvLq< zTSpe8ZUg08klcw(NZkLpUHdKLPVKjZJGJ03NQXPM-#nmfkU9_!xKsNr;!f>1jytvA z1VC~i43c1AU}(5g`>o?n?Y9YcYQGgAiC5gI{kGsv?Kg=#wcj-E)P7UAQ~S*TNgk>l zOl`PR`)vi197x{*BtBRX4q^w9>TqZ$TG--F?KhJP)!@6(Il#B7K(ro#h9jsw!@!aK z4Rm%B=-vy^eK?>xF5_bLw~R~G-)3B{28S;wzapP~1iDZB1;~sG)!#IJ)qZ2RP>VIc zDr7c%JCXs3Ggy9o0ouUDfT-6bE>wW+0J#j7Phm7j3>nXOPz@f#1?3r*=?vc|+^+ow zYL|lc&VlMtkXivI=>AF2J~wVAh5{A_2GG4gAUP1e0&+LBT@9+&(32l1O@i_*db$LK z6};`2-T=-cAa{Vw#3u*R1IkY@wdj0Mo`cCDvqA0v;pC#qf)YgTU|@Jq@vR`M;oBL% z%5M$14d6NrlutnJc##7M>nnbh-+cTlzq$BVeiQMp{HEex`Ax^a5+2SVwI=?R-)#IV zzdiA*{PxDL^4lFhgnWvB<+mLF%5Nq9mES^;^u<8gU;HY+vG`Yh`{P&njRz{$1EoP` zgYX>x%5PKrE5Eh)SAMI3%B_LYAbEUv36bjXnL&)4jDO`flLr;wHoUC(#*UOfoD+d$3SORfYK$XFP8DJ;#}9pnfihM#eFZE5LKo$YS`|d-50< zTo@U^dpuz3zCisBvMVPu2_yM|(j+Kx{>gjejV__hIL#=eSg8T%@}MIg!F*jMrG!M=)bFZNY@JAovAVPD0!ANwl473{0{ z*08VQTgASLZyiYTAah}uV}Hdr1`vh{fb>Zq@u9+4DFGtYVbx56;Dmh@-%K_Xek<5t zh|=G=0}V$|ecQm94W1W6X~%6W{Fbq?@Y|G)h2XLTl<3PnX zh7A>1)4fH0!?!zmkT`>-`v%YjPDqAHT!zFUNC=b`k!cVc87pilgx3p8o-q*Y?@Zuj z2cN+LX>dSHdIR-4$gZ5sB#h*TbN{~@WdDE50+3D+8?ygjkwF2xT_0jPgj7goWB_6C zRxRlM{|A|j3=b+HIDwskfkO{ke+htYU14C@lE=ufr4E8Y=MjN0s0;$tcOVQJQ-fg_ z1_lNY28n|(X#c-}CL;q3FJWe20AY|E2otmaAK87NJw6}|(hKq}hz8Zapm7t>{{M$- zHeKHO_glTOlF?a)w8P9Br~SVRQUfZhKo=v=@j#!`^6o&>mLMc?2L~KL!Q{e-HzTL1$Zm_ToUfC=}?t0+;}33=+l$ zonZiDW23_uAp4_0=Nur*gU&nv-3ta11C3RJXk?6h20{Xo1nA5w5Ery(3`8Si&>0CJ zKJqyUpz%$R80fqN(Cr~0HVA{xP5{xca}z*p7)CxrA(w#xbd3*K3e*M!?Y#qyU4jLm z1nf)&C>MOT0*DPeUjcM&CukfKB!&%Fq6vb|U;qhKg9ru&2GA`fP$mQDTm~2$H0B99 zpP>mV02()fozno?(+3hp-ct+WgD~ve1`r!`b^~bt5@=i$#D`(n84e&m=w3f)lL5Rp zaSBKf51z^Z+2b~yfq`Kr0|NtWpYCiVJ#)~`fSAX?zyLb`VF3dJ_};+93=9lQk<>4P zvR6Q9Yoi0RQr{hHT)B?juV@Rm`xlQXAe%NcQTIwx&c%7GMX7L4;hK&yF$Jcp@ED&$TLQx7?^u{-#q^zvV{7Rok3z z*KKpYg%%ZWxNn>DE%wRQjcafA&A;7Tx%~2p6NhGn+gH4QaBrV{(Dd&=C5xTDCRiMm zkr3PVHCfQMS>C9_H@LC#{dP7vN6uZ;Zn+AZ@vPm=z8 zR=JfbJoZm+WT!OBSR7T->%A8%JaxUYUP8Glo7B4VH$#`cW!Rtk(tMTU$?M!XOkPP9 z@>U`_zn?E&@iDzhFGGci<@Xb-Wm8sMDv}qzSygWFqb0L}Gdp_j`qRO|#tXWG8!Ho? z1&>WW{pzLl`9&+P{<$G?WTjTdC_7aMJIYL~8^-Ni5a`G0=^ zi(XEu$+WLsG2HE0FB*iby4-YMJ(;*%PG_Boe(Ao;ucg?NXZ`_g%Y?=ngvtXI%n&Ac zU%M@+07v3?qwzsyJ5(Axa*Dh!9&}~_=ngBGJZK-XDX1cV3V`_N`?`@UO^`e&okEo} zfXoA(Z35$i;VaZ_;Zl-gZjz*XzrH) zRc0W?44{3O3=A7Ul_3)UA(DQOd7%0MDh=*&aH8q=K?{E~H2w8x>f6xxNX`StM-Q5L z3P=h-?m<2i4#WrbpJDC;@j;g&A@f1yEHeKcn*FoU>}x@D{|Pkppnamq=G{V5{{fA^ z7tMTar0@pCk21J%1u+ri{(dz3KxG+3mI0ieK=+8k_#pMjbtb4yQi&E`6VTk#gyx=7 zGo`LK69}7ObiSGK@1F_`WB>K9JFuy zIs*gfOdt^dJ_7^80bNL41ma(0VqkcX#lWx92uyX}?8LqN2FbJGuV90{HZ#!t;_bCRjJ3;1c zWMg1>z`+RJx6jKE%*Mc=aD#ziJ$TnIe^kf(#%3+oSP6fzEC40Jp&zK>9<`b0|TgS2;wV)&WWgprYFzz_^g@1TA32D=#;K>c)(`c+H}3FeGp?GJwuo0LgnJr8iJ` zfck?B#S9FfzA#8W85ABxuyYM~8H_;TSHJ*0*MXN|Iw=0#7#Kizu!GdAgTmXNfdO=e z7l^M2a$f-h1E{|P;)f%ZHz59IQ2I?{U;yJP3nr%s>S6{6kQG6Vy+J3Q>(hZo`7|C9E$DvH;ZY2lbCZ zY-9}T1A)%-Ll#43gZgsFe57Imd?pD<4z}M0`TRXCkOU44>brr)C6J}fkvY(F`p|^1 za$)^OQ2Pj}NrP1_x*)DG6LfW>{Lv5?4S~@R7!85Z5EyJBkTAXBo4|C)oD^2Ky=nx{ zd0~}<3eM_m{3hDf2%d|Q>uUVgKcx}8A6Kob@tb~E<2O(n(YCAcn_E{Sc%C+@tMOZ6 zS0i|DUSU_`x5}t-cSL3&9 zU5(#Bb0#mk8ozz$Y6P!O?4Hv24TM2$y+0s3yBoiO+I526jo&1?8^L#cDReh})96O^ z4`>+SR!`%%`W}dz4Z9n^nRG+k?9ko#&AA)m=EUyCZzVdccbpP3ZP&{-uegn1JMY6yQlHnzMjT!pncnydK$mo z>2Lf7+COj|#O`VQ2I^1z1)0;+_zkqa{ZmilH--s~-$1M8zV$SIQ<%^Q-e>p=QhFP|vGz881MROA>uvld-P`yL)Fw3VZTx22+xYDlXdh^AXXD#Ai` zw@-lR0qIwUssriQg0k`H2kCK!+7D7^0@VW=&apyb+d|o}_yM^A6t^x=agaG6F%Sl^ zx!ECS52&$2&K`K91R48r5oKfmrD@RIGbjy%>;a|gCzXh^2S8#BXBxkO&LD^=Yyg*2 z8I29#GU`TI1Gwy&&d$I9>gR&W8<4vhK0xAs1taPi1TGUBz~xX+cLTT#+QEuAgW%8q z|M?+O3=Dt&|IY{YJwW*dWFBbGg^VI74=HNkVTR{8&)h0K5Gn?G-&24hSx3I|#-_j;G zd@GyW@U3lf!?$UZ8@?@@-0*GNyw<`1WjS!?$l!8@{nkYxpKMt>K&6w1#hH(;B|HO>6iTHm%`X+O&pm z46uO<9H9V8+iepXzx7UN{5Ew$>360-2PiXwMZ9?O>{m^`Y!{|}r(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7&IY(YyJNRe$bkK28IX|h*M$r|4B1QfrjEBf>6>&gMk5rL2F?^OWZ+Y8XkHK z3?6n6yn~T}0kl2@GzJ2a2aO#?=rJ%v*g>!WBLf2ngXBSDGaw9G`wyZ)V|gG95(i<> z`u`3^1_l^bVPs$cVUQdM6SMvw-F+Z8g7kvi4x*9Q|A#%;#<#nB!`_qYKIdtijlNXq z*JA)0Qv{8#f`%7BSZGm46NAthrxgm~TC5M83{DFLEa0&4)n4|FC7$PCar7tmTV z5E~R_rVI=Wpfv@cvp_&%AZ*3Jz+esCmjGJxzfH$&KWnCnLT~5eiOK8!@x8wMo=>AP zDD>&ES^YkOR?pkE3FMl6GL*Q@rge%>-~DX+TrvAx*^e^<1+AV3fbhUmV{NA3;0r&t27bT0jH=i4FBopitCBTWAXJ^(EV z2YCaIL2IU99MGCT&^R@W4_cE5TC)S=gXRj9K?x5k08;-QjV}cr=z}N#$%EF~KzN`v zS_}-8X!4*tP+;<)v27VN^FV0{CJ%DYUo?5p-7_$GkbM%jiw0n-UW3=E*PBOv=hcfWuRe1*AZAt-#rkmMN|7#4^z zFo5K#T#r9vWnS2NMIs1{ug+0}$T|WWFRqKWJ@Mfd~Wit|J}>AyD`VBm4te1AYO? z|G^;tiXzlc1lbSD*x<8q#2Mx?Gcd3q@kBlw28N&DHG4b^n?drR$Y%hpVf^?%02Kd{2>*iC2s;QP%m=M? z{2+mF4-@DDRAGdDpt15dpb0Z@{Btq*Ff%YzC_>gSg3_ZrXiYAXc?|LK>ACrN@x>*H zMJ4g^4Dp$HnI#PIX_Kz`FW`!iAg!B5IO8J@yQj5 zAOjL}GOJP<;=Rh^gPRD60WShOfJFFoGV1tyx6pP3h5oLXF*nV$#J1d@iyl@_EVmZZXXMX6=^*>GNR zMt*r7OsY7wq#(5@7sgFVElw`VOhTy5Nlh$*N#oNwtkmQZhWPl@qN2R~_?-OY#FET>c!(gm zI6gDKj3GBMCnrCdA+0DC9x9o6Wr;bN$RP}JKtXCzF(`>3Y=VVmJj4iSY=VLZDiR-` zS)8A2X&GN!oSc}KhRr)rl|>-m6=#;EfLvcw_PHG-QT7ChDOiwK-1_>o+6oIMS0*2hw+~nK>5U&U%nwFfCU!2NN zT#}MnRKyS;pH@(mnOBk)pPT_s3Z*5PImPiwrI|S?@x>*u6bKP51BC}TQ-Q^EGLuqr zKpU8iz`LbEEHj39P?k&11{oKhmYA8t5T6P@buB(Vskj&n;zMLWBnT(APGSPJJ3;N3MbNSoRK$bqoqX~! z7fcRT&VuBa8JHL*oPx-K+Kiw&71SO@Rs(Y9WF$49dJv=rq!v_MgUkWBW(txTP~8Yp z15yi91M<;Ss2Y$MsJ;WK0jUM?L4M0;W&kzuL0pCs$xKdA$bEr|iDza)PId>~0m#6> zP%ICU=VIW3@41YkhC<8-@Jp%)1KUW2amS$k60nuU%3=JTfg@K_3 zM6)t5bbx5k{fZ!(oq=Hjh?Zkum;#~=85m}OXbuL3IUrhsfnfoNHe+B|0-`w?7*>F2 zH3o(?AexJTVFQS^V_?_h?ZesxB{Z(85nMWXdwoMJ0RMcf#Cs&c4T090-{A27=oMMaJ=}<$iUEexY&?^ zp}QHh3A6P;3F`~c?RU*bIHC_T{ND@;-2aO~@d}E>|BFGZSHQbiUp@dG-mn-{D`$YD zUtR$7L8&qWB>3_Gm=EgRWPpg58^C-}YR&*PFJCSI^FhoEP`Bpg1TY_zYBN9?@nr*; z50c6NHBDa@fcc=EMj4=1%*zBYAEYz`v<>-X0GJQz?PP$q5x;Z*^FdlOK+Eu78i4tr z73mqEZ4)mQzzm7#Ln&0P{gRlQSlO_y@pzkkuKWrqs&~U_R)E^$gG!)0Ydte2`NzKuhCa zP5|>kJBKqsNA&k?TE=Z0OBWr`5>oefUXmN835*kZdK2?0FrkA z^FdC}05ug~8i4troxB;K>nUF<{QLjETSnz@+5`k_J;2`zS}V})qN3BuqVgi<-T(jH zEh;-W7#La)lm>K{sKmVF{rCU>aTgU2P)Y!)+Xo6KkYat1Viy&kZXXqoPL7vP|Nj5q z4dOC1|EMeBYyQDga-!2k#p7i-$YK{2kJlfeMt8cXuynhq#DEO(djJ1_^N;_fQ<~5H zf4S)I|Nj$uOVk*8n|D0?|G(2kg`>L}v{wDNiwgMaW3b)b3?Pk)@BjaQS@`$={}-SF z8{(x2!7rrV|Nq~3c#<3g11PzldHerAINdXYg{wirpoFd(9cLYDt(pQx71p3S8(hB? zG3XZ*5+%f+Btp`fZ&te~n@3Z+5( z6a`hS6b02{1y%48dLsivQ(Xf~T>}dSkbU54P}fk;RL_!ufl->-8nlNI)c5ar^Z!5S z*oYPH|Nl>5WMKI5{{R05Mg|6t5C8vzj$@ed;s5^wj0_AnKK%dxfRTZL z|NlQ=Vqkdj>HmKQW(Ed}&;S1`fZEuf|NnPjW?(q+`Tzd}W(Ee1FaQ5HfaJgY|Gxkv z|KC#eeEI($bb+nJ*Z==PW%Z1&|NkejFfe3%|Nnmr3j@Q9@BjZ_ zVPRmn@%{h*FDwiU9Y6m6_h4mUu=x4^{~T5Z294kU|KDL{V7T%7|9{Z=r$2uG|L?-a zz~J%c|Nj&a{r~@e(0(aUNdqdA7^{L97;88frFmFbIv5$i`$0jajLU0CcrfsBxbg9L z@pG53R4~{}S!)@oD1qcbIp5*k|Nr1U7mj=!%}oA$1{Hi9j)(bJK=PoRS@7=vfAHA{ zF!=(6Jg5*@fJZ+llV5oE|3Bz1S_Y_og#?6tP$vHH?*D&K{}nDDfshAfQik{c|AYFo zaQO^`JZRue;XQ8sp!8#aN52E8|NS1f`#@=}0FQo98k~T~eo)$6fX94LnmvF=9+Z|J zyvH5>pfoP<0eAR-(!Rk5-1HfIECad1%51+~EhxTO07`2j#f~c$ zU66bV@h50cE2u03jT_N^Ujs9f z50=n#;s*J14+{f>%UA086V%`m0PXqx`u{&@+!$0Yg5m>oukxC&|NnzpEg-*x$~c7z zJ`U%@d@LY;xUe!X-1++dKWNMbB##l^L3|qonR2lD1JtN%VP#;L^W*=2a9Ip4c#ZxZohI-aeNYb{w0{OPhyhxo-@=VpqYtX% zK(Y7x|9|k>e9&5bA0D)|`r1w4wfZ1CL28M?pt)|Cx&@O&zbDu>eQPjm`ZnPh`*((H zw(k#;*uEFc5dCgo*7S|RwCUS{4+7s0m^6J;Flqwd8F<04=^N-yvj$^G7+<)+`CZ`v z$M*tnw(kpa*}gxplly)lhyQzkY120WtEO)cE^>ZPux$GF!MN$$g0lkPvjcy;m4WXO zfVlU7$gV6#LWLAyAPC3K^UYL)Vu@Hp!N+YenDsZxq6BR*zlcB|J!goasR&A$3w0} z896gBFo4dq1EoFCzBRX=J?)ZxK88nn5+qoU@NH>KILIKfSizgYiQz!gVgoP!1}ylOL)bJb2O zf3x#?Pt~hE*A%_+mXv${ZNi=4MpNj6t`Zgs7*HEh|1sfx?x4If^COuj)S5K zxBsR1ygyo;PS)Jh_`PfXZT-u*O8l4h!;Od9r511bVE%TKDud3c_=h_}1s^MJ)%w}+ z==c7=mluEd?yJ3?|L>p8yQ6ZeRh8RL`z&C7owg)tiSEL^M|A|Ax(B|zHz~4M_xIu* zclN8Py5~&1VPr9353`fsPUd*SS^rk>F1LL1sAT8ECl#&QemfU5^6*S=kX2LAoi4rJ zV_ur58n^!!0fT+dFTHMf6ZhoE*CxhrrPT$#!j4ah@6B2H`u*uis~hr8IqbT7$D(}g z*7ssdwuZ`;JSpC9He(s{dqUEt~{2Uvb<4pqw#P31;QD7oOY<_dTXWZ zv3B*_Su@@7;EICV7VJfK*BzbT@7Rm?tZw;DzUP9$S z6v+MP=ceVOnO}~^pM=H_MswdhH2Y>E`4{9LGc@-Wq4BqY90tW8_akWskFy;|vws^J ze*&8QyU^m-5>0(88Xq)91GOF;A9r9J2FN%c=$t5+5Xe7E(e!7d*}n{pAA^>@LeS(v zXVoH`Uxg;mhQ^OV<0GGG2?{@PH2cucArwXn|C2Dwq5e%liU5##S!nTXg(e?~W?m^; z_=D;am=z%NuAqhAGc^CWqL~MpjX~D0g{J=`nti{}`^Ccm8h;9ifYh0wH8+N!bI!sU7(i##g7^xY3=A837#QAx*O>4y z{9|WeP-sQypA9<4DGI>{jd2PXF))C}Dna^LSr`}=ctOsa1@RAp+~>i-;0aw5(+XO{ zqtC$L2<6wZGca7Jf~>6ssb^thU}%VAU?_sh7cw$12?wNXIwxtt6P4Sfs@pf!#l{ts3Lh6k|>450H| zLHui+3=9c#7#Kijw}SZTp!lg|U;ypI1@Tw1GcY97!p^bz;Iv*q^tpj=RJ`AX2`ivAoYQ43=A8P{Qr)f zf#E|7!aP|}`t^p4LxR+oL(laKf`;dMP6mbt{R|ACatAxmVseDRDLTc{EQ*% zVL|fMpmV_jVCU%ZFo=N8&6~%-06H%eB%j8?z~Io%z_1bOzZ0PHz>I;R8_J&n%8xY+ z4DnF&IXM{^9C{$_KahSuRtAOx;S3C*b9_PkKb#B<2j(#_fZAsuK0j#w+?s(w8LEFh zD+5DAGy?;uoC3+SgY<_mFhoJquRSXRLqRyg|DCK13<*&P_uc{J&rSvgP#Y4gA2g3% z0y}4ohoKEEy>zoPFbGsLFuaBO=QRrhgF!F@LkQG8X`u9&gh-EfKx^F07#Kk9W{~-y z112207#Kk3r-Ar7%nS?)whRoQsc#TJ2b3NoVCM+(Fo5Q{6kHe>Hbc#~1Lc=CM1BbX z<(EDN22lGLq~8j3j+-|FLp=E0KOTl^HU@@(B-pu-JPb^rbJ@%h`N0a5p2`^*K0^H? z1`3Z>M0wE5!N6e9fmoBL1pnf3=9u~5aBT&|9PBhN+YW|J3=A?m|NjS-rwrKUHT?Mkm?apo z%m+AfgT_jJ2s1GB?E3#7vm1v^JNK4_psRS2(kZ) z2m`}~z5oA%*7-v8JA>xiko5;Jb78aJ5p2JRCWfF2|sl3o;?-$jtz1i&cm+Fw8ml|3A3D?a0T`2AUIWX7=YZ zU<%;k<8eI9$KiMk5+w|vI9egfz`%3p|9^11%8`$w9i+aE*_ltEnFXZDhl@|Z@h~5c z<1s!C$Kw!LE4SO8i&f%?UPDGrNg9J#^!9TdbE7+Mbf{|{Qd14<`p z&~yUwgN+yi!;C}!|AWUAQ2h{wWnx8!;K@v`4<#+f5aIWERJHj7vvTR2?hqAqyPVd>U$h+ z2>{RUqE9+Q%YX<828KCD|NjTo-#GQJ!0s22{WByO7-Ek9{|_4P!m8he&w(itxBeRv z3=BQT|NjT|53uU@=L=w}#G>DW8=T)HBpDcNPW=B5S``M;kCq;5(UK#m=mhHvkYr#; zIr0BLsGWgDA1JF~wbVxEVtU2-jKd3zoO2>)NbPUS-OC%W>4xIS^A2eo%&CFml z$AIz%C=BmNGB8M-{QnAeL z0qH;e|Gy2WEekGtz~!(Hyc~DoOJJ7AUJir8WDZFGCCsu1ut1uD;rP}6|3ULFAg6-L z-7V4#3JkY)b{|XM@!30*wPQk9vK-1hKOtb z|AYDzAbn7`g6t_kvImsh!1cb53geyeRPciD4s|0 zXb23|5ZExQ>083Arf(l+G<_?W37PlY;M4r=kZAL_K;dTaTr+66Lxu}7&#VijZJ@Ld zln&>DoE2BZ1=@|kz!0GTJu7YjWd0d6PYEj8Ktng6`R4_97#KkF&!DmrJpWt>nSXAm zgUmlOltAX6Uvi<&Kfmy82G2iNFr&^tKj?wXKOg9Z%s+$HX(G=*?}45X2O2sA)mNbS zLY{vXfSwfxs-i$=#btFu=AV)0Qb2m}VbEMFO#Z^Frf&(EHQyR`%6<6^m> z+3ybAmERxCX!=&rd+pl=h1zcijyHY#aH{Fsg&e`} z7aq%gXP9{HTf#Eg?;pNG=C&tH;QRjIY|}S`A5GsBvTD8wRMdP+_}ug@;ce5m4?mi| zO?V~nJ>dlVchLNIz?r6R1%lk)9i%wEJN#<;rtnzyyTkvcZyUZr(ucyQnr{=n)_hYC zmirExBfqec?|VZ=%{S0oc>-tiw+F9fzh9`V`KIu-=3B$Lrf(Zo@O@|KyY?+$SJSr* zuLQtz=^J!KzCW13_kDsS2Y6mR;EC+_1-qKQJ&@w~&Y;Zqz2UUL_YI)%Ioe>5jEcyoNfAcq37B+1#!Ob z4IuZvY5F#yvgX?bJLc~NUuwQ79B=w&Fq!ZBhObTE9An}m z{z3u72A%uKz`*cC6rvYo?oh&ATCZ}CEZw7ag=d{wRq%o%LO0KD2;Zn}wJ+>gMhRZ&eGWG7a^2g>3ed6x|xe+HJ4~-%ac>gAyfL*L_VHS z3A=Rc%+cqe>t>X!Jf)Jp`}FL$`eM6wUGtAz;=Ad^)~7cY*#;Rsci+F7#b8%{$wPr7 za{ol9UW}L={ocj7E8$!B!4K@#2WS6t`*JkR?X&#jZ#R|P^&U?;vrw7m$h0Yy{#S%N zB$uAg%$q14$t1PZF3#Y>_B|~8S-Wec4>y)8HcWf=^D_C@>Fa5}J zYhsk`hYB6eJ%VZ1))opnCHu@+roZo?Mt<7GnT(9q6Ur~2a#pU1k&0rPKF!pz+TW9H z!mgi*rqkFR*;6%yq)u!%%wz6}dvYPIeN)1A>&Mczc|X3-S`=mf{Ql>N`4jpK4jp#j zG5S7V>iE^?mpwQ?30!C^=Iycad#~tj(U|e`ugcNbXL)J!dR&aR+rJ6kxK`_$$(;vr z0vGl)S6!ULxo?W0M&|r^_vg7j4oedL^|nd5!ItM3)8Wl_r!NUv$=k(tSW3A>dosv= zSBJjES&5f8TqeW%t&}mT4J=5y{E=C^YgqGi!M%W z@v6)WPviglAU*5M5BVL+Edk5Lt_zp6{GG!vJoCH-dJTlPE#A<(rhmV+ zhDquxE(X(#N7Jox%#Qv!Y;6y1Tu(RGn9SZ{;l*;RKT;u}k?eF+booRObOz8!l zzb&_1GQ)qg$W`Y3Er?}L4)iME=D1>?*cko&=F-zoCvzR_4k;r+27iu9X3IX+n1eMo3OsG zIpLaAPORMN{5+??iZ=y{I=3Y941fO%vTEPKW&5VLY5S!DPJx`GPxzC>`-AS^l9T&$ zqMyI~-x8iwp|v??=9>&{wm;rbv|{p;^kpR*Hhur`W&P!h47J%uEGBDzPg(GO#ic8r zuI21Mv{wfg#eJ80o~QfXhskm2;`4s|_31D3esyz8uCloD!1NMh2mhx(p<)8eU5VPu z%5UD)x0GKUwJhm>-??Np>sc`lFWuiL+6PNb1CQP$Q$aeD! z>(g^hdbL0{xwW-R=z!j}!;crunP}Q0rSgZ}Z9*HfOYOmAzO65(bbmd&I4a>0*YUM1 zMf;8vzpec9^tO-hb=B9s#vz$^TMp=Mne*_YP|?nd^FKdnyRneDZF`GDlggGqJ8qi0 z%JOBIu&glp_nv`);h<^6%q5Cm(hQ9Mc(!OTFevmF_ij9r{u^8mvP4EP=oM!amlTyG zCNb#c<(H)DrRSCEfp<;oW~MNJc^Qet84P+Um3hULxe&Uf2qFXBM~%XXhw6gL#TPN? z6{Y5Yv_lvLIVB8w;K6>qlGKV42E8=UQ3iTN`QY8vdZ`)lX+?>-sqq;pMGSBrL`QsL zQBh(gLEQDLKwg7z zLAr^q#zEt?pdlMj_#v<5gBbv7Z-dyNbCJLO|DO+1XTiw80K%aA^g!)lkUU5o2!nQp zg3JV|1MN2h;RY_y{kM?zKS&LzO$-`i2I&QqSB8Ky7vq25syF z$%Di|G)Nt2T^?u}5hQj1GzKHhzyRtKfXo8PgVcehr9nGCLFz#J(H_V!Fn}eIjKY^w~L46w#2JIsRnFYcibs!qFa}=hoL4kn*gu$ELL6YDzLm*)ZTK5N6 zr_R6tS_^ul0;&kA4#Wes`(Wx^7BDb?FlgN*NDhQy_JYQXKgaJ|n zUFQN~g6@ifsY71d36cY0n0cUegfMj;YZw?ncm=4#22upQLkYxO&H(B6fx-*a#{;eT zgqZ=7hp|CpXrS}=LFzz#zXfL?{X~!&5QeD(-5Ck87o={@9R`LqXCUDPQUk&;bw{9W zUy!;DcNiEpoPn&*0I30Cm^#oM(V#d3sRQ-TKx<+_>tJE>AR3eoZXucX;w}Tji?a+2 z$oF%C)PXSQ?md|M7(kl|FEB8Gb`yi_1YwXG5dD+^vTq(_FKA~lX!kHEor2^*7^dzO z)LxJn2!qst<{&_95QeD(-L(m_7bFJ49TynD_uGNkAPkcO(I7iPVj!$@oq+*#?>C4I z!XSANJ&H#|U^E2i69Tx_|1*fNfajs+oCVd+pt)7Z`hQsl8I1M+d-P=)Kp4E#Q2 z2r;p8Iy?yAXys{O2@r5lU~F*E;BnyQ2E;ALbuz~Im&7_76Wl|g}r;{_9Fxeny4 zFE-FFWC>nYhBStxB@9d~Aj=ty!0WspFfcGOYV&l2Fi3ELmIW~>xHd_%IEt$<@i}aI zAkD&}$P{{oiJ`llfkCC=&;bRW7A9s6g##Ll3=0@GHMAHsvIsJ0vV0N=;b4&DWnf@Y zP;y~maA=v_$kXsZP^`eDgRz0lL6MOq#F1&q0S89`hD--81qEe>$xH4qiLmYDa8Pn$ zRPb2B#Nf=r;IxF%fknfJfq_SnQJ8r`Km$jIV~d&t56dG3P_u`@l5GOhiUTej>JBOi z38FSk91Sc21{)Y07;eo{U_HQ~%_8WKqSln4z!{+6(9)$4!m7aRtgkD=F+r$zs!-P> zMg|rG76t~D393BICR`j10u7NKO%oXy8iX7=6qux#7**7of_PFCIGbHpI&>#8a4;x1 zFf?fhE_Psh(&Kj|K}S$vLJ9+OVhcyp8V&{(B?cye2@GCAyo`q!Tp4*Z4ld&Gb_il) zn!vollVM`VRYsS_lmq zshP>p;2CM(B;>ed3PY1hU_k=IX;zU33Y-iIEDj49f*K?kggF>mHZXK3Ff`4OXl09H zXb@!(bzop>;aI}L$E={`$lxH5RLY>h#NZmq$e_r=prN4AVC<{dtIouFK||c9S3{x$ zbh?nxA_E_dMh*rR7X}6%UJn5#9(yNk(3TKK28Ia-L>MLr2|BD&U}hHJVPtk@5NA|A z!E4LO#LTO};KiVzz`()5;68zgp>cwT0<#H^fn!T!pOy;aftC#uf>Kx*M3{s@XJ0T1 z2rwvcF`7AbFu1UkF=`0RWMENHU_REMA;7@M8NkG<5Ue2Ju*8Lri&YV{x>A6tizz^n z>A(uc07C``29+Bu3`r~<4F_3dSQQvJ*t{4SJW`~c97G*_XC7JTBGAy?FyW}^f@zvO zlez?2y%IUO7@8PZRhTOdTo5pN^!|d23xfbh#|8!t2Zm;T0WL=H$wLeb3=IwpLX1oY zq#B$LPj$JFpwQva=qkVv!IU84Uk)-bF(@!NFer*}C{E~S zU}_Lp;HV{Zpn;Kr+~~3{}@vqK|;0M~|fI!vnDj06}2N>~`CXmn^c zGV^pLFmW<0XyjA4!;rwp$Y>(S!Jxp#z>&mc!6CpPz`()az#yyyDqR^E7!;XKu<$T6 zuvl<>W{_}TVQ}JNVpd={%;3c3dBCBQfkD85vr(BraRY-wK!gHo3&R2i4h08A1}7#M^_42~3Gx4MGeqVvHh;2NVS) zeHfY#Ffb^vC~yWUq_J2|aB%5x(mcSx;1VJ#Sa488oPnW1fJuU(K}BOGuYxkC&zv;^ zehd#-7&sahXf!G@tFc5du}LsYoxs4rkuZTpj!{d<=mmHct0#k6592}&21f-x0VY?_ z!dpfrh6GUo^#%q8W)1!Z1`Y<-BnC!ip(X_$0Y)YezafF)023nUa}}KFt99e zI>6ClSXvlVzpBY;%vacz+n)?>A~jV#K^|MutW${iL-*{4TTy@ST@Kn`vn@a z2w*z24gnkqF@bK13i54A5?Tz5 zh7JlYm-3yKurMk(GzxL;+1z0y$RHt*xYVVHL4d7s2a5nBXeBd?085I%ggF9?Z3-+b z3};jo0vs5EG87n&aQxfC!PFoa%%IZR$6#=ZiQzEA0YwIeKn@lLfz9#_ASW^~I0!^I zFf=d-2smhVGAPYt&}3-fX;YG50mTH1D?^5=GH8nug8++wfM`pg*qX!+mY9hSK?*S< zOd=di92^=Zj7J3?GB~6puqZIG+JL(90#_zBX)SRQVBlnA``VpCvYkZSBXAfS-IAi(I*z{e2iG{a^==PU+}#Xjt= z4!R5t3k01+ogG+qcrYj^G=h5biU~~?ju{Fp)774XDu)ct21bTO3=ABHT$gmPFtBjC z>`5$Ob(oxZfQeavL+Z#BhBlWxjs^}!1yBP|KuF+>E9hhmW|sp33mhC07J-e-Wn|J| zV9)}!unxdGvK~qdfh-)(VhlkI0S%y4)(i|T9SltqKrzF>u#%C5Nl-w*oYztOkhK7Z zI6IGuOS^C@6DTbl5MW?%;AGa7;Q$>P4JurcCNi}2IEZ-g7&CD+B|5V=FdSn^FmP(( zP-J9q6A*0J(BgEYg<*lF9AlGO1OpSp5)+1nOneFq6BuWR3NRdGQfZhrRcgV8g)9!C z3=E743>*mz%`S@)nOqbY_=F@C)RIC3~R7G(-MsW34eU|hfo?&2@dP*~8! z)}-0c(8wV)$%#cnfMF7&gO-HHstFvzE*uPA3?`1Cq@$r=sldfCv4;V)FJO^^po9&J z0|SQ(1B0A{0HXjCi+2-izaRsP!-LOa77P*r3|>MV9UdJ$T+27G2qYd*5>Rw>aA+`) zXbY31f|^icqfl3mgJQ!C1_v(2h69`n8yh?XIa{0(LA9@9 zn?gpAgF|a!1H%F)1}hGR*=%lHNwNkGplS|$@NENw5DOEN7e^k)WL?fqMXg>9g+&!2 z0SrbQ4Gt2g1eg*eB#an@1Q-+=6`B~B95-?>D6wShU|80m5CGa{0a`aD;NrmMz#zcE zu%whjib+{em8nyprzkMtZZZrEToQbYE-W4s6q@)QK-HsTBZEi+ zqcekp3kO5T5}`!`3=Pao9vKD-5M&8Rp3>=dZ7zBlR1y~O{7%(z2Ea+g+WN*^cd3@Sny0%TgafupxEm5MzDd!i9tbd0y9GZ z(VGB7L6{w!o+a0A)$kXG2$T$XOqAZ z#kNLC1`Pp5m52_9a}_rjWCRyDdU0_u2yn6*@@O(Jb?{`cC^c{}C?8<4c4#;eC47)2 ztYQWW2TLPUgOghW7lYu5C5#Ig1hnLGMN|wp7YM#eWpH5d^KxWRU|9kqK;K0hLc9*k{fuVs#fR$TCV|vFq z2L(k2%>V`sZw3LTrY3g=22KT*0}2fRtU5Co*%UV{VPI705)u*+@aAM>F-hQSa!_Va zaB2}@U}B7LXlMvfIKk@BAkU@1!E%Jjp@V@%frHhPN1#VKlZUBcp_76GBZE>JN5>=v zCr1WG&~fwh8E6=_Wi$jvLtr!nMnhmU1V%$(Gz11o2so6re{(2l|MsD@{TntXDa>4e zRUD>P?#0Y++ZgA3JM(ttH;orFzv;f1`OW;r%x{h_W`6T}G4or=x0&C5ZJYfq_{Gd` zF)wC*OMfx*TmFlg-zr|r{MPbf=C{=`v%gJxG4q==$Lw!&U(Ecr_{Gd`_DQq9O-q{n zZNrP1-}b$j`R&+?ncvvmXMel=V&*sHm$Sb;d@=Kzb^PpaFJH|3*7j}YH?2vtzrA@e z^BW(>>~9}m%>0)4V&=CWFJ^w5UN`&O-xo9Sx_{F5ncrr7$5gZE`^;}Ezt04p;{}?R zS&%UcY|g>&Grt}CJ`=po88n5z3@ZNj`^;~Tzt8*znlk}4f7e3ArGCu(wzy;VH_)gb zNPH_)+?sjTx98tyg3t8=iSLDqzy3b+8wi8!1g(8I3Kjnea?6jI-#~VP#Lq#+#eU5E zCii0|Xqz_!Nc=if-1x`LZ}vZCeglbt@B^rL$d8%d5`N4CpC1Mie+d;Y{W0@f)sLCq zK(0~bO-s&?{eCm&x-)8)n`3-cA8OYCHq2i|fv%f9=G4mVf zyfcva52*O3`Ln;R|1t9$Xs!q({u?ST)G_z5W_|;mg#i+0fr<;8&IYG5(7JL^ShGXLfB%^I4TM4SS)g#{hKe)( zocRreMHv{t;U)|f=lMDF8wi8$s{)0O3{+h9=ge;)EDlw#3Kci}IrAF`g9ge#>h+-F zem`e^17XlTS0Hh7sCfL(ncqMdw9XzR?f?}p{yFm-2!qz)gWTx}6|ej`^BV|*mUn>E z2SUX=e$M{I=ug%x|DU50LsysQ7`OGryhuIrAHO2kFw!ncr^zocRqjFa}C1c~JFFe$M>% z_UFuRph0?A*#M%y{hayj|IeA^g&G@<@&gqrX2YvwnfUo*dH zLB-pk;)%aze#`we^P4tQKa8sUHS=5BubJOK`?x^y(hXHV`Pa;EvwzL}2D+0B6mFBD z;){RH{I=%T%x~a*v@k;$7#Ozxn)wZcL3fvd%$WgIzx&tBZy*d>vjvLZ1yJ!5zh-^| zVbHy1An}z@@teP9egk398QUQ7O;GWtzh-^|VbC3DAo1N$@z1|zegk39{zs7b5vch8 zUo*dfFzB8%koZ}sxWMn3-#{32cN$3i8dO~A_snk~Yz|HT_o3ouzh`~}VbEGKkop%; z@sQs$zs3HZ`OT7n0ldWOBUHQ^WPanUZ&uKF{{a2I zJ@ec8-!s2~23L`SlVSJoncq(Qp83rdS&)H&;p*?1-yZ&+`OOYZ{O#|V-+uj``OO|p z+?!$6x2+wszk$w12gM@?)L!;KGrtM^nfc8T>R(={xZ0nY-}L^>{03T+22w8u6}JSb z{WJ3$=v+LIxHMEe_|MF5$$w^k1KqL!3Lgcic;%m&-#{3&whkn&2^DYnGxJ;TpPAo4 z=VF1(F@lQE{WJ61ia#^IxkKG!4i(@1XXdw~e`bCIO>l$Eae#_n|1cr;Yp@9)fSF@I-%1D&S~5>J7O z7yq64t@-cFZ=iGgK;pSj@i~8Iep~i;<~PuUJV?9@D!%>i%x}m3&in>C;}0ZW4;6p% zcjmXZe`kIJo%x3xHQ)Zu{072-3=H5kh#gS%ce&?$`}23^w;%?{I>j!ixYWOy-<1E& z{02Jr1XM5dLd8w~&HQH2IO`i|Z6Zi~0#w}V-^_0TjkCUi&iw$1Plk#|{+s!&pmEkW z(D^+e@o7-;^nWwIRs5Uz4Rrn>NPH$#eB!^E-)8@t`3rdKF|J^{D0;*(ArLr zf44!+$^Ad`TfzUC-$1u~fW&t~#Vh{L{073Q&~VrT6$cxJg=qXg^V^2TS>HfsID*XC z4^=1re#?Qz%LSl^62 zN+e?#A{l0VOJSJxtr%Lby@aaQX`TJ8fMM1*&>0$_w&Odfcn`y@Z*>f_zJb=xg2L@9 zR2)U>YS>M3> z_mK=b&M@oSd4^fvz-Ra)iC<@!_3b{xtZ$&Tw@AVa&lzTYd(ANGTMYwbeG~`Od?v6XMF=<&`cF5 ze3YQ#evGreMKaC;@9hHlOA{(y&N%B^69_}=FGHyK0>)Y2)-cZc2HGPAQf~>x57aC`M1Dz=fTCyDo75~II>)V&c zS>Hfwi9zDgQ1L&Ev%ax0&H4sfYyuKbg^DXP&HARvH0xU@0|Ns{JRd6V&NS>q>1`@h{5{jGZw$<{zJVqY zLGGCa6_;S1^-Y6$);G|dlpygXP;qG(0W__Ck_18M6xG(dpZ!t}?zJbnx0jb{s z6^~|~^(}{a);G}E4IuGDQ1K4tS>I+b&-ykMYR(y`_-5u=-#~a817vUOHK_P5=2_oB zcsf-4AyoVv^Q>w^=&0oyag&Q z!8+@kD(kFotDxe&P;qP4S>Ie(XMF>mV*v_>X;AS5)>+^DSZ94(1698ODsFjU_BRk- z3#~6!LdDZrXMF=<(A^uL^uGowUd%e{8wjt5mgnoC;+3qkzJV}k{W+-o*#;G_XPxzJ zGV82wpfhwp;kFklzJYbtHxS+g4Y#9E@vW@0zU^n7^$oO^AEf>)RQwd{tZ&y?XMNiO zReu#K{+M;vx96<0zHLPd=hv*WzI|t%^$m0mDrg+wE>t}`+pKSVY_q;?hx+#(R9um5 z);D#wS>Hexc7gKsL#Vhe+pKR!Y_q=YgqGXSpyIY{v%Z1wE~tCnK*gQeW_<(U-B9r_ zP;pPTS>OEGW_{ZO4gWt-@i4Yo-#~aTG(EHCLh?~E+pKROybmhQ4;9a6oAnKZL3Eab2kR6t-F4K==?;+#D*tkZsmC5IzhQcZ7HhTI8;0bD&EjE z>l+AzE<^*FUk(*t&@}5C2!qZk1c^66#Sb*i`Ub+FyKO<@y-@K7O|!m%FzCz?koXL! z_*b@B-$3{b)ZWEVaZdJG-$3{*RD2y&T#kL#HxNDt72gRJH)Egm4TR4_#g9P6z1U}c z17XkwZXkQlL&f9RXMF=<&>j(x_${b-8T+hnAbbgG&QqxPB=%X~K=?9L`~y^cJ^QS0 zAbbTX{u?TOihb5M5WWf(XUl`6pC|0IzJc&HsJI|hoPlH3HxRxK6_A1te|@70=l+9^fr_t& zifeJs`Ub+Fy*MCyw?V~SIcI$X;b&0w2chB#&9lCNFz8%Ykoq%F@s{RU-#{32=K)Ck zI#hf~^Q>o60p2Rup8wi8;_JG9SLdB0X&-w0`6{z?Y&RO3;_yg1& zeW>_J&RO3;7<5i1NWB$Q{4wXOZy@{$s@@eU{)cncHxLHhF%42502LSFn)MBYzd+ST zL&ep(W_<(UuTb$csJJE9tZyLv4Juv;6%XQ?^$mnUTLnPo*FeRyxMqC=;U7@-?NIS* zu36te7_>JEq<#`qd7bE zne`2X|3cO8gNjdSne`2X|3Sr1LdCbV%=!kx|DobnpyD@LW_<%;(54QM`S+pX^&+#r zZRDEujS+OeAOi!#E2#KZu36te7_@E?R9}CBiXY^f^$moX86o3cKcV8sxn_L>VbJA` zAoUCdko0qwYt}aqW`(L}hl*e2n)MBY*`VTlQ1Lrlv%Y~a=$=-PIigVU$6T|%fiMSD zy$n?RCD*KPAj}CBSB8pz;F|Rfgt?&NT2S%tT(iD`FgH}(5GwwUYt}aq=7EY^K*d?P zXMF=HeybR#TCeLGbA0QanKAS@15-wzeP$vx{E2unc4r$fcxbI|{OSPCk>94ao#GwT}&OGCxiL&X(&W_<%;8L0SnsJH>otZ#Nav%bkf#rH$S zeR*bm17SI+_;ILs6wj=0APl-Q9^|j{Q1MKjS>HeywEq?)ejO@a#xv_12rEL(xepa@ z|{OSOqHn9V)($XVy0mR)vcHhl-!%nf2`k z&#Z5t?H?fbuopt|%S)bF-@fw9`UblH03^;26=&j|^^J#j);A5PIpR?9P@!4hVue6s z0g%0(@=$Sc-dW#3SPQCN9V)KPJL?-5L&f!>;!eD?zJag~RNNdY9>F{78wl${#qFWu z`Mk5ffv_G_+#M?3$~)^D2 z&G}}117oOoKUCb8Z`L;uwt$LHhl(fh&H4tymQeBeQ1M*8S>HeybZ$Q=9+yMKEBI!8 z17T}M$b8&-sCWpF+h|`Dc9tVJE2gJE*t?|EzBy>;e`44;7E#pY;udU7_OaMUZq}z(4C72)jYW`Jv)<{IkA+usc*-94bD6 zf7Uk;_JE4ZL&cZz&-wU|C-J#;#0<*q>upd<1A1baOFzXu#`$NUUq2eY2v%Y~a=-dI2 zJL93^9s;wzfp8#HeL7S;R$$gQ5DtQh=R?JF1ZI5$;b5qEIaIt#VAeMf2A!7B4OkmbG5RQO~&xeZN7MS%7 zgd?Hi%c0^Q1!jE%;V7v1dZ;*`;H+;T91RuU4i#4vob?TaW1!;uq2eZjv%Z0FEL8kB zR2;2459fLa&iV$z@lf^Wq3Xi~XMF=<(A~G7@VO2ZFA|*f4TKY+>hD9vdjw~F1K}j7 z_;aZEGQnBjKsXsH{vIm6M{w3R5C+}j0W$wPRQ!tItZyKk3RV9fD*jM#);ADNgNm~k zL-NI2!CBuxI2|g^4;5z-n)MBYGoa$)P;q{tS>Hf76Dlqb6_*p5^$moxpyKLKaYLb5 z-yDTzeanW5>qEtZgl2t<5}Nfb2P$q36;BeH^{qr`*0)?}IbaVJ?-iQ$twU(mw>+r0 z2UL8r(5!DWg=T#NU8)8u#{!|^ONC~A+bJ~bTLDyk6jc1O(5!E_g=T##go-Ca#a{}| z`u1ID*0&<4cn(yYTX@ztDdAb)ilO4AP;q_XS>No0XMHPyiq}EK-yNL&4TMXf;_XoJ zw=uK7fp8gAd;(NFSa{aASm9aU%Aw*jq2iN`XMY3X3P#BO;YCpK4B=VdK)4dLjgx_a zVHs4sRCw06KP|JqRWU;5^;Sd0TZCtQlf66pTQwtS^CtttTBvx3@T_k=!n3~BK-I5< zicb)p^=+!~tZ%i@^GY^A#YOkb{x(Z^*0(ySdp1MGmk7`Lwo-W3w|c1fcBuFk;aT4f z3eWlmy4x8v|Fs(`p1y1Lw{ya?zBNMC?}v(C6Q1?$zA$JG0OH@nQ1KVSv%b9-p7pI6 zs{S}s{G0HsZy?+P6+aCX|1CW08@tG?Z=m~8K;vfTq2j_Kv%blQ%=*>_4d*LRaaEC7 z-!w#KeQRfgjOX8lid%@x`nF7B);G{S;Gl7>=TPw_8gssZa3^RG4_*o|FxZRC`W7KF z>suEz+&)6p7mCdK2EyG?cYcA2SBuR0)+{pXTMyJdKcM0>L}q;h;a+IIU@U>;(0}!5q77lizv%YzX&iXbLnm$#b>O(|l zeFNcX(Eg4VR6Id+);AEI4iz_qidTxx`Ub)?pyC!#@ea{h-#{32{}ia)vxkaL7M=AC zgl9p+!5u0-PjuEd5S|Sc_lJtF6rJ@Agy%rT!=d6^L}z^i;ki)pc&PY((OKU>cpg+d z9V&iGbk;Wzo(~nzhl*bno%IcbLHGKA`jzES@u#A*zP%Nl^=%JNRW_?=*6<-Y%uMnH{twn6sH_*L6pz?DIRD6QitZ#F~W_<(Q-vAQd3l(1>HtX9K zv02|%Ld`h_6+a+0>)RQzS>IMc#m_^)S!`S>HB7#aT)r`D+#9oNpk!30h8aL&a~3&-wv z@w?))zJc%-s5$&l@rUBGzJW04z8z5d6oZOC7oYVFgttNcB?lG%B|hsL2ycgqt3$>4 zC1!mC;T=$M1E{!y#H?>1yb~&J2^H6onDq^WcR|ZBC#blM#H?>1yc;U+0~HUGnDq^W z_dvzNpyEjqv%Z1wUZ{8iR6I{&);AE|2NlnPikC^u`Ub-Lq2eV_@p_3_-$3{PRJ;x< z-XbyU8wekSig!T8Crixw2EvD+;*+4_izQ}#1L4C^@i|cOwGy+wf$$Ni_%f*YL5W%4 zKp1ovJ*eE?02RL|G3y%$AA_pj1r>iLG3y%$ABTz`fr|f-nDq^WLH8bk%sB@YXOx`v z4TMiZ)!%@M2lvhXCMr4W+bO8{BdEBHShL1}d&`diFO%$ywjdK*hg7#g#tH z{szKlq2df>ko0LUIqMq;pM#2XLB;(fXMF?V^H6aSsCcC0tZyKE0V*yB6_1yk^$mnC zLd7+p;+c}OzJc&1sJIbSJWq1gHxRxI6}N$kmr2h02EtdM;%-p!PRUu{K=>+DJOC;_ zU2@hp5WWT#kAjLXmz?ztgs(%zQ=sD8BxijC;Tur#JgE3_$ywh(_$E}m0xEu6a@IEx zz6BL;f{H(tob?TaZ$rg9jJJ?)U0nH`~)ig3@V->HR~G)KZS~afQpw(&H4ty&!FPJpyHiUv%Z1w zbEr5=IV8PJmzwnrgkM0#`Jm!!rDlBt;g?Wx38?rXsafAZ_!U%K2`YX~YSuRpehn4Z zfr`JDn)MBY-$2F9pyEHIW_<(Uw@`5hs5r0mtZyLv4l3>i6_=8p^$mnU_rrnWF$5~E zDn08P2!DX8kAsR^NYDBP!XKgH8BlRQ=~>@E_!CsT2r8Z;J?k3?e};l+AvgNo0BiqDds^$mo-L+iCAQ1SKBv%c++p7req zv>mk^Dt=IU);AFT2|d?n4OINH^sH|n{0l0+2`c_rde%1({td0Cc0k2{NzeKQ!l3(4 zK<$(LP;p_IS>HhTFVsE9pyKK>v%Z1wKdAUgs5nv+7=>vlGwYj8>#T2}MTVgD?Ps9s zEo5eWbCQ|$4RlNes6IUh6%UY^^(|Uv);G|-W+3s4Q1LvOS>HgInF+G)=n7Q4TxQlc z5N3gjUx$h}$;|rJCo}6CD^&azRD7w-tZyL91{J>x6<;qi>l+BOGePX4W?l=7Ng9fr>wune`2XxuN18pyD57W_<%;9;o;i zsQ6!*S>HgI7b^Y(DlQ~D>l+C3LB;<-#T8{|eFI^Bs5nCfB>$Sp&iV$z0#I=lsJNf( ztZyJJ2o>jmil@oW`Ub*6P;nlpc!lh&Zy+oT6&HYtcgxQD2ErmxaS^Ea4B1)VKv)zi zE&&x^E<5WR2#Z0*WuW3aWM_Q?VbFcQpnjqPRQ#mutZyI;I*$+}t^yUmEj#NQ2uniE z(SVA-lb!Vqgr%V3I#6*&xmn*pSQ;vB02LROoAnKZWuW3FP;m{pS>Hfd7AkH56}OR_ z^$mnU_ql-FV*?crl$-Spgyo^?9iZZ=a(s=Dn4Cq);ADVhKdJ3#aGGA`Ub)(Q1K9`_&&K=-#}OuDjoq9za%&78wjgG#bco2 zkL6~417UTjcmh=XtK6(_AglouPl1ZF%g_1-!kSR=45+xY{H$*v47#@!6h1jnaRd2T z-#}O!s=fd!?kYd)8wl$_#Y>>#5%ROXfv_%AyaFnoB|qyM2Hg|2rAwK6~84v>l+9gL&YaR#ox%! z`Ub)#Q1K~H@xSu3zJahQRD1?hoL^zqHxM?1iqCl+ALL&Y~h#p@JieFI?|sQ4DB z_ymPn-$2+FD!v0MzF1+_HxRaiitmAnZ&jG}4TSBX;s>DOClqFV17XmiC?Izpfr>v+ znDq^WLHE{z#7{uQzbMT52EtBIbIw4;ITUAo17T;V_ywrAtm3S1AnXDazXBE4Rh;z= zgk7QHH=yEninG3fup3nT4piJvan?5wc87{TfQlz7&iV$z9#HWoQ1Md5S>HeybPq4c z{V$;69g4HQfv^`;{TrzGOvPE>K-e29{sAh!T5;Al5cYwJe}RhcQJnP+gngmnKcM0l z6lZ+{VLzz&AE@|K#aZ7#*dHp+Pzfpje=5%U2EqYQaTch!fYPjQARGu4=YWc zCqu;ppyC^qXMF?V6sULzRQ#~=tZyKk3KfrlieFNm^$mp6pyDx5@yE)uzJYK$R6GGH z{zrM%HxSN%il;!uMO0>e1K~`lcm`BlU1ioc5YB>%=Rn0RRc3ty;cTdQ0aQFhW!5(k z&Vh=TK*bYPW_>GEne{CfDqaBD{6o%Icb zOQ7O2pyINsv%Z0FDO7weR9s(m);AC?gNiSLiaV*!`WB`->svV!WF7u;sCbs@tZx+{ z3>9As74K4=^=+;yXze&e{bs26devFq4yw-jRs~hR6Doc~b=J36sKwOAnOetLB*%2&H4ty zEliN{!&gx8&1$p09afw5trgViKsw6gtZ$uA@qbWpL-kqT?9^v{>q0Z%TYc8I2=!Ut zy3xc_)n|PxQlIs$2Ti;lB&I&=TQ8dUO!ZmcmZ{JB)`up(S$)>G1M0KB^`nWORiE|k zn)<)n|SCuRiPBBs6hejalEMHD-OAj3%zBG3%Rw#;k8s zp#3S1DoDL!r!ngr2v3EIb3?^FHD-MS;b}~ebzFQ<@c@lk-{Lf8eVY!AUs0%djmE5R z{Tj2r&47x_LdEB3%=)%YW7fBsP;phL_%4lE-%e@F`Zfz{uP#*lk;bfVUo~cZn+;WO z02OD{ob`=IbJn*x(DY*g6<5)m^-W)M*0;G(aYv}QyXLHKL7Jew8Ibhm1r^WIob|0# zbJn-{Q1!u3@t+QJzAd+&^=$!EJO(PRp*ibYujZ_83!&nvP;qa~S>L8;&ib|pDxL=w z&(oasZMNpDZ;PSgHf-IaGZcRQ$5$tZyK^0vc|eP;m+4+225TCDc6=q2fx$v%i7xDyaA@sJM>t z>~A2v8Y;dRD*j$`);ADd12umQRQ#9btZyK^7An34D$c4k>l+BKgNpBgiVJAX`Ub-5 zq2foN;?i2PzJc%tsQ4MExSH0iZy>x8Dt-kjZm2cu8whWLir;~X+i1=D2Ev=6;!mLB z?pm|Hf$$cn_#3Erkk+hkAiNbS{sk%?t2OHz2ycUm|AC5UXwCWt!rP(ZEY*;FRID}Y z8wl@!it|9l>$GNl1L2)eaS^C^r`D`*AiN7IE&~;xqBZLq2=9i9t3bu)Yt8xw!h4|N zI#BUdTC=`^@Ls662~>Qm)~s(JybmgF0~J4@HR~G)?}v)JK*djM&H4ty2cY$x4^;fB z)~s(Jd=M%g2o=AtHR~G)AA*X9LB(Hc&H4tyhoR!pQ1Q=Nv%Z1w5vX_qRQ#{jtZyKE z6e^wy6=&C;^$moNLB+G6;)2?3?ybdaEsXgl(2%mHhT0#tksRJ>Gs);AEo2o+xl6|dKx^$mnCLB*Fr z#XGfUeFNdkQ1R7J@yXh=zJc%+sQ3n`_+0H--$3{(RD3H`e7W|lZyp6C8wlTkiXVZBAJv}q4TNt(#ZN-T&uh>62EwLf$$xu_zkG|TkTojK=>|H{4P}dyY{SaAbbxh{s=10s59#u2;YZ_KZlA- z=*;>C!VjS0Z=mA(Im(`v1O-Faux7X16MF}eItUK#li0-U! zZ=m9;Q1Lw7S>I}OXMKB%*4}8=o%L;^?yPU`(8Oox&ib}echCXCg zT6fmB4^VMqsQ4X_*}Aj7eT0hJLB;>+&icl$H|yIcXgTHy6<5%k_03Rk*0;}4@j$4! zlisXv!Fsd4eSwNcLd8?`W_>HwoAvE0R6G$X-ljL}+jPBI-#`c4faZlWq2ep_W_{bK zH|yJXsQN;v_$j?v-|pzm`t}3Ozwh*BePhs{_3bB`xRCy=Zz}q;zWqWIH`AZ>%|n0I zH^^mEhz4<#{;Y2~`m?_MK~rC+KkM5B{aN4sqKPlkpY?6C{;Y5Rpzf@My7P$stZ!HK zXMOt*6>o%!KhvM}?Yll`4=SYH-U$`wFqrkNp>@_bMrO!({zRy_vcarxOIl}rV}goL zfr{H0%=+eMFzXvLRD3#A9N`mGR))c>Z@C7uzOgbx`bV<}s7KX};1wCn`c`c)>l+6% z#Qh7P=Cl~h`qpbO>l-Ijd<9f|n!&7Z^9^QwRn1sQ4knS>Hfd66$_KsQ4AbS>Hfd3My_16@O+p>l+A5L&Y7T;y(;$ zeFI?`sJJIooXcp|HxQPEiU&f)#f)Zs17SI+cqCL@)o9i?5SE9ECql(djAnfUVFjpo zCRE(nXx29nR)mTdLdAoOW_<%;C206mLdBDeW_<%;WvF-)RJ_P&);ADVfu{3rsCbRh ztZyK!$_yFzm$p)1cxfT4#NG(>m*$I@FxmP;rsAS>G($Kzqd@`Dh_j ze1g%eZ?lYMeba=hUk(*tWi;#CKBHORw4mZ^q2d>fW_`P5H0zr-RD3g3e6rE3Z*Pod zeba%8?}Uo~F`D&_*?87BU8wkesJNizjx1tZxQT@zYT87~@&r3XErcGlYs?go?Ks&-ymqc-A)~sQ7iLctYE(Zy;<8O^0`( z;vH?XzJag_RQw54e3kL6Zy;<66@LvCU(q(}8wi_0#XmvCj~mbW2Eyi0@t;ufGi|fJ zfv^QsoS_bqzrM81`Ub+5P;qvsxJ>)3Zy;<173YJByR^^x2Ex`*aZ#vvPW!BHAZ!B_ zmw}4UX`l5Cgl(bX%24q$?X$jtupLxf3o8D^c-A)%wug!vLdAcy&-wsu&P{5({Ag~_aM zH@aqh3xkSZhl(FFne}bfx0&C<(em|alUd)co6Pza0WJ6LL)E`Gnf2|r$*gaY(DuL! zs5rmrtZ$m8v%W<^&3_FQw=OVupy-a6)1K}8`_&2C{wCSvGARG%7{|Ob( zG@bPggyW#%f1u*!rnA0*a6DA}KU92@>8x)coB$PPs)yv?MW(a9fp8*JoE0j*&UDr{ z5Ke-Mb3nyUn9lkJ!pTr^Zm9S}(^=m@I0Y)s2Ni#7I_nzl+BCL&e3R;yPxtzJYKCR9p%w?qW9U8wh7Y#bu%55oWW#fp8X7TmdRxVm9j= z2xmjZm7(I*X0yJ5a1K;l4JzJfHtQP*=R(Cbq2hgJv%Z0F9#mWhDn89@);AE&hl=Y% z#TT2+`Ub)UP;n!u_-3l+AHLe=|1#pBIqeFNbtsCWQWyx4r!HxRCdiU&i*+s$Wv1K}E|coG z&-wJw|&-&H`6|aYivs%phCTub5TQgL=11c_WG3y%$w?M@wLdA_N zW_@$8nDwm{Dn1J;?qf0QTa?ADZ*5TV#Zd7yi&@`5xE(6K1}a_&GQ(olw+=M_PPCZy zZLYDOFD+($1L0n% z_-Uy4UyE7a1TANM>tkjB-5kPj4Jxi-IqTaFyV>9Rq3*v071y<#_07U^*0%{z@yAec zC(Bvi{48gEn~3JlD9c&j(ky3vn}jA_WI5|wz2&TLlhMR`EN6XNWI5~G6g2T2mb1Q{ zvz+y9Dw_Bc%UR!kSP}UwS>H^oKxYX-`UPL1;Hf-4pdwmDqd?f>l+Bq zg^DXc#e1!0eFNcnP;pJD_*|=5-#~aiRNM$EzSe5iHxOO`6}N_p@3ors4TKj$#a*D{ zXRT&^1K~wbabKwTU8`B&KzK1!JPa!S)@s%_5MBZmkB5r?wVL$}gqK3aGoa$U*0a8W z@G_`)Ayiz}de%1$>sjBHL&dA0;w;^>zJc%xsCY9}T%&u|HxOP4Z726Y#eKSGeFNcD zQ1MAn@q+GI-#~aZRD1?hd`kDMZy>w|Dn1V?zN35AHxOP6wRZ_r{6Y7uZy>x5s(vk0 zoTq2jHxOPA72gaMx9FMm4TLv9#dku*Q+j571L2KO@%>P7W9wPpKzI{c`n0p2^$mnK zqlx=j&-#{TJ?q;RH1Rs?S>L8v&-%6%O?;j8tZ&DxXMNj-CVtO)*0*=ov%YO-W&ocj zb`)QdFS>N_T#hDu+`3R}Y1!g+*&idxl zJL}t&-dW!wdS`tr=$-W~rFYi1HNCUG)%4E#wxD;`w+p?qzOCq+_3cUDtZyB?v%c-< zo%QWV@2qckdS`u0=$rM;pl{Z<1AVi;{pp+a?M3gbZ#I3izMbit^^K!{*0(Rcv%Y!s z&H8quZ`L=F{#oA``euC#>6`UUrEk`^Eq$}TedwF@EvIkRw~D@5-&*=+eVfpS>P}F5 z5`;mH1+_8vOhuIki6di&4;`SRIgo`g*a4q9z6E^f`1asq$F~9k>S1;-_}cMJ;d{q7 zgRiLOU-*K`N48AiOUJi@&$#7bYA1Z^_@?l!<6FY#S)gUbprbaxQlO!`29DX_GlpU3 z41>iuXMY2orwqa%g&?s9T(iMvM1#(WhKU{Eo((={8g$k)Ow562_BS2|(DhUx5y%{( z0_W^+f(#4{APf=(o5zVo9rx^SpfOJnhN)xVnGHU38?^QqCf2|+`y1#CK@f(CfoN=4 zL}&Il(42&n&g^fXxdR2A+2258|7tq3zk$Z|b#!Kb1C7-i>CFBHn(MI8nf(nk_h6?p z`x|KPz(r^FH_)7bm(J{Opt1e{o!Q?&d&2tuLLp| z#CJ5B4H_Z_aTylaF9e@^4&s2qF2x9;?}7b7a9DxlK=HW}NiM+wp$`;i`;g=oI4p#l z4>I$V5yVX(b3ph3R9?VwA=q!A?R_A3IXI%4`4_4W=Jp1t{0TID51`^8vq5e#F^1R& z+SdodAn~ftGrx5h&;Dkh-21ITv-jHurQUA=a=qUK6neiYsP}#|kn8>SK)&}|fqd_` z0M*`a4j?vn@3#wbz26Ez>g0OCZe76L`^|v2_uB!L-fs@v5HXPX*f7j)2czC^2^PKI z9CRV-512vd26G6#z!X9oKxu4dVH3Mx-1}_-$V}~Ccw8$up@w0x10p^XoKVxj5+u0; zPLMcD__+Xl9xmuic62)hZbRG&i!TP}h2S&lrx2kB-7F9vlm|f=6u%(*G@NFCYxv*$ zt>9_zH-Z1X-vXZYe%tV+_uGfRz26L;_I`7C*!xZ3A;b+J{pdL0b?>(a4|=~DeC_?F z@TK?Lh6lahCVcMww%}#&H_+MgAiF?rN7qLyKFB_BdBxWE?SNF@w+W1W;4}oYZvs1n zUmymd8AKrT1OW&QQwO69_#xsBd=MHW?!eji?E_;UIKP4N+5u-sJZk)2@C|fswN5J} zFM!m-u{T6NC@etvj==?yE?|0KatSVw^i)BDc?(=1<;EHk^eDJO-2LG90&qF5?}q8_ z1TToYVg3M};|)3+7vxr$7_Df~+2HiD3v_-sz3c*=QA{tpK=yzzD2_nsGSqeUw}PU+ zZwUo`-x@Odz9nSzeKW}E`}QHT@0&wL-?syqecv9W^nGI}>-#n#v+vu5guZVFGWxz1 zl=gj7$msj_A*t`%fuz1~28n&&9+dQbV@O0zA0WFx`LCd+@7sdfzHbgS5cz;=2>k)d zUr+_%8$fB0`-sIG%KN@eDC>ilzX{NE4AKwEkGgJ%@^^vjLhzj-AUV*T7JrcB6x<-` zA0!9T$K{UDm*57;gMa=l0H5XFWQ^I)oG=IC2atXkp25t(0Ky8;_alJZ56TM(-dMzZ zu(XqXFx55qViEJ34NlXb^|UZM7WmBu-$??xmjouJ;EyQ=I-ed?cEj|7(!D}l|F;XV z{os010@N@78Gr+W^nvt)>oDlqv!v(;oxA!eX7;y^SV(&qbl$2{?CfuQVj+1Cbk6D` zp;_PlK;=Q_s}@Dh{-zQKkq4ct8WlbJTM3j8I!`q@diJ*?aS-!B=csyy%>MQx4swSO zx;GXU&i?kYaQ3&ag_w06NbQIC3EwuvPWZ-6TTUM)POV)zz;emd|S{l;aft-1aSBgP)?S#z|;xfE=)m~KViy*Zvj&#d=o$t zgBc8R1SrlyeG8D7kcc2dz^Mt}0xm-IgU($6iQ~ec^}?X|2k8fy!z{)C)-P}YQ~!f2 z5HV!4KA!Feq88bHZ2Cd{UXZ;Y`$6V1LhUyoQa|WE6J+~Yp!z?YA8W%zh@Qeq#L(TE7Ic9~2HCGeE;`4{lBPR&WavexP$7 zLFob){smoEjjmteCUN>f>$y)WvDCpP>+oh}spQ1=rX z{-E`2$ofeQf6#hCkiS9xCnx+t>lR`9K{To14_faBaz98f2$LHApmm4X^b;HYp!JU^ z`bi9b&^kk8{iKFJXdNfW-ylp*_=DDyg7m^Lso{^U{Sz3Gep~Pt zQvQO@MTLdE!*7Tfj1Qu*=~rMPUVk&R{s8%(9Q(29C&hlyyg$hQpztHder)SA2h!XvL6)xxw+Y`0K27*0@M!|dzQcf5nEuD6-{A-G`a$bBK=#AZAF1|Z z(@%>1p!Fyq`$1t(j{mXgC&m6QX#Ru6KPw9Z!-5ABz8O4&gf-~geOOwgtR{t94IfAh8XMx(k;4yLj$EF`-Ke75j=P-iOKFEGh`eKCIe*xP5Ae8>F=?B@L zzy@hQ5Yi7i?-6D{h-QM?e*jw6lA|AFzriEo!Vk1Q3l#sL@&{x;sre6^ez5&S=3mf0 zZDjjN&41YRgX||Z|AF?KW3!*w{DVzD$bMq=gU$yc3DYE^f z=09xuLG}}y|3K%gg3=u*{gIRZu;~ZcPi+1Jo#zU(A4HRy|FG!?*-vc#1Ff3`g+It{ z5GFPMVbc$`pUC_NIzIu~ep2%vHvJ&`iOqkYb0DzUPi+3drXOTKvHC&h|DxDWV*bOX zA7nqV`44n1F|z%n=09xuLG}}y|3K#`gVG%clav3j=?B?QZ2nu!$iM)y8-_{Ef7tYc z>?bz=f%YxJ><0Uvfq`Lx(8O;GL?HDy=w4QkI4%s@$A}VtQ2i5xiPI0-?})4)H2ws# z|A7#3`Z<}=!VhM@AaVLZ_b7w$p{sYp)=~qY7 z54wLGq+ftY{i;ar2iZ@m|3Q96#ut<(etV!a@!JO_i2IS{aIrz-M!4ia`yN4Zp#D9G zF3_C#%|LVFHwF*}2@t>_eW1Hd@hJnPU${IA14Bak#BT-ZxZMv*YYYeAI=~E2{8_An z%pv~&|NnnN5M*5)SdxK(L7^8iUkOsz5QMtUKnF?g0GgaRk{m-YL|=paLhu^RxL$~T zFgrkWK;$IwxF5(*AiEr(dO&iZ_{~BxuOS$+reRGlWNqm30|+-B2!^ajdLzH^8)y!_ z1!@;){u*Q!2v0~swM!uc;y#cZs4sq`7cvJ6ir)k*av*ic<~i(L2wubS3X5GJIgom6 zatV7OVf_n>K9Jo1|NrZML**RuCVjh*3vqWt`J`_fiYI+5$bs-d@wO)fViw3Q5a#TI zgfU3&0-BsmA0oUMLJ@ukg}X75oI@xioGla=egoZ8p4bmD6Bb9HGIK)}#0@a9hR}uI zK<6B%^v(We!oa}rdo9AQgfN6%pg65TvTH#Y>iU-1NOB6{5O*9?e(tkOQgh#~}xD+qE^2^&o7TNQN;$>e;!| zAaVhq$V8F`#oJn_oH*!GFf_THQ2RjYkfgxO6HvK7|Nn!ohXjkkh-*+eIhX(veIF_Z zDqoOAg>yLK+bOi(&72`!lY4dh>t-#}pi3TIF_$}E`u z4HS={^aM&f+6!iX1I3N>^x5A)X~1&9>~ElW1Eph7*f>O?)>E@LA@Ws26r>#nax+Nn zP9(VpX!?#K$tgrb^sUic_ze_~*Ed1(Bgh;WzVKu+xUC4|W23LW#?%K=mjWUf7#Plo zE&BHR$4nG+KzRU!L3tmf45a4FX;gDS@*s??<~o`hQ22oIF|wLRXlg+6puB~w2BZ%Z zRt?dp;p%u5;s%h~h8WcPI{``VK^&@F`Bg|e7UUO(c*uSW5F6C?I&}#VR|n!z?Q^(^ zkYh+dl}kaAYe+~FhnL&~7@ zw`YHQa2ryV@!gsIP3aD#>@&SH` zJ|ek|Aq&-Q3=a|RZa|Z}g{&_dRo_u0Ifraiw{Sl~n0WwApEi;lLk_B$8Ax&m(B!T^ zg~Tl=yclv(^}R=ub3l`md4_OH1Dc%aGf2FE;`2u?YM7NgN9a??L$$B*Il?UoXmab3 z|%n z8VXU}Xp1Cwpb+B51jB{kwfmv(AYlTt2Sf*;*_BX)T5isGhX|_&MG(6-7%l|w2iE_D zY2Jc25VwQO2Du$XD-=V_+)#{&BT&3NK;nbcsegl*2a@}OCTH;t;b(;s)bQ|t>I0bp z!U-i1`#zLF?1Pm(3Z)SDgVcb^w>jwgN+IU1C`HwG04fgB2MYfyNN!;$gXn?Dy+V?6 zC_}Yx;ctW=8qoCZM3OsD21z3zGeKc^3rS9)9CbW~=MTcn1!!`9e-Qayp#tGfkl%Zd z^d(fFy7MrSz6EGnOsA^Z-CKZ$>kbOs7vY*-1}UV_!jUl`_q`-8Ch7*-d<>S0hF3<^_*I}mdj z8Rvk<9eEh%fR+<8$TC9oYctLP@2fFkoCDs2?Z7w(TxWvP`-3V-nuEFLG8@DUQ2aAg zBie{63=9kpkmL?jqlSq#JCeQ{R5^DfIR`YkBzA;bGHOuWQi-Imp$0YmwIJzxf~IdH zl0Jr7)cDzpB$rT&>dxy(atmrv^73xs!b48MCs6#cgi31W(ps+ts zhw7HK9EfmvQHL5Xcah}&pvf_DLgE+{e+u;wGhdiN#u~*qA!dT?gW(I7Gr(y9#s|>} z^^o$LqXA+stUgd^K)4@demjy~2@R-e5eIh#Fp@NOA`nQR6&~ z3lUxpO%S;w<`BPCaAErGgB8SYuyXi76C^x9egx&4wOojJV`xUW1JrK6iX@kSCa1-X z(08C2)o-pyattjHH)dEY{I-OFfgzO}(~S<$@CWt(K<;X2L6`?}<5DE^4z!@UpNR+I z4u)2U+!YH*A3=%-)2i3lD-FRka`s)2Z|dGUPL-bXh+p&!i(_30yMc` zB)JFekTlL>weTBgZfznjW_UF~(+@2DH*_HE0)@#YBzGJ@k^_b16C^o?PDnZcxgR9= z6UiM7od`2Qa(+m0Z~#rNnQzXweadsb9ao<7?XmKlZ*P_7eEX(6=Np#_#O>SEA>p!D z9a7$(P@e-n7v-Az9Pqf`bM-mkvr~Sk&jFui>P|Z?gq#DKTndt01DaeNlH38PT!%Fz&1%U(`~eCl77sOv6HZJ^u2sJRhAiF{1PzruCzZLk+{C2?) z&3u0}K1?HMor3SoZwbD*LRKdcGy(_Iyjo@A>wix#!!2k{*=$>Ox1)H-^fdZwV86z8%Qy`F3GK&$oh> zo^JtDd%hJ+M^zh8*z--G5LFE3H<iMRyxaZq~#SlKseaPYGu%zc(!xH+ruV7ivw++i7?tz6HHd;<@&bJ8)khTLz z9+WQqjb?u~A*T7l6e;{sZObD5KfmCa5CxLY2cQkXgk>v%lFO zsR4<#8qNL|@qGb2ZGgn4fy9v1!3@FXzHK0Tk@SPg;;Dyce=9)}1Gz8tBE%msvq0^j z^|G_Solu3$`GdqkA;1Je)kyO{CpZxN~szk%-OK^9jqhPWGaKM%6F z7U-O&ABgw|nSsmQzqCMiMk4$J@}q$=su)PWn=!&4uyhNuv)N(xHywFMS_TClNPiEK z7^r;((mw+#2GWD9e=}4ZBnH!e5J?QC|B?g5uOM}xVJcAiy9*TqnTZX9(&PD>+210N z@*gNYZg_<%hD|R>4CEK|{6ValptjjJGgNy(?L2#BR58#R|40i|F;M^Vl>@36s1ARR zCI;GP{sm18^noOd!bH&zl>vo2x*tGcg6;=UINxTT zg%b8qBj6OJW`Vqf9zT?riOs*DIE#aYA>8E%2K%Jh-)xZ57syT1*yf;!Ayi|sDAkW1 z7ofa`9_}DF!Quy$$3U(Cg_At!{6_^uSq+Lu0r%P8j{GB>Hb7>8FnYNRvP;4pn&ve7zXKw&2_@WkZI8UdLX+&?gL@a{pATeCVacF2eN;q1=LQgocK+l zV&XS}9S|{O{h)jMu;~xj4N*%-zbv#(0J0loF6h2>u>HG;)2|C%KMK+h!k~NBLHZBu zBu+nQ-2pcDFM#@$ko)D4+z+xJbT2%}{ttVJvp)u^9~AE(|8s)YIUStvP2ey@zlQ(= z!vbjdgXGb19Mu0H{UG~6X-eSWgl`Ooh|?d7rXREh1f)LzWCjBR10nmPk=zfmAGAIN zq@UpcarT4Ce~>R{S=vWWU{h&Mv(tqJ7ar%|f^n>bK zkbVUs^(&$IA5@2f^a~sz&i(+Xeo%P~3I~w>3t|($Ef9sQ-cp83+TU>pI zgY1X34?yNmP@DKIKyBhT1rpqkFMdJiV}dZK{lNr^U#*GXK4?z-b^vMr!UEsEZw7vS z-$3C2Qd`KtzyLab5)>vN_u(@iqz9xPX8s4QiQhJ8P5joNg$RF2%r9kNU?@jQ{~NR? zek;(P_{~8ZVLra{fsp$bFfuTJFwFf0IupMc=uG^^0K%XEU|?YQFthL5hgp5!U}yP4 zg~1dd^FfM0Wjd&x0V?Yr%!IfbR8E4#Kv@DN20C{Yv>ym$CQQtg0Wwwq8ZY>;5TX}U zr-0U-g4At@oemy50rfROXTczgO=4hR0QI|&#U?W_Fo4dyLKd6Cz`y|7hl4COm4Sf) zw6_UaY$1|c3YJ3LvVwtu0pw<6zpaFdA^U9=0|NudzaaBKegm}=7DLSgiGjiiBqqxY z@h?a(Obm1v8p!{kya*Em-Gc@a1Lc3180Zc(kQk`Ufr)|cKLd$@$~l-A= zkQhD;a|cLGrSL59_yLHG4No?PjBkPb0g?yl&9owZ491~%_O~x`sN)-6Xks99apAY? zAmbY_d64~^BJq#Q!PJ6iZ2IjiP{++c>Tu!W-r3(S$fLTyrWe&spt|ydDW;o1?G{k~ z7&IOSGapo^PU@ZgZ2{807f?Q()jRuJiu}TF-B5*~w%5Ym+22^8eJ-dl24!*%5iScbU%qc0rjqGo1Toe+xje52T+^{DI0HsC5kJ@dwhs z_Ww-q7%NN-D9k|d4;qJqiGkw&&^^?628G#A<~iRykkS(q;Y9b_;B#g0gpX{^n%oa!sp&y)Vu{X z7ANJ;JLlUC65|(S7tBCx@rx~epvNW1{pb52WgE;qko#{z#b99sir>sbv%m2uE&K+G zBapqI_$3raAax*&p4LF&`w7hsQ2639PojVJHy0&DS^(*n>qiY^kbY45#WvRgE0;iS z0b!7S^Zwc2&JZ~U4;yQT`5mOca~CAdfy^U>Bh4XYH7txl`rir60jF6|9)Rfw?G*#f z3xMQdVxT=@ATbyp8x4wo^!Xw5Is+6wvmznxKsRG&F{(Joe$AP)zs*3(~e=HB1ON#S%iL&AE8Dtfc9`8&u@an3!nkC z0gwMCK^f%g_kilhS_TzO{bo>z-Coc+0wArV>I3cHCr2OX+yHX) zfzB%+N1rc96KMYswz3&dxcHH&57gg)Y9)z6PG4(o%>MQQEgf}0O#`Xhd1LlB1?`33 zKw_X|2NFAa15*Eh#6WcbNbC}l7^oct61#I__P0063%`N-mLNU|zq$cwlY#Vt>S&PI zuN$+!u|Vwrt*-)!ao$AO0UFB#iK*U%l%*iOpmGKzW_T0Q)`2=1Oo7^GUVDcck2Snh}50%DAML=b6*$Oj&+BuIdPfk6h!hjOt}1~;dEQ@Dp3M@-OrU>ykP-|%zlH--18 zdO?;T_n-Oi&;B+=2eo`Sd2cqj%?K(-Kv@}7S6o681JzHUHtCyti2gjt-=H?>10;2z zFah-+CGSJb1E~So55h+GXMd}};eJBy`vSEWluu#q+kX#H55vk2kbNHaA>v)oaR`uD z*!|hx7?AqhAon0+(EZ{dehd!xf#g6~;Oo?H2JbM#HytF&z`#JRevliXMlgWd7bSS= zfkanm{(x!#>D~AM;%BH32Gz$1S)Uex$6N)0Y2Ort5&OW94cQ3IKji8!h87S}g#G)sNmU0O>`?0!aH`VRC&?2EIBJs)S*K zB*HB)u_CDbVH5)_&Fej1zJ{^U$FM-@2Q*d$YSV($!Sa{jJ4BfeQUlWu z+TSanhdUnmA7Z9YB{VUZSupxF$WjIdhA(*1r-0nFZvpa{VGA+?iz~I>~OG|_U(WLsvnf0mhB** z-=SdIH->mry&(4>*FR66&i-~q4|RO`HB=0w79R%rmFXE|?JbB6QVXJap3VODfq>g! zYBiog;u^#UVUT{^XS2WY=;O|FAayWoi$%X9nixzij8=k%p9TRt7R;IU?L#Lb{6KDl znE~3v?m|F6NbSVusBKx08S|gd{+2+5UXWUB;k*C&>~A$h>VNVa(uM)K1%yFnetACo z+YBP~gVck<7kQitq#qQ%$YLOM$Qaai0-bpS5=(dsnIi-B+d+H~hKYgLgfOgs0aFLE ze~~%r_#>!%=zBZ++Z01YngO|in0Z8O<}ZCa``aD^gjq1VvC%O7&@2r;FX;>aoNqS_ z5c6svHy?V7>Sj>85oQl;%oF4f*w{Hp43tbk{s7IPEKx+52Wp3&dOQ1@3zC1axeX-t z;w_|n0}`Q7YqJkawSkj3}EoBeHp!9wspL}c-6?`D6?Fj)8vbnX|j z`2BaYzqJ@Z>Nb!YL2*G${}+@7Kwh6`4c7vQd|8CQWwGW zgUnPkp7pH#^1BQ;p-D4x8IKZhWHgE2C@&N|MYK2n+hZbDmOrG zy7YVYH*Ec}m%nF!lQ2fqbs+sef1{S=ApNlUXV^S3sQkkp-#-WWL%Ti2FeDAblY74gbvkW?~GPmk0R`R32IX!M}C_q!$^-{h9sEzy#HQsefjF z3qZ5K0BS$X?I8O>YXv}I2J$n^{%RuZ2hBf#+yL^+oIjBEF-Qz#21soApV{AXj3IL- zp!flaZH1}>=|jd>(A))5`}oi7Z`j6eVfsMn9%dKAU&wq4NDO8d?_WrMf~m(xtN(@A z1q&CD{bqk>e>;E_e)#kU|HW*7I5OeyA0eBU`*-%YAI69>9AtmR-`U@Mkm3|sJ%|l+ zD~JtCe;_efm`wi*89xG<1yTb_e@p+){w87qNo$~R0>%Hvzl77;`M;3#1xh0zvp{BE zCqf@cEeON*_kq|T4ATD_Eq*}mlS3qWB2 zG7EIZ3y&!x|A53mX$eGw@JF^e;I&pDFC`4`dF={J(5-zP&Mp#3O8c zwU~X*w**s&I*_|S`J0&?VIHVV1l8G`>~p|n7bp%v{RmL|iJyJWHy5aRp!q-0`YSQ0 zUQk?s>;$d9l4YOsO#_enEungl-S5DTKYfDKg8UA`!C3T1lAzy4W)?>H6+rca;(-rj z2?GNI=zNSFz9ewgoNxr}NGF#$mSb8^~@@ ze1fb8osn|^YBz`vG6O_|@F^s_KB z`JnZ}F!SHDL(&&a4LXgizkN5NE`;f4=Rl+}SoquwN6lX_GgUd}fY;xG(jG_*>&`ND5P%nS_3;$@t3zR8$F$}Nz) zLE(t2Ux6+DXK_N(6i6=!gTi?|$V@BDFoEfZ_0>UkUE`edt-=y99smler<`-Xtw0J> zkeOeg_JHCW6t|%Am5~e8ZczCOvm4Yu1*K@b`4(ddSxXIa7s&lCT#)nyQwO85=|}eiNI%REFnu8Z6FdF`%Ae$f zFS3Fn1x-ps?uTn)A)U64Dj~g#}1#BG;U6J{Ax$P<(*IW^m2$wwGv>Fzk$SY zVUWJV+;hJ5SV7VNNF7M*Hq*QPzU=GxN^*wt>j-h4~Lu4uQ-B=@;jP*bm}^Fvxyb`3tifAXzUv~EraUXGg#Dv+=7k^c`@U+g_rd54Q4LLO$&JE zd_#|4Se=CI|7E0K}|3UpRSiK5L$DsOm37TG*{pj>LsQ+N&o*?(#=0&6h zboI!5kXmf{4_1C4tHs6!=@;OGtn~-Q4@eD2Opb33cwHw*4CEh>m)J1xR@ZWF|hG$%h%gm3+jBt1Ia~z&T}KM zwg#sE(Je^70~AgmF_8WOtvTNUtTF2vkUR*3)PQIZ2Du+Je-2`UFi4J+`40ufIo}po zqpn~3Dl-RVE)8TZE?mb9=}Uq7>L4{B`=!>S?j-`14;BiL{wGKcG6t0|$mn`^G^1I*{F<_N}ba9Ps*Q(7XyrEiwDIKxrGY5)K+nPW-o2uu~xdLSLiq~hAlucYsV+vt&XppIZyemwBWh$ z!sNUBzKJD^5-oTS)~(Aj3A{?JU`>bIM1#zipRbTUvhBlcn?H zGi8^+!1=9V4V655eFK)nYd)U*;YB^V*$H7-||T)oh# zeZj9SMd-kU@{Et|+iU#S>F6si-I_Yf-+Q?`)8c!x13$X%^;cDQnlY2rpkd}WhKiZr z5=v%%V}P<&S!2?PM*)TGI#+Mpw7{T{>g4_j4Hx)cA44^x8wzP{e zfX@76u#{y0-G2j0XP`MY4og`EP<{cWg|Gkq=UXH;gU^hfz|;ypPsrhOGx**iAzMZU z(AgfKbO$Qm874sbtTUJ)XG?&_7C>`<4>H=pXN=xRYWoJdPltnzkpXlj5y-wj|NrOr zFfudz{r^87RL1=K|36=Xi5Ya3T|THD`SAaL{v!LfZ@>Qk&))*dupmzmffq~?{SH$0 z2N(|K^t8 z{w*xO{aado`!|Ci=I?F!?cb*5w|`rf-~Me|e*3p$`R(7X<+p!(mf!yETYmdDwu1I= zVg>Er)C$_anH98ub1P{77FN*yEv=yaTUkN-x3+@zZ_^6ezbz|h|F*55{oApE_HWk; z+P^(3X#e)Dp#2+LVf#0+!uD@!h3(%S*vWl&D{TK3R@nY6t+4%DSz-IPHjwyyzVFKl z+rMoqZ2xwwu>IS$!uD^^3fsSZD{TM9R@DAYtf>8)T2cEqv!eEIZbj|i!iw6zr4_Y* zD=TXM)>hR1ZCX+Lw`E1`-?kOCe>+yx{_R>(`?qIB?ccr?wSQwPZvQ4$-2P3ixc!@1 zar-y7;`VQ0#qHnHirc@H6}NwDD{lWbt+@T$vf}n{+lt%29V>4CcCEM_e5L^?%0cBN z2v0c1{(Zw?_U|A%;RJ*o(9-@*p{4yBLreQN&>0mA7PfzDSknH@U}^iefc5R)KCEf~ z_FxslERcEVIF*5c-~H`OkbeI7w^+_XbztMK0*M!}@lOKL0c`xML39Ee|3MJlz{Y*Z3Y8_uI`7K-_jWvbe%rT{FcGMpzHf#=C@1+ z2HiF9W`65qV9-tbF!Nh61A}h$hne5%85ndYf0+5L24wELncu2F>ORc;*2BP{d-TK1 zZ+Q$1x_3Uz{Fcwap!?>c23_8dGeKv9=qi1j3EGpR zYxr^Iw=xC>U5Ae|zm+pE=+6H%^IHW2gRal}ncpfI7<8jP&it0kz@VG?apt!P3=Fz8 zA7_56W?<0m|2Xqo4g-VkypJc^SirZ6z* zzW6xvTN49=?uPd>zcn*3=$d|-`K^V4K{w#j%x|p>47#bGW`0X$V9*u%IP+UO1A}hS zr-`LR^ZTe1koSZbVEQi1G{b-hz{V;tpL#i?7BT5+JIem zK8RLe*WCo7CvfT>1<@PWb+3bH2X@^@AUc3k_bZrY*Jb)X^BY3~yRH<7E@0O+0?`fZ zx}G3<0=sSkh=#^Ls2P$3j5g@J*20n2QV{mg4w zW`oKT<~=O4LHU^Z49jd#erLYTG8f&0l`G5)tg}Jo1hXvbY*2Z? ztj{_dRK76VvCanNe`X)n*`V@+If`{QD8DjiHp~X)bLMo=`G*V)%tfrTLFEc_9qVjR zK4R`=oee404_?!5pz^aDHdJ`mr5jrk~uX5e7H1EK@in7@MP1U6=FHgLXSmIl!c zY|MHfdIB4>1&DTFXLbV73)q-_L9_q|a|DRqz{Z>kq8D&5=YVJh4(3`Ay@8#%6GR_i zW1aw_8`zm=gJ=T|=5-+2frEJ$hz{UjJ_Vu^IGAsN=mHMrk082%gPDhY_BVzJ9LzEx zT7Z*T7eptpGn<3x3vA3DAo>71a|DPEU}r7@(HGd6+d=dLcIN3|nvHoSh~B`#yaPlR zurpr-(I42DpMvNK?99JGGy^*`JICyA3AE2snWD-7_!T)0Y*4u?AS^u_RPG8WOV0+C`vPXtvq9y)K%g`@eF@}9gX3GEQ5u|X z1SUy?<6B_0^lVW1DsWhOHmF_`xF|gvRL%-KkOrqefiKeF^e4b715SSe!ZNc#^_75v z%xq9OE?^=v8&r=7_{q!$)k6YFGP6PDzCe}CY*2kB&?hq+RL=>_mYEHzM+Mf&%m$V7 z0*7Q~gUWe<%QCY;^@_l!P;hz`0HxDb1_pt5GP6PDyufdn*`Rt?fLC@lsD2VqmYof% zKLw0r!RcPWR~DSU1>$9Af13shM_F(>7igCSr)z<;l)zHi*`Rt#V5=-Rp9vh6 zoeipw1TMM4O=vPkKlflq)(GNHUHi2jZUV*b9nt@l~iW(?6F3SIZ{QOM0r4mB z3ABLd1$+VzK;j$t1eSpK4LkzBLHr3k0)k4jzcDP}5l{!w0bBxCK=KJ(0?r`51Dn7f z5I=xTKtU5^51T+DNW6eepc+Isun9~C(GxfXTtM;#Tml&&dIFok6cF9OC2#~pGjIre z0MQe;1QfJD4mE)czdP2d`c-oPR71VkU;5cmV8xdeoiXMbZ* z;1JLP(HFP`9Kke)Kq!b7;1Q?+nWw-bkOAT!U=wHs(GR!;CV}V=TmoxB^aBooBOscA zTi`B;zQ88%6+}N^6W~z+#V4D93Wyfq7O)1<3fuxdAliUiAOb`ua0}#sXa{bAau6NB zEzkm{`2^;G>~G)@m;&N6unVjL(E{uO+d;GfyTB0;ZNM&Y2}Bog3!DI{cVHLz0HOof z1w^z#{^J$650Xz{7kCe%3)ltNRcC)=XkZtR0n^+9h9G(ZyMP^tUcfHk4Wc)&3&erw z3ETn>Aaf3|3uJ)k1>6EXAo>Ekzzz`ofL-7Li2lGXPzX~0fk&VVL_6>Z%mUFHxCK^$ z=mXpW+d%XKZh>PJvJm z{eV{>6+{Q{2vmUR1RjA_5IuocU>b-n;1O5~qBrmgYyr^=cmr2fH3QcNEDy}U^#RKdGjRREB49on)E{6`HwV{)EC=jn ze_O!7zyhj|`WYBltj)po3rnCmxV&abFrWQxAp-+TfjPJwXQ?xv{cR2d1ItwN+20m1 zFt98&2iIdPd(FZ18_QYq+27_eFt9u_2iL1CKh0-uf?qX@Q0M|n-lP$pY8_RMFa6QAa%K}_4v0SkL*Sjn)Ex`2= z%M&|reaOOL53YAu{#wlbHlKlkMaU9dFR`dug6ky~BTI1o!(wL%t`}LNEoX!3NtO~z zaJ!CWg5_*be~-n)9^4*aS!Ox=+hPU=mc5qXdYk2pCAeL{^1yO7s6Wc`)p9oIek2wS ztJ&X{GBB{HSj`5lXJ)arn*D7S0|QHh)$DJx85mfKt-$RDmOd+RdxB+-6{!4%rji33 zESo`m1x}VDAXIv#~(h_iQYX_B|U*Gf3SA zPL?Sk`T!@(3J|Tp!LkEHf8b;}0iqYMv0Mky2iRGjfoKB`miHjqfrEv?X7)FR01g&O z5S_rmVg#ZKI9R+u^aeJTBoIA;ouwQ^GjOqF*n{dzc9uyX{sT^y4iNtU8_OCH{{kD! zNf7;jjpZ4L{=m-i7fiFU2-$+_6LuC&5G}yPvI3-!ft}?Hh!$XHc>|&q*jd~_@(dg- z@gUlOouv#!JFv4ffanXHEWIGwfsA2 zOCN}C;AB}0qM^wFo$_*+{Vm{3?>B}sz27#R?){cQHxx)p@pQ#KC zT%h)4Is*e2D1R0(FmSDO2A4xz`<=n%78j@;naRMwb=eu5U%5c}4de#A_yHT&8)s0x z!^ZUkL_4r?vATfL4;z;#h(5s1r2(Qhuya|1Xaznl@OT0PI~RC7L4chLJf84?ohtw& z|ACz=5kwcTan*oncCKy^J%NpD4v02j=Mr@Vwfoq)R)Y8e>|8rRbOJlq2@t)2jq5sy z-oVCn7Bo(AfsN|{h<|~d>kWuLz{d3pM1Nr8Vg;GAfSpSaL^rT=se|DkmT7jL* z8ARjtJOe|h>+EkE!u!54#Poe@2m~oyNeR748PEf3!gHnZ>}M1&YUP1_mwAcvJ=hgVr6l z*`WTfRuahn7$%|#G_Yw^fz&y$X|;jq05+{TAUc6fYZZu|z^1heL>I7Wod(fp+Kt?2 ze|xa3@0-DrzHbbx`o1wN>HBtJaUb3~71@YX1_st??%;II3QFHu3=FKG^qs-LzzRy& zX$%akOWeWrA}grBl*7Ql3hFQAF)*-#(seom11l&!=QA*{g8ZM&z`zPh$0-a9tlQne z;lK(_&#a(+Q4s?JYbkR7C4r6gggZFBvR(nv3)on}<6!~ptZATrMglwQGmv-zJ8Lv2`FK(K#Q3qru@LRBXaTu!OF1cK{#)qp^7yGwOS z2smA+rUioIS#?hcxE-c?Cj?xcsd9vZ%T3j)Kv2C4at$`jsX7fLFTkm~6htd>P0Zkrg|4d2e7HW1hHdTKRZNQ-#4x$gRt0scz4Q#5#Ao>8CYAuMqz^2*_q93rU&H&SFs%t^? z2R7AhV47WZKZs`FP`v=6H*l!F0MQKWs=q+A1BWVeFsR?euF4Cd4{)f;fM@{@Rc#Qx zfL+xFL@ThX27~AY9IA03dIE>4dI&gOs}_Rz4(zIRAUc3UwH-{et4;#Z3GAwKL39DT z>RJ%}fJ1c;i2lH#dLBd0Z78@MsWveboZi${ zgo4|5YWqUL?OnCoq2Ttb+PhG2dQ)Qx1GnGR_`<;LRW+F~aJp493InGQ zg@N1WYV6_Q_N$syIJmv6rW+1!->MmX0MC1<*@T1J;cD*T;C_KxbU3)*pq3I2ZZE5q zg4UxmFsLAi98C%?3nIU{ebO(F@qrV!$+)S|*5oz@gRzq7}H+`atvs zF12}JnoVshh(5rkb{IrY;8wc=q6N6so`L8E+-mPUo zAbJD0+7=LffkW*yh=!(7(AnXjF?i6~=deAo6N>xc?FbON0ErLPhM)@A*hAw%?IAYy z1Q0!ejXf7c2e7d>fanA^_8t)3z{WluL?d*9St$$*3WpNF@vU$^0i2!{?j?Zxp9-H6 z!1+SKClTClQ}~wv&IbwtiQx3E@E{qSt`#^^!0B2+Ck34D6hP@Whk-#sIT74%RWM5g zr*j3{L~uG+a8Cr6=L%7Y;PP9cI1!v46*?2a^@768L~#C5Se*#24-`&A#(x!dB!bhu z!qG%G@HT_5IuoSVJ(PWz@~5*L~meIxD28vuq!+O(FfQR z-ht=~Yzp5%^aFMU=45a^p&$&R53no9g6IqE3K}4K0lR`RhHIDt^b?Cr2cOQruToF zFuDKRhAI8u4ovL-<}d}3RuQ@oEH)Mfh9w$vzI~X{|1Du=|2Kn~{ofR3_J3oT+5hdp zjQ(#AX5iP)!pgvqmNNU>hPnOU7R>4YW-zb+o59@vZwF@ff15C~|69Op{Q5z6ModeY z{jFe0|2Koh{ofdt^nY70um4-Y{QhqR^ZLIz%*U^vm6d_vO5*Hq46FLT6|C(4*02hq z{=>5VZwHq3e-l^%;Uj#E%Hm;VVAzr}``dy|{ofci^?!5N3{l^(x&PaP?fu^xcJzNc z05ua;Cxj=+#K7<(W%joNyZgUw*wz27U|0V)gI)dK6n6K2JFv6=+k>6`-#+YwmJI~w}gKXwG00Bf1B{L{~H4%9fBrV4d(yfMvqB3(OO~ zO<v%fX4L)0X2K=lwSdCD%l|U3v4P4AliXVr5{8?eX*`^ z_O}Ctv%j4yoc-+%R2($l3cB|Oq=boqfg!zUHu!Giq9Vwd{*^_u!E3M@i)Mq@V09GD z{s!6?IiYCwH_$q&8AY?df$juZP&6C7Hfu%E>~Em8SsRLGe*>-c+F3OF8)z-qp`zK~ z`=3u2%?989e648qH_#fvyG66VDKIcFJT032O_70t;ce0EZ=iduz8B5@2D%T6sd)A` z(8506;@RIo_j-sG&;F*yz`!6^Jo}qE0|SF*@$7H<3=9lL#k0RzF)%P#7SH}>&A`Cm zT|E1n4d~vF;@RJ985kIf+hpJGb`~&;ACwvj#M;4Z1Hz zq-^##X9fm_L&dYdf$lH?tpfqwTVhj&C)`1S2f_jj47Z9w%j zLTDCK2+isQq1mD!Gr9-h$A4A0ae9Zz(E8gTwAv{Mt$qta>%M@{dfyRL8n@=6Mf5T?d4(>0og|vg)QEZ^` zlT-!k*TnBE4 zvHhq6_hZ<&>%sj6Hu-w+JOG<%{p@ec85r0=>(AOi{(K2;*RgrjgU8p|K=TqS7#P^% z>cRaGHqg4NDGUs31@+)|CR!kdLy`9%vRF~Znv_{X$QAY z*?Jmhe_O@Cz_zFn+&*U8(FkrIvt4Wi=R-(R3gBXU4(4;SeFM<}9Bk}Opz?;BO$06sn+J$a;9`pa(F?fPGC*_z7aMrJ z+y*YT1MQ%3cP_SCkoW{Hwq6kZfQxM&h`zwdwi-kSu(NFk(FyEqr$Dp=7uy36&A`s~ z6GT7YWa9#vbAgRb0!*{BX@O`+>SF+vf83q3zd3YF{HD-^DE}7JPy7~8H}Ttp+KJy5 zfbg#c-xe?|{HE}4!M6oJ7JOs)y5QRZn}y#L7#70&vQQ&YsL9L>pyQz6YsNVk6c|2S zocQg*Ifz{fpw2N=N5dtE7?g`bC1g(eCXhJ^Y}bU$N#7=9K-e%v0$G#389=c^_M~qO zS(CmwWKH_kvKQ5T0X>tx9cY{MO#ur4nFVS)foNj!fu9S$>43rpv@ZP5f^Rv07JR$$ zXTdj@zYD%?_`Ben!jA>t8on&}<^T#SkQy|D#h4fvR?eLLEg*IBw}7O{-yWn-{w9z# z`I|%X0YZuJ^cA9~KclUzX-_9^F@Sa%!u6KAJ zE&%uYd0#I8m&d$c7l6xMUiO9Ha+Ftc;p}hM7#MgJ7lO-EUh9S6a+23+A-KHb1=UMA z3=F(;*3bTSlYxOZY9Y8B<1JbUF2{I5^-n$n1MfSF+27VNFz_}koc-+>0|W1#_27Dr z7gYbOWnkd#UpV{Q8jv}4;Bf%nMGL|87w?{h;ChPp#zJs;&-->Excug2Tm&vhc|{k2 z>nmP0&^{do244F`;PRO_W)ZlaFR+23|DFz|LS2G^s! zOBT=mc87t1cmHB=ead@hF}Pmj{knKI=)3^liew8|74dC%i-oz!~`iK`)pLQ@X@Rlr@{cR5e1Mlmw+277F zFz_}mnf>iN0|W20C9}U>0Qr9jxV^!8yz~DJ+7r6|z0a$@boRG>3=F)tmx1elUaO_Ezg=Wt;B8wn``bwd23}D8+|R(k>$P2hj`Ic=JH?0XE)h5PgA-cOr=1z{WclL^p8rt_RT% z*m!q?=nrhX$3Zj$JMRS$Ex^wE1VkU;;r#`oA8_-stpwFiyu2bHdIC4EE{Im(=5+(p z?7ZP1+JK!m9Yi~@^Ol3?0CwIM5S_rzI{`!&u=6ei(GPfdw}9vm+`LCY^aOU^%OJXe zo%aohX5iud3!(*hc==a>+6g?o3Lx5mhgTm&AK>M+1JMOMyn!G(fQL5;L@!|HEe6pW z*m>JQbOJB$bP#=jop%L@zQDt~6HK%79tY76*m-Y(=nw3?FF-T{2k#FMZNSaTv>Mc( zF5u+N2hksRcpE@; z11Ilf5IupDcL|7Iz{$HEL~r2aJqDs1czCaX=m|W$4?y$*PTqGQ`T{5KcM$!7lb3ZJ zsGrTtD-5C!aPz8zXa+7`6A&%H#p?v31GsquL9_uEZ#;;0;Nr~#(F$C=H6S{Gi?;(r zCvfpj2hk6>co%@^1a969Ai98ycOQsez{7h1L>KV#-UHDaczHjAXa`CqZ!d_3<#5oz z2#n3Zz>vbgz&U*@xSr+&^%K(=7&upM1=rJ@+qQ!1Mb5)p!SyvKsNODRVBoy66!<r`cFuILIu6c!5G}yLSq-8UI5?X@v;ha_6cF9O z&bbssPhjWV3!)u3IIn={01nREAUc7A^BIVKz|Q#*#u)^n8`wBgK=cGQ&SDVlz{c4Iq8G4nP6yEm z?3_<_&i=-*fsJ!1h+n|YxfetqVBbZM&gWG4^3wMLlCHLmt z;B>})Za27{!u?=3xIM}Jc{jM-!_BY<9RJ+Bd%)?BTYe8XopBrO0k?y=_Z|YLPi}`j z;PlKLv6V-2Ah`X=&9WDqez`&WSt=PAxJCDZ^8>fWUU0hQ)@TH$TW-s} z;C#V-22`JdLjw!pz{c$jnr8`Mle-B-A7JC20-`Ulac>0C57@ZRfoKN~?w26?0~AA6uT_1phbApb!WfX1~!tPT28zj2)grxOsD z0X7s55*IxUPJdu=*fK4UxWZ|0Is=Qtx}P9%-P7Ro4Hk!;UDlvK^_%r+aDM?T4jLy1 zF+k#8r@{RS5SIZoZVqCA%n3gYZoh-L3<7$XccOqLphV7TgrA^73>&QR>w&2Q(Q{7E z{-$6%^_zk#LeB;Fsoy5pBKRP6_^|Ss+22gh%m&Y8xSg5(E$qzfZ=mo^Ju~}T*%`>( zLED+x-)5YF%pa^gGyB{2GmtriBWGrRyLx6ecpl;5nc3f7oq^0Hd^$7x8^c-1d;;&; z+25qk&i)3Q|3-HUDE_A1hu9B_v*^~H30A@7!ntLV~AP!?LgwfZw?6yzf~kG{B|IE;kSmQ zh2IoX7k+a9$)_*;_8?~AH;1H!-wq@#{PrMY;kSn5h2I{eFZ^~Ocj32&oQ2;O=q~)0 zkh$>Nf|!Nh5;7KkQ^;KSO(A39w*??ISqr}{$XNKzA!p&YhU|sk9I_UEV@O)~Eg^N` zw+$fs(iVO@puh0j4=m^OmoYFXDV_tD%Sr~2b)`zy=fLH)`TU$>Th@|E3go9$Zf-m7NFodNBT>zK=N+B1(<-Std1#tgX3Dm#t zWnfUMyZ~;;D0N-{_lK1hUjX;3l{Q@f_al|gTmbh^m0n%|j}I&Tya4WRE3sV!kLxRm zT?E%VN~#yZ^^_8*AKk~mpk#RwJkGBaei7WxQp&mrt|yfmE`s~nN|P>v`=?4a*TMCv z((;SodQ55SMR5J2bmAhoAFOouBDi0y^!XyV|EiR79o&CaV!j0Kw<@(<2lrc*R$K@7 zTa_+c2ltbe#4dsBFC~pj;QCg{^%A&#Q%bl5F87pbE`iHMrM^qx`cDZozFo?|ptST7 zxPPj&dpWoqRN8R~vkZb}5e5baE~R52c>yk^>mXWzONrqIxE@gY4B~HKSNaE{890@= zF3?ZByI38D{hDg}b*4{SEwwP`V1D4LFqUf#?KIrMDnjfkWv(h~B`d#C-+4PDV)>L?2*N zQUlQp>`LY!T7g~37epJdE5(862b@Y-AX_=7Q)C>`I$JGy{jy zQ4lS_p>z#I8*nMT1knL(O20w$1`Z|utDtr!yOJh|PGD2A1=Ac#!63STO(_OMC$K9O zgXjQurB)Dqfm3NFi2lH-v=Bs3;8fZKq768e4uWU}PNi!gT7XmOEr?#gsl<2<6i-}A z3ZU?JU{?|Z@egn)se$MTY)WPzx`9o}9Yil+Qwjso8`zYxL399@QZmwpz^3#JL{H#Q`T?RZa42zJ2iXr#8E}T!?b+XyZbQm% zz1y?D+1`ef-`=-pe~Y{gDZkTh&;C|*8&ZDv-k$w!#%)OXz4-R*Z@X?o%J1{HXMcNe z8&YR{xIOzD!yU*xG~b=s-<0k^=AupS%>L$l2X|cpcNCNXYCnMLG7$H|->Kgw-Jkt! zF6hoP1_lO@IIO*(@Neq34fkh%+Y6NgiGwgmU%|hr-{cSf?4%C(aVUXO0|5Lvm zzd!riHK-h@Jpq&Z@PF#J2lr=x`vjE(wJAXE0qHYfnD*`e{n_8RA3(ws)UJTlj}QJ$ z{U-ci_P3J75IIoW0;cc4zp3BkAI$!y4b=ylrw7S{%q(D-_RZ|U>~Ee>IgnT$0|TGv zOK|zjr~VS$&gZj!IUBU!nlAz}pU0Q|5?mhfHNOOxpL{c4g3EEftuMjlFyE1v;PRGF z;5E3sS6VfSoT4#7|)7 zO9Rmp*!T)T^a3`%1`xf0jjs;Nu<`u`(E)6H?5{EX0}FeE{{*0O9iWqJ5TdwP0-$6FNia;{1PM|IVnH$J6drWU zz`(!-QU*@KOi+akq|k8P;M?z57)XU+n?WvTU;ue{1Y>H%zXJn!wGI;l6KJ(4IBemO zi5~YLK3D}L3Yi$ljDPSj6cYoZ1Icj@N-IzofC|tN9QUBKfBg0AZwC%e`?lb~v~LV2 zr+vF{V%oO}C#QWAI5_Rw1CSVqzJjDG+&p(z@V7&9^4;LYm0SBTZ*uPz22*&0=6sH2MH;KP!UfkvbU|6hZSy#S9FJ9AClh zam9cS;C8KI<_GY6lw$n{aQj^mG|!a5z@Vt}72F>+2RIaCKy(3z;*zhR`3`o)LJ;49O|ct9 z2e2tF1knj>it9nN0f*uV5M98gcn3sZU{`z#q8D%|GJOWk)37PZf@lVIMGY{`p=b%B zC$K4cg6IWoiV+}s1Dj$xh*n@%tN_sg9Exoq+JQrH7Kk=rS6mCC6F3xigXj0n==XrXbpZUC{+Z3$QEtgJ}-MR1m#^ zL$Mk}PvB6T1fmPr6<2`h0CvTFAbJ72;%N}Qfn5Ek@_rBv^Di2m%)p?@{u|tG)s*@Tjz3M^-$>zP zz^3T{;ybWu`h(~IHq96ioxrA<1)|Z+L+92oFfhDkK%9GYVe0g66Q)gvueX4;$@YJ^kB(dDFjLm@)lZ!)$~&OdpJ{Wnf@nXPouz!OZF3 z3T96KCNN|Aw}R=Y>SyBdM+yUj`ZC5jp!U2vs2)gTU{GJrI0tk-jruOeIiPcC)UPnk z0iA=R{*H0Zw{!*ubq1z6pz~U{D8@x3vrm>P*aYzSS`>s0%XB0iA23 zuEsnEbbgb%Df1lAIX>#3ar{OG2K5UpbKvm;3qJ-2Hgz9n@OZp>Jcuq}Q_lm@4Q%SI zAbJ9u`cx1dz^1+&L@!`d-vOdGu&JK~(FfSn?|^6ncJ+54`U0Ce6UZI~c6Bij{eVqf z6+}C*tDA%94{Yk*Aew<)Jq1Juu&bAX=md84b`UMVu08`qLmimGz@YJgWe(^ZD-8iw zaQJH|u!6%|!+>?pw-g2j4M$dR{AmQSg2P`UnH9;O2iP>KLHrAB8dE^D1DnPg5dDEo z;|PcjVAD7Qq7&FO9)RcvY#N_IbOD*`v)1lr1 z32-{pyTU&Qbbf^1Gk$P7)MFBu16nVncS2$g=)5sK(E8PK1_nKO0dTt0dm{nPH+qHw zb3p5t^n3*7fX>y>6Oo()I(I@ZUSJOBdCF?E16p6C zw@d(>-}H6}%mJ-O(mN$E2XqdUUdvZ-dqwZE065+2f%4s21_nJ)JE?(zK@ZeUYGh#0 z1FeT`Vqnm_D=-JN&Pwlzz#P!IO?saN=77$h(qj{x16tp!CnGoqv|d-wNN^5ly_24k z;GA!*3=DdHf^$IUN9lp`^9lwAy;#9HpmR0!K<%jx1_nJ)eqPDIpjRL`2XuawUaR07 z(D_$-p#0g*z@Rr(a1Q7kD?L#AriuM&^cUs+XUx)>t|rl%l!^+f9jnVoC7*X zO7EHA9MHL4djACHfX?I66BC*PIuA<^wBB|q1B0HS&>YY?ReGL6b3o^9=~+n50iD;O z2WltH1i43O4rra0UX0`%(E4A!JfS(Db2{`oh30_HH_-!)Th3)*&|5Av2egh$Z;Q|z z&^ac0hlS>V&K1#HDTI`N4A}H;fcOqvde6W#o8A`?9l)i>Ej;HN!vjt|br2oEre_bL z6WH{^L39C|UOI?wVAHDs(G%G8IzjXTHoe6ldIOu@eh__tP45DTzQCsU97I20)B6CT zKd|Zj1JMlZdfXy&K-`7O3)uA}MdyI_C+iu5=mYF}ejxe+yIwkoe!#BR z1fn-^>CFPsAK3NQfM^B|y=@>`fJ5&xh*sdxdjg^jIP`vlXa^2GKCwBVb3*jAK(qpv zo)w7xz^NAiq8YgKvO#nLhh80sp1`Fy14Juu>$OPE`Nr^pOK%B?zQCn-1VkU;(t81- zA8_gMNX_}iP{5&Q0HPZ>^a4Qi1P;9d5WRpyZvu$kz@fJRL?7VLy8xmuaOiyi(GNKE z1f)UcbLg3X=mIXiO(1(2IQ7nh=msvm7?8LCr`{_Ne*u>sn>Z*vaO;VKXaR0L6%eh! zsb>tL4LJ3DL9_#>UL1%H;M7Y8(FvS-H6XfxQ*Q={Zs62g1EMEz>Ky{n3pn-ef@lLS zz26{u1E(I3#GG#o2RQY_LG%SqJv9)GwbVoiwlFa0bIXA9slJp9xZKnSm7Dbp4EoA4 z;BrgfLS_!={5E}W8E`(Vx`ar3?)EK1$$nR)38QxSZ8L zDg!QG^{>c)%T;|)Ig`!6p#NM3T<+Z{3t@+q6X5s3c4rtbiv z8QArGK(qk6ejt6-Y0qpv3K(qs!J_~3b zKY&eN3`8fe>8pY00ycd!5Z%D0?+c;@IQ5f2v;wDoDTtoHrau8hC$Q@;2GIrV`ny4N z1H1ku5Iuoi|1pSOz^?xTL~mf%7f=AD3wC`C5PgAN-xWkZVAqcT(I43L^FcHNhkiYX z7U0mI0iqQ+^w)uC0}lO@AliXL|0#$L;LvAO1hscK^b3^0`AA;`%;(hC0nrT{`i>xa z0h_)bh~B`apAMoYaOl^7=mi}5Q$h3w4*iWF`T&RiaS(lhL;oR&e!!vs14Mt|(B}o2 ze}GM25ky~L)7J*k44nE_U>Y7n3?eFX!1Ki(Ds#a5$_iBGfcJ;ZP?-bXA9g@x4tRgq z50yFKv%7Uv=Ya3!ZBU(qb50m$`YkKRH?oU2T>Z4t&!nVpUI%!j3?|9Iz+ig({qhQ5 z%{@((Gk;&$Y+ZyT1!m@ou;pyKp{U!``|DE`^Y-~X$L-FRy?(b{m4;E9KrV<=LXB845 zb~7YG;`BiRgns}^H$dqGDD42H7bHO3rU9iLpl()3f|$bq*GeGGBu@LzNDD42HU&KPx8$fA>1cQ9iV&$D19IbBHsX|9ia4w zD2RFuD9sQHQTHJRB7PtS!f$}m4p5o_N*{olZva)l0ct-e+(5GfAh&fyLd^d2a^21=iS>Yo9nL2g^j z1ep$!iGbuUfrvTZK=(uZ2#4?=K=1em~kKg zV&(!UzX3`sKxqaj{lFih-XUNPct7?6e+caWb+bYc#2f}F|3M%`{Q)SQ0HqzEbVDFS zKLdP%X=LD4A0Hq&5&6xtFL3u$Q>b3@NNSG&hL;URk<*z5pl)>Vf|#QKDQ zuK=Y%ajFP)n}Zv~EedWBGZ~=#2d)tD1}L2Xr5&L30#|4nhSCe%q3Ycs<|IJ*4p3SF zN*{olzW_=7ep7U)1 zR80evJ^-a*YC&lm#- zVNhUTXV74fWsm{OBRj|B5E}ysgU%KQ9WD(v?JOGu!(9j#$Yx+Tk}`Y z$~!iODgPkYfsug$ghBG4qozSvgpq*(hCz36gD^-Ogae+Iq)d@#V}N5Z28JnO3=AMS z5Dt7=l7j3$7#n0h=+x^VkUWz67>pShKp3PK=sS#!$z?k=VdkxS@erijhIcfx|<>h^3){g@vn&g-OE2i9=(7N~^-gGh9j>3_S`A zZO5DnCoxP?U|7&3!jL22!YH7|;IP6W$urx7gGoWeZP`IrDK^mn2ZatscSdJnBc&7< zHMh*@I2gfII0!$1HO+6Nm6`VNP6oZZi%vX8f$h4r0*&%XDlU9R=gCWB@ClQ5? zMhBKjhbP=w5XGRQsKF^Jk)@Z*p~xii%psdm!AO9CnTbWN19UV6gGmd6$_0%AlT|G& zlI;vEtxOIK%*+XlOilt16gd(U#2gp|84VcP)n=WX)hrWctD!2v%$&&FBJW|q$RN_d z$lxH7z^x!O(P07;$7*c>4ud7Dc-0sfToe_UIT#cQGzC2v8V)H4h%hj6F!(SrGBj+E zVP;s!8}6_}g`=g_?}91=V`FMi0=KZjj?CqZ3=XOcYOIeM!vyy>D6x8a@cJe5I52QB z1qd&3dv2k^qQUTBlBn9HjAXAR6C664&oHlY@b(kcb6CDEqoY)SQ6j<7#4@8%Hm6%G zfPrDg0S1BX6O$iQ%ik%8eZ zBLl;IsJ@4c3=B^g85o{I`5-eu_!%Pu!*fOkh8K(s3@;fO7+yi;Uqk74Q2IS11H%VK z28K_J3=Cfw85ls9>-=P7VE6@<{|%)L$}pki7~3=BF<3=Dcq3=9TL3=GCh3=Aev zIa4ME1~VoG26H9`1`8$z21_Oe25Tk;1{)>@23sZu20JDO274w31_!8mM=0&Y#K7Rp z#K7PR<-0*?h|LTP9!v}jo=gl3zDx`ZeoPDu{!9!E0Za@G!AuMcAxsPmp-}Z+^O+bJKxeFg+_8j-fng~V1H*Et+zQYg!b}VdYnT`q)-y3MY=DYyWMW|0#Kgd` znTdg63ljswHmEqrj2%o247;HGy-*q?4#EeR7#I#RF)$orVqiGT#K3TbiGkrLRLuz{ z28NSR_9-ZRhKYgU91{b>c_<%b1_)nbVqmz;#K3R`Dt;A8Ut?lmxX#4Da1+W0sRiNN zObiV7m>3uyFflMZhRQupbymt zQftV}z+lYGz+i?XX35OJV8zV9V8hJ7;K0nl;KI1hV912>bC?+za-r;eC|wApiC#WLiwwp z^lD}XhBZ+3T4n}@bx`(tW(I~0%nS^hm>C$hF*7jifQp0sxQm&AVK*}a!yaY^hP})T z4EvZF81_Tu4>B__9Aai*IKs@paEzIO;W$+MBr^lUX=Vn7Gf@6{D18A+gUr3i%)oG& znStR7GXuj_W(J1q%nS@Sm>C#uGBYsTVrF2t%gn%VkC}ntK9U}gzDLXq43C)^7@jdR zFg#~wV0gvM!0?Wlf#D-F1H&gIwV#<87``wwFnooIePd=|_{q$`@Qay&;Wsk_!yje_ zhQClbkh!2%7Kmm9HR3>Z6AJ?a82B3j>2R3j>1;3j>2J3j>233j>2Z3j>1!3j>1^3j>2P3j>2X3j>1&3j>1|3j>2T z3j>1=3j>253j>1z3j>2O3j>2G3j>203j>2W3j;%kj>@hh%xk}IFZ(6`XyXRQs4SC5 zM^DR@n71lUdl}@s=IBk;9WC8|KTl+x)A88%=e3xq1w6dxuPPVyo(z=lnebEJd6iwC zR)ulgWT6AR3y=5N`6(^k7-()(`u=0Q<4XaZJuVM-N>3}Ex^I%Jk^hu$R&OsHxOX~f zuSu}ojA_fNZEr5mDnC2vQRU%_SEq#wyvSbhX)B-0&fbrF(|c^SA4@j=oZH&P>HKKZ z@5#re1_nFZWG`PAs>1h7BtA}G>%9Hlsb3aONaK83n8-0>yWx@5D++>d%@ZiN+bFAW z=bje#;~ytJ7|lMc;m360^Y7Q;QGf5~-H6OSZ~ZAP=g`KQRNo6qbuzUUKR=!QyK{Pa ztL7V(S?gcrZ(6dsGcJ}-mjCK%XVy&$ z`B}oQ>9(YIrS`&)jXPT`8|FXE<+?w&F?H$D;{pngWJ;p1X3p;MF#obA$n$Ufj`{q# zhN|!Pm>j>nW$y3YzVjHZ|G&Se`Tto4uP@Wg+;7(`b$ze9d|zz2kk5Rw_o6>e8$8+f zacMmhRH^Cc)t(~o<-E<)M^odEE7c42dtP!_?KZ>q#YaPR;gn#RXhY{k^M!uS@!sk* zpKoEL4(%qn;V{gLm zf7g9#%9N`w+f^UD{S~pnaVvXqjkJL)|Fg!MMTT0x{$|a1Q*0N$D7((b#^m)k&jNY9 zWBW6see#_SHx%p>bx3?}a`wWNr*k=i14>^RBe7YMRcry>`<7jg}xfmes%D36J`Et#|P} zHW&V`-YR;fdFIr9|J+Oy*$lR?n(k}4U4Q1-)^ShHGv#>J+%x6$zSWX<|8@q+H|wYQ zWt=%Zoi+G!v81E#y{UWN_lci4{NQu(+p@s<|7PvVJIf=!P(kkM-laDtPBq%lSL5ij zlVOIAi}t+|e!=WJ&zA4<%RW?5`Zp=`>B~>oLyap6%?wXCGo%#kmiNjxte-xi<$3Af zcV*nOWKZ96UcRm^?dSjN>aX?)wG`X9t$Me)!Iwl4N zpDqT5h)4ha3xW!2s8~W514GKAfB*TB#7ept7!n@+`!5U?3t?bj=;&f#$a(bdzcr{I zg3W$^J_n|FsO@e@9&_bps^a1kaYl2L2R8$Q2Ll7cgDwV!kjMZ2>q5&xBPy=;B}_E4nc?a|T`!P02xBup6Kp;UR`uA-4*;9b3Re$m z=Yz}!VQl6vyu19H0|OgeJxCo4D?VcQ|9|A6MVJv!pz1;Hhl$~%UqaP`{Ebf?Ozs_2J;*IEF?{rAsCv-+Ha>MQx$jW* zpmYQi!$gY)!Y>WNHn#xV6nCTL5TdIkof zoMeZjo)|0Izd_O)$V0@acSbUwm^9>xq@I`{@<&onOdbnHQcp}Ch(uCPOq!mF6h6eL zPe3xCm^7V=q@I`v&P7&FM1++htH)L#gCZUYS0k$@BEo(km2bZZ)GZ)uRH5dB;+7co zGEnuPup~ykGKuQj-yzaJ$bE#;v9T!q3S_t4WtL3TR?I(F!jV3&cMLX4O0)&OhlR0g{GcRlJ@$F8efE*)sJRA zC|sdV!%9s?QxA$~tO}umGtksC5U^k_ntDQMXfc|42LcXSg{HoNfCU@T)E@w^K7)D= z3$+zZJp%#td(hPr$OI?Q)e}e%SJ2fHDC6AkqNX2^7x6i1ukZ?ZTN5}q)3VYA~kiRwS$QID;t_>D(Bws>Rti9LKke!v!Q9C*}YYv1tW zQIDkoq51FCbtG!h{RRSyaaP-gWmGgSpnL$5|If|PV1%NdiNQ)_#W&DAGstbA zQpF8fzXJn9fXIq(pfG^QJ1|6xtN`CR2Qm+|g1k#)#WzuCc?7bjKxD-?F(@C@dubP0 z0lw!Ecn|Ul$Y>usDFxps@>3an1`7kO!4Dpmp+4J|n0sLEfZ%i-*Tb+12dL?s}x=F zZHqEQeZY+6-`YeW^%*F7pyXH7KkA-}(As+VXF|tXF(Hq6pzH zn6~`eVyJphdQF(R{9A(Pif@}lA@WF02Qxux3R)L`yU?=uTLK6>F8*eaw)oqFS&P3h z%wGIWVfNy08@d;N3z)GCjKP|ahz)IvzZtYI{ua=__}hi{#orWK7Jqxty!hLP=EdI( z92bAP(7gEDgVdGZHuNt0rqI6ln?pP5SR^+4ANVb!iv0!2q}va&n_B)qK!p9Ei(d;W zmwYRzUh*xVYRR{PUyHw8$X@bo!mK6VHq2V`?ZS*D-x#JZ`KB;q$+v(ROTHa=x#XL` z$tB+mjx70>aBs=C1+`1QDReFQHeuqDZw!-`d~>K=^6f*#l5Y%^OTJxLxcJ+HiY4D3 zxIx3ebIG?46PBR1m6#bA(Cr6>0X6JbSVX%0AiJsM{{*fj1pUtpT8C@7^xFf=rQa4< zF8wATwDj8p(WT!QG?#umptr{l?I@?Ar(RrQZ}Z zmVQfMUHa{T`qFO=$+*KGtNnh;lWar`nSMo8NB{|V7~0z2Ek?D z4)87ewt#=xw+FwLVy%BCd|mo2;M~%03Llq#TY#th`TLJyK<)oe2m2Xd?LRE-4{YHN zN(0E{54qtl@PNGVr>Fhc!k^mqlM?x(iBA@nv8D^~n$ULe`vvx@4d}YQPr;22kHuWECreBuMZs z8w04n3+l^Df%XgCWn%!{^A6&F{r5lL!f??yP=EYI$0Be)Kf-kpc>EyTkAVR+&Hx(E z0`>1199Dw+n+tdu7(i>LL2KK^85kHgh%NpGVkH(q-=?W9{f&$DR2P5yrn>kWo7&=UVrq-O zsi`ggW~R3Io15C=Z((YSzon@y{#K^8_*ObF zXKIVTeN$WfjZJ;=H!=0a-_+C>e=}2G{LM{$@wYJb#oyA@7k?{LU;M32eet(x>WjZE zQ(ydToBHB!$J7^pyQaSQ+cWjW-@d6Y{>G-U_?wu<;%{mii@%v^EdJ)EvG`k<#^P^j z8jHV`X)ONMrm^_jG>ygImT4^hwoPO4w__TMzg^Q<{Oy^>;&0zH7Jp;YT>MQ;bMZGd z&Bfo$G#7t!(_H*5Omp$KG|k1|$}|^$Ytvl(ZJOrdZ_6|nf7_p&na<*G+jJIxJEpVv+cllV-=66# z{`O60@i#Wz#oxqq7k^XJUHr{Vckwqj-NoO+bQgb1(_Q?nOn33OHr>VFrs*#JwoG^N zw{5zMza7(E{Oy|V;&0D%7k~SvyZ9TM-r{d!dW*lQ=`H?drnmT;o8IDYVS0G5y8g)btmB zGt*!E%}sytw=n(1-_rCKe=E~p{H;xY@waLEi@z#L87%&` z&0z7jV+M=AT{Bqx?U}*iZ{G|Se`7OT{7uYo@i#TY#ox>f7k_gzT>LG}aPhY^!^Pjq z3>SZEGhF;_n&IMa%M2HP+h(}<+cCq%->w-h{`Smp@wab=i@&iME&e8EwD_Bv(c*7r zMvK3>87=-6X0-TQn$hBKWk!p?wHYn`HqB`9w`E3)zil&G{Oy?0;&0cC7JqwYwD{XM zqs8CYj2C|sGhX~n&3N%QGvmeI+>9503o~B)EzNlGw=(0!-`b29f175!_}en$#ox9W zFaCDSc=5Mu#*4o_GhY1doAKgrY$l7piJ2_^re?DEo0-YtZ*C@wzlE7B{+4F4_*ML@OcsATX0rI(HIv2Po|!EE_RVDRH#XD7-^5H8e^WDE{LRdC z@i#Zq#oxkA7k^7LUHq-gbn&+~)5YJWnJ)ge%yjX$ZKjLA9W!10?V9Q0Z_i8@fBR;- z_#2zq;%{PRi@&LvE&gU^w)mTy+2U_uW{bb2nJxZSX14fSo7v)T)65osTV}TS+cvYs z-;S9r{&vl5@waDYi@$v{Tl|g9eDOCi^TprP%ol$%Ghh78&3y5GmG zt<8M#w`t~!zb!Lg{B4{0;%~>y7k|5EzWCcS^Tpr3nJ@mvX0iC2n8o66Y8H#XnOQ9U z=4P?@TbRY-Z)p~bzm-`m{?=x(_}es##ov}$EdI95V)3_Q7K^`KvsnD?nZ@F7-z*k? zW3ycRP0VufH#N(}-^?r*e{-{3{4LCK@wYU~#ox*-7k_KBT>NdC<>GJ4EEj*c#Z`Z6Ae|u)N_}e$D#oySh7k?A8Ui?kXdhs_i>&4&P ztQUU^vtIly&3f^-GV8_P+N>9Un`XWE+cN9L-?mvV{&viI@waQ%i@!ayUi|Hw_2O@A zHjBTB*)0C1X0!O4na$#FZZ?a*h1o3rmS(f~Tba$`Z*4Y=u7pX1Dm;HoL{&j@d2#cFk__w`X>XzkRb?{Ef|i z@i#I1#oyHI7k@LeU;NF@e(|?3`^DeV>=%D4vtRtJ&3^H>Y4(f1Ewf+zZJYh#Z^!H* z>!=J?EcxcJamhD_#Y?^gY+dqAVD^%48#XNY20Bl6!iFW^Oz$iQuP3yE(h1v_fY-Bt zs&LR4d_wt>Zwt!N)&zkhp%^q*VSi`&H%0~qW)K^ML2Fh)G-&M>Xk6dm08}w(0VD$h z!{LX^L30Ht>OpEjn3a)%0bM<4zbG@3`5t9sD-Rgix{YC#xemek$lpgA14dXTv=3|hYm zQeObwj|z&ph&#(cYf70x;ezZ}kRELAiMg}<8xI2mR`uB2Gyl$V&>Bv-dXTv=jLkjy zcb0?Jc!G~#CB{9)cb0$ShaT68t{$6vd>$W?+D;2bl}Q*xa-E&T`P2Ua)$QTR<459-Di% z-&qb?^NUqIHus#qvmCT07_J^>Hi*XNo(Ff9e-nqgAC!hb80IEq_rUVwlRL{nYmC9> zgVcgBOg*;z^5M>M&>CF0dYD>}d$5`R<<9bNQb_JWR*%iUEO(cK)&#@N2bl}Q*!-J# zclkFt1_owOK1VJKL3*&6FM4?+wU&_ zrh%j$j^&t0PQx7x$(B0+Vw2{<< z+=EX&>!ao0^pWZ>(4G;HTR<3=-aux9Fvy(Ccb9)NKq}7(sZV;e{F@9$bE#=|G2ySn+a4sC~OF+mwB}On<-NGfWiUfE)a%=4|pF8 zBV>&R`@QAg%#gx|kovMm%fFc;g%2V1lJ}N>vw*rE)c!Z z%?hd>6h4I1Ti;v$%^E3uKxG^#PlEJfYrpwCUjEGnNj)h1Vd`Pw39=J}LGIPLzx zA@vvTE&t{QRS!x7gw(Hiy!=}_R6WRiLgD%3-tuo5NZ|ttH+<>g=e_0MGLgcEkb1uR z%fDqo-2)0ALh4oSFaMSeRS$AMA@x@Gmw(HFst1J+A^-Z^U;Zr@Nj)L+73PN;fN zI1*B?@?iP5E>L(v?^^-s0l5o=v9*^B9xVUXjier=4u)anEv$bBa<7!gO-GJj0_v+DEdMqG zIerPK?|!iS+e~QqgWL_;d<~*O7@K?MJXrp17F0dR|Af@9eX#u7Y^ZurToF<)@MQV7 zImqE706A+Iq!$!l4Gc`+dv-wK46-iQ zJXrp1F|v9B=D&Ne{M!=b^hUt_><^cJTZ*infcXj!mw#IZbq^@a3Ax|w;qq_Gk<}A0 z-{;}-Z;S^Rm_cz0suw}!Gbo%u7+ZTR0W|)Gq#ooZkXjJNmi~($F8{`iq#mRWhC%5Q zR6Zk@C*2R1e`7&X4{{f}dQe&hVNiNp_;C3*RwVTxadh>_<;nJk%fGQ5U|b14%v1Eg%}3e}6t){*4n!J;+TUwIB>r4{|FAgZwM-X!$oT zB=sP1kXjIisYmv&`lIFFxDPNegZxQM{8~O*{*4DoJt6;kJzD;a7fC(H9WV@Y4|4n_ zJX-#Z4@o^C|CT&j{*50=Jt6;gfX3gT;R6aUkiTK>!Iqw9KU)4x5J^2D|E_(s{F@Mx zdYIWD8k>KQJX-!u7)d=L|K5DG{F?}pdP4qv_h|VyQK)*5+X?yi@1y14#E{g3^nlzB z!r1aJ_v7W?#F5m4)WI+||H?gH{!Ic&Jt6<K>5Ugz6)uC(FO- zAgd=(A2~c({!JGtJPDZ}`(*hyJ!JI+%&&T~{F^@1J)rO>Wd5`#%fA^Qt0!RorYFn4 z86t%zA@k2ZS^mukSv?-}q1_}n6+HN7#L=NCi392 zpc6qLV_cwg0xB~=cbtLt`z&CB$SnljeaFDSu!sqAzaEA-8xtEdDDlt z3lj@7Gb1w-Gcyw-6BB4ZHInfR8#XQd=CEh!w+ZW)ek(Yz^xKA|OTQKDTnd^$Vo2Dr z^qc-`@Z1f9J(N~Bw)9)U!KI-21n^Zygytv7H6Iivpz?)Q=7Yk3mgdVt&yXp2zx12K z`=#*xPau1dF}dLbI{yWFCD zZ)pq+BBl~6K;vj4z7i`y<6|Nz5-Yy7F*1l0N~{2lXNgovtN@KuiOi5#0UCc2StYRo zG_EAFOJc>hJO&1l3lb~7_!${QW@xPVR>;605+S+bn=d1SNV?>TZ$%6YB4v^* zz7;bth_p+t_*TNeATm>O#Wx#929d3jE54O7Fo;}|T=A`pfkEVjtWoTOHKi)LgH36NUxEryXnBvER`w^&97 zks_%T-{Kew>KPbBxTIHnYhYjy*`T@tG(ILGCA|VP z?j>R(y#h3zC1NeT0yIt~5-7a_H2x%#AiV-Kt|U?{z2aLXBZEk<^a{|pk;rW66`=7T zkqy!-K;t|j$E8<*#&1L(NUs2m%ZU7zUh(Y_1A~Z=%nH!Bi-@Ysif`eJ3?dFPD?sBa zBK2%5z8Nzzh)l3u@vV=6K_paW#kYP229bQ372hT>Fo<-?toUZa$RM&vX2rLO3=ATh zWLA8e1d30Y72hT^Fo^uqSn*8~{furbwqk(SA3IVWDr>g~xfS1%LFq|u#kUkj29XZC6`*kv5l6Wdpz#lpP`MS~q!}4RlH^u=s{zHY+=_3d zj0_^3ax1=tFfxcNkXr#7#}L^mx8j=wBZJ5#xfS0+85u+#$*uU-2#QDf72m`d8AQb7 zSA1(>WDrr4U-2!KkwL^xe#JKrMh1~!`4!(>85u;f@zv7!5BZJ5WyA|K$85u-Y$*=gPz{nu7Uw*|mMMegZD|RcsDKRpLT##S!O_`BF zdAM8sKP#Wx{F z29Xej6`=7CkuZ%F-!vE*L=qHMfW|jO3Kdp>#w|oz6;^=8BSfYstN@KOh^$ap@vV-L zLFAyqif^@y3?i2mR)EG6MBXW^0F4ufa44?$wt|5{L|Jjgx0MVGBG!s4zO7E54aCGKkDqT=8uU1B1vG#TDPyGBAjoP+akC9Rq{NUBwmO zq8J%Oz9_EvwjPuplvaG(05Vr;#kY+N3?ep4E52=FU=RsWTJdc&1A|D8(u!|e7#KwA zl~#P)%D^BpLutjgZ43+|Yn4`f+s?osvR`S%w;c=&B3G1FeA~&uAo5sg#W!z829eK7 zE57YwU=ZO{Uh!==1A~a7@``U>p!8DX;i;fPq0|uJVd+!Ju@hx#F7(C_UP*_;!$iL1dNkifR(w0kz#uZge#N&4P`ul(_}0wG zAo9R|#kXok1`!U272h-&8AKFSR(x}3WDv1eS@G={1A|DU%8GA~85l$gR91ZBV`LDi zRax=vIHR3KSkHE54m(U=TU3vf|qrQ205l_}0$I zAaX}##kUSd29XacE54m&U=U$eUGeQ41A|D7!-{X`85l&QRabnw4>DJE#kU6x3?lBT zE51DhmA9%ZzFlBo5Xn?s@$Di5gGiI=if@-d;jg;l+hqm@k=3dzzF9Cbi0n~a@$Cu& zgUChI72mFc%3IYH->xw*i2PSw@l6YqPSsX?^9T7)ZN;|$Mg|cpwH4n285u-E)mD7F z4vJs372m=@`Oaa*w;K!$A}wkwzTISC5Sg#G;@d3-29X_VE51cCGKidTSn*95lrGg) zd=q745P9RU;@fQo29alKE52ngGKhRsTk-7<1A~ZwMOowfyx=j72mQM z8AM_nSA5H1WDsd_T=DHL1A~Z~`igJbj0_^q>MOoEGBSuPaa{4uo{>Q$UVX(k2Sx^w zBaSP+=`b>gRI9J}c8`HUWQzKVZ$c~#BJ0#weEY-9AaY85#WztF29XzzE53=aFo!dPkcB}+QDeooPs|J=IZi9S z39~SW^f;~f_5@TPIIZ~h6qNooR(yNLz#tN&vErL9s6235@lB7BK_nNXACzyLR(#WE zWDsf9Sn=&S1B1w7P&v%PAhKU$#WyJy29cW@E57|@W)S(LvErLF3xkM&=8A7BEDRzd z&MUszu`r03IIsAo&%z)Q;k@FT1q*|Smgb6YJ}e9(u9_>p>9H_~Bx$br_K%rCq+WBy zHwhL7k=dFnzB#clh-}ha@hyslL8Qic#kWWn29X8ME53!ZFo>LRUhyr0g+b)3=8A7& zApdHv`1S&n4xCqf%LT>1%ZhJ#j0_?ME-Sv}Gct%UYOMf`D~p7zh-?Gq^dx~};48I;alSA6@zz#y_rYsI&(3=ASW zwN`u+VPp_Ft+nFYHwFfgn_4TreP>`0d84)B+Ybf?5mxOL-+nSMh{$TM_|^n!k7%#> zR=~(0;-tOe+b;$NkwEPg-+nVNh-7Q8`1Xf^L8MlD#kao<3?hBnE57|>U=UfMz2e({ z(AC?_E4~GR(zWY~Zw#P(qP^l9BPboauK4E0$RKiFd&M_vQ2DOC;u{kqg9ww(if_z} z3?kw>E53O$GKlEwtoT;Q$ROgbv*H^IC|&BT_*M^Ucj>J7#tN#}bXI(;Vq_4Rr?cW4 z8>k-9S@DgXkwIjy&Wdjwj0_^zbXI)hWMmL|tFz);5y*Vq72mi(=IgHb#?8neqN%&$ z8xN@7(p~Y5myto_4al9K#vnGlK}5t|cf~gb2R4xe5M96}(xAWM8$$q_h@ruXZwv`+ zB2z&80ydFikbD5YNHd6TU=x`Hq7(Q<7J%piA(6FUnqTBFh&~`JavelB@Qb_$(G&PZ znDkbBW7xniA^@Tf@QbK}=nMQJmLU28zeos(o**QW3ZeysMXEsb2Y!(*5X~SYvItBI zhzPi?_{Jb0AhHL_@?2LTZikbHoE$QKYlK|mw~#4ivK5d!(6K|rJg z#GfD_q7C9N5D@VM(HjIrrhvo`2#6$t_!HPfYC!Y?HjyAuIBZ}OnE>J+U=vveqA#$C zWP-#UL`8Oi_z&1bE`#U~Y$8uVGy}WHR}d}0F7gLNf8Y}l0I64C7s&;Ww>>@rOx`16I8AM;;6R85x4eTPVAbJA3$OI6*fL&w`h~B_1 zvI0aOU>Dg6q6PRx4uj|gd?NQi^aXa27a;lopU5W={eWGB)o{f(h7ar_QXravLqrus zHwcLsg6Ii+B5ojBfI}n_L@RKJ6oF_4VUYX`Ku9DVL^p7V)PU#-93m4z^a2i% zwIF%}hsa?NeSkyc0f@f9A@T`CKj0AIFb1V7K@mw1tspF73Zg%7hEQ z4)V8_{MO7OC%q}f50Wu1EN20i7W=u z4BR67!L*>rZ4fQME%FmYD{zY#fbyRMA|k6m^Z`+kV<7qhx5zaR{eWBK8HjEW7WoaL z1^7h7tw8CHTSOB~3y7G3Xa*h;FAy!jBN7Ut4fsToK(qpnND+uO;1Q_<(F=G*`apDo zkjP39?Z78;1WfaYTmsPyd?NQi^aNp%*C5(}U*r#n4&V`yvtP9y1T^{?R3V^lRq9<<4>I=k8m6SudA!v(nL0G3N)oQS+h#>tp{1ne}lPpAm>C zm$+1*IZrF$_M4R^70VUObK6)7m!~a0*fW*G?NFJOxoEoo?Af|{v*QETW<_#luZ=%^ zzDq4@Ub#N|Mt`owH9J|mLRZ^mC9!SYvT^N#!WF_ZrtzPhKmB!@@YZ0S1xIc&w4STD zdZjeshfAEP>Twm5iuU;SGm`1cx#c~jX3yLr^kWCdBzfoSlj;uX?YH_eC&9IH^VtcW zNnUZQw$1qc)HFpk`W}DdY{3(3yQ{j-F4lChoA#t>XG&K{ka%Icp47bOc1Q2;P5tV7 z$@>C#l)(W4BF5FiA zfjwONzk=xez@+M$Bw5fowjj`TE(|*2}xx-yR^przQvB~N)nMPquY+? zMJ{emR=RHzQ}HLb&&Zj(s*=t8w1n{I`Cj^S<1+6Si7k0B?@@b^{GtEa+;5KtY!;}U zy1`_Li{mLz{qKs__fBtHymPXn^oofGFaBmYI9dGX7qdQY`;#-8eoAgB;y&^H$6=L= z7t<#*efON>=p85-@-41K=+pYFuN|_iH?;qIzrE`7ogqAvEx-+w2 z$6MaBmRSdPPc{m5DZ0&Pe{bGfOgl>|s%BKC?tj zM`^|fHGyXH)y(P%OIjwZ)DJwwa4jT}bJ>l@>+)^*ZId2t{1x@Qa?jCoDciTWta-)^gUL(2||@_3GRy3&I{c+@Aa0WszF9OG{Px|8GK5lHAs|mG3>Ra`%F< zqQo9{na1@Jl1rW6ddyro(?m49b+Lb?)ISqWZ>DV)`zPj97ArZG@Af1kJ{pTBVbbh>uRwJU$eU%|Nr^_zI<|J z@=2zfoGDQ&vKp;hNLjuhfKRq*h68eQUF;Dr&0L8nF`1Zn3<=Z#(nO zGtSxiTyaXiX6^oo#lO1)`)3_s_487yNGz+$DLb5)b*5EL?r}QbpZlDRB?Y^dUf$_Y zy>C)>zUZ=RuQs1OKizoxgG)1$LmIr#znAk;(r${bln7|uy5>vc+NpUpl8di?znAB}a;ruf-j| zytsbt3xhv_5`kr86Qt-FgFfHeb7w{#l;gb6d37rFX~s z|4r1)Un5fI&}3tN^WlvX#r4PiynHTA;+DyfIlm*~L}=sj^bI5+b6%B8GJ zi#9anujrA;YxK`(T{|md{Zp6EuVz_4>ic3R@N?zSo^N)On%3+o+@GHK$&5>AW)|m) zeeJ4ekNr{B)imzhV#uV|{qOY8Sjz$vE7zc>HA|e<_`SL+&$!LfROL+6CZ~__RY&$) z_P=*)$Z@+O_w}dLijAH8#>Z6zmnSM@|BL>8;>gULm-kr?D=hQ7mb*Or`UVO0k4n@3 zAG8+9Q+WDoLRN|EhnuU#JseguXej;)DExgvAmh5Ff~6K$+&-3L%1uZkCrZ{Xa+Tz9Qkudj{0J z#hu34w?a(c?b58PHk-)LsIgi^RDYt${LV=Rugy(LU$WfUd|&9*@B0l#n?L`T{ms?d z_|j|n(@NXZ@>1NncOrD($1YFP(K&R}{W+WG^87aymRiaCE`93Lk6q)>HmUreV9a0D zovoki47!yrTuWH>Q}#por2~>uO3quE!;Z__ZwSm0RFdS+VoLm>6ss%7B6|2&-V7tZ zF9qA9dp{pp=BToB`Dd@^o)*?OBi>yva+JQUwfZ^Z?U%knQ%q0Xu)ej6x93^Ik4=Vw zPm((o?sXk~u_NhlPa!Zl6P?kkf#v}}Wvr)b4q zeK+y)^kw2@arUXsC1(ZxU-_^qoWWqxw~DptL@?1``OQXu<+nF_E5CiwTlwvd9z^XEy_Mfm^jCh% z(O>zkM1SSC5F~vuQ1&0amEU;uSAJvBU-?Z0Dh4wbMo-aS`K?EP<+m37mEUThYL-B0 zm>OL493s`>(od|ojQ+}RCI*YXU9eyLjhz9sBNL)CrfDT;e<;HOSBCEmOxd8lbqt(L z3=H+qIZ6-1Mc+J(7kw)+Sp=S^lm$&TL$rcPhwF>JHGty6V9~b|6`*ik`7Nb!<+l*4 zYWP`=pt;l?jVr&!G=k(A7}!9YW*8V4=H-HofD;$e8o+jd1Qmfiu3gh;WsYn=VT@^V37ccgK%|}Khn4Gn@#`1ZzlZ7{)OLC`WJq4LDJ^~WxwfL z`0Y>M!f#*t7Jg%aih;~T#x4B|zt!|F{8rMx@LLX4%@in&tPUHyhe&nU^pYaR0}7*r z=5Guo?cdlLl;B!WY zxJYRJmY~1r8^eSJ-$Yt4(`!b{%5OX^kT`>-*FQOMXMhBOg3hi?$~fYR%d^$dj5 ztEDUhNR=koCI$vjI+6jo88dg3>Fx1SoHV%1w|N7cN(P2e|=cEG}^m4~Fjy z0w2FE5c>G-gZRg90iqwjO_2Kd?Z7PC?*_6Tzk&3F%mJA}irN=mgv|w+Nvt|TZUmV{ zj2e9Y1erld9u_{JZ~>`D=Yzr!6n-#ybUsK97Pbjnv*7WAOB@ylGNzC+7M%}D2OykX zlw?|5T2PQ*R01lb;N==aLDM&j_Lbib_%weL=z`R(;PQ%rfni4{B+WnYY5o@A+x*SL z7m{u@e4D=+K-nNag0O{e^EU_I=5HT-n!o+zxA~h%LDRQ}=}q6*8C2ogw?M;@q2SuL29|8l9(o361_lOD8N~@IrwW_Cbrd#z zODJrDms6lMEHDGII-9=T0GUzH^i3kL`5S{nGfJHbQU|J61v*!L+tLAvGgvt#U<0W= z;pSywmQxTFAX8BBfr=(@djOPHT?7c%t8?x!Fr+XuFlZqea|GmWL^*|#3_)oVR8Co|WJ_7LD!4oNVu+uYx=eU$_A+e;T<6TaZTR};+noy#5H}(K$3qE*Yxc}T+_E7aZTTDAc;SS zYx*V;-}J2^uIbx^xTbF%aZTT5AjyNwg<*~Orf&-IP2V`;o4zr`L-bjI*f0fnXageE z;W2_JsReOO-%J#mzJ1UKrCUV(ngb0-P`V9Zg``_hss`Qb1!}f=C^mh|P;C0PL=h6c z==CducGI^BATt!2zOf`UePak{!kTVRbg%rD(+!C;Sh@|IgqkWXNJzJDlo9DxMlO(UTu2O@h-cngmE3go{#(^K;5TsnrN#YC*%d6+J7z zZF$%DZ9+l=xU2=GTacteKg91KIi2^7-&Ec=e*5yS@f*wg#&10D8^L7)NF4}^yl?y_ z^S<%hk#~*X&b({zVTZORIUd~gXHny79!Q*GlLkpKkpj9nG`g9E11^sjhz8> z(g8%53^W`;=~aOZl3p(|Fff4DSc3NZXB0Mkdr{c%&7=fU24bYw&W3LeATtUYzP%7{ z`o{2}5o>y_=v(dM* zJ{toFvw{Q#7{Kxi-mo#i@D&LLhCdPv44}2vpta0WIiBtfF(%MNNEvMgQWlilLAA6Cl{v^gBt?}6K4a{wg@KX2qlJo6(a>VhEomY zts)FFI8NkvH%Vx+9nd(#`SgP>&lQgccU06)tZa$r6y;EGWw^x1;2_kTVZ@-wkT7do z%Y!3^3n9^a0#o9Vv{k6S!i6gU~gm{)i)2sAc1wQw*v zENXC6Xq@A6Nu#a9$iTpm1ZAf(FfgPuFfe2@Ffimp#XwXMh=Af^1_lPuz6lVw z3`8(6FqAVeFjO!wFjO)yFjO-zFw`(GFw{cjKon@q3zTOXK^z7Kh9(9EhGqr^h88Fv znQCKTVCZ0AVCZ6CVCZ3BVCZFFVCX|qFoA)AVKM^)!!!m4hUp9p3^Sl|vq9rt3=9nO zq5K6_rME-r9Z(uX?Pg$L*vr7cuph)>U|@h9{dSOnf#E1r43wZwLD^>* z7#PknFfg2BU|={86$90+ml+rst}-w%T!V^TXJBBs$-uyH3(CI@r9spk1_p+E3=9kp zK^z7KhDQtx438NY7@k1+&lngOo-;5oykuZtc*VfL@P>hb;VlCL!#f5Bh7Sx33?HHD zJ~J>dd|_Z<_{zY*@PmPY;Wq;V!yl;JUj_z-{~$JKPc!Y234qfHAV&o zbtqelk%2*nk%2*vk%2)UbQT^|+>nuh!Gw{4!2-$$IR%8R85tO$T`>k*sGI|o2Fasi zMl`B!N|Z6&B(wI!^pr8%gDeG$H>5t2-OF3Lnd<>xRmFyukmApM1m3=Bn3ela5hLn)M9!N|Z+$;iM^!^pr;%gDe`$H>3{+C$g` zm2YNbU}#}vU}$G#VCaO3bu%(B^f59p^fNLrOkiYSm<$yM*#p8;85tO+GcqvDWMp8N z#mK-gkCB04K2*&@D7^?ugVZmEvX?+<}XZ!(ph{5h#6}k%8eP zBLl-JMh1q{j0_Ct7#SGOL**_oGJxtzhRaYs$P5s^0_9(a(zh8I8167KFx-Xm??Gvh z+DB0KV@3vsr;H2?&lnjPUO>fOL+N*n3=HoX85lk=GBA8%WMKFV75~b}zyKNq_|C|{ z@RN~&;TKf=HzNbXA4Ud-zo2{uYAAs$Vt^hNz`(%3iX;Y=0#l%UHXsHE69af|fg4F3 zFB1a;9}-`XiGe|giGe|w3A7j#q>F(;iiv?i8mdNyiGe{D%9e-HicAa)N>H{669a=9 z69a<=69a<|69a=T69a=D69a=jRNjDzfx(1{fx(oCfx#Rq2C~Hxi4EdgGchpOF)=XM zL&Y7K7#N(OYmLmU$WLjqJhk%@sJiHU(BnTdfRg^7V7jfsIF9V(Z>#K4dVWrOr* zF)=XYF)=XYL&XZ27#NC~7#K>K7#PZ!7#PZ#7#J#<7#OOU7#OOV7#M1p7#Qk6^Epfm z42?_-3{6mdAhSTYnTdg+g^7V-TBmDeO~?HcoJ)M2HGFz`R~~%GD{;K`BFAH0#`TBa zshuq=(%Wj>t-1Q`P2tC*i-**i~am7&dXX7H=ih=AS3z-5p?YHQVD+@!vChiyq8eIIX$$qI0`f zwiWxiySYa8N2cHR=-Pk!Xv%SE)zT@lC0dojC!*Ci|Nm_y^;mbl>|*hLzBT<5vL_t~ z$ zuLNIw|4=b+>K(^Ru6sDv9%`!AGHUz7{ZxJB`b!+|)TTL9btqTWUR)a_m25w6!I7(p zv$aJo&FPDh^&Z*4(p$Pw+$8In3H*39^#Tz!guSH>Pzw2t3OU?`b)pe|2AZ~s1a^=FJee>QV z_a9h2C2hj(+0QSjx4+QpxU$7g`Lp$_m*sc*%fdfTeqDa2zj5W23A!xB7uhleHW_tZ zD|7Z_jMT6>&T^^D;kkURdvN_3-Gh!C#^o7lx03m9TrCycwSDh$r$?`zZ0Tz7U^_SQ zYUIpc0yiX|bI0lR&p0||-^*`2KaU^bSo_;&W8bBt2m2x{RW+6=uV=Zd@$3Eb<5gO# z6eMNtDbH%3Ew{EmPvGvgquryK~<;d{nBB0wv0}j; z=XDtoJF~t81z$hyY+SC`)$N;f;?kLIg^ICH>Q~y-s51+AdxcH!yYQ1+qf_X~^qoro zG|rXsT~giI)$mv4jo;_{f+=mAH(r>%zV_nQ9Xkxet$fS3x|JMRCcxcby4tgLs?}?= zDSi)1LlTTYU1CrXHHt?=U^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtwx|;DY?BZw>OR zQ0D599d)2)!?y;z^*H4jX0Q6jI(yYO(b=oMY0O^r&3X2!Zz;1^ee0RM>f65AtG+Rc zum4siw*H&4*!ph*V(Y&#O0NGlTVnmU1c~+ELL}CIJFmU|+f42C-w_PzEHLb0|SF7lnq+*AqQovF)%QwL)q$}2`4BU zw2IgY$_C9Bxj@;VCBnf_HfXXl1oi>d?SbCFdR_YM7Q;I)|jrt80jnymlUWU~I7nfdx}$b8W7 z=R!>e20jJ`hAWy344^qxpDG3hUIqq+l+~=@3B?6(*chZ4Am?sLf&BJ{jX?&=|N8HL zzQx3qpnGf>G|sO42I|<}Sh5my&kKX176St}0|RL48FC2IgbkqkcNjFd7#KkFyn+l2 z4B`w73@Qw(K=+t19Qm^nbUz700y6`HFazW)>3{$K=ZEAlF#P}jKOf}Q5C8w?dwpN| z?brYR`Jj1nq@W|nRGGTr+mE+0-yNLRf3v9D@NGfv>TeoTH+*wAwEkPm)D7Q6Y}SAC zsN3+3A(r{OL;U)02M(_PRxx!0IE_~*ullB7v;G^yq4nPsoY#L7sNL|5;hoHP2D|m& z3P5W5*L?f)R_1%h)D7PhYBzj)aB%&%gqBs`)RiH5NCBj#cEdMz3+cK_I-?nkB`gV+K)wgS0tG+$sTJ`N4*Q#%9+^fEcaj*KO#=YvB z8TYDhZrrQBg>kR?md3s6TN(GNZ*APGzD?s^^=%pVs&Cu4SA9Fiz3SUF?p5EOaj*LJ zjeFHMHl9`A#CTSHQ{!3n&5UQ&H#eSD-@YE$ys&8SutG=c2uKHHS zyXspT@2YRpcvpQ}#=Gjf1BERo}kx zt@_5szv`P9|Eh0l{Hwm1@vr*k#=q)Y82_qoY5c3cmGQ6o*2cf;+cf@F-n6Ik_4OkmYFHGx&%%mh|_a}!wgElgn5w={uO-^v75 zeQOg~^=+EKs&C5#R(;zhuRX!Ns&8e2tG=}fuKG4jaMibEf~&r56I}J}nBb~!*92F6dnUN*+c&{g z-`Ip!eG?N}^-WD^)i*PtRo~o%R(%T-TJf1HpRo|Wouln{)c-1#HkyYQsL{@!M6Iu1mOk~wJ zH<4A}!bDbmOA}f3txROqw>FVg-=>MI`nF7D)wgXTtG*o*S@rFj$f|G8L{@$KCbH@q zo9L=RX%Ws&CUoSAAP1y6W3D(N*7$ ziLUx~O?1__XQHdVeG^^vjZJLTH!-nQ-_*obeKQkV_03Ie)weLQRo~LYR(&fITlK9? zY}L1EVynI_6I=Cdo7k#v$HZ2ByC$~k+cU9M-@b{h`o<={>YJGOs&8uItG=0uulnXD zzUo_;_^NMd;;X)uiLd(BCcf(1H1Sp6mWi+WwoQE1w`1a~zFiYv_3fGXs&C)KSAAoX zSoKXzV%0Y_iB;dsBvyTMlUVgFOk&lyG>KK;$|P2OYm->@ZJNZYZ_6ZBecL9n>f14i zRo|{jtors$V%4{A605$kNv`@PCb{aHn&hf)W|FJExk;}27ACpsTbksmZ)K9JzO_lN z`Zi5+)wgAmtG;cMT=ngkYJJLs&8)6tGs&CI^R(<;>v+5h0?5b~Kva7zS$*%flCcEmJo9wD@ zVX~{frOB@PRwldZTbt~vZ_{K~eOo5G>f1KiRo{-uuKIROcGb6Mva7y*lU?WgU zF}YRW)Z|uuGm~5O%}s9Aw=lU?-_qn(eJhh&^{q{A)wgMKtG+FhTlH<5+^TQKa!!NkSH1=>@DZU!zs6N4h7 z7-)}${?o+|#DB9tie<2$=-QHDeed2fVHv~Hd!5XuFS&JS^+u(M_E#U=BP@ExYia!! zasTrXUb+?0W}-7T9k*O?=hPBgjkxDgl{>3BeQvGHlKo{iE!WG_W}|s?V>QdtEw=d{ z7904i1uu&pwb^`Pv4PFpeR~fsICyLyi`@>LH22`%4fB^AT0CL@CeQhW@y?SBR!hBT zz0&wspy&pF!)yQN_LZNDe+fmNU0|ZWuzDA-{K}^%glZfkM4b+b-16yI#$dU0qL%aY z$@iBpFnqUtb?(Ng%8Utn`B%=(7tt?W&a$)T$Hc?D?4hp|A6SZA?=oQNo*3HTkt6fL z=y>s!$cZUG4@qXtm^mk0^ZyyBNGA1+%1u3g-{y0TNOTKk|ihRxO1B?3WRa<5} zX=4|6+sMPj9sB#>P2ZNjLqC`r*xvl-p8>BOEtbABM1>=~%gZi^S8q ziM@LRw-`=yxaM)~W*+O=o3ozn?pzeuD6oW$&*0~Tvb6%OJx(&06OOL<-lX$uPFkbg zzrS*BZt7pe7JvGYx~{Z%|Go7Ydr4enCD(SmQpGgnD~dWea~c%7rZ-rw$&^y-L^kt!p+nZ{pb9)Oxj(Z zdcU_JU{*%k!6}S|XLe-{oj)k97tKA*;TKG)zzx0sP=zd!-?*VR}+=&}=QYD^G_R<@w%S z+H*FE&#k%0JY71=WL{ctBIhi7p{`hZ|>*ub1yC&4gxzkQ_u8T>^;wT%o|4KRu zGZ!se(lA%HJIjihA#vsXCN$6m~GI?v58f-{`eGdb#kthTXUKA28f`_@Lml7{kAY)1E46 zJej#Ka^)rskv}gK8-4bgZG2w-dGE(7ZD9fb^Q2E~yw7kaa@F^M_o81qB9uLCK7Cqy zl)-SL%?gR#vX+)i)0u15?6diKb{2EdwS~e9xnq}1KQM9XBi-PQ>+)jO$2@*obLa6L zkKI@Hg?uoHdGWnFXTzjjE52u`buD_ty++Ez;~Z1rt;1hCYx1Qx_v~-ozGlLU1toUI zMRqUlY@2!9{z3T5)Q7c=2Aq%Aak#xW@>ameea+`{dI>L`O?{rskBrkO4*9wExlL!C zt8P~3QtPAU3a7Hg|1~No%w)b0QXs7K>YsUE(V{)P6GZRda7onlPH4L?>C!o2&v6}A z?nZ@6N*`*X!o_Y+U*Yt9cEID$>+0;i*83Ffk2U(0J!kIpNJHt4^Ji7wtra~idGt&( zlYOuQ_ol@^F2xDvRsE6`4lwVCf4|9QX0k?plg0!NmaL?Q@l7W-af^tU^}nL#`Lz}N8h#QzOH_; zJEUTx3U*U%RalRZOFH$y4Ipt<=uQ~T4%jy#%#(_-JUsy)JbCkWZZSS`8 z4_;h2ojGHDa6Y@f z?Qb(Yji#|*?EiC0Mfc`RmWwm3<)wtHZq>cH{d~d(o~DccFI9QIJn8Ishx5eq{|nfz zzur}T@mxH^KV@fMtH|aB?F;ASNqTZSBzC9oTYomUIBJTYjLBa1>)t=Tq$7T8bzQtx zutQLaXH}eY=JibvL$_7!kSaQ|@~DqP!^Pfeu{WhMlCqX@&m@zB-ltm}HQ4O4{bfw- zo^MAR7R``3WTasA^`eamtLneRRWJD->8+Fa%ehZdddcjzn&8MM2j*!x7mEm-?%(r6 zFl>R~a+5F{of)hd>>J+d?BT$+P1)AEj+vpaXQPatjraK6}-L|;og}+*(WcQLo_h#~^ zb2)^(72jum=~#VvaGuz&S6w1L6AU)mTHbxUwY{(ELBagvrPZ-}OP|&DuiO#y&GD+< z6Fcc6jc=1hL37E|8_s_V^voA$VEo7bN1uUV`DB}k8;_*_25&22iHu^l9@t8d8V0?j;$pD#;!{$S zO4D;P^Rkh+U?sR(Oqk-Jd4JFjc2L+M?*T7{2}g58m1q;mX?)8XNr^#0gW*7+GK1z( z4h9Z}gpw64EP@NUm?b&dm>4`5W^plaILNGUV`OpA0G+a@<8Xk@(T&4tvIF=^a)v1k z4h#ZJ4gwquiH8{+7#VmN1egRI6&!^66r7wYSXl)d7!6)YG%z$vax*%Ju%rm^Ok!dM zEf``DaL_oS#UQ{S)WFW5A}BlSiTz69Wq<=`+YM3n?%t2|6(_ zIk7r1IB+yNh-e6!DzJdU0<_m0w8uP#fq?+MKfdRC?9JH?-w5L3Sfq?;Z#9JOT z^}zO)7cwv~ltRTo6lfngXb*V}bpJSL-#BcqI7l9ZTR;Q@14AnV0|RKUIEdR0-80?^ z;xI5UbVF%u`^P6TFfdGl?jfH7RW}t%gZ7foWME)`?Ij28AqVXrU&O$`uo$|39HbPq zhkOlmzc`2w+AqEt#DHSZUUASqao8U5oltQQwF^WrFff4jjDwhfh4q}4#l;4N$BY(tz*gyUhBndsE1Ih&NB?qxzSEjx67IYpZpe|-t}(!iyihCR(!a$oS*NI*X%NJg{Sl=7DJnXg9C?3$xI9(ZWK1!A$F`DlzI(v3~kL&OI=7b@T|1D_@L*i{ON7N8ejhM-G03_Ha#(T-K{AVt`*IJ8+UNdKF;{) zPy}Oi{Gl!PVtuL?PrqTu7`E%}v&30CUa!ldW7ZUz&d6fDu}Bpty7)3`kF84I9iPKH12YB7K3$s|TJgz0fwAP3#Qx&1K0WU9O($fvPu(LO#@l=U zxBC8dg_nX)tP*tZjg{YK^M-v-+v=TP9%?@P$>9^Nt#*Jxd4XYV#>Vd(&Y7%xC}df? z;-%3~j}xtT54g|#^Xv~hUtfOm-)-MNo;tm!!uLRpYplVA?FWpfEV|yLJaJ>_lwZ89 z-@a^>`SC|tdfk@Vif7+yZm;2bs9gG{D(u0cqaEqT6I0WV%Lcx#NIH{$!9Dg1%b#K< zSLuiI-|YIeoWr z=I&e6-*US4%CZA|o&I&guQI3jpMSrT%UMe(bJdGGDmy&`W~$mu&%5mXaav%&`bE~> zXO6u)GpBdyWly{N8yCQe7+6+hm<+CIAzUHQ`5K_Zsvukj5I-B-V1WpL`2RtJZ4fS4 zem1BPfW!y2>!4h4g@W37UOXX!aSR@sXkr z9KZiS4N{O}pz+ly3gtlg|Ip&I2hIKrH1%&li;SU0fWjO3oDvZK8fZ~7R35Y@*#%91 z6q@;&Xz?`{$pawsR-n1x94)*!(c+gKOsc?M1Wel+7#JAVqs8Y%H2b>I^hba? zmLSd0^Z;quLj*uhdx_?rRy6k@pEC!tUjfbkd}w?rwER$smL5)_nGZVa2;v$@{?tJ; zFA^>Nh@knG6)pXRp{0j1H2v#%7#I#Lg`8_5#K6OFUy^}=!HALJBIrCI1|Ehdq6`ch zL>U=knL+O1VGx#NU@%Z;WDtPLSBo()IPfttyk&&Q&*Wra_|OYE-w9;i4lxFX1>Ych z0ziBoaR!ElUknVOaudX#BFex}@PdH>bRG_f|BIP{;XyV7gAF)-co;I+7#I}l7#Kk9 zagh8sQ3eJBVMg%T9w0vG%p`>{1_m#v`VdhDh6~Rb7(i!jf#lnn85kC1F))DoHz2;0 z5CcQOc?R%#S0Mf?Rt5%zD#)2SApU(W28MvC3=Gd%A^uq)#lYZT#mF!hbp8qh5BRL9 zfKbR8ULf^v_!t-jc0kTQ0`UU`7#JE3GcbTQ9Dw+s@d$zI3=E+D28f@^!oYAKhk*ff zZWo9j#mm4Du$BRQ78r6lWL1f*({|cZyiQS9?Ow0^8&5&SVV6ZS{VEC}^ z-+yqjcjV(}X7b~Mg%c>OM)7C}jE2By2#kinXb6mk0BIqx;nRk137ZWfF zX`8+UbZ-P>nEOELLCtuO`h@gN-x|^&7;Ib`#6QUHV_?u^U}H#NIKq?zZbzfLZ$bK| zZww&Jz`)Ruy6IbkDa5T{^FVV^Oo9xI3h!O^_#vitlRX>VJ*bWhBesSXTiY6(82JUc_#S$TXgpwSikAp zfprl53LyO%5H`$x{~0*I^H~}U9t;kjHho+0anm=4j}SEqA2)s5FnJ>wGfdw2?ZK3d z-~KXyW@aGq%kXK_w}y|Kz9m4_Gko0iO`(4y7{kIFw4<4g!GhreqX+oBUxC#dzZq=U z_|0M6#%~5oHhxq1wCUS{kDIpyg*&BVs z1=0^PabN`RjRwuNfrev1T|iJbyJrOx>fY#u8^C*`dG>4o?~OjQVgq<@^lE9;z0qrY zHiP#@N3fypjc&NN0lYVQ$E^+Ez0oI-_D28t|36>BihSBWSPVczB0larQ7^IL$44N;5DQ)<%;oF3mjo%dHHhvShw((m+(&}#viW|QP zL~Q)_pJ(;A1MwTb9VuJ=ZNay7-xf^U_|0I;>Te378@~mlZ~S&aV&k_57Qx>)tP}nI z;mF2s3K<)}Eht$1?L)}MZvhuKesf?7`hHV+)wd5t8^2v>-}p_zP2~HojMd)+DmQ++ zv2XP^2JemE9HKXVi;-IW?SksYZx1eS1n=QyP}%scA#CF}2ky%64$oG7E0`hrU7&p9 zw-1|Ef7|eN!#7aeGjMPG_8?>RHwUhb-vVqmep9em{msF8<2Qp_8^0a+An-jvVdJ+6 zb*sM_sILAtA#>xmfV7R@E>v&))}XZUn}f>6Zwa9rzb%N|`0Ydf#%~QR8^0}J5Blz@ zwHmxv`~c6!Zx>jCzAs?i`0ek8Ro@gOHhyc=Sp7|5*~V`hq&I$RaM<|mLi5IN6Qovu zn-I0}+XJ?s?+3~^eoMHz@!PG5tG*p@*!b;1+p2F1zCg<1grMN>6+&yi2`~qJSCHEH zO+jk)w*_e%zbz10^Xo&e{`@ebBH-V!YzkO)i_-zBr z>Ter#MZO!%-T3XoWzO#xzHj)Z5VZQ6cj@YH0@16#ZTP+FTS7+g_XF-5zd0~({MK-F z<2Q$}jo%82H-1aV+W76jlU3goyf%LO;I#4Ehm?)q7L;uK<`B8@TRPwBZy&yF`1Wt> zs&56d8@~y(ZTu#XzVX|EvW?#usyBXP__N{L0@k4KA0jt?&o z#-Q&NNo&3-bZq?AkRAN}+2&Q>3@&W^c7QYJ`-YhtzZFz%{PsX@<2Qy&8^0y&SoQ6L z|Hf|yD>i;R5W4Z(*?+6P8D*{h_JA?y`+}Vtzs-Td^JH-6iYvGLmlJLc~O zJR83q*tP0gfa=C?3hEob6@+j6X3)Cv+wrZdzcF0h_|0Gw(|3-otG{jd6!d+==GEZ3 zgTZ?W8FlgQ%hCy@xAPf=*VbJ{l3Km8N7@ot# zzyQJ^IS?jh{vYNx5FNwLzyQJ^y&&I$Xiy&?G+YLn{||oiUrjq)C|vJ+R^M#Tpub`K z+>D^JJ3wc4fYwrgFbl)d5{D^wZ5SN`85S@I@my_gOgib=#AKkwtH~hXzyMMUI@beK z$Aj)01DzKS8vg^G6%W352Q*a10KPsCd{#W@oOsX~@u2tuVbD4e5N!z}7#J9=7$9RS zp!4GGp<^753=9mgbK^nlML^@}pmXCvT0mo3-VBhjED#@bc6|Huiv`A)_8#tk+2M7x zdYQjYY%j;l-~By4ddxqx>6B=a>x?-G|GI<=92{kKZ927_UFO>Kn=DNWZ|WT`-DsvVG2OvY z|Cz(<8xtx&9?cEEzIw&sufL@3-xh3z#=%+*7x{v*3Q{v{=yb z@gS$daVDGv8c$;Vqr~pVm`uM9cn*2Xd<%pyn zef*XSO&*k1p~}JY6&*+dAp1aPw8P{Gm!K9LF1#KGoAxhLGl!cZ^FXBknjw0w*!bjgAp>m47wix#CK+5U|7%r zS>piWgVqW(ctOtc2Ju1XgBz4EFxW%Kw?8m5Ff=@d+^+zV2c4JBa0YVE7l;p9>+ryX zfdO>y0f^5A8h@V2z>vuWaqkjl28Iu(Am{FbH!gsi0i$#bwU zFno9nS@QtmgU-Tl@PV9F58_*a%wNU806Lc*#J|AAz+f-O%xS z&>8m!)-y0HgN|pHFfuS~$b_s>0qK9v#K2H6iGcy+PY@rp{$zs_1A`^hJXID328E}H z@Bp2KUQo)wFiQyH{!S(ah6Cpq7=A(H2XyZHhg`^=5+L(HXSWL!GcbVGcYyd)K=FHm zf#C_%J)KDDS&-o)c>KDckAYzaRNje&fnmWj2Jk%^ApPP@3=9Gti1_wkW?&Fl!vM}( zV0jRK2?K*E8^nE@p!3B$AZ0N~J{uIDYZw?nZCVf?G|yqM24UWLW(I}>ml+tg@Y{@k_##sic5-e zQu7#!OHxvciWuVK(~#8WCg$YiCo`lKrKU2ZrKgr8GnD3msrdNhlFEYA_@sD{d~r!p za&7@bVsV~fd_iJSacYrK30O;hL290v2}4?PPJVGJiacbUC`e;Q5kw*w}LZdM`zn~J5j3MqREkNQWXQU=)$HUfj7nc-)n4sL4lbMtZx+%{LQ~;DDCTD}9 zEIutUGY52ISqaD}h_sKVQ;1`*pJBW~yfK5jkEfG!ypbM)Wr)N!fy*1hSq5;Hu^wps zIx}ebD0mSm3j-?y3j-SiD+4=}4_aCZDyBg+3j;G)9>xY0*DyH_uzDs2>O#<%3L^su zKJ&W63~J+p&X21GSq#17jfsJg!8uL_EC*^!!0Hf2&?p!Sbliu5fk8Mk6Lj|!!!)Q^ zv3w>c0|Pq)XpIV}9V!BrXJc3cl@|o_SsAuL`2t`*3&Q~@zeEzGpP2zRhY#wPfch0H zG#D8`^Z_XS07^fB(l4O&8z}t&N`HaUKcMsgGb3kbxC@lb`MWD0zy^pmYV4u7T1GP`U+5cR=YLC_Mp6FM!fZp!5nTy#`8efYMu_^bRP!2TC7+(np~5 z2`GIAN?(A|SD^F_D18S?KY-Ftp!5qU{RT>ZfYM)}^baWg2TC(&LE{-pb3kbxC@lb` zL1}yxkA}c#2#kinXb6mkz-S1JhQMG80fVZ|-yT$AUk7lYV+&+{1BauPJ+^$a@!0b1 zdc>A*$%$LOxq58*mL9p~+sBA4-@HAxeDn9%@+}goCO2`*x5P<=bSBE#IblZ230dW6QVo9$UWc_1N<5kjIv9ZjoEQ1w?N7_Q-w9x3lhBzI|}t z@@=jAmT!CAw|x8OzUA9>_buP%yQBK&l*g8DweDNKo%h)C?Uu)uZx5jEBF0Z3_oDmh zi3h|_pFOsG`|Gjg8;2*tPayw*{6&nP2>Ai#XOMq|J-2)l_uTSL+H=b{dCx81ls&h6 zQ}^8RP1|$JH+|17-;6!Cd^7jl^3B?F%Qt(^E#KTdw|oos-105nbIZ4A&n@55J-2)- z^W5^S)pN_YiQZej&G+8&ZHDKTZ%aM5eB181<=bA*E#HK^w|vv~-tz63=az4mJ-2+j z@44mMERQYUUVCo&_SJLCw||~nz6p43`KIKx<(q-mmTyj8TfT*PZTXhvwdGrd*OqVX zUR%D+^xE=mmDiSU+q|}XJMOjR+cmE(-=2DH`S!tU%Qr^vE#Jhvw|q19-tx`Pd&@UJ z?=9b=y|;Wz_TKU>&wIb+#<5ZI<_zZ)?4`eB0xV8kabdC_!P^F#4s4 zE#S2QAPx5;wtNHiGeP6xZz8sQ1NECh;=dxc!0$X~k0j21m^mVmTfl1rK;|f*=>^T7 zfb7zV+yY()0Aib>sR8LDgu!!!3=9m8kz2s)4?ya@$uI|`4~9YO9zg8q$SvPMi>hpH$-mv2HFD-Vjqs&@(s4N;X>q= zZ=m%QAn|*VTfV`zIJ}SC@(s4m;V&Ndd&EQHz$6|LcLniV!0Rj8;~{ajFdhtZ}|r5|Nn{K@(r|Kn=b(pZb}JTzJbYT9U8|bY3 zh=eWQKxgP@C2aWy+Rjj$07)l(36OXL`2&POQz;27kToTs@eh!HH;6*kl(;-+0Iw+l zjX{9I7BoBp3Iots1Sq^feDHbuiJQT0u1VhvPB(LsHiP5z8Vl;05{7<=pI3nPW|I*6JPJ zarj#8`}SjdqSu&Ke>F|EHZVB&uT^z==!%QAtL{WBPq?9bOoQp2KI0ADe@m-Y1hz@@ z9C>lFeqpn-*B4)B&526q;-!ra=lHn(x{{Hg>!y}BX@B60MX$+w=2sTWWJ=d^C1^RnxPf z)kh&M>-)D=2Yl8f{+|`3`X=zwy_=$L=N%<~b=cqB=EmzO6a2&OlHYgL^V8#hGo3sr zZ2Hci(Q7Xc(}Jl@?SV_Ai){n1BH~U>QTl>aYtY(>KQbL3B z;>kaq_oY|Np8VB*BeP-;-$`dHX?@o3dpjmNn$GD^zj~|l^3l^tmR+XlwdJpB7T8Zo zo9kD;`0cdEOf7S78lQdJG)3j=+pBCp(l-8_{x2-G?SamzX-Ox{mo2<`pEV(U?*xYM zFAK`nJPuRkC=%Vcao*icH}gJA&E{v3=(dUwc#!fwF=_sN@%Ik0b&WOu@3Xu!TChXM zXUfmw&F8(3IIsKIE5`Nv@~VYL+h+fH+rU@j<{vH{b6hv>un2TN7^iznmJd%2L4l_`2PF4)*qk74|M&#&Oy{Oa2>k zw5+VUc79{QH0A8H7gwJes`(^^h6rjM3kHt+eBa+98$2Xzlz{I49a z+F--OpV#x(E|E|+>~#DZB%IIfB(u7CZq%f}Kn1Pjg898Ii6VL@0$eO!O6||SGWm?t zs%tM+y{tQ!bK~Bk#r%7!Dju3rts{y`_X?|t5SX5oJos6g!8-bmQFdj+CI$c=#e(IuToR9ikpvb zojsGaMUS=K?a9;YY;VrJ(NY(_7xE$6wnUlRVfy8;-p6yd6xf<;TmLD4JuPRF`?43^ zHT8FtR>qo~=ex6R?dqz#&)2+3Di43;H!a}t!IaNi-t&K)eXh)A6`yX0fDGpvo@qy# zd!OuW>;9Z`kYYr-Q8{R($}8-i(0`k*JgqGTf<1tdDA|Yt}*Rht5nY^b85xj z8T}IXrmTpazkZ^*)-}6)-Lq9yp4%_#Xq-ObI#(msWuM3{s}+Bh%(YUXvObM=uIb`(W! z*)U(U`^cHuHyM>>Ba^c2CpU?-VSHICk{Zxw@~LemCh_Trm{c`fi)X zqHQmP`lkQ8F2eobMVpY_vgBjp7YlvbIPDg)nr`FjJhIf%P-^*%_Dh>jzn%7R&%5JK znff|@E}AWTB6qs{zwnO83!?XHHdg6<|89Er`o*UBgZ~8U9_*;ynZ_@EWZ{&p&rUC$ zIPKylB`L?JQe`@!Hv7%abbZO%wo|C&yH-;By~asPRjzH*cK^d67Pf8EPcE*PYT;+k z{5V~4Li73>^@3Mlt~>ER{a$kMzgI-9=IPJbjoag|Fok|%yl`Ir_#?q<9`!okTULXY zFIj~@lZ^i{tA&Aar_dW`28P-5k8;uWEHCH@V4z9h%>2B8KH4h;;(z>PLdkUIO(aLF+_0 zL>L%A7}PHVsRM-rOdaSfCXk;%YjQ#TLJ$VsV+V2*2!qstXpmcA>K=$PFn}=VyfKg* z2!qBJKx#pYIbrHRYl}gc97(i=4LFR$N1$n(NR2sZe0mPn*WS$E(lTL+u5rTcg3q0K(YRfzEvb`2(a5v=#t_ zEntHw43ITyAagh@(*$EY9Xs~2t0Qncj2g$?Oqcmm+;9CC=I*bjpmPg_g zB$1ggK-T|bJOA&9Co2O8gH=M;|1St&Wq@Ig2nL1&(WvYHAIxE8fML-24UaO5ug$hcXxK?dlA*7hv@#2cDGXn!dIs;@q5GYwPHCSBa;BY+HdZLMe z!9m5vjH~wo14E+#1A`+25628{CK)%O#m*W!vL#dc8W>oeT9yPco@C)*DfK(h!rGky zHVYIxp!4yv7#J9`q37h~GB7ZJ&dLLwlLtB@52U6DbS603d3hjl5Qd$b2P$ttXXk;= z%>#*pj`;(fp9ecL4|HB0Y(01vNC6agLut^OV^G;S5y}TqlNlgqaZG1mU;v$sHw$_` z9_(y9kQx|X3Oyrl6;uGU)_yGm1H(GdIV%hd44}2*o1k)__0yoW<)CvpKthGKr&i1p zt9@@S#(d3PPWyeai9hGhWfDB{7E&98mHpEkSZW+5p0|$q9(K_<=)dOPqfrHgjx|nnF@v;2G0K+$8HZq~SAADIo)gRvHFHC+nqe^y%vDJ=)8Wvp1ne;LyR$tHf?U6{DMu6sT=V!_VJ*R(U zG_CaVbY&0u8Ye1mA*8^~e1xxVi6&#dR;6((*PX7%W~)BWynVVpASO43S3EbzA=8!J z{tth7)77~F-gzzhmHa%c4IHksP96M}Z=!C0yE(|}87NGV@fjozsEXSQO6X8A5WfWN z9H&E|1{aciD4P5_H2v?;`1{b*Z${#S<`v{X84k((YEVN2i7$g@{|z+rVQmMH7ErzK z3aW@e9O%A;BJn}?pF=a>0nL6XH1l+j+z$#bJ5Zs4WZ!l){a=yn1F3(Hre7G% z{0C_6d531+S~U5&puu}2`#I6VGXPEh2{b(NA0KLL&3 ziRK?9eExmxsd}Q+%qJ`H=B=bP=^AF8_K{WeW z(9E|%@(@VBD;i%C&HN-Zz7U%FzVB!v zn*ZyO^n>p7W;Ap9xJpH=6ny zwD1f=;Wl{R7&n71DE@Vrq35b`Gdy8rU^t+Ph>z)@ePOkX;I<-2{~itoh6GJ!czOcu zD^r+-h)*VV28M>&j0_b}_uH{DFc>s3GF*eYA9SYhg?o$)PkA8WKbMt(A)%9z;R#e8 zv=8k=0V8<-C&)f&CI*HL{g5-2LHtxE1_p;o3=E)ii9!5KRtAOzZHx?8p!R*?WMFup z&&=QpKIe^_VKW;8!-eUL3;|Gi(B9_)duHglY}^b1pzxc+z@P^W4`U_8OkF)%!s z!2su91chfEBZDf`Ju#s4Hj$Cx1C*ZviVt08c>b8m#=y`pm65?6Y99|Myc!r8Kn+Qd z`DH8&3=^su89Jf*x3V%Y1avVnq(I#RI%`{?oPhx}wgFPF#m2xep&yZdzH%@ye9&TM z0F8@*&<5qxZC_x4A#Ce8sOTS**gPaY}^4}@8SV6r((yq4I6iW*S%Pl?)U~Wd)vkx z;59q1Dt3H32~`iO%0w%7e7mx7$G6KHcYxRM=vM6bb{1+ssH$Zzg2;o+09DN~MG*5q z?g3T(*+_iQ8lSmP`!8+W0bc8KyKu+1Cs6Z1V~(#1cYM1J<%9Z0bwxYA32lP-8Pwk1 zUbN%eU8p>${(f7uAG9`#s~BNFXdFbPddD|~O%O3q9d1*->4`_&YQT2{*-=OXVjq|4#@A&p>BgB953=9k{NPJLxYh^LQ|Dg8V1|k@SPw1TT=}K^eZV z1d%?B7#J9;kjyt`U|{G(;)BKjzar@eol7wt$$T>g28QKGe9)N{dy)8{HpXQnKB!Ih z9ElG)$AYtF$2VqZ`m$zVV34iZ@r`2>B+NkPkLK6x_{I-SzqSkv43lbhd=rDJ2c3Vh zwr0mSIVc}=7RFyB_k+$46(~i7H~5Te?=7s4V^vuvg6x(H1(i< z$B!>NzOkXH2Mz5BeBJR)5ltL4*Q)n*$2WU4anR6^&(|H_;?TrFLqIuScYJF`69@HA zrhVP%h4wIFd&zh=g_9p4V1 zsR!lfrQddZ+lQtHRPSH@w&U9~G;vV-`RlhG-}t|y`U}*KR{g%?nJLSpL}YEf7r{wEigd$Bu8cXyOcv3=9*0?D)12O&m0aw)V%4Z#&V%L1SVE zf9&{n7EPR)k%8grj~(A0qKSjfBzyT|$G5*|;-LG!cz^ErCi@fB{h)OLnm>1ZvqTdI z-S_2+CI*Uk(E0wpKX-hKMUw;F^_BT^$G1{6aV16uhT5MyzD;IDO;@0M!8(8L_%;U9$iVRb*N$%@ zzft`QnoCmsz2lo1nmB0e)cN<0Z-HpyfgpeV-tjF1O+1K^fuZpCj&Jp7;=zmz44uDs ze4BalhP3kYIznqvD7&QOx_~wEp9>B!F5dC+@w=^{IKqdx;+`l`%)uM?9F)=W7{@w9y zA)0ss69dE6zdODiKod`7VqiG_cgMHuXyQps3=EI|?)df_O}v1Kfr04?w?P%&*Kxf7M+wtuxnm8*n1H-d_JHCBK6Bl4+U|{*b$uQ~!5-yMZRI#LU3(=>Lvyp=j<=2F)e@-|_7qntByx z1_lm>o!{gbP~EQzI>V7+=Qk%baRX)sh5&}0-xAQo4Vgjrk?#CffhKOm%)rpVu=86F znmFjp&M6E#zb!x$2hEACVA%O>51P0sGXujJhMnK;pou#$Gcdeh*!k@znz$n~0|Oi5 z&TqnusQz+d2Hjn`^P47`xHB^YgAwD-Z}w>7F3b!J9*jG`#iEJ3GBYsbG4A|Uk0uV9 zlj>pI`E5CxIA|^JKE|EjZlj4OF*7iHVchvmhzZr5$;=E4I!rsid7+7?Ff%ZuFzx(S zg(jZL%)rpYwDa3iH1Psv28LZsJHK5+6E9?DV0g#0^BX5Ks=Y|chJlMohka6dFM9) z7F6{O%nS^gEIYqhp@}y#GcdTb?EDsqCO(0gfgzn`=eIgE@rld~3=>&)ep`ViK8cxu zVK>XpZ$WM*Kv$+q*`XEgCu%nS^i z>^r|Hp{0k_%nS_X>^r~tqls@|W?)EW-}$W=P5b~e14BLg&Tq5P#4j*2Fl=Vu`RzQK z_(f2BvG4rGgqGeeF*7jy(cJk>5>5Ov$UPi8zqz1^Uje0mt)1Uov{2LGRZzau+WD;m zO&qj{+m~bKw*)kE7+Dw?@;P>XYef@hU}a#K&av~`Vsvo<28PufJHH)36K51)V7SP! z^V<_NaV7x6XyQ%+3=HeJcYfQ4CJwse z?j-llZ@19I0|giuo^$W~#>j&j&OrhU4B|XHziFU}CkQYwnDXrW=7}br2udeBJHO?i zi6?>53D3@NeQ4szpmf5s^V>!=@e~0DhJ!pizg&TpD%;-G`qP5E|y^FtG76l7pX=G*zL22Gqvkbz+$-_CEV(Zrbr85j=o z?fiBdO`JuLf#Du7pGdO+iY_ppeA#s^EaISXy46_3LF*8X zVG#$7-#x-24jRAvj71zYe#Zt~{{adY7zT~siDMB5jo)cv5eJRa*Ef_zngJhBsKu zKfu7ia1M+5gA5D|Pq2uC)}a2uA`aTOC?bLx&JP$E81%4+gVwORU=e@Bz`ziTMf?M3 zua-8Z`JlCZCpJ{604(D?WUEaIT?@#9#;LF403u!w`k$78VA3mPB) zg+)DRd|XHr(_f%9_gYxQg&7$b8nBoT+Gpp2MZG8^1H%F=>Ote|30TyF#@Xwzh=az# zCtwi=jq{$(+krB71}dWy7#SE=VNqYe$iQ$2i+BSg1H&CG;-EWUK4KA{$jHEO1dG2G zFfuUkiD8E4LPiD#87$(Uab!a*;-s_>+_C5fwGU#kh=bY(#aP5a?SoD%;-LA%`B=nB zao=Vv`a$m7g+(0XzQb6=@!5AnZ09!+2E{uJgUo*-w(}bZ!^A)|$o%(WJHLT2h!4Xc z|Nj)*`3;0&Vjvoyy&!pzJ*?t8zbT2M#yQ9yYw?}mLeRuP_GF6h{MLddj?bRi;yb@B zMpF;6ce(h^Z>!PzJs^A6i|_n)0Zl!~-fiMLzZt5bx)T(?d&PHtJB6km)GoX%zVq8{ zG;vV-?7sNUZ=cY_LG3d}iJjj#B~Z-=wa<7Zc778@69=`=Bqer!Q$!O7tru05*!fKl zO&qjt)L3HYHybo@(E3qFiJjlP(8NLONc|;tev3pC2dyWKm)Q9&8%-RvuC!QU=eKG! zanSnGdWoIiI?%*H>r8tkc7B_MCJtI}x>#c8x3y^EpmnF4C3b$>k0uUUe|lVE=eG-J z;-Gb?S0#3SyNf0cYQH{|*!k@pnmDNa`dwn@H)cuH@DFqjKF2M&^P41^IKK1-O4rC( zS#sw$F0}c2Q2NuA-1*HB&0J9W3zXdXEecH>mwh1j#Y^t|mXD@B$T|32wdBrkQ_;kO zorBM}6l%CcI|rXrm)iNw9!(sVJCVZ! zogFN-^PBA|)H(dZyR2r znh(mK%cORG+lrdO42*O8K8-WI0v7zlHU0(1WgOuSKi)40wYey3Yoo6yb zX6LsnXyTxL%VL?G-?pNOH#0CW9G2Pn?IM~uXy5*AnVsLBqKUUMFfhE9+4=1knmA~G zKdbD{ZvslF?gyQlA}G7_n-*I71)T+8FT3+wESh*H0|P_3?9OjXR8Y+U?d^M^z4Kc= zntIUr0kdRxe%pa24(g9xlHK|35t=xtJ^fC0=eOTz;-L04i`>p{0&=MKg4)v(ay!4} zqxl!qo|XrxMav(c_O!0t&Tp0=Ii!paYEL`L?fmA8CeFslzz{08^BV`+cq%(114EqL z&TpA$>Op6X6v*xTR;-TdPSD=FO1Yiiy3o{fF)}brm)rSm5t=yYuD6wPJHPd#iSsZr zFzk`r`RxH(I|0=0KQ6cP+ch-xpmi}1<#v91hb9hcuYZ@@`Hfi~)t#XBI=B4JZ!&1& zpmi~t@;krTqKSjn#rVqa{Fa0!uENN`P%OXmTRoaMXkARZ{LXKa(Ztml85m~E@BFq3 zObGPm?EF@VCZ5R1 zz|f+w^V=je@gznDhB*p5zuiC+PiACbSfjA>+cq?D&>2>H6n1{QgeIQK$iVPKVduA> zXyTx~^jwNNzbT;Q3s67GNO9*kM>KIzKgvgO=eJli@kT}lhAhRM-^$U%LH(Zw#hu?K zqltso(JWHj`E4tjIA|Ts5yhR~?x2Z-*3o=W-1&_St-J!Qvyf2Q`Ar8+9JJ2DMrr3a zKQwXBI*S;ko!_$1#6k02B}zNLHK2)u=DRwSc7B_JCJx&3Jx6Khx7BFk%q$EH+mv>G zJAx(-+QWZNY3H~5XyU9a3=D6Sc7FSYCeFsf!0<yz`q5ns_4% z1B03J&Trmm;!P|J3^B?(zh$F|gXZhXly`pXL=$IZWnh@0yz|=@G;txDXSAgPY3EZ&7ICpiAzvRCa!AL=y+KU#6(+ z{I&p19MpbUp|bPaHZ*Zi`{jVj&Tp5|#6j(sXDU0t{X-K6wO@o(cYaeq$ct5V(htqn~)#X0y~pX$zUi_pYVorBM9Qr-FOFq(Lp zbMUzfsyn~kLlaMT4nFrnb?3K#XyO^p!RG|jc79V)Lv?>(a_~75wVmGr(8Pn1gU@BC z?flk+CLWv|d~Sx?&TpI1#6yyU&z(}+`Ry5+cxZC)xqoUqzlovMYhlU3=d{#!ese+- z4^Iw07pA`RTPB)#L~`)C3iX}e`q0E9lY`GKP~Z7&8=81ja`3qm>N~&PM-z`u4nFru zedjk`4b*UmNe(`zqOtRvJ(_qd$UPc6zvZHd$0Y}!YtY#FZ7Q00d~)!)Wg0ub?L!k! zNDe-CNn_`?w`k&9l7r8&Xzu(bj@CZhnjCyiO>^fr3p8;?cb6M(nmfNmqlq)QyWGgp z-1)5qO`O@?<;D!no!^$BiLtkTq0lu?5%Z zXven$kGFqw__7_W?*hw?Zzc>33?O|V3^D_TvFVR1+VM@`$@Xs(zHA5U6JXu(4Ya2g zq!*idbg|r`9p4LG@I=`W4$F~Jfwtw63bvsz!2i6_mKzkBk`U#n_vuMY+2O#^uZU^gAVB7J{0~&rH zy&!X77~O6V|9#PpZw61de{=Y@9jq^bZO1nssD6+>m>D3o*f3A=j&B7|w|{H+wjHc* z0o#sm0Z{$e)T4{3Rqyz=;OX{n8@_D^>pQ@<;~QwM7ujx*8_@N^_;%GhzCC!l{o99c z+rj!6*mrybor?j|55ge5FdC)@nHDYH@y+1b_HPc~w}bULuOh|t==xl-K+rJt7*bdgGz_H^S=nPz9 z^n%=C3iAK+?cWN1YzONL;MnmEG)IlBALIs*T5LF^c*nN|&$oZu@MAkz-vo{w-%6n2 zk4-(g*pliU-!44g{_Vk!?O=TyICgxifa(X?3vvg#9%O!c@s4i-FSdVE__-ad?*Ye- zZ=iD_LHc0&K{N;>>w~e|K>mNR{aeA$?O=ThoIAkvJF)s#7w`DC;l=iE2Yzk`>r3F= z@eMSV1=EkqUYPxxs&{<*@M8NnhF{yk`X+Gh_y!uQg6Rj*Ftym|v!L|>AzmQ<6Fba?cXN++78yoz_sHWXes!FJ;~VJQ9hkdeG%j}tmhAYp;MMkT3x010>wCbp;~QwL1WX@@#%VX`+~1NN z-yXc${_Vlam zVURjp_-yr#Zwarre+&4t9jvc_d&jpmNZ|)E2bW%uxE09%ueX1j@Mk+%-vaI(-#}|N zK>9#-!)Op2q#hmnlwCbx;~QwL223A_M%RPPk1W~o&EU=UZwi06 zgY^mU?Dz&+iviLHvJ-@n)uXd-RPXp!@MinBgumOt`W$$6eA`2U|5HnLeB1D5`?m#u zw}bT+@a*^oTJr(3A4cPH$1BiTDQ~xb`|x)=Sl!XmmFt^NUM%d~#pgY_x!?)Y|w1pjxJ?D%%! z?e=d6{%r^A3*g=H4YY=Zki9Vbzk~AcyY1f?{%;5CYvA4S?FtF@&jjV)ciX=?{NE1N zw}E%ZH_$nG$o7N60fb?8BGW5D>G$3CZxjA+2kZO5yW`s(H2Xn%K^R#djJ+R}e&22X z_Tc|^us#F69p6A}a)`D6Dk%QmgWA3jeFc0wzJbnNBUb-QQ2f0I)g2Ih8~Ap7dqINx zxodWOd+;6<_7Hs^_;!4IgQOqiZ*6jGU;KTNB4U7i||Ks*=4NMSy69jgA z1I^jM)Prc4T5PmX>5gv#pSFKHzy#5EKw!r=(3}iNAIx5C`luxankTg3VE{Rq!2?PM zL+Mf;$o+Tgco-N!`_xzDLhio{ImryZ|87A5EBMSe(ArqgI)W7etPG&_0U$p3{=0>c zJNu@r-vT}d?8#!t-F#-esQ2G}u-yedXAHE*2edvy5VUrXfq_ASYb*HvyMXo*=&M z+lFKak@8{^2eEcZClE z-x(%e`m87k`<}2>;QNQy+}|fWmi=xJ z#QYt0$DYDOzV8mI+rEMB+7qze1|Da6@LKkJfHw1Y1!1}GA5L!nb|8-*e*c~Tm)!RY zXSRQ9c*pkr0=L|E1-WhC82YY#1Kr05^3MZ1x$hS)bADf-Q1@*^0O$9H(*oZYoZJ4* zVITi@2GgzI7;LwFn~=}{z2P4BcZCh2-w({-{vPl|_B-glz5_?Mf4fk(?VCUl^Y;rq z*S;+flKWn8k^4L7?mmO#+rKrO+WzgriS6GEriy;QV8{F&bdTSK$FkoU4$6KP;FkOD zFoXNMz;y2K0y~(#8*F0wKH;G3ci8=Y38w_UFHqa|?a6By_&tB1I4J171`ewa0^7cU z!UPoGp!^1+(J?4(p^G8&L95&w4sQK+z-Q|>hGSd5eK@)Go58BB-zLo1`t8Byt=|r8 z-}>#q@~z(*g0_A$2-*70A#Cfn1(9372}E!GX0U$iw}zOl-vZ*cehWz0`b{Bu>$d|J zw|-l2dF!_cDO$imaTfbeX-TLi8 z{nl?28n=EEc)0bOL-W>e2Oe$x7SOu&TSEKRZvvfLzZE>$`t3m1)^8VjwtjoixAohH z30uE0Oy2rU;n~)24llNTyYOo3H-@)czfE|*^_#%dt=|qz+xktxYwNf7tvkMPwC(sN z)3)QAdE1U}A#IR#2cYml4zE!*Bm_X~DnKkI5e9|}PTRf}IBxs)z;D|(2K#N_1bnuA zEAZa-?SR*|ZvtN1z6E%0`?er-+qZzQZQnNdZ2R^gXxq05!P~wmgm3%yAbi`m2@%`A zB}8ufrVzF5+lHuZ-wL9)eRGJ}_U%E;wr>++w|xtU+xAT$e%rSL@!P&NBy9U8khtyJ zfy8a!CM0e9mXN&dn?TC8ZwFGgeVdTF?OQ_Hwr>LI+rDi`-}bE`W7{`_%x&K;WN!P` zkhSfbLH4$93_07rZOGa7Eg^T?H-Wru-yYeA~B#if!KlDz|-0sM_`|pnBUkhMH~P9@s(3AW(Rq zV^H`^aNqWAfz!5c3j(%%Yw+9l?SjL$Zv{TvzFqL%_RYY1+qVXw(Z-6 zux;NA{I-272;KJ0A#~ff1>xJi1w?H7CJ?#p+l9z&-x{K}eN%|u_U%LTwr>k!wtWkT z-S&+kZris5aofH%#Bcj%kg)CBgM@A08WOjCb4c3uO(1#Ow+qSJzBQz5`{t0k?VCW_ zwr>~GwtXu|-}cQQW81e68QZ>1$lUhLA#2;W4_Vv3ZOGpCtsrOHH-+47-!9~C`!*qO z+qZ!HZQle6wtc%$uISDhugkQc(CnT!~JdF4&2@LE#U38Zxi^oe^cPy{%ymZ zZQmA%Z~t~cbo;l4+uOc9xVi1y2fgjz0z|fdV-Vi{%|Unjw+lD6eS4t2{hI;z_HPcH z+rKS%z3p3r*7k1!?AyO3ux|hM;pMh(4w~D)6)s13dS zTY<~=Zxfzv`_`bg{hPzTZQm4Bw|`skXWO@c-`l=1{Mz>Ifb#Zl0zbBWQ~0*+o57cD z-yA+|`xfwF+qVyj+rLea-~O#ZcKf#k>FwVNB)5NKc)#tN!P9Nu6s~Op&t;$m4VVi` zpP)G#(7X$1?gTXd0h+@A%|n3Z0zl*WpfP#SxH@QT95lWS8lwh{GlRy8LF2ukF;*J_ z0vZDWjbnhuB0%E_pfLeZzaG>#2lcN(ePmES7t~h;^*2F%Mo_;G)OQ2*zd(H`P(KLN zmjU%hKz#~OzW~&>2er>ZZER3G8PwJVwO2oY+PvV#hO@%!uF&ogh3ux>FH2wh^ z!vKv#fW{IM{zCfnpnf^1Zw=}ngZj9jek!Q13FQd1nFJiGhrE|A^ZlZ zU66UgzdOHOWnf@vklY16b5}tMBA+0*>l^I+eo)(GLptP4Uyv1}cr*k?Lx8>^09tR0 zVk4S>?+)h;)=vMePagl$XA>u;9n_U`e3pwlU?dCfiu91sM_h zvtK@GQ}~*`)UkY5oW#Pfi7DGd9h{mjpWc@_&F!9I$N^5_(m5AXif1#oG`XoR%l#f6 zICYz}?cpP*zDm5CrXKwL-r>Ad4&@b#6X!87-M6v$V{g=aRN-!e;gPE+?tGVO3!j9 zIle2+GvBg)pVj_FB`3r#)RA zsm}2Ij^mR))nO7i!N<9{M}N^Hlb{NAEk7Q=MWtDW^VBCemb^7uy65Y%x94&< z*S0+O-Tiu*O2Gs14|+lTqAid7$`nj%bbivkz4CRGS7cybQ>@3MWAU?Z&N`|6 z?kex(V%PpS*L(TxmuuHKmhx@TINow^nO7KN+1%wj+b+NVTQ~iD2B+=Q8*luKS|_tb zo#1%zc=d(GKi3Y%T7<;eZDTKsnRD#-)LzI$g$^_Ds*y!!ug>uj0#QV-`nek&23 zwUSxRvgYoq@bx-6Ixoxrt(I^-+;!4J^2Od=!A+{t)k|4gbpHtNUCQjd)=ZE4ETi-~ z88$Zcm0$D^YF+Kpl|AyR_j+AZscyQP=cl;cEA2MSZuqk(MB{yMTfti~h2L)!X0DFh z5`0@PBR!ycO8EAUsO6P{%?p-!1a~%nyFF+9Roh3(t?fPwwJZLA6W+*hL*TduivHKYOD+aW)K{~ z$iM)?puG>E{SqJy+K&jsp!Fgk3=#)n(EWdB8dw-$c!?kb0|+K~cek zfgyy^gMmZOu|?EKnb|?ckHLY#$zhFPv(o{#76*pK3=E1*EE)_79%mR2ad2>OF^G66 zxG=CeaqZ+NP-0+YI?%zw!KlID(CEblI=Yg9frDeA6GMQ5iiW0>0E+-4gM$LY0j53% zMFs;076vXB>9$#*!9zlY zp;5p=g~@?|kD;-JlR<#Vk%?JABa4B#MUdf`6WbyN!y_CF3xpUA6qJ|@7+4w<1r#3e zfVO8bs1z+{YI0%-WMoL-;Ba7Az;lF^)d94yn5BUMlosR}85lt8=|OAcL3JW%O+08l zyA~q@gAOADgB~LT18Ds@XstQud`5Fd1_nz;1_moe1_ojE@EV0Sjx!2u#ypSZ_*k@28Q*F3=EqX85lN0 z^=yUGAa`zOWMJ40+AG1xz_6E*fngu$P9a7HhJ&E}!i)?Ihe7*&85tOkF)}cmVq{=A z!^psJ7PO~;k%8eN)SOG8Gc6ez!1wxGWn^Hu1{J>n+FJ}|gY1IgyNnFrJ7gX)GB7*_ zt-ohvV0gyJ!0?=rf#C%s1H&su28Oqc3=Hp~dOtCO&P-!q_{PY<@RN}NeE-v5Mh1p| zj0_B*_43T1vlT(-LozWi@PN)KWMW_dog*p2#K0iN#K0iQ#J~W$n@EOX&kBNa{Ark`w=&q#2P(90-7#Nl_ zF)*xv@3=Dgi7#Q|5F)$ovVqiGR z#K3S2bS@=S-y^fce)~l3gX`?K$ZVWpy6jI$@-5d}>4AY6`XyYlQx9?c4sR;WRC@MJ zxO_2Fo$ zouZ{|7rMQ1eEih$#1l7j7hhY$WfPPy&Od4RSiIv>+WKiTeJ0fX*lbc6c4dcQ!I5`Y zK2Bns{pYUax%4j!z0K#?wD2Sb&-$x(^oghoQ+D%-t;^liq9?9DG*{WN{)14x316JN zSfH23y)AF#*6lXxzHxbB;f%z9z00=7XBDV0%(%F#N&AWK$3NHGBCF!9mwT$5zFD@g zLiDxzx&1zJb5eW{Y)a@ok+XDq`G&`RsS}Rxemtq>p7U$nS~tc(-+!lW`g>i!yMBEl z^Ydlfoo|%Bd)cT|GG($v+rf8^^FM8Sy`cS0Ve{i6?h`DX$zPSyVqAQ`uV3@vsMew* z>2Jc;-TXLrbD8OuvtI;v@1G&N?$B9QZXvr32V=iab`hGwDSs(OPiMcO)kKc$x=k@$ z7nXh~W4s|BJZnNFbExi;?M>N7vwpYzVCU?3DaW;BHs`gMdq1SMJ}SGby~g>?w5K6g zoIMzhCmPphPEO*UUSHi+WBM(OD`xtF4<%|*Qn|W|)!BTVSiYn$T^X=tNwh$`jmpU% z{)T$pF2ahp8^!Nj%MpF)aUAnu2pSQzpFmiRGshadi9Nn z&7Z0{o05x{dN#g`5)D4e_xQP=N~4?a&uzPpoa4)`^*;Jw^U;e3rd0(u{_VK7yDq&{ zbMYO<*Lhf3_Q|PzQKwJu^n4kyp;=i% z=e*aiqQ+0U<&8-%TV^k6d6;~&@qIwERzvx|kL9hs5h`^jz0+SrpZ?l3DOfXm^1r1L zGLFxAG+wN~?S90h_Hm8qW2ast-?c|`Y6U+1VdYS-ea_~ZEBMW_>gvtY29DZ#+ZOLm zJ+99v&D(o%Zab^T$I}(_?!~P7ch1;h{t@fxD%HWcTAX3&eKXf@o~!(9X2qXd8vez{ zHBNuH^!UayclAT+3--8AeWS4H{llvGt5U(%^Q#N=QD`wneI#R{^Nx8nwJ6+_>jF1S`{e|joe04pOt$%&p7&P4~ zUA6LtY;8nso`$^KjPmVUtvm&{Oyuo!lDe}{)N6O)rK!A~z5>U$#akMRx_!I8bZ75J zz8Ais+71f0QkK3sa$)cE)z8is#;mF2{bt$doi z+Kg#uS4^7~efso{@6tQ@x38*Fblsvfk?YjvqAklZ+Ez2%ER2x(Tp1hi?}kLN_*bd- zPEI*e4cC^Jm$zTN|4j07lD*vKNY;ZA^_CV_USDX=XwZ53@~2L1O?l^!pv_9FUI%g+ zUA5YqY~v;L{mkh!$uPYea}3lK+rKo5vgbZzi9K{Q<*MxO9R*&GZn`a8YJKhM!@bwO z95i%+E-^|fF4 z*IO~alnwASpJzEi|9;$bV+*s)PNzp)@|GXZ?KZHKmbfVDu5S|_WMs@2r_Aqr_uLcB zenmaW_jmRFIbDc5?|RbE|6|mpwr0r(Mi;qemK@Zt-x!}@w#qMNzKc|h(ZLnTc|RP5 z5-RjcKBT?+8JBmaBKV~Dv&^5ekVJ&xUK=H1m1k3`!%jXo`HJ;1_eD3H2l zLaOuGRkpDYmvu16MXJBt@Y02=xc=bhdt5=>dssG}+o9mGj{8Zx_q7C8W8Y0r_PS0o zW%!&|Fng`O@PS1>x6iyiJvHK9;&I_A*T2}XM{TUTciOBdT|rkcqhM)+aPpiWr@i}D z|6lUZAxxN+?Rx+D8@Ha7egE>Yqsemqk#;tn7gOUVzTId#d$v-n`gCE1U6(-h9x}cL zy7USv0NVdN1+)MkiLVXnI3e-n(Bzvzms%mogW7sfF8F?3Pc-@0phF>`3PAR8@E@&b2RPoSB_pHCr|Pr&goACKcPJ`Ts@d@P`@BLl;RS_XzU%>Vy`&M9SZ z^8J&kaS zBa&Mla4@qoVsVQ*$St5XH4SwP3^JVm|AYGXAh$F#`SHQ#s-ZzNN{xoVXb6mkz-S1J zhQMeDjE2By2#kinXb9j4fd;nS-wfDxe`8?X4PIxBt}LNuKUQ&=I#5?kuW=uW8qhqT zdgDIuIv|)j(D`Rpjr%}D=P)4#(2SW=<38}(dYB+c%)4|NsBjgY;HI#X#R-QNpATdxleSoS1_p=y4({~IEzo25E{uU^FL4IUe0)M05*aB$kKw_d$F*c~1LH0;O#Xx3(Fvt#Ns2FH39863X zDhAr$2GR#oX8{!h?OB6~xkAN2`_MpoLGcg-6=O>Ti9k|B0#pp-E|6YO+~q>WSP~#= zKw@Q3F;>vVY6b=dkXRj5j0s7s6Dr1xBsLu?#)c%e7%IkzB(?!6#(^Yu5GuwF6@$1O zmAnL1b7Ki4T|Qa@NqeuBK++njYE0hq!hPSo%JzM`w0z&U$IJJ9`@ekOH|Z7ozG<)6 z_swR-zHdG&_I-<5vF}^qf&pm+tTciIFA7j6zzanB9=zJc&hkewj+gT!Mu>;tcZbcU*jiG$n^N`D~#g4BaBNIl5?pu7n) z2PXc0{l0IY;UXakh&y5KVcxLs8)#Tb2`UbAkHm(3-$27tB2aOddYujXzJbnwRe_4b z)H`n2_YHJ5J6 z!_1$(Y2P={9rVmxsN#Ja_JQ|@GiRWRmu=Yh4K)9cF3z`U-#5^moJ^9a>XkR``v$tB zo=FN-Ja5CkZ=gFfnJiGn+cxY2?<;4DKoy_2Vc$2<8Tu~J@PYYj-G+VNKz9tVpxJwH z!#?o&94u(|UfHk@eC`Dcn!Rr}?E3~f%aH}mUY3pfzHuL5VBq3l1Rc!=-uDJdpJE&L zed9U6z~BTGhq*_6y*5&!&CfghBq| zL={)uwC|e;NSq5*+-%dnZ){-yvZ2`Py=mV!cCddT;xK#TH|_hz0roFM9AC1#d%p?XL1n}EAo{^= zh&-5maqqVaulIg4fa(S5-*6kE7sLjs*#I>Q#6R#BRSqPEj6r$*oj#-vF}qs-c^K0W?LRBEQ@7ag>Hn}LuuL@U?D_V)jNRW1w(x#G@M6z5fd~7)H8||~2HM*huyyaZhRogH zHf-Gc?LzF0Zww3eesj?M3f}kl!1u2-!5+oje+i>ggw+s9Cd}HX?{SCBdGC}Fv zw*;RX-xyT)eQTJt`&)z30dU_zpy$T7g#6v#4D$ATOL%wdTf&9i-wrSz`1V15&$k6Z zd%iu;KJe{;?~QK_o;SW3+};1}!QI{88f<;Fw+k0IzYAR0^UWZL`TGO5z2H5b z3JQC^IoRC)R`7rSHwL}~-wKxR{w=&hBpuRz3OV&~yEp zfyaSw4V?Ag9^Bji?ZeCK-yE19d=t3+_*;SY0r0-n57N88IlSKg?ZHLP?*iid-ybM` z`{t0c``d?x$KSyFK=17NR#1BVo5B1&-vXvQ`3BmPTJYl5w+Gwye0#8d_qT@5z26>O z+Wl>V;NEWm@&~?w_U|tEvisWwl>^@z9QJ-w@VNPH!A-933EK7FHh{wL-u`b4I`!W! zFxG!Nz*+hIf!n@sA9VJ9yP#M94YViq!*-_c7n}}!GqAt;Eg*9Dw*_Ilzk&9e3fS-d z_8@G}w+-9}z9sAy{Qf}a>$igRJ>MP#?*8^+#qMtj=DWWItlj&~;KuH67k=*kCJ?#j z+lRKj-vkW4ep5KU_nX3=z26>a9{Bb_@xZqS7x#R-5V!lA!ooe@1TxsZZz%uvP2u46 zZvn>lzim+1^DSW$?{|Y6U%yTGA@DuH{qZ*kgZgg`Z}}nnVUu@%Td+p(yMoezZwq$v zeZNq(`L>`?EO~Iw&&Y}B)0DYf(O1SH17H4;B(_!K=1W$52Ox!OHe)V z?ZMAI-wIsnza=c&`^{m~o^KD@_kMfec>kNjf$QHEB<}t8VE^uK2^t5!8K@liR#3qF zeS+cMZwd!EzF+V;@GU?Z#xUpcH-;sm-xv7Z_|~vs&o=>+ zz27!WzWzFv!-aX$gOxW|yV9D-p3UBs*TflMP+l0Gczg;-A_nU#+fo}?%_k3%R z+5Ihm-QO6v4}252{ovaI zP5$ozxx2qHs2%vGV7Kqvhrm7G9<=TL#_(v*H_#q$1)KZd96NzX_=C`v%%)&+u;dw+VOm ze=CT1{LSF_?r#a!_rEQOx$!L_xc-~K4yNxHy7qnxDBJt(gZJKV6B2iSyO1OJJzx^& z_Y3|HzA<>-_;$d2-#3M=d%h*yd;s33uTZ<^+lP63zCF0j`TfJzhHngcyT3VH+x;zp zS@8RXhYjBx-tGBzLHp~s1o!%H26}tH8AR{?w%`r__XbgZ@P7FPa~^*)$k_8OVCn8} z56)>)#Si34EWBvF}^M^1a_c`{_S`!e*-I zcL7j3J1y|tLHyx2(Ej;?puOK10>6E`khtgD2CseJ4ivI|R|q)p?LhI(Zw79Uza8-0 z^X)=L+IN35Fh1}t!E(>H121lUyRiJpw}J`Rzd3N%e*>L$aG_=Qw*XLm z<9`6Whdx2zz&Fqt010oue!F0E|62od{kIE6*S|Rg?EcnZxA$AX*WKR?f}VT}SiSd~ z!2I3c93I{Jrr>kq+lJ=d-vUnW{>{4fpqcGkCN2 z+XlIP-xkR2`_}Mc?>C2Ad%u0Sx%bbNW6o-eR|wfxelJPiy4`+Hczjk)hsbU3uWL?vNf>z8 zOFw6uHl?`ZU}@Y#N$tLr@L#=ilhPj?6PdoZGr`wH&*y6P1NH;y!GGQ@UCQS0^=;jm z%`R2!EBDQeVRdX)lb2|4F*Lu$cD?jk;O5tJe(LSs^LSBSlVO|G%7i~Jcc?j*71fE{Fzzuu$*1KzA$pD0Hiq)%$gL9DT&@*!>s=PS zu$u9?PRVXr@bx>|Vl7wYYdzviB3CXkP@b+e=j@FZZRqm)Wcq0_axr3<(C z?qha}Y2A0Zv+~Z&;F@{<=ZvN-e%T!6^Xc2Q>Y&u=JS^H<9Ao~rUCOUjTlG}ZSiOD0 z%RsIrAD(DmouRViUEmd2<$s+iPj~Jt*|NU9`&P1;CC{0PoJ_u}Z;WMIUYCh&JaJxn z{(Ak-o;=TQetS}CBUZmPxWD7_u^q?XCASC%JBrW#nIZ7Od+wjBkB{bEJbJ}xJ=5Pm zzn=bjBO+Qgv6lPkFP(=q3ct=Qz11sH#9+JIWIhM~_T^rQ>#g%m{+d6wtKDV4zwh*+ zcR{lA`&FMmSgK_q)Zi7)`DT0jnz}b9|J<2H@bpXeSUs& z^^`Pa^F6OVw$Iwqb9qp2x4tEt-VP)>TB;D!(-556U~P)jn%apy4XLb;VV& zRz`N7_Wn_Ow}-jj`XcRH{e+{?$>JXWe~XVF*F5lx{^pePm+PtH4(a6EJGinQa30jP zcW^#+Ejy%|OWe2q#nH^=>TmuxeObdh`2^ zjt8e)@0#qd|B-L5{q>ahxwWpd4{vvTR(i7bOT>}P@V#qhg-9)Y=&9fKcaODdaN4EH z=&7IV`}%n2gshs=ZpJL^d~CMZbH#aO2snD<8h!y}N6D zS6#r1-s%vCJh6!e^;aJ%?wz|LLTp}{TS`sof^f~YPR~Z+(ET=ZKTfpz8zrjjnXz!^ zi{GMlPX0?&UG`L0p7}c|>&|-Kpr*9`+>W+WKUp8V>%3vs#~)H8HTln?`7Wn|pFgr( z95%mVvFXFDak>-VuludTyn1=}Ss|UA3k<&RuKaLZC&)j;|A=I03PbzdP1fP5fe-fY zYdYwB)O2gV!KSr$?azLH_OB{V{n`J0%M6+2p6kvId$?}K45^o8Ki|#0S-$IKFMp%F zev00ozc(DtKbC4@3hv#sc=eK+RZM3t9sRN~|MdQ_xZ*sIX0=JBO7l5#mumS=y_r_? zQTp<;#{S1amSzr1Rhhew9AEabNP5;=1q124ea~ZGUsY#ZtaH!JG_^GSoWL&y$-+Zi zbpjt}9NSvKw#@iX{FKbQpUx+>_0*KA)&%TPyPlZwRP$zRa4&!4gy+t^A9Q>CzM0IN zHFL##oKv^N+a`m6#di9FD$fys)M899zXb`&BWrXJ#e6P13ClKY!-w zpPS_y%@e*Ey3AIreSh?TAY;g?jrt`4Q|=tN)u$-RS$_kPiqJ+(2W@AhBQbF-E9UX~p0nC;ma zuF`AxgoW$Q;sY;LYBTR>Ty$M=qy1yS^COjKoR8EW{3IMZXP;q!Y-_pF_Nrw}J4BW< zG9@LIYj1qr=X~X<4(G;qT4v2pqko0moxk|g&uhQ*|0UnNmQ`Okp^*6!pN5QHRCA4_ zXse-phOoAG%&#eHnCz!?u&F-#Y%Q_!6k~SOZyy_@X%hQmqP(X*s#z^R*=eC-?;EKo zueFDo7W=wQ`gBQ>^InBp+v2*{T=E<)0U480ej8=APq2QOnb5wQQ(y9?t?PuEx`$^y z_KHV!Zm4!FxZNYfv%es0Vq3^zZ?@V~pC8`8e!E5H+A>GY9TV<+dbnn#1Yh0r3g+ih zKi_%YV2Vk<_+I~s76Tt{SHkZEsJg?zJw+ zx*Ovy`)jp%vwv-IL?$9NLL%nD!|1&mj>Ntdy))(61+!UtTXD^YR;B+c0|}%caSsk=jCO z>$L)B7;FvJc`0<`LeDaH4YfISPhOoj*O)dzzImNP*cq)>v4f`yzWsmwEH~2efZdYK z^*1XvOLDx}*su6}PG`~`K1S<(d2jl37CA^+ zW*2D4{QrKw;^N19MTYZgUoGD7_(A5>Mxm}lIhP*Jd-?d^>z2absWz*YNAa?%GfKv| zYRNr$z6RnVEs3hf6J!pbOi`=<(}iX z=gRD>JN?Ysv)$cu6*xVT+cp=nKe~IOY=Vu>h0xizCD-QXeVVlHYh?TBonhu0nM;y0 zS7*j84sGAe;M^*&>ZSJa*|K0a&Vnk2iboy|Z9JI`-OE0=W;Yw=RM&3&_;aiMnHx^r zB`!a&Z;>ph`F(=tlc9b)+i#6**|6DN6?MJmtd@yYCKlw#q)k4?=y81i4X?kkN-bZ$ zUits_o>)%YEp5%Cc~OkkNy*%@OBEh1d-(Z#^D^dyYYbK*w=U1?vuIGCz?u9}_wwbv zC)b}g?_#okJK-GXFK#J=kk~bCzV7xX_Hy1;Ze6v|ka5j|gIf*E| z1+EO=JvUSYfI+XCBN-z02zebcbr^-aNc z*Ea(sd8l?UwZV4Rw-rcoAbkgr_+Ujih#f?#!=asMVGG+`-%J*4`Nkl+^&2~b5?tRG zXgDV9&HB#3kPTi7=FGsrz|X+I09v!*v2e?`j)hyk{Q&7@U|^7S0MFz7hZ%5c&z5fz zOZICvLE?-Jw19$vf#D^MJBJ>OeT4Z_BrczAfK4`nG%%0Lg(cNP>ZZp`mZfw~oFo-zM~J z`Bs1=UeUMZ+lIa^-z56BeADRL@=c*{%Qpigd8l?Ub)av{w;g?3zAfn6@@)oG-vu0M z!5WZ=6GW;*(n1!~qHoJLlZ4IR94a?|V`l&#Jpndn2{atR>6I}XysikeRSYyH2})KT ziJQM=ByRqelDHWhzM%99)(9nnayEZE0Wu?D^S2|DwtQn~*n%~^GA!HwZOKwdoWauT zUeMtdP;)?31qtc(P0D6)dIgo8Azv6E30|Ur!FeO_+?nb0njN}JO zlc4m9E&&n;;f(zB^3>E6P>MAHo4H`aw+GAif1BdH`P+(>`@v-_DBXhOB345DzQlX; zHxZxB-*|i=;rYgU^S3YF5H?612>?GzuiI72T}vWIX;`erTA?A=Hs*Zn+sH5 z4U$z54ECV) za|{d&9t$^o^H{Xu+n>c7u%_1?*Ef8t0GY91!#9?I&EFUtHe*e%8&>T97P0~oXR!1t z2s+FI$rBSuNUt{QHh|MBC|zW1S_yU=l2I7UjulJ{73>TQYDh9EAa^6uD@O7IrAbhF zMVA1H>lYWN8i5$;xdosEYY1u)Oj!AC!pi;MI_frjV`x|jE@MIN16j$j2I6;++>g2q z-#&oUFfcG&sN3-E29ym_2f`2PHhgNk92 z0AY{@&{|+9dqv%bZ#(KXeA`gB;oAWueNbg!%AkJ3Hw~zIumA%Cg992LCXP;95UCDb zAF2EkbsN5!Oj!Btf!wNZ>@ zgGugKy%M}u9+VzHY)loXA`9NIF(e2xFd%IUW)K0n8@DB`DD%$%4WP z)V>GR_n^K4sLltqZ$V`#$UUGkA7lWr>Le!E!rSS{>=To0zZXn}$jO*ie;1em=}+Ji zM^+26ADs`<4|5wb8`cK^*#Xjr&Ijp%$sw~reI*bdqz9P|3KN((G8-J8Ihjet#X0aS z4$?b{M?-*~A%N@rKL>TtnSTrn9nT@IF=4=c{-4J+1_lrYt#4!yfb=P3?lLgQyoKNd zW(I~C%&6!8>D*;t(0L2N;6=)e5P49434~#1|AA;wzXgOr;vgLGv?QfvBLf2rv#>HS zfHCy!K4Q-QLw4U2CI$u&2AK^ig+VlEo}8J1fdO>>-;rg1R_yZa>o@KUPJi-TIyYwe z&zH>%4B(!m0s{jBXdS0>6JPLMU%tHH*Iv6bsH~>12u2~{M z^QHp_gBN21Xfp{96O)%9Q=l&sLm)RF*92x3P7Vb@1xJPe1%v7bjzN%6XJBYhDC2Q# zoWRn+z@VVOC>fBzE2YrFuXTl)rQ4x1Q6!RyfpLMYividzAU&XP0@2tosJsUqWue8u zzyR7u16p4XQfJ7(zyKQa0j-Az@j>hBVcj}&1_lPudUz`a1_sc*k+vWO&^8?CKtIs= z4xn}MAYnHU0SYq)1_nMJ2#=yW(&cMJ>0Ty9ks9|7WsDrW_p>!Jq0|V&pInY>OF9QQZ z9|Hpe=q|WP3=9mDp=v;PyG>5fx@x8Pde?ii%q@vYnbMsj z+jf_oeRJsQ>)UsIxF@!D@k#NsSy#5~X*p2T*sigre%Hs>HLH6})gyz}@8QtQjQjHU z+UKJ+F=nD#St|=StbHt=^JeAe15?{y*gV?8yl3y+f(DV}x8kbe)|1U)QUICX+gUrN>C8lNIHu8iNh%fla*E!2D@_15(4?TU*Gmx_w(O;lAEEAwS* zUcU0Rd58Ps=^3hqx}Wc}>jd?M|Crkxv#UcsNV+;Q_0X!#8%qxCR$rKrf3q+`=KYLE zaye<{Cr)x6m^{J%XH?OKFDlE;XLG)veBr~vrAG4m`$gY)ZP>onxPT*I#e(d&J5y$J znuuLFb@#z>hZuL?v$nzh3i1Zr;SY7W-j-EWoSVkZYWqNH^F-CNY^AUM=2mt)e~FS> zVEpWzKsD>}kaup=;-8+fGqMZ3B2%IE?bXG^_ey6Ix$frkusVLeF(I`+W~OdSjMiEE zz+I0g)uiuj^Oru#Vtd7lGtT?_iqjza_2u_`p5pwSYd;>&WdE+a{E79d6;7^K-$TW3!Ci4nXYbZ&3|aFP<%qLsk`g`h1!_cOO52S=0D_0w@lZ(&%5jKG0ws{ zvIjHr?YB0ZyjQ+p<^$eck1xJso}Juge&Wv3J+c|@w_caNej>a7g$d|7EKt&c<62Mw z2<3tH{($xcLAeZ|^6nX${7oc2XpKDR%s-fVkp6bi-~?0v#P%W_}8idqMUw!W4tK~xl zmxSh?e3)kFc}OK_{yBr@AJF}nFfAbW?Esmd$-uA>te=}Rgq3=9vd85ltI42TapU-5t!0|Of)=sYBD1_>qx28B8X22i;SlE2Qu zz~J+NfdOLn;#k!v}W;hE67k`hTnp3<<>y46RW6r!z4yEbwAr0Nup}(*Kf? zf#E?G0|V&bDiD7QD+5D70Rw|D)INI-28K1DgbUWs$uNbLfkB{vfdN#ffz(f7VPM#h z!2sSv0^-*)Ffbg@WMH@j)ekx+Q=pWA0aVX{A82F*?JIc(!@Szw|hl1qW z*%%lMsu&nR_tb&-Pgofk8j29%k;lxya3P$5p%m;MZiWTS3=9i$85q)`d^ctWh6BM2 z4AY@}15kK3Ak6>6!obk*fdO>#EQ26}I72EM1H*y}ggof1)B-Dnea>tQ3<~84dC9NP+bgi-wjpYEuDK=0Ms@Abtxdej^~~w}SXQpzx?;U{HmI$2mp@1_x^f2GG5bAo;h< z3=9p?koF~r?+*(9as~#_Kop37g`I)HU>XC%R%m$a1*MNE3=E*H#~}InEDQ_>G8h=- zq4J<}U?-F!^4nWbde3BF0JZ->>Op7pI#@6;9EZB+FdG9yKn-Nv10??zl%H!6>E}B$ z1H*=B1_mamdJ|3th8obNhztx20u15|pfiOJm@zPPL+!uF#=vl)2BE)!oq^%PBnAd< zsQy<>3=9u^5&2t=oq^#)Jp%)%>jAR=5vVZIV_>)sHE$0i1H%F<28J0>KIlBK0CNV0 z$54JWD7=vJ!wn_|h66qf3}R6GE`$0bA0T_&LHWlWbk=Mb1A_}x9@KVQpbZ(P1lj+a zje%i89U?tSfy%=;28Lfy`%FRky^MhY6a*mk3akta9Z2af5Olt7C2J;yi7zC^s7(i`g5WfZ#{*??2p!PP1@4(K$u;Bxwp9OON zQ4R(M6QuMBIt#Y}seD`sN^esbz;!oBKj>bS3AzjnptduJf0UJhVG5Fa^Fj838p6=< z=;2^sP*?ytHyNb5+Fp!znNfx!=I-aAnFr-w*iQ$Xc)H6p(GK>4Qx5niD41}}Ic>W@_{3=9vD z>Mv_%28IHE1_o0Wko&nAs+k!W0wNIRf%2Vz0i?XEkYr%kv-kghP@e*H9$p*hY`$h@ ze?En3Eqb)K}r}v$0nYT zWMEjck2v$bNHQ=O?En8CwEr7!UI7;$ha<#1kew1z3=C`Vr~ysp*hn!jXdL+eeL!p~V84_@)0_vl4;LSY z+hINyH_(0wP#n&XVPJ?k^8Y`mtN^LU<~AlLEOF=#iNhN*3=C(E{QnQC+d=x#;xHF2 z3SGF1&_o=$!R<5!Sq6rbqyPUe0re%YoqY*POAD~L!x3a6M$m!J<^;9>Dr6ZL_8j~F zAJjGjxetr~96%WX!vsg}OdP=sE(b2iGB8Xz{{KIy%?2_TksfLh$qU-Q`6J7~aN_v? z|DgH;q!t_}rHJ$eO0NoX3=AqK{{IKX2}ljXyfj2H#lXM-N{c>n3=9@0{{IJ!*PyB` zK}w76pwxqs7C~h~ha3Y#&k00YM2jybZ;Twq0QTL^q@v!HfD%2AN} z-^ejAbeu$#J6OWpfXNSg=z`p+BhSE)aq9nn&^-nqyO7-&#J53#sSVAMPTb(JyA)7^ z@C=$zRPK7%HJ5&s!9XQaVv zP4hu+2c1DvaB4sJ3>w7h7sBxfny-baQqVi_?L*)J@L3ZJd=G%nGnv38_g&yV;}-8 z2@L)Rz6t0Y_~yWR;F|)U-1h^2_Jhx60G-{Epnl+6z@Po#b4x(ycNDzZ58kW);P3u# z3Wf*1UHHBK8|Z8d1*HSu9A4}PpA%uAcHmpW3HI+B4zqs;pX=Zz@*Q;63g|o!ke@(j zq=3)3&^Z7;2j_tFfo~6P@Bb$7YCrhAj|X@5gU{Ijo%tcaCHMUTx7>GwXZykDS3Izj z`wlzL;Di1F@HrNs^H>B_4}3HDzaM;7gMcpNjFSKXx$hTL4t%@7egJ${59nNo1;6%x zo1l8&8^gW*kTZ3D?f-V**Zyw;atFR0c((uB0@(xK0-o>x7T|N>8|dtugaWqjpmQ-m z=jVXVg1NAr>HCAT?B5ek34qsDg3bqMSpYe|0OU7@1qZ&(Sa9H5$ASajrYtz{tpOwl zmSA9DkUa2hfeqvg0s*rF-yT>T_%^}uz&8f_1K&P49QbBnd*Isx(*xfc%ny81FoURb zfU4i%bl}?p>jU2c91eUdusiUr!TrFu4Xy{ieQ-PQO~CWOHwKWL>w#|ztRVUhI34)L zV0GZz2Kxiw4%kA(V9p?gejp;wx-OQ%exhqj25fKk8Z}PUYQLhBuM{P*rC7;1@8J$>&h9OYaf?PUdR8Ob&5pV#(D|a zAFT1#Ty--tuV1+Tu)uF8Z)MD%&)ho&IRE`Mdp`ZM&ZiKMC2!NRLLF?3cLz?G**;lc zZ-I;a_17LpvO~&GisY5=vIsIhQy^r^5Xp4m=G;AVB|?uzy<+v?Wj^noY$q9VRBZLk z53Ik~RtbH7)?Iz@=kuL>b`F}3_d_n-f9M&iz4l!v-=QnQNsmsJPE(YbA9o55>IgXB2$Q2>&47bfBg+FX~tOjVz)}n)7NqgmWuCt zQ%|aD87#KT3zqsgIl5HsW*1jLY2+!spyfP2`lDCJ>^OQWD145qt+?Fv9gTMPS_O3N z-$q~Gk!HBudMC@Iyz)ao)GS}5M4sMc9-=)hY1L$29v_9%(xouCjEG!K~^P z^CY=N8xnq>;+il|*G)Fs`M}fs`ufiI%k|@$U7ndM99T5_a=@;nI>=+*pwzrFxI;z>dG4mm0oauoq%=vwxroGhDBT)i}#MPJS zSS>y8a!6onMquZ6-kn+3`_-10X)j2zVAx`Lf$ild-ZG`S%6AV>B){gHham_}Gi4|QKE#>OR(v3Pn8z#Z?9zisr%_Vd#UA$rayCp7c<^_ zy{u?uvfFdJ!@+rBkM6qlt8B4Icph4K^7_V@@AsR8o3gI(i?d|36FDUl;XD0o@Z%5Z2n1aJ($~Zf|8a8fxe_{Ws&UlJOi zmoxMxEjwqkyKT?5hZ?8e#b*9obo|o2K=$1+iYfEfE9Orxi(YZ^P)_EoMOK!F7d?>H zS!er^MZL1iZ^QO&XB>V?SsVL5aDQLeYW(kTn$xS-6K851I_xQyL4M&r@d2S9p0o<=vI4Z<-lPGv3UYCseW4a@W0r z6Q^JP>e(&rwNN=kkn7A$(b5C&Ce7V$_ARHcG&A=eTlQ&THa@-tAHkW&yX)(`eR5k& z!=kk9f6V`@8lW>{ylgRELw)}ogC1z>9e9^sQ9c7`r(R-iW-^0bdVUE+ia{@_xEQ>vFFqwT zsWd$&GcOy73(`$W-3J<%1Wo^grtm>)<3JdB%@=5D17w~Y0|Udi|NlW(D>7IxGJx?J z76t~;)B{K!qz;5ZV{0HYLFTcrF))De11`wiGN`QxQUe-81}#Ac=>@5KBEY}^!l1S) z$Se>BsRhxX@wfj_dkaA0-%^k}NI`l*@*w>n44O;-2UQ1Zn}RUt7-EopAhSR;NIhtb z5;V>Z(xW58zyQLawl2&(kUG$E2hjR3kUG#DS&b|M0|i z$eI99yB)D(0pf3vy`XV%n7RuJ3=AM#0MZ1K1kD#g%>=D4gQ)|pnFQe{)lfxHbs%05 zbZs@r2+-UT2!qxbg5*FL1;B=-h+c=L&Kg2!qst@C77w;ECG@kTriGH6RR91EQ~i_CJ8mCuV@mao0S6j4^}c zKp3X(Hq<;FNUph0s@3qS+|XfJ>Q0|$c!gA9W-sMtlZV~Y|40|LL|A1_l*72#z|aE4cNiELKo}$k!o=(kKsNsiBjnz0kX}%^45C4G zH>fTG?GI4-!P0dmXC40njenf~LIP^8-MiQUS_i8Jtvf*VQZR$S0|sV>2n{9%Mh=FC zCI$fo11<%Z&Sfl2nM^EPj3Bk3wfUf{Fm)Li7(neU@nLK7=a?GF zF}c}G(d0pEL}5Z8{kvcssD99%2AB{?J`t4ppaLL1=!khJ7aX3jeFY#f zkUSrnde9m!kQ@ku+Bfsj+=sqanH^0(=>B?;UJwSE{~Ap{Xbm2R1EftU$RNRR0JK(A z9I_W2v{p+1v{q9HvGy0#H)#Pa1P1$;hv5eU1H%R(1_nJapPRv&k%55+$vjZIFMr*1`8zlW<~~v1X09V zFK^J=Whn**P(}f{cP(gbs2Br-Hgv7n85Hxy87_nTBhJ78>N0@TgVs702r)2#_Tqr} zcA)TsyI-84iHU*1K!$+G)I5f?%$(G`e1^2-Jg|b?c<|{t#i_aRDXGOJMfsHssU`6_nZ+d_tFjqD z66J}RC2-Nwyqx@GhL~ zq@)%VF{BlgmJ~Cjl^11}fDA4}HaW96v81FDtR$HsEiI?CID?@iIX$%`v81Gk0Tv)- zi7+NZQ7UpsW#s2)gQbcx(=$pCtoR~OaOEWzR5E~El?hH5$Zm@-0{atL2($sYpd_Ox zH4%K8g8_)24BA6$1`f8w=;mbRl~#bHjTqun!J{ql@kzzSkOa*T zpPH8fHUJW(5OwZ8o=(p3Mta5!FqQ$FWr$!Q$(tZV&EZUAJ#gCzl!2KUSQuCtSQuCs z*cjNsGz$X}|$~z_oRt8oEP6ieRE-(pF4QgqC^h4N;45UI(Ta1xm9}{HVBB;C; z&dlTmwZy)Fj0N{2nHVNR>)- zgT#vEGdV#ktA#*o?im;uM8Nvl8RVdRi1{pV^QTXo#s(Ud(tygBNP_e;F&IPb1GOPR z?I!^{kf{s|B2ZcaN-IEV&;`*Tbyw^ez$Z}Lv1edl1C`w%nvH?s35Zr>V0Zzdc^Meq zfM{U`h7TaxoPpsBh*n@=_yMAo7#RM5Xl(`t3ws6zP#tUoqL~>O96&S+1A_~QW@TXT z0MYCW3_c**jDaBlL~}4Ogn(#H28IX_&BeeF1ERSZ7!p7<4+BFAh~{Nr$NT0f?4nU|0g8Wf&M%fM{6;hBY8sj)7qVh_+#1*aD*E z85nkeXnh8TJs?_v4@txU@R5id7@`7#U)3>l!L{&E4B4`OD3hB;qO z0P{gTi40Iuf7t-$gQPM*!b*KpuK20Oo^M_GW;#pT1-O^Fc;ufQJ2Ee)#wQ z|Nq6H7HI}(c<@Z@&cF-+F_dkY6iYM0Oo_do*}`= z!0>Vdm=D@*o1p;WF97pFL6M;W;!gncK_i$M1|WXJ-~a!EUt}?W5~-R214D0$%8TA+ z&@QG<7L^x8|Nj3!-VAamC|&lZs7OQ~PMZ+?0<>$a@i6FeGKBi$E-D}wG8}hN0VQV! zkp852`frb(_Pc;8vD--W-0!38o zffC-(&Zi*jI(bz7UpRTVw~V284`@3#!;9-6=O0SfXJ81082~ay^F-&@`mxo#UCZY-ILBRFfg=UD&g#OQDN!iQ9)ln>d$8ogth`1yj~uZtImMhvfuyz z2cOI2$j1R*ryC4et`EvZZ$SGjzW@IZO3@H=efW6Vn0@#JnptuV^YJ(y&TtC!D{}1+SWh+{|C)|LDa-?fp<1|9_9lj6HquPFf%ad{QUnP6uzKv z0Ew9}GccI^M1&1U%mbdtz-S1JhQMeD zjE2By2#kinXb6mk04+iw;lP1!2Kx_u6F6|-8^eCc`fP=FkbMuJF+xxm3UtN>hz5-* zg4PRx&P@aLNkDTdp#2Y^xfsw~ENI*gwEqD#t^?Zt02;Rg^>ILa(Ef*rjR(N{9~8D7 z0PlY=*mMBA|G}OaZU4i2$o>b=8a7aW3^XSQx`S6?_W|(!hXuP1fcHOu`ZJ*W$U)|V z`VXM+`ThStc)tT^o!J9U$o>b=up(&xL&DAj;QbGvIcJbsVlZgF8m8{Sd4cZ%k<8!0 z`yAfOeh2MoC^&TB+XSPk?*~2zfbZ7?-SG#ymy;ou`8((i%ZB3zz<11o_8>HTkp1o; z#Q|Qg54um(;JCo|g5R>=85kgY3liRNe_xQx_8qjhU_$`s_k_o6-!I(f|ITpuz_$gD z*}gwGc>r=B?or5nr=UAxLHhzW9D;-^%$=aU0308X_5y&|P)VK-pgj?gc!mn0P@s5* z4ilq@gE$Yk`k5V2*5Dh-ic2m0u2QvIVEXE}x27I`QRKiZl{<3*XiO4cdk#HBcmIhPn{+{ z?^KazgzX;X()GEG$5+cg(m2{5)y%YPdc*bD?xpvZaI!h5O^L)KLp051lKljdyO_dUl)!!#}tp5CQ&8gVg zl~08^vo1fr@jF!0q|o)O%a5Ypp8FFn{$+W*s%yH3aG97}f9odZknW#Kj!eQrQ=dB* zbN1fq5a8v%$~K|Qfj`;eakFKIn=Mc9PT&6ymZ{tGS|cu&@_wDqGqd-hXYoDu%=(8m zQzb9)yjhoUxp2jy2xf_C8Ai|ROrG7pd7$U++<6zmPr7gV_xSRzhK~+SAB)bPeCPJi zqy34zSNfW`TP^_(Jk|53xEj>eZQk)-sIcIP>f!sdZY;>Uk-0T%d!OIsn3x@ZmP=1{ zG^=c#AA0NA3%}^Ev)61E{VAPM`6%JQq+64C?`Wv;ux^r`vNAB_YFW;E;3t#=bvPW-oj_tr~u8k%+HeaZfA^FMXb!^)_r8OHk;|CO01v#6wcZWV*A0Yex&G|V_zb{A>SMlDO5q5)5MmYQaznM$tX7Bx5S@hrV z-M+j7t%>{vMR!y`E&r(A8`HLpb9d*8ro$gz7=J0Rn*3+af!D@oHST0E@GYF)ciJL% z(~4)8{g<*|s{EqT=VG(JkZJb{du_n3%ysQ~CYX`ec1T-@YV`n87L6$$$Yh^TO4Kq6f z0|ThMLS8onDyu*kG~NcHk=I2>FfuTJFlf9KR4;(!LFzylG@c1E6J(wNXwDrpug?sc zrvuHYL1@sp9B3R4q!*-40d#H)8v_HV4g;A5!k{t~M1y7tVC$k2I2jl~7<5(!NH0hp zq#uNl*F}TsED#0_#)I4hQVXI%>Or#rp!LomJqx%P7(f_Q2ZGdq z17VnX$m^mL6t1AQ z4@ezIA4m-d!_I4M`NFAt6B%%kI*955nVVJsY;JH@N%qRncj2#1mj2b~-Ox;7My%13b29P>X zdlAluGC=b&AbX))1_c8Kh6a$~Pyv`6h(;1-SYXV+0Kd2e%`T|cQED^r|CtM5+APmwAYBzvrP#YBFbI|&J%_FIEY91NSUA|y-_=}D;{_$tZmx1;Ng4XGS z+MS?wv>*=ygK2;fBLk}^lVX6{g-PcaB7_*76qdOt6mtc$9As)>5a8l%WMFJiXkuUx z09nJ(#N^P+qQclHz`)Spz@*B+BN5=B#H6u-$)b%xk%=ilptG%&;Zl;Ak`M=@1A`M| zf+)j^21f-3Mh6y_1_wqa1_cf-2XNzy%OB(xeFg>w*q#AU0tT%i2JIUF&$lx`)-Z#_ zVb~hV0IgU8tswy2%LKar4zxlE)DLk-I>+A|dX_)v%u0U-$XUGLwGU7;KoqD?0-{0Z z1j5et2k}7|cE&$wbrPsg0ulqA(Sed56$ z9mwDME4uaiK6&md%eH8n^+o*M>9+Y|q;1lNkZH^_OhWP$bUDhF+Ry%`@KbH$5rM~w zTZ0{#CvMN2JH1a{%g9an){#RNyMCW;*;MwnV&}cxvRY32^a8p3uTKipJJKYx{Z+!> zrAmg3#UUqN#(pY%w@2Y$XyK2_FS>lcn*Rx!>{48L=v22&m<8J*k7LEmuYbw1Zh36A z+HPvR-)EVXiBikwzp;#7DA2HfQ@X)h<*L;^=U;7an&~_}@=nFWr0decF`Ao=yG}Vi z<^EkAk@VTUvZsxur)RhM%|qP+n;l;Ebh|&C)^Ik6t?%XLeg3U;o9=QPstw`RioNNv zul2&^vuT|{^DORZFbY(<)bE%tZKB7kMK z9M_4(W^?<0zAs+%ux1ZvNfju{;P@`6g97D&&XZ39b*!O$&>jUBP=STSZ$eTJl0S~b z2kHNdrXDm-0M!m&7X&(w8O8_c{|_z=AR-_>Xb%B|2il{+z_1rho)yh~lhEv|0u@M5 z13>0|LUUg>s9-~qhuzx&5(2sZ0Fru;e$aWeAUO~Q@j-bA#0FsyzYo-7?FGe#D`RX^2`{tm9j|p1%fX*+68V}wB13J$d znXitf9#p=;>XvHWpA2gl>!*UL=kVqj3=2ZbLG!(-6-)K3{1Kxc=7KGZ;f%nMpFj#@kWBiVs1CkN?|P85kTcGcpuF?Y{@Q`_7($A%`2{e$aWy z4t0#s^Qw6mCW6j~UdG5E3H2Xn+(%&+!ahe928Ita7#TF7=B)&s-+i4CdLA_o1L$1o z5C0h%Kky7`8ye%LjCRwGI;lXyq(O{YB7u?e7@D zch!LSuR-Clh7o*+42U1Z%D`Z-fsp}n9yJfcFVK11FBus?i&jDM(?ItJv@KKum63rJ>V7^@e0*eNcnNinDmw$igg1!vk_b9ay_b=p5GoHkFS?

zF)(Z}W@6X}b?;7228IP%OblL7|0=UEFf5qN$S{)y5FnS+60!*@moAEjNto+K>9sF>vF}J!T0+LGKesM&L#hljR-$b zI#?ivkblU^z_8&OBK=-vVPGg&&By@Sdj>LZBPcyRWMt5S`X?52-@sc&hE%Bi5}@=~ z&&aTW4HCYm*cccZo*?oMXhpXIl6}iL7#J2XFu~m`3Chpw7~$o?9FYD8j0^{%=7Y+e z3Fb_2`}jfWAE`Xa294W`GDFY96JZbmm0xcd89*!ZLGG_%WMIfak~d;uU~rg$a9<7R zy!opL^*NyU{)Wgu>7ew(&BVYDjSo}M`T1`U{s%Q69;{$s2;hbIAGBw10UHy;PiT7k z#K6FifaHHe&>lY|KByi0Kok)lp!*#b++l>?U%v4G|vCK;hlb$WRJ(k0&Ps z!xKHwo+1VY&>qQNQ2e(t!1FI?1^fkb28OTf5ceGb)er9w{%r!S8%FYPBItgDyNnDU zpy_iy=)C(Ij0_v0@d3JzC1DLC_)aWP_{y;{FkHCB$N&mw5Wfr*KhF^5E9f4K4f;&* z_{7*l=t-m9gV{w%rkQyq@u_*qpzVFe49SqKa?l-f$kK^L$!YneMGP>p#MEMtwxY^{ z5_GZn?9@sOv80@AhQy@&B2?8WsmUlNfE<#TT5M!$1~&jIWN2go7fMddP0h*4OpH%X zN{-J>OomH<)WRgu&47u649d+ciBB#{Ha3Fm%t$QGh|f(iK^HJ($Tp2H&PX&eHG}Mg zgta3^>Cq4v4S~@R7!3hL2wc!T_^knibq<2AUP4G9u^dE?d~*(RHU^!00P3cKx^4>5 z2fz8cfLbGveYc<;fDgc8pqn+3#9|J93-)jX4cUR)GGKMF2fr~b=bH}d(mptI7<>mc zXk7z{zrf(&w+H$MzcJ_^{I+4zp>Gb858-qd%!wdZ60O zgWth#4#5Y%eegc`%>jfbANsbyn|S-l(GLngjXj6q@zi$|!gdio^6f({B>q6@282Pw zGN7jYT&NmQcx;BUBaqa?!UJSBNRJ+p`DS|#e_J4W_}et7x)pm4e|sQ$6xKnC=IS7fnJ^ zzj*KAZx6(9s|ST?0W?lQ{;4?%Nk5?U3G$o6{zKnB>_7DF!J$Ln5+n|Po4|Yc+lF6< zz~vH1FDSiEMbf_zsvng8@aYGoTabPbz5D3lZ${8CKMvIo3J-kxIiPDeKGa*4t;~^FZg}v8!Y{R{NaF0BwVi?N8}%T`ayCa{h+m2;>Qnv(}C*$ z19Cq!e}L2kY&!Jq!KOpsHf%ZctpRHPgrA4NYsW$QL2J`(jvxLO2-Poh0+CGU74}B9@cIaEd4AJigI4i#|=somp!<9qd8ul`MUoiO) z_Oik30Dt&Q#io!eS`ktZx3F} zephHc_>EzSDEJ9;ntyV0y~(#BcK1jKns$GK=lcO z6r>FR+I#Rs4^sYv%2Zff;Go+<;-E4eM1yd^L`WS2Vvpj{5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2cDj@(GYXP|x)X@cv-GKVK2ke;`K)4rtu{}tZ0ldx-!~&fk z4pWD`-W((c!Z7pZLdPRP=J8x*VgTV4kSQRLG6tBsqVASLN;yUTmK((jfVk*!OJqC=l>tL&BJiuH3Zw_GBEteLtX!GV8Y8_-~z>< za|0P6@*uZ^Fl_BVhz70w2Vsyn2!q!Do1}3w!0;L)1_lrY$$>C2>;IA6=a9m{0Ky=> zpfCc_ps`O-n1a^-KdwIguWEw=&+lcN30k>bv$jmV;K#|t!0?v=a?UnrEH}YXP@w7H z1y>Iy4u{3T4hD`Qzn?a;Zg67^=$Y}wK2Bgk0~ebJvx37Ji7rl-6OId*csL$3FgP+f zHL!9vYO?fjGC6~yW1&k!BNIaxXW(A1%`Ob03Jfc^u(Sy|FkImjymWyfp>;Fsu^kz! z5@u``U{YKlz^xpT$hEvhi9@)NQGkJ!K|s_&;IV=iLj!||LTVCIf`LM^fPlQ>MBND- zy)nf`42eEY4h(z_EekkY7&0Dk=z2LAq)m9Rph1aAsDa^NAcuQV;sO_u1&t1l0s^Z( zmd%y0oyoYcfv4pJ1EUjzlScppQ-iV+i;IK|1B1Y&CV?CtwnYXmtPGRf4l+C_5MJ35 zuuOFUgT_*xAf5sS3l9+nMh3ns%nf!z3rrXy8755%VBlb3%5WB7+0eYBMf3i z4kjEd9Sq{kGn|+dL^nxTx}I3X#KFMi!?19g1Y@JpM2^mN$_iX13_VN=j0{aI0uz_C znVc$OU|?F5(DG!GM}q)^122OLC)1Mt2@ET|bi@)(R3>OKu`oF@2)*5KS%5{r0hAU% z>oq}n4jm)!I|UtV3X*36B{a}JV@3uB(E2>kUR;nkH|V^2s2m@Z7KGA5j0_B-j0_Bt zP`)&j2I&J~Sw;p1c}4~XB}N7YHAV&ob*Mb(@KcaHXg#YI=q?UM1_oV51_pgb1_sdD zG>{zV-U4Gr1_o0`1_pEJePNc23=E*tdO>IC+b}XP*fKIO*g?$%=>cKTnn*`R1_sc% z{h;;4ATbX{1_scYL~p2C(7H;0Mh1pJMh1ppMg|7Z9S-53HGGT=43Ufs4AG2`JHkME zV;LD3;uski;z8%?GcqtFF*1PH8H41~7#SEc7#SF{K^i;;l= zw4Sb?k%3_nBLl+}Mh1rIj0_Aj7#SEq>ssf5*0wS-Ff4+qU(Cn=URMn=8-|xMGB7M> zWMEhYRRa=V4P~!^(x5fiAaM|0$H>62o{@oJGgJ;F2E$t!85p)RGBE69WMJ6M$iT3V zkpX-s!XZWmhQmj~E#ko-#5pyZ{}D%gDfhycYj0)SP#q^}mb^44j0FqlI5P$w{$LHVG2 z5y0zcLHnYhVm3?+4E9jA0}}&-6B7f28y?+ImlF)=V8@6qsKVqoxNVqgelVqgej zVqge?stadgV2FUSqoH&R69Yp$69WV69*!g?28I+S28J{y28IkK28JxCI*@%JoXy0* zkcTE#$i%=<1Qjb`Vqhp^VqhqT@3wUnHU)AKBmi;02ZHk5q_O5cOh51=$i|6?WwhNnyn z49}oqFPIn@-Y_vRyod5XGBGfGVq#$U%*4O|I%oeo69dB!CI*I|ObiU5Gl4;7!1o9- zGcYhRGcYiL&K6;20H31|l1Ike%nS^?%nS^mFnt1vS#s4_D!s53J#fX?0rsRyn1)@5b@@B7dPtr2Es zU@&B6fS<(=I+xg#nSsHanSsHInSsHEnSsF$bS6I3Tt_JF45dM4x-l~_xHB^_fX*-W zVrF3QhRXRcGcfovGcfouGcW`&GcW`)GcbVmnFKR4FoZzWgfTNPghSaNvm%%o7^0E* z@ks0hC_4#Cr!q4zq(Rx~%nS^f%nS@U%nS^6PuO z?ENp!tvYnc>E{2VOeeZ$ci(;A^X;JG+O0yn?ma)Cu(tX3X0}fgju-6lD*WW$`pAOw zs7>WJiDQgacU@*p3Y+x*V^ObPz~RbEoawV0@6}YM3mJ5%w}zg*&M6bIB^1OrQ3-6- zZ;MRZvbiVjbtm>b9YG=2WL^ToAk+gn#WwXsu;JE3ki-(l@p*?a5$ z+iL5H7vEJ;@Lj~Ceqw{&Gs%}zh0pxYKEA_z+gJYsyj#PbU*BuC?_ckmNo>`U!DXKd z+O#A&QllM~2RC;sEqQqF+}k{xwz`R(wGmqs?JwMU@Rz45@9A+9*S<|GqMvUXU5jH6 zIH}=wdUM-dmzv9RvNh{{=bF!ZU2!As?bF#O4@|k&D;Z|_G^gmzfxoq#-}qAFM0e`# zj1H;spR(+g;gNm)yE+Vn_HMoR?fQ(W48fzn{LB}y_kr-n?T_|s+Wu&ds`%GSmmc&e z3o_N|YS=Cn&AhOBaoFQDhLu6N7vFe=Dw#LTSnsAL{^oUKg3GRgh8nZW$733AZx3{_ z-~Chl^t*`62Rc60x%{r4v(v8Zzqi%4_{D6thb>noTPQOMY51yn$ujWA_2zx7?b5SI zWD6+y8{++*-9mul6RY>%%p5&EzlZF_Q*=zVeP`ZdkK5XEbH|02hsOG0n$O$~;yHIo z7iHg7b=jKZYY^A4>fiD6jk~w)Idkypb5Y$?Bi(PJzk1_Wxlj76uVi&6sa4n!KO?KK}2FS5A1>W7qj7_H)_ZW1F?k zTK@m3P%5l*vikfp`}gH(%n4^S{)hi|Nji6){RxM|#?pyJ=}xl^m;;_)Y52bUC1-4~ z_^IgIjOj^ifj&_Mf3EtRS!Ba#{9@g`dyAwQ{|9eL`LJ`hhiYvyTixH2H$OJ7o+@?2 z_;dcv6`w+iU!M6QEW=ZHbH%3vuaiBWvdHMX5V+|u^FQ0i=R5x-)~kNoQFr+3N5jwZ zp4XHgs>rUNu)FN%lGwiqpDRrYI<1^P@nlH+*_Ufnb@{=G-;5dk$NnB&z|$X>&sKFx zCc9x-;kxs)LRJ)BKGxxJ?RmhA^b zrOk>-+;_cB+~9TH+dRQ$!I|fg4rfnp<2Te76iZz{CF~$m=<%<+)h&JFxka9eh)iGi zPGV8avitfUE=`_T)_U_?>h|8FH=@B=<9$8Z;{+#hd*e{6#24>TEqX|s#Yk#AT z^#7aL^{}~vS0eYP{$%0zoPFEwd`>tPIqizTtk%g%9C~MxLK&7;I8O*!dr(ST`<6JH zy;FAg@w6}8A;nC4_I{ccaG6(g*|FT?yl)?GVrz>@VK`OoY{>oV&B?XrYL4tZyNLg6 z#UG)PpGn11Do;I9PvuDG|E-;M;Xp0_!y?c*?BKKOgZWgv`7|8)blmw27#P5NiEPXn z8FWj({0Hw7N1XSMq7HOUR*E?zgGIpa|6!m4&ykO#jmephr7$#USGQ5fS{U5w< z92{1T(6D04LJBPKdHtX@s|PF?8Db)T{|D{I2iXUTD}!w4Jp+yqKRvNvWaxI;}|L+G4WMRuAL3|q+ zndPu02oI1MpfI$sW@Ols^!q<(k1NQ{;B;4s@E0gA##l2ld`SBJ|10ji7{C;ZCE2+^ z((N2;MurV3zyBY^qn|kdn=>83Wyu|DMh1tp-~T~pJ%HTU%H+n!)6VP&O81VCbnk$* zEP&=485>51hP2=RPvW*efvFIS`#m7;kFjB75XkubAJpfC*zX9p-wk4a0h2!#{jL!G zb8HwHE@b}xpMuMN7d``~a_ss+XIb0<4a#Ky{tp`OLAM|5e~^A(Ec)HKnewm*yK(zq z5%u5>z#{6x4cSwWV9Us`Cj0k)(0D1x4b4n`e4urcplm&gM?+vV1V%$(Gz4fD0uB{N zzkMh_`i-IN=(h)DN5T6-kZpS)eGx+pSzbZr;x`7fTX~?fOOeH4>^ntgzHt@>-iZkD4RGj&?r{c^v+tM@N z?o^!lCQ^Ckn?>cBZ_%Y^z9m$i`BqqZ=39H|nQx0r&wT5sJo9aT>6vePD$jhoQF`Xv zlgcySzLcK%##43Xn?co?Zy{A@zA=`a`6gR-=9@{`nQvZYXTH@`o%xnrcII128Nz=F zvKPNGSRJ1Ro7X|}9>emgGvC&o9< zo6~XT+mVhl-yT$*`S!Ky%(pikXTFJap800edFES2=b3LkooBxBRiF8Gq4Uf)#p*NP z464t3bFDt}EwcK|w-23Xz7-!i(+d~2>b^KDAknQseg&V1WabLQLenls;S)tveE zw&u(?hT1dVglo@yQ>#7m?LgO=Z;rKRzJ=7D`Ib_9=380qnQxP7&wN{6d*<80+B4s7 z)SmhFuJ+6~_PR6Qr0dRn)2}=8&9m;zxAeL*-)id4eCw+_^X*O7nQzPM&U_Q-KJ(3_ z`^>k4b!Wa^sXO!SdEJ?B5#49LHFTf(_N(s9H{SX)-xTW4d^4^;^KDJ{nQw0OXTDwO zKJzWI{>-(6|fRDb5%()u&scGREwcDnw|x2N@IzWuB}^NqLR%s0h`Gv7=b z&V2K1IP)#G;mo(fhBMz<8_s;2*>L9D+J-aV4mO zGv6#5&wTT3Jo7EF@yxf<#xvhK8_#^3+j!>N#>O+>jy9h8cC+!!x3`UFzJby=N6(pW zj7?|0i8Y=1rUAk|XTJILocUJLbLQKEo-^Mr^ql#|(tGBcLGPJwPEBXNB{ZG+7SMa< zTS4!cZ*@&)zRhep^KC-!nQwb~&wP8*d*&NQ-C88l<}=^+^q=|mp#RJ_i3w-EIZQb7 zEn&i$Z!;#G`F3E!nQs!!XTCj|aORuL#53PqCZ73LF!9W{ITO!(yD;(0H#N)8;eZem9@_<}>Ncx0*?3zHOLv z=G%iwXTEVvKJ(3F@|kb^EoZ*POg{6iVe*-8OD3QBc4zXLZ+}2?Q_g(TYB}>QXUdsx z9xZ3S&6slL+leV>zI~W-=9|vcGv5NHp7~ZY^~|>gQ_p<6F!jtgmT70c8B9C#En?c4 zZ#~n_eA_VX%(n~E&V1vTe&(CQ^fTXTrl0w?X8M_LPo|&w#xvv0H-{N#zNO4K^KHV6 zGvCr$&U|ZWIrDAHj5FV6ww(F4t>w(O4>QhuyV7#z+v}Dy-xylYd=r^@=9|aNGvDM| z&wQ(xdFGo{>zQw%t!KV1n0e;gg_&o*Wr6bY%roCiW}W$#GV9E@1+&h4J2UIdw}#d; z-@eQ`^UY%RnQsZR&wQKOiYO=0%LN#Jf#St)4BwVd2dyE1i6PTHv(J2+Ip@r`O>@qC z+cEphw>z`Xd^W8Rr>5%bP`n=tRpw_REI#usXYrYD zGZvruc4qOJZ$B2F`KGbt%(sXoXTD8Xa^~BCC1<{US#su^!qPL}e3qX1R`I&DSE6#lT1=7Fb%r~(WXTE8yIP=YV#hGsb zE6#k|u>xWqI|Jm7^$_KY-xL}yegjPdfQ~f+onajlaq%0dD-L3(L|ps^6VE{sFF_Ko zK@x9?xcCiZHV^1td*zGYbQ&&x19cZcW`M+cpz@$wQ!glA{N~Vb@f)Zv2g!rPra;XC zvFAYT0I`=KiLXHt--0B*2TA-0lK2@U@heE;caX%NAc?<0690lE{s&2%B@z-wAh+>E zLc$2d7C{o1K@wL%64yZzH$f7&K@xXC68Aw84?z--K@v|v63>Z*!~tk5$3*qww~B^~ z;C*?ZFb0X0K-GfSHBd7^>=q>P9whN8NaAyl#Frq6uR#*uf+W5t5|Xw+>FEd(`wrBN zptCz~s9yZGpyA>-P?`q05hV5kY6gh?0ctjg{R2syAqo=iAaRZ;NPK|U0!ZQ#Na6}e z;u=We21w!-Na7Ai;vPui0Z8HzNa6`d;u%Qd1yP7FXo-Tv4QR~ag4)GzM;b1I_dB^nZ*AU01lB%DEP5hQV$Xoz1x<8O1+FMfN1WCln~1*#Ur)`6M< zVw)g|+d$0#nf*Zh;Qq;2r1`4WgkdvjmE`q9F2&$1&J+z z>IbpcK+OfQw;+k{ftm|)#|Mpz-vk;VX$O=(Kw?LrYC-HXP%}X6D@fvZki?%LiNA@4 zrXdCfhA+_&b3yr%AqK&gh=If@X#BiD^WrxdB>O>PDlw3B0b=XKK+*+>ZGt3jgCy>P zB<=$>8x((MG%tSBKnfp_SO`=th#dnp1H?{263>B}0V=Nqv@U)#XoUC)6h0ua5~x}b zy9R0oh~0uD-h(7Q1xb7klK2uN@ij=|Tad)}#6au@h2asTFuVYDBPd+9XkGl~0`(_I z9Z2jB)C>^&Nem>7FvLQ_9hBE!XkGl~gXAxe7*8xD+(B%SSV*{o*fL1sDoElwNa7|) z;xIu~VRCfY>=m;w4DpHAvzuNa8(6 z;!}|9e4%~uTLDtK1DU-6N$n0KGY%k$pFk47fFyncYBp#-%SGqnw;Ck>fW#g^)q>bB zpk{#BACSapAL*fop4mIdq{I&-vUxLJJplU&E7pNH^whxkc2$FaVl6VS|cn*?y36gjX zl6XrzB5m}(OM*rfs8%W^^5<3I6 z8^pc>)dynVK@xw0B>o0T{0ox!A0%;>1W3Gq%;8CZge{1DNB`ot7f9&`Bqjot2ZiS! z{fpn;Ah{1DCX)b(R}fnTYA%SagCuT(ByNKw?t&!lgCri3fC%H51Vk8TK-~fgw+@4g z-~J$_1CUq=)C>^225L5l-GU_EgCsr$Nqi2H_!1=XHAv!Hki_>u-2%$rB8C^g2{b|6 z3Caf`u_I8mAodxk86fr*B=I{);!lvo-yr$<3lf_l5fav*GxK>8A#n&=cOjApi9-;3 zf#Jn(GDvO#iOE3qf!HcY`gD-QO_0QGki=aQ5pm&@2=ODR9EyP22`V2%j4poDXoA$C zApe8JQlMsl*f~(MLF^JF@fxTZVDpSFeluu-wBJBxfW&4%)q>ayplU&DM_P<7eltO` z4ku3=sPUlK2B8@fS$q zACSa61PDTcR>>OK@tx^5|4q}35t^|#uvXOAf*|QSPE1vh@As91H>*t60boLZ$T38 zftn54dt_j8@mmg3T!F-$CBl4Qu34row{XWbe2_)$$VB&~tU z#WSWCzinx{_ziTP6(}r0Vl7a!LF^u=c_8)_B=I@PkhBXDUxK7&1Cp8@Na6>O#7`iJ zUqBMSfh7I_N&E#=9Mn$#0ChWv-C=g|+Zm*M0uuWH)dylTq(I^c#O6qW#1n`u02K#? zmjn`9Aq5d$643AhsngcpeY$L!*_J4oRL5;H(D+X8AHNZbKQ+yhBG07*O|1rm-R z^$AF7a*))NAc@x?iMJq$_aKQ+fr^9TW)9TtAodRPi{HK=<#CYM5~w~9dks_{C|tH6 zvG*W_iwZPcKza2D)NBx2#Ny&NhGs|@gVGU5>+$JP`X1lK7JpM1ArGDh?{M ze;|o7q(b5mB+ioxi3?k{kk}@vh&VTZ`VCaK z+Cc3Au|HT`{HB0p4@k@fNnXJ6;x_{%d5|4GNaor=%>{{vAc=cG#X;u9K-~mlry!Y~ zV|nqL1CrSw`5Yv*B~br@#A}emTad(ipyD9=r$E`D_Sqb$Js|cK%ZuLvkn918ErFT= zVy{8cw*^Uj50dy1B=Ivy;#ZKw??A;t>Fo*Beh@pv>f*PAW=L89r5}*k8>l`I`wLVb z$Pa&z*eq#?_zQuCCnzuRq(RaNh`qt;;TP6*XzCdghByk-i zaT6qQ8>l$QEiOoGA0)RVK-~grZ-qeBfY>omcY)X*))&7uG(+48au-M}1!@n7or9#W z1WCLGNxTI~ya!2q3X=F7B=IFk;%kt^w;+k{fr^9tcLd4?)o*8z*jJ!z(0aZ*P(Oj# zGBy{#Eoi>@jhlgi0pur;*b}JPAod$1eP58o{~(F8q(kBcq@E`o5;q{W2$Hx=IwU?p z;wngL43N}VAc;F5iF+W42Ox<@Ac-d+iDw{*7a)mOAc;31iFY80Pe2l%0Tlb|IwZHgHp#>5)Apd~G7C_a4*ejrBfY=+5#CITxA3zd6fh2wbN&E(q_yZ*I7f9kC zki>r=i8EwE;tS*kj!cMKL2LmeaS0@G1tf6|Byj^Iaf?hyoPzoQEDjgHc_4)&NX!AM z7R2^|ngL=5Ac;q0Ldtkh8p%Oow?NGXmGub@7rzCxK-7W47bG?TY6gfsBNLLAKORo<0wDPlNNTSju|FW0{R7EO3|SC2fZQsP1@SwmUBTdZ@moU+ zqKpHHsboRI8^qShf`m7SZGt3jgCy>PB<_PG9)ctugCw4UB%XsLUVXW?HwdDo*;?8K@$Ih zB>pE064xMeSh5k}Dv*r`ZwVxE1tf6|Byj^Iaf@t7T!QlW8K;ZijzH51D6N6S9H44J zY!9dzAa($fctkd&3<0&f1e`B^OE_`#Tfxbr-yZBc`t88+qu{xB&>e+3&KJKuXu0?e zH0}d3A0(ClH3!7bfSM0t7a)mOAc;31iFY80Pe5X?K~l2?Nqi5I_z@)WGf3iBki_pG zi9bOSe}g3c1xfr5k~m8aBz{1C;mLu-4~Q*-Brby_u95?Z2T&Af+QY;B%YE3Nlzeia*)(iAgO6U67N6~pMa!y29la3NNUy~ ziElv?--9H61WEi1lK2%Q@jFQ3PmsjlAc=oL690oF&XNlWdypS_av}Z&m0=>ei1JJU ziEV+T#sx_{0EwNE3yCXGdCuT=@mokMB>jWZG)Sx@7ZUd%_5`T?AodKXIH+yC0BQz^ z?c#RvTTCm&oggznVk@BfKaH;sYX1!DJjT>Lhn72*z1Is%DhK+OlS z3!wIb*cC|P4M^f0Na7Qa+%p4-y#&dx8<50LAcTZCAi^NS^WwJ&M~{9p0O38T=}Q7h-2~5z-!>dM`mNyb(Qgls!U`0hDg}_R z0kI7VAaMk03mx&i_-zT2`#@qg1&}xbu_Fo~aRg!~Ah|CC$-ELIH4RAO9Z*BXHtq`|>(i%wYK_Mi}K z@V@x%1e(4WBz+Z7_kr{^AnAMIeev4`G<_XN`X(Uhn}KBaf+9%#9Vo)Thu~QA`EL!u z$G$ZrANzJ8@z}Qw!N~KgAmZ3JfskY03PO&3dk}K$n?vZaZwo??eG>>f_N^f7 z*tZ8^$G$m)AN#f-{n$5wv}4~6L>~k18(0typ&25MeM^Wq_H9BYln)vJ$AZIJ&wsm6 zbnII}*RgL5Gmm}yF!$KE3A2xVQ|LPOZNkiB-!_yT`?g^6v2P5Mj(rR0JNC_?^w>9s z;$z|4WvW8VyR9Q*cR%du|-i=lp91fdfa9{aXo;jwQCt08>2htU}IThDyku=Cir z1BZ`&OE`4w+ks=pzAZR6Q zz6tC)_RV3}v2PRh9{cuS&#`X`dm#2G?1s=6b{+fHunWRQvl4}Cwe8He3CE9pQ+Rpo zTf>`U-zGdd_O0RJv2Oo&2+kxZ9zI_1c zIdSZp!s}z-0&XAsmT&@M*M_qYI^pcGZvtnJeG7PT?3>PVzUcxC$G>f0IR35R-?496 z%lW1&FdzRmf%*712A1Ps{s+n9-zG>M|7M_a9Gs3}juhH;=G%gh~V(AsAKdoC)W@-RV33O?B6qZ`!-ge5+b{=9~U5$Qt8ypU-?V-gV}i z`K~kH=1(~PE%fr4Z)c7{EGvB`W zL-I0cJP#xeS{v$e>DG=KN%7&?jxn1YvnQtJ>z{bE3e)7z>l^f4|V`O1qh&g%Y z8wfM9Gccr_Jo62N8QB;ZvQM7*2ErhA(aAI4Kp1qsP1(sa-#{3|t~z<<8wi8gbtlh! z17Q%m>ExMjAPh49`pGljKo}(6e)7yW5C)0&oILXlghA#{K6&OF2s5%WFw8u8<{Jou z*z-@G`3Axu^-E5k`3Ay_91IL=PoDV(!XS3~oipD+7{uOo^2|372HCaicj_D0a=z&wtWJGXus!w7!TQuUrR99n8|+Sf z+u(5O+XcH*-}pdj-u2YC1h-S)1e{KNV_D8OJ;3wSw*v1|-xheD`lbpp&*#*)34W)( z3HYA+rm~!GdP3-_Zxg~!eVgEa>KpTNzUc+gr@l>yJ@xHC^eJ!}RY*Mbts(K$w-0fr zQ1T4OUm(2X^Of42rr@jfCI`vH(6bI){eVcIp)VB|3PJOdtU<57q2YW4%ffLkR0ke}CI6zqy z%uZoo2Q`bq>~sb;Sug{1ZxjP7=sI^Ww}62~9n4^0U?^r_2H!ac;+HZonSp2!u3%sU zAN2uZ=P)pWiV6^uA&-FxG(`_)7cek_nnhrCDFY*Ds{xpu%fJXat`y9+Vqg^b@aohz zb~^@!3v(q2pX~nb5j`@A(s?F{A-r*?bNpd1_qE`bFcyk8#E*V=B6?* zT7nr6|60M=Rt${RV0%I5+c7YLrgy+nnGB5Ztw`w%jCNo_1_p*q21a`ryM%!ebc_X< zYsJ9mc;GAcvH_&vaPxU^x$&;~{I>}{r@t|_K=|LGd26D?~klSGRK={RP3<;-J z!4ncp0!lxdaQ+*|r1Rf?O*sEeWa9a68k5d{OPO^3+muP?zwMcH{@asD=fCkxKL5>N z^7(H8lh1#vnSB1+g30HCG{I{B^5IdGk zJ^$^()brooO@#QLiJ?IuL;2!2P~mjK3p5tdpwOTU8AA>60`(~x6lQ?-UokK+#1w-0 z2_Tx6p&{Xk^2KkU{B7a|Qs0p9NBQEn5(Wka5TBc&Awfjt;xV5|xYJK$!?+J_|!b!XA~2-$0pgj~A$~+K_NX<>EKcShkNYs9n{N@J8k0 zH&DUY-~sk$0*mTJaNPjX&%n@-AfpQM9|J>#2S~gj!9x|IA0*Gr(2$Uzdhr{mkOGAZ z6GKBng(@W6wx~kPo1h8`2Z;Yc=B!Cnyegjpbq7JqLrbfX)1I$;*QHQu4WG(|kgF=fs#H~H<5cv&I zc^h|-c!RE15KVq6XJf5evth#nh^UPG(q+@B$$9{NIpAo2r>rc0}{J? z^qaxmqu+R9KxqV$b|N${ew%RT=(huRj($tggrx5lO^AD;<|oX7nh)ZG+`9#27BoMB z?0*1t&jc;7{R%&z@^`dAX`(?v1+>?Mfq~(P4mdw4*k~cr8YnzNv><8CL>Cf1Ia-jk z1~ab(Y%T*shW5p87w$v+GY6#S&e3lHcaDBrp#^a-D7-;MWePZrL+;`G0rD${0>c%M z84Hho3)p-VI!@D|@J9<0ZlHK$W@u0l(T0Rej3+o86m+yf?q^^C$%Fjqq7CvN1H&Ir z5Z#~<1Ld#rg!rpN8)Dv^Scv`wQ1f8=cRi4gUry;0l5X@Mv(dl9Y|P$Fnw+Xk7ewz^o33HGeB6Kf) zn*cQ%#Qt#e=r@I1N56sG2pT(F0xlOA7(ix${I&sXHUk4FpMv~;M;8+Q1f-59`Ec7mZ12;zXA?Yqa4-&Q@^FU#np$Bq1By3q28Wg7JLE_?rJ0!l> z=t1m*nRi4F;ui*}d3T`Z!Q%T1)I16Oi{BccVZj4p-#q$l!_A}Lmc&E!gTex&M&Rbr zZw@z)ep7*(2Z{%fyFl>*@=t+2#QlHVA^z#mhq!NnC&WJsp!^Tec-)~6@ej;@7r^`m z1yDT(GEcw&q92qVLE))k0P$an0mM891Bm-dpygtO0VKTcxL*8r;T|Mz3k)uPTX5s( zw+lCpeyah?Hz>@3ngg;IWX~3;IiP$4vgZtx56V}dczpua2MKqOfBzUj+zkpxka`V6 zh&xgYq3(k63k*T(8WbW7A?^azzXmsseoMG<^c#!w#cv0$AN}^>`q6JSQ1u{pgUp{| z2noL}hLH3D3J;Jw&Op_H+znFq1ZwUF!;9Z0K>hp2@Zz_C>qoyeTtE7a!wBLY4I_yC zpmYb)=U@bK7sNlHd=9D)CxF+QD=?gaw1pIMplUX(1NA=}6lNGf+yb+E15|zw*z5*{ zJ4TSW_wj(F#VLpAdZUco6 zNZtj?2elhP@-a~Lp!k+!a8M{Q0j0wRg()VGb{WWz+zbs0YfK2{M}*-@fWOJu)-AN?*@ejUKhW~GB_w4Fa?eEHz+)S z+QZ-pQs1EP18OdazX2K-0%nkSl`%uO0c3}X8N^PQ9X@6tGZ+{^ZUBW{iW$UDcN{K$ z6Ju~tsDYX@2dWR0wn64>f$H1g3Q4m!%n)vsVQ^6RU=O(_Jq%R!+AYR()aHK4E&aDs%%8L;_~_~T)4PVG&WuvkLu zQ-RVpmY_ItP)M+Z$b)E5Sb@qMP&(*cDapw$ZUI(QQX$A*{6P6Hvy|9FY z6DUkU?qRS3na{ugDtAHQAz=kE4-~GTa5S)jmQ*HU9{-p8Nt<2kFm%?YBml!^_~HU}FthR|TO#`6$L36ut}$ zAoExm8Wc*bA^riG2MU)SYlwe9`4nW|5-1;(PeK0OV-4{iD7--SU9pDv4-{S?|AN9x z3gl0hi{B)nG&6&Pf`APu{2LSuY%YES4O)QeX;3-fVRP{tXwc(@2guw8g#;T&-v^Wq zLFGV&4WwKFh2Mw$N52^yIQngZ4X9tzpfJY<(su*Nf&8+?29lmYe2`zx*g*VtzzGs} zPizo=1Nr3-ln?S7$S)$cAU7~DG(hW69b1UsKy?)pgM)$#SiV6a#TJs!Kz;zZvBnmW z&p=^3#TF9Apfmw;*BV=hJ7DfQVheExD2;%^_zu`y1_lXeTj2}TUQir>+{FW0@5z8@ z+k(Ov0ZC&eb`X0&WirT|9y^HtK>h*6)e@+=ApIcu3s8BG zdXW4JBzaI=iP%H>@*wq~GF!(U(w7JELE+$HkJ6V{h_Q$CYeD9L!lA?-;$9FR`~o+#U9oDZ|ouQ1F|3FehCMNdKGB=890FQ0s{l6OaayF zpthS0NbK6tZwA+nehYDcm_7Ug z#{p9QY{>+rLC9G%2Qnf3f&{ON-(c!?K-JwrQuhL?4%Uah;DB(y!qubS09` z(+h`--!@!1`t8A$qu;(bK=O}>BP7f~`2`dwI*t%OgX&FCoVY;wpn4M&CoztYIs%lR zKxwnY5t4R6d{CV9I6}f4#0SO65=Thd1@S>~vd0k;2B5YKC{C_8Lfi+k4;1EapnQ;h zpftnc1o0Cn4}r`#aDvzmtD`)eAoj!Rs01g7{h;#HU_Yd-Q{e;&{}v~RTVU}!#|h#V zklR3ZZGqYas-r+|dEf+b8;B2*{{fZnS$F0es7>PFeDPZV0|UbvS4db!I77;w5)V-S zs6nB?8InFhVG9b&8QG9H2CcbUl6~=;P5`7$2nyFJ&X9NjxeXMqYn&ne1i205?<39- zf5P(o9cPF?LGqw*{o)Mq8z>w>;mYFz$xEPi9mp>#E)c(h4$DDU!s#`9bt zZU>daAip)ZAlwdWZ_RLll$)S31e8uTK>47uZoxiCIG=C%8A{0VX=$e$6e5PyRF4f1D!E5u)* za0B_X!xiGM1#Y0c+Muw&733yJ8GHcR4+FJ>9IhPwR&eF$H=SHiTtUW1Ky}uI%SXR4 zfW$%iq2no_zC*(0qu(Z6KKd;t7h)bLkH2ue`0c}`qu&%RAN}?PT7TB$g8T&;+XxR)3QwL~#f%?b~ z&L90IaN+1To_s|7a(G<)R&f64w*}{qeiMO==PKyrBm85LkLn)>@R%;7PY?iIw*^Xv z2cT=cVDYuU1Cr)I+q&L91@ zCm#|1pfWAsAtY~s*b~kj{dVBo(QgvaKK~0Ow|_x%y9>C#0de~Us2QL%FagSL@x1s= z0LliXGlg?UzXhB-`VBPR0P=%N0VG^NW7h!%7rzN;C@{P!fcWQ$CnQgT!aU#s#C?B2 zYuwHr{r2GO(Qlx!3sCw2l|2q;kA5pSd-NM<90wGips}3=1sA_@a40Y+cwPLaF#qT` zfsIGOW4;&89R0>{_UN}W1sA_P*bOlk#D?j+0oCV#qz_~s$Sx1Bi{BE?9Q`)o%+YTk zdtv%PY?ywDLWsQ?NcusOi7+>S*aA@hba)}$0E*WSr;mP9ICJzHhz&C@18UwBB=bOS zftd$l!`uOCGr;sMfa_^ki2;X+7Af<%Qq;1Xps2{ z-WR_$h#&j5LHyXa9B)Y3u>`7ShWEv90^-NM1&AN}b_Xh#QUtLZG^SQi1j;u83<^FV zI~x=(pxGq?73c7Q=mELmf*52i&Ke|hb`)LwCLjVa2RRHIiZ6bAlYTMqKazb%kE{*6KI__qf($G?5BI{q!e>G(GX zeZ=}44}a`tgzP-?4WE7ogX7;eSRDU`OFtp|3F!x|zjE+6{>{PV__qaK$Gv zY&-Ss!|GGt96)&csc!;1Pkl33dFmU(%2VGG)|>*bgE01B03Ubj0;NNsbOw~Jgwh=z zkh@M7dqBqB8^jqIKnn?2oH!UjllGwdK|y&5l&(M%_eWmyFo4PtP+tA|?|;69;Sun< z3YNMf;Cw&D^$2+Hd!r`<188vqC_RJDSxhJewc8jN9tblqfYKRg!2xKozyjl=-#~1S z3rD_z79K<-GcbS_O@P|ufByf^pE8eu;qU+d`5-eubCjTz@%#UO@U?>f{{PQ^F^_@a z|NsB_ptay1{{PQ!JAUNbumAt^O+gL>DJBAg?l^@hYdC-6+k!Xz-xH1>|Mp=!)AtYQ zr@w9Zck~;>*JIxrcFKNFIC|=vLH4O{ANHL3R&e6Pw*xDWe=Be}_U(gl(>I5AY~L9? zPkmePx9Qu4YlprCoEG@baNxwZ1}%>7AAU4_3s`gF+XtTG-xz*0eRIe-{f%Mn@oxzq zkA3@a@Wi(R-%flps6F*y2E$|D3J#w7reJg8+k=-!zXeP_{mo(0sc#$BiGJVEcl?_{!SQba zTaSOcz;Wi=1N{@<4)7oUCXm7QJ>bx(Zw)`2z7;$=`c2?<)3<`JN53ubI`-|um!@w8 z%lW=HtUdIt;r#J$4G&L#TX41soCXD69{px;@x-?Su4ld_Ja77DpmXBegeOhk8thMh zTk!1Yw+VlaeN%7~`F=s;*tY{sr@u9vZu&Oi+=*`sZXWu^aP`!;3CGyKE9jm0X7Kyi zH-Yoq-y6=J__o3A#5V)?liwIvj(uZzcJ!OW?i1e(T26dZux$FqU<6Wk;@gGgr@tjk zKmP52?6GeF7n{B@WV3xwxPRi?fhotnDQs!_=J37g+k-8qzd0^w75lNo?O8xGTRqJZ|{raPY*pgmcHgHF%!+7Vzfiw+RPNeoGLP`(7|Z^n1ds z6W;_PPJg?QcIKObA;n$34XaLlJFxfow}dmtzdiVV?AwK^ z)87JkkAFLGr0H9MNz=CtamT-HNI(9q;l`nF3wAYq`yhPmTf&|b-vnIFd`sAU>RUt3 z@ox=#nZ7q1J@M^;Y16k4+Q+^zJ?8ozz<>PPf^Vn49rz&d{ei*BZwIoDe`|Qb_Pyc3 zp>GX$PkeKD!~NZ0<)Lp4`%ZkjkR$m0Li?d_4y=d23CuqJtwECeJHzv%-!5D^@h#vD z_xFTlvfmXhpZZp?oA3LAwiDkNZgG8AXgl$(Ao0w%fZa{s1il~rrf~H5w}5{~zis%| z^o?Oh)3*;Lr@u`&c;efJy{EnfY(D)h;0@dN1G7(lTkz@VH-<&WzcoB(`~G0&@ox_Q zo4y^G$MZem1^@R2T8Fj)HepP zW8WTBAOGg?LEt+>Ec5q-HHW@Un85eF;qTFJ0UC$DeP}-MZ9*B_cZWwOzFoL@;+ufe znQseT9Q`(d_1L!s+fRH;ux$F4u=V6OgDt$@4-~R}cer)v+kyqBz6tz4`Yl20*tZM1 z$G&}d&HY_q+v#r&qWs?jHlF-8Vbh6k3pDw^Gl2BpJn_xIr0LrMuQT5qzMTG6@cHPs z4^1b&HSiq&mT>jZH-jMN?*-DwzD;-~@IB!K`}cy?hrT6%>OAh_-x}HuecN!D{dCtZ&PM-M2aHZ*6!HyH( z9w?vu_TljHZw>#NzBQzt`nKW9p>GaiC%-+&JoPOg`P4TDDUR_xtRC^-IY!toQ| z3QnE)=I{m5mYVS4=r;q_W8V~b&U|aAIQ=c40hBIIe|vD_#5acQGv5xxAOE)DMANqm zw+?+vkUjRTq4Mar4IXE{eK>pKn?NetcY`H--ve4td^0$H;@gE2p!%fgTf%`8-xwaT zeP`fp{`SC=`+LBhL*E_*pZ<2>?D205ZfxHR3YfotIMwv+!|4;>0s>EbyKsT?`+_e= zzd8JA`nJIF%r}Jt9N!;2JM`^?fZX>3#!cT0(vE+7aO2RofDz^#6W=EMKKkv!YuWD`ERTI-SR(rUz^|j1sjilGbmyEZm{9dH-{HTzdg`7{B6O`)87s(1eGl(zCGw=`@Z1fsc#E%*}gmc zYWlW8SLAy_x8U~&Gx)v-{9*atAS?KN0`swN4?t=4$O{mtOh(QgyDkAHgr3h%=QzBzn5`fUN*;cp3RPkk%6bmH5Gn<7(n&G z_oLr7EIR&eLbu@e4TnyAbGUx!+X2T@-wMv0`1XPC__qL|W8XHsKJhIf^5i##^3&fo z6deDiaO2Ro31+9i9k_Gi+k(@lz8!Er`ORU*p>GT(%-;oCPkd_-IQi{D=J9U_W^jLJ z2s-g?f&b}m0*{V083yliwCR zX8XS3XVW)@9VfmuJURMp!Dz*?6W<AoqR434!kyKbWeOsIC|h4!=cmP3|voqYd8q1A~&0wnN z_k?+;zAf0v_gz4o|NDm@$G&a2*!1nd`=j3))*bq0AbRXu!1fd0HcaRHe!-6UyTF%Y z-#!$d`u1VN$!`ljAOAMt)3I*?*AIOQIMeiP!`h~A2ezO7wjl1*H-Yq1-yYbX{w7es z{9R$)$!`q1o4zF!uzlZPdiq;J%JFXkymH?+WFP-#aEs~t1YWuC3j0ocOIUdPn?mNP zZwt~-eG}l8`|dD<`?~>OGq^2VaQMWxg60$74zQp3<`8oFTf#=s?+JHKd=r??{k@^) z)VBckGv5sEo%r_P@$qjDBu{=5*unJOU=!2#4N@n+UD(d_JptqfkiT^KzdP{DeGdS& z*|JW5dvKQh`-4-bzCGYP^Nr!`iEj^{9R22Cf9%_b>3rWo?LAQ2&q4MgxXr;Ja}iwM zU)aL*{Y8iP_Xmm>zx8xo{MPXLD7cRTs-He=V*2jj2kB=tY-ainDpxkVI{J;_@PTg+ zM4G=bC|~^c=dH~51kk-2Aj69PklQe()^9*!+~!sZ5O{afYgB0 z;=s^rYr(P;Dj;Dp1;KWJaq*jr#>H=Epm>YM#cvv*bxWETzx~j-_-zGf9hBz9ZxxyszrE4C`0Waa zt#$ERg4V@v9-#G0pfyHX7r&j*y7+C6*2QlD+84iBXkYxM09xateev4|t&87|XkYxc zM*HHoDcTpm)qv!5E`H#cvn%E`Hmgck$Z-y^G&E zK=S$*zgg&C{I*8_;zZrn$;6d}`rWe1xFuC~c zg2}~iJ4`NqTVQhWTZhTTZxLn}zd4v){H6h#uQt2*?TzWhZ&yq&emi4!@!J8ji{Dn5 zUHmq|?Bcf$^NZgK%rAcPF~9iD#Qfqn8PFWE`NeNf%rAbsVSe%30T8yh_-%{D#cw7S z7r)6^T>N$b%3on|@!JH8i{Ca_Ui>CudGT9=<;8C$mJq%H8h-{7Uj;O8YIX737t4#^ z?tsLtE`BSqy7(;yBo3M*wZ8c6h1JDx7pyLR+hKL_+XL&1-%eOx{IgWmVtpm0W?Qvd-2-`n~UFW*j)T}z~Ywb)$zmSc1ATZqlYZ#JO$ zM;p{|g@vz#-NkPVb{D_Bu)X;0g6+j`J8Un0TVQ+fTZiq%Zw0m&zeU(y{5Hex;`6-~eG0=P(Xb#Nb;O>+Wv_9-?k<@7emGwI_Q3Jtw-b&Rzin{5 z_-zL0Ob*A3-!dF8ehYBC_{{<|j|7_QalH6#h111v6Pzx7%W=B+EyU^KHyfvm-&C9~ zetY9|@!J(A?DiPAT>K{Ca`793%f)XmoG*U6;C%7h4(E&C7C2x0*5Q2dTaEL@Zz;|f zzxjaXWSlY0nBsczTaD|*Zz--9zxlXc{AL20cW}MEIH&{(?L#cxyGE`FQ2YfGn zd(wLGn}g5AZ*M?+zl-0#fM}nK-~NEaq4mrGpNrql6kYtL(1z)MP(11FJo8OJ{P;Ho zvE$zkh#vozAaeX$f$;Hf48q61H3&h*l|br1c*ar4m=cH$!k}>%&=?G8tOhhD0~+@M zjrD*wwSdN5kn0|hdUWg^lw_)FsAp)bXQZ2!nU|QO0O2SY85o)x zm>PiQ_Z!d*XnA<%+l97^-wN1He*3_7^4kWsliv#1Pksv!Jo(Lm>*Tis;wQfyP&f(R zLmkjLIxPkU5Fa!S)%6gvUkJnp`FZ|B$eLvk9~2I|9zymcgZLo%D-R)OJA(M2O)&2t zg60n)=7H3+J~{(Fe*`2C+887M=*+jBPtSZi@bt{L(@)QQyZZFZw+Bzpe0%xy%(u@^ z&wTs)^vt*J9>`jJWH%$TLE(SF`{XwPpOfDLd`^CA2srsoAmHS;34tfSHTa+WX5f4B z8-xGJZyy3qe(Qp21nB`WdqD&P0|R^$4NL+m4x-pUo%!a|aq-)OFDJhxd_DP1;p@q7 z2fm*C=J5OEw*;nB-vSs;eQWp!4cGrCzfJgi^4o^rC%*;!IQeY?NZq%S-yVEB`R&4w zlivjXo&@h#1Z|kH_;lvmfsTvc7)maFJJE6RTS71-?V8<(q(6^#h`*USAT-D=$j&<; z15pPOAH_p21YYQGsoJ>x#flB4w|~82?L8l|*22#3`kqTmd^1!UR5CsG-@DfJ;{V%O zeG=PmXJ{4hn*6W*$bV*@a+9S{9T-gBu8SnQf zEcqI_dzP2W2IeI3sA*sCRh(WQ=DyS+zU%V87QYBxgVUzReKxbOUAoi~`_nJnoIdOJTZG0Ls^EPpX7c(&+ai+G)lJdeJ=OEGZ3k48uw>4~o1 zvg7A%AycMruN6e!%ocvWb~SH?;jM=sP6qo52d8RWwfX%^?pcN)`-D?L$9Mgjo3ZIy z^4ag7v_x#Oq%2j&KGZoCwIJm`E;CW_@x^|Pu?BHVg?OW=$oo$&d>Jt(3V{1nK z(>Vs*F&f)8bQkFTT;XKJJZ&~_h)a#BzQT&7yZvXpIh^Bec)P-*i_tAOa8hW3mC(Gp ziASgHOw$oeJ(_jaJg;8=!o2yr9OoWCJ@=m=k4@&(T|Zx66bSp)apDU@#$PLqe4Rxn zJhFHIurlj^xwhxE?^p0^4aw&pC&GFJM>*ATiT$q@!zhA1))dg$nt&+yq;kbSKK-K zzg4R5uS~I`;I3oKUwCZ%D%~uuG*!*SV*R3jItP~Xcs|HTb9^1M>#%QLnBLmxIWr&a zkB@E&{&mCa(EkT=&)59-wO(QS^OUn%mtg_FaPsp@9~M?l{vAL6$llkdOB(cE+_zuj zFtZ}wLUZcRD(>re4pU4%$YCh$Ai?#Q;w5v-J||h}#wX1a)o!vP?|RaNW4t{Sqh=ild0zjQ&3AUPzR6V4{yvQb zcNVNXA-iq6*0id_6DOrL`*rPGpnE^?)L#Fx8xz&<)c&n^de?Dww;EHI_v(v0x=o^Y z4Wip*kDZK~dosuTlYPce(0l^<|j>-b>yxt8R;#)3k8i)1cZ5;3MC6q24^FSXO)BrhR)1P{ zcM1QW#eN8LGbMAJDJ+8eCEX#gr-T9%sMO?SyML>mT#F;~ae^vXE&wDiW zZru^K@?AOM>)qhm?)eKJ z8wE{JV@W@0weubO_WdH!+-_-X%yYCvpX776MtbgE6ZPJAn}*qW#ifd;7v8+!RLJwj z{fHsM8FslZMlzNxO^5wOZzyERa~<7$8ePd5^RCCMa3#0xSSlSSK4X#Y&!?h% z?-RrCg|(%wysQQF0wXApbabrYmF=k+9Ucff<%ek(Ypd5Q=yDx_UGz{AF%z{JAPz^o9k zKw*>Ng1`mlE(%R;l8g&j89ioXD!49TaA;#nArm}$dK_2`S{)bhBrl`B!N|Z6$;iME#mK-A%gDeG2UQynr9o~@W@KPUVPs%P zV`N}RXJlZ=LXyj2WMIf;WMC*@WMC*^WMC*`WMHU(%2zQmFjO-#Fw{W#b&L!Q^^6P* z&5R5TEsP8dZBX$JMh1o+D7&ALfnfq81H(i{28KzD3=Gqt;xiZ-7-ljuFw9|OV3^Oy zz_5^!fngCN1H)oQ28Jb!3=B&d85ovB)vkontDrQ<533m&7}h}fYZ)0B)-hH(TQe=1qBbFrQ6 zhlrQGOwH~KzBfHs#Iru6{>NK`yK`L?&np&OW?RnATDI8EYVrp~zvLacd@0- z6Tg@vU~9%Geg4YA%d2Icu*aX7^J0qc#Um?i8a1Y_h}ih|>1NS2s&h+P+(MG`FBzIw zv$S4Vzhiw}C&TUki_a_AIItZMce!lD>M@J=+UwK#+q5ozzy9^dlVi{COE|=E$~PD# z`@ao5@ata}^A_IOp^ZzvXq+^^CYjE3KJ1V83p06D4(IsU>lN3hq-Lt~+HKz$`t$$A zd#i#bH6$KZblS-pGk?<+md)8`4DU^Fop#Yl_NH6Jj2B;{1+6|Un3pz7OY-BX*nhjP zt~|SN*{g=4I~&v`ym!Q1y*o*e&3kJ}-c2#{ud4*RXFc2AP&Y01lHuE3qW)Zo(+i7} znCr#amY$T5{~hq@uQlUKnTy7In%N!J=)ZYcIaguV8J7QRb~fsMa=vD=`FqJ$BjtC; z0$yr76Vu^vjjoK_eOzLx;?1+sjm)kaey3ji{r;M^Y}Z%Gib#$h=~df<56>>-Fs=^F zUUVXFM*W39E3cZo0;N@Cd=^x=LIso<7#NJ7r#el@0j3%!HI!p&i z-VLH4@o@|7hHE4 zfd*xe9aU@hHxX&A6i8||h(J=`3fi2H#P5W%K@>>o2Q>RU(fqH8mfsG+PjP{y zhfI(`Pz*Bf6`FhZpvBj7wDc5=7Qabo>E|k1dXYzp50HJ2km3Vmbsn1jXf*#gqvemu zX!2*!^8bA_`5ZKU9$NhGLX+1(OaJfD${$ZO_Z~qDkL76PSr1x#xk1AoM1lOTgciQf z(9&Z%T6%bdX8sej@-hR>z7(|hP(t&M87NXfj)B$(AJOdFhUUH(Xz_6fEk8S>h2I%8 z{pM)=b!hG>hPnkrft)r8DZPOB+GzY`XzsB`3y*tf>5m01{xs3@^L@1PzZ*@x4qEug zqxpXYn*DWX=|dhZ{x+l84{f%BybrFAE~14`0$TWOLGynSn)zSQ$TKAtvaM?QgO z7JohiCSNW-0ms99JdVfsI2@1ju{d%wfZaVMj)5VC?f?HGEbfNd8^9Eb#agJluf#Dh zETKTZNIV0>6Sn{VC!yMp9PSQG#n|l!`8y<@fx(6S|NnBR{&pre6n}?f@i!>F^u#kT z^sxW`?*Y}<%;e8!P{_r{;dmGvI3P6};u#oru>b!LIzI^%reHNpj&MaFHCN&p7{1_9 z14)3+#z<{ zNnl{e;l>?Spm1PFWMEjq{r^8`%m{}+5}4Ak*a1yz4v7p5Ke+$@pA7W}mT*X5D#NZH zbY@jUA_GGN&;S2%Q2lM7cxYw@We-;_J|4%zd>oF)z_AY+=VM^lkjTK$!SnxrA5=YB zo~lJlT5g~s3FOZgi3|)6c>e!az#Wzij7&jT9O}*u(yx)kz;J-~|9>;Mes9#Wz=f}X zSqfWO;0V^A0n*P$UO0pD)QThq1_A#6|G{lWEMGVMo1A_y9b71m>7knT!Q&Jfiwut`!UxA_~5k<|8R0akC zG5qG-No8P&5yM@^g6v{QV_=v;K#fWo1H%;pc6p>RFer%Q_B$v|(|34iXE?DBnfyoO?^f*H5gEwgm40puQ!lN1(i64oULt2bHq|84L^_lK=mM+s=q`)(zTb%S9_@ zK}|MrxOrqSFf5S#|6dPx{&Qe*!V+%okhW$=1_Q$cDMY=7EpAJ(Xm^2@^CvPG7#>Ld z{|}m5f#h9`wrT)VGO|0jVa(9rb5+bS7Yv_s4Lj!Xsy1Ev4}zml2mPGmALd{FxTpA9wq!EII-i2DPW zR${T=nHwB`99awu2bBN+w*yTS;&4Cner)x-6U6@@{Tl!O|ApI+8UD-*vFUf?29@6( zSquyfTL1rF!4iJp_Gl2_21e#YYzBa;dIpdgXR;U=WOV=ke*>EI!{&z|z6XrVf3QWO z6Q~XVnIVwPz;MF+|Nn)cz8H2hHZU`9!D$Al?h46fU@-ARZvQ*-@qpTN2~2UYHXXFP z!vN}{w`4OgwD|r1uMUcP7e0kpE=Yq9bcX4IYzBrIe*gbxf#e+dI1uf_QkYT4_*gu+ zLFSyvW?;DE_y0e5*u{~LqnXK%52?!vGGP=C;t)s>yYx*!?9#UhBA38x9vK3zL1-Lq z4(Pl3t*7tmw>^DVzdh-@idC&Z|J85vdar)7=)d|crT^-;3H?{UZRx-IZFle0Z#Vj{ ze!J0o_1l}?tKWX~U;W0~clDcW-_>sl6Rv)XnQ-;nlnD?s4@|iF?Zbqt-;B}hcoBRJ ze2%W+#H(Q114?sDyZY?|R4xoEmJOwSrd|E^11eVz73+u61=Fs6V+etmIS(qf5lSzZ zcJ&(vRPH!b>=u+hG41L%0jS&)sMt3s{bSnIZxT?s|4=dENf7rcPrCX|0V-z$6$^&a zGSjbq(}2pQK*cJdbinkh-wdE~-B7W4P`YLM)o&J1xph#ngHZaw^sC<-pmGc|heDCqvvP38g(|T>TaRl{1Elc|++bGp>G%fXXF6#VVlmg&9}BB|znRp<)Z6 zG|$Yd-!hsa%&XrjpmHyuVzNsh?p-tU>bC}{+*hca z8C34c%&XrzpmNMpAnL`TG|Q~3-zGril%Qf}P&#DR)o(MPa_&&E2q;}M>*}`!P`Nay zSS6HRGwbTN6;Qb@sMvHUeP!0wZyTU;v!P;Zp)||vtKW7&<+ee^PC{vy*^vAI%Z{LG z=GK&};C=5;q4b9-SHb(?e?$39Qz3j_C@lh|rKes6-`}e=^(y%8BRwc>2Bqzwv>TN6 zgVJG8Iu1&wLFqgwT?VD=pmZCQ?t{|Pp!7T_y$njPgVNie^gbwk3`(Da($}E$Jt+MQ zO232B-=OrrsaL-}2)Xu+Ay>K$TpzT;W~bM@PVIaj}JnRE5q&v{qB-I#Or8`u1+ z-<0NG{q|?h)o%)OuYU8Gd-Yqv+^gTL=U@G{X71H*SLR;*7Bv6rw+xV)xmUj#%)9!n zVBXblTjoLH1~g>rw-^%U5sM*l6TcWDhh#OFIV1eqw+Z3bzIB9O`_>SSS=PeL0yT+B zw_g1Q;#Y5lnBB4k!f)LQv7;YK&)SNx3)H5_+zN?jT`0{7rJrtri2sGsAEC4&RNfLw zi$ZBvBy+)zXJBA(2)p);VPPB-(y%y83QYgmclDda{;S`99=Q5V^x)NRDf_Q}>)C(x zo8iH$-`4EE`t8R4tKS$7T>YkT;Oe)416RNKAH4dloPd4gZwD)?FyI;@^`~# z2pbe831(L?>MxLfkpC|%f#?T?O~PG>9#D90m<3=ZOhx(Fb8Md-C}8$z#r z1JN@=uYH>kdhHuX9Z2p&)TwU{R;RudFdhFEaPic)4V=fpVOFdJS%cRAr6)q^g;07c zls*8ZFGA@DN|5t9ek(!F>u^bDU;s@YsQhIHpV#qWKMMnB`UK=Q(6q{z{Vd?~IzUr+ zU;q8jx0rYld|tj1eAbY6$m)r;Ri=XJaX1u{~a!N&xxNrcH?@VxvDbS}q% zZzsM9@Lh(Vy&*8K34DeF=nM|f9(M)3%iktAUjpx82JPhqoxuUxCk;AN0d&p;=-ds^ zSsS4J&ZArX7G6(0*jiyIjCI*?`ckOxC}mnW&R4nFq+bdCk+OacSl%iwbiK<8OBd~5oa;B^UnmIde>3(y%B zpgqK(^D7d*9Qy`3!(u`9CGeRXpgr;*W*h>aLlN-s&^OSTA`3c>e*>LkVIXn&+k^T` z-xkjD| zuz=14D9Aki?Sj^2@V@R1!I!^*&JzKhp8z`Z;DY7lZwKrye=AVE4Bi(%q4D^)2XU9a zH5eQQ?_FjnJ`O+A0d$4~=sb*sj7#4p+&u)|`wZIm%usmgTY|=A@EHxDz1E;J8WdWO zgU_yDxN`!$&-sGuG052o3=9k#a*u=eHiOP10iA!+F!2(2uRZ8Y1<=_E0$+}Od+_bh zw-3$7;pZiQ&XED_M+cpeP_XUfH_(25(0K@;z3&V3k9`B3eF8q;pz6{$1%cz=J~STx zwn6MN_)LQhuLQmad^iR^#{jhd9CVHW==_2MMaRKs%}kKw_|Cw6{M!bf%ilof6)=Qd z2JcG;omCJ3+G`%b`TYaaiEj#hhrnl)fX-9c(02S=04PjlFN4o4Feo?<-rEd1qu_$- zPz21d%+vHj)Tu<3Fy8AK1%>}KE{KUhroNwLFcD@kU#bf zbRGvo(eZDfvu!}<8Gz1{NZ@S#b|Lr5w*%&v!Dj;mbRGwv^U)A~349I@=sc1K)tA6$ z2^0t({}#Y@>RW^6W$@WKpmPrrN-lkSaN_v453R?)3G^TOwjlEIw*^M0zis$_2z<5# z1NY@`p#A-zvoApV_(5kmfcEDf_;C7LK*6PN32eu}XX}9Wq8Cg&{q4b&6X0`JK|Hi841_E?Mb)>PWzyA-ynPW zn@Pg8Zz-TUTITY%7?8V`T>1t|mmMH;k}iEq0Qm=+79UKw^lb~sKN~NB(;XYC*Ffe2! zT>G{r;o3J)T=RT5@J%A&+BchoYu{FYOX?|m!SS9sDBFT zzk>R=p#CqYe+=qBgZkH?{x_(94(h*y?0OJTk1>Y`zd+_!0H;46?zb%lv@~vR;KWUjD`) zbmg1El`G#iK-+B>zF+>9@Z<8g2B$0E44kig3;22Yo51BO-!}ZZ{O!QW%ijzxT>d6- z;PSVCjhDYY_34f5g6#icRcHr;jZvp=hVjyu4 zp0M-Ew*z~we0#9}%C`dtuY6NDe&ySO!&kmJ9KG`G15|y(iOb&t&RqT$aP;!G5A!d7 zyYT(Ww-0kKf19xR@;3%XNIMf`76>=|2ibAuTLS|`965Xz%z=atgZY(j3JsUP1zfoD zEn&swZvsm$e`^T5@~vRL*zHu zUHxWYb@kf?%d6iSEU$k1U;`0f;BfVufg^++5OVcffD?p0!5Kn>{071kpz1%EUHzuu za`jt*>(y@)Tp(&5fY@$VzZtk+{dU3q>bC@stKS$ruYODLgv$F|{pR3%_1gyDtKSU# zu6|qKcl8^C|J82^{#UbD7j5I)E)AnXuy_1l4KSvDXp^pK(aq-bJQfHvhwhP1|qvu|2z1V9lMm?Pm57dF|`9t9$M$JwEZ%^7I<< z`!!D*-)#}92zGCI8Yb{6tx$EZeF*@6xc6Gb;{hwST6<7iTe<`QEGP-4C~? zzb~;jwf~~GJ=@q$V!MP$%08D}s-2$BkDuvOi@xtam37{@_GhWZibE%2Y zPBW(p20OK1IU%W?GTVGj+c~Cbc{WTN{>gOt?HrwBZp?p~uv( zdVIn9tCs7nJd;0v%k!E2T5M-`OYeEi_@TBq^^{d_J%`x6N4t|v{~xzcdb*pR`OhlF z5AR;=etqhJYWUZ4Q(Rvy$=%iCc&hF4?JqKmgw_9fo%`?8-QdrtnLhc_)7qyDH?_Xi zD(nte?yI`=#KBibysol8+@_HJrlW?{BlPA| zZ;#u1eBLZ}YIz>>(s`xEs_Ko$-s`>z6=a|5?7HAg&i7(r9vkTx%|Dsbe-=hG#Qf3X z|0)pCwlctc_LQ;@t4&uVi^<9SYp|~QJ9k2%ko@LvlPh0eky-p=t7x(N+m92TGzp#2 zEp_cwNSMMEUGtIgzJf*OhnxndDu-=dSvoRLgPMEz*qod4-U+?u`BA!2skdO(L~fPh z=86CAY6yO3w$(S-ufM2V=TLFv)NfJ}H^1w6ysB|v;jLrUSh8|e!cpJhbXiV${qvrxoGaqP^F}Ly=#fi zN2E@y3S(2ya?ibU?mc6JkgmT>op(>Pak{qccEL^FW}c>>JQvudebzod*CIl#()B^x z!-JJlySVSK?(B+M!TeR@dXa6R|A`%yT@Qjy#6vjZ!u^|M}zDppZ;4fjRcEWSv% zGEdfzKKeE0NMll}oP(-9ztqOE?5~BpuK#J`^L-f{C>3Qi+_l1mCZ|i@sJ5;fD*?$8~m#?BfO+5do9WK39xsSzo_0$9ZbYxk%p{@;nz)$pQVC69GRWZdAd4p;oEc53VPv=^zkHMAa>ZS((e zx4xzcb9$tQ*2U}L!UrBE$OHsP`>C9dnYnO1QylaDs|PMzTXAn?roa8|^-roAx0^cD zHamB{>0(bmMd`k|T(Dardcw;| zx1T(k;ih+QEuCt1j#R|7okOeVpge56%t& z*MI+Z@BZX}+j*ly#ra(uH)>6uIZtZA*))T#%nX+2-s$h3$ZLCMLVtH+{MLt|1r~uN zH@?}nva#gsiu%W5KDl<;jOUH|vgZvmen&srtZ-((P4)44c{ycluLLJ^=c@XI8(~w*qd)(;$#K)TH!=0| z1`*|~zK;)MtUq0=>d!fPD_i1+XRW*8D-y9uu z;e!ZQ{^11^)>f;_HuP6WAFq0>^G?e^YF*&JjPsgrHT~BAQhlT1$p8AD$0j9fH=X9! zHViG23sX<{UAejS^uBwQLQgn1-EH#mkT^L-;Ew1vi7lSW%AMX{Z(iB;A|lss@1#xd zR#cv14BC`7sj-UgZo*Z%cC-E`-8R>E zNSIMjzPG{GH;MB}sy2(%M#t|TC#*=4p5C6}7hmh6vF&?*@A*B_<(|=HTc;l0%~`Pf`g|Yr`#(EpR}~n z`cT<-FKp+r|5);P?@~57!AGBd&O7qWTeU;!Q{7(JcHY;UOigmfz>1S0wZD~#C z>KlsL-Hk-HZM6&gz!>{JMr+l)*OTUc6XeR*YqI~t7^ctiV0n+sFV~GtN#VJ3@5YMo zai5a=DmSUI^YwvyyP_7XJN#tss~efum-Vvd{L@)4Bv2GLTkdYe%_%oOGX-9J)Wz~< z*Nv?E^EFI*_Dwj?v2wD_`Dv>acfb1Y!l`n7so3%pORE;&l0S1nWVgYL@I!5qyEi)8 znwC#HvwL&d4!=hlUycMT^PSq~=3KXi+2habSyvt>AkJsrVh1q=4p$ro)e%m4c@!N&)Yu|Ph zUHfJr`|%q?0d%~k2tsp2T>DlLaqU|{1cVeQQ7x?})he?Lfq}ZyFKTzF9mi5j5pnIC$%KpF5_m3sV`l)Ztbv#k0}V%s zn-$*^B(uMPwzz=Sf`hiIf#!ETCSLq@V&cVbQ~Dui7|A+-=P~|6bTcr3<}n&TW=y#F zO(*r*HwK4m-$Jaazr*A~G-%FaN8z<^F@=ygVgpUeFfcGo0bL@)fG{tjebE?%E?ShFD_0j$czV_iR{z1vbZ!bzNe)~{z@!JI? z@f#%! zOc)M+W6(MHjh#USuKox#96{-Ifpj)_%}gQ#BwoSgEaSm%Cm0WYo56GtYkG~7JoxPe z*o=eUKIk3!#vpJ6YkE~EzxM4&86?hN9zFQ zHxL_H4jWrWl$qfP7v$_2nEVy6yW!<5M)CutNpN~aOP3&V5Khj|jZZBq0wq@?u$dbU zd}FA%_D$v8fo~_Ou7S%~P`U-lRa8OzZu0KHwUZ#hWvAah~(&AS8No*>DA^!-8N!_;A;zYwVon_g1HO5Pp#W&#S&{Rh5rFd#OF zmO#T1lwKWVvcYRsK-FfY?0Ha0G321+_y!#x7t4 zom2#3F);AhF)(~#WI*yc149eQ-H7rPBl&^SBq+V2OMt{dI43E!NY_Zu1fF0w?Eki* z>e@G*xd*;g)LsLZv7mGda)CxI#P23^4}4oP_rSL~b0OhbGxxx^7APB}4upH=9{4t8 z?tyPEa}Rv;nS0=y4U+txxd*--nS0>dnYjnPtw9psGWWo@J97_w3z>W1Tgu!6-(uz- z_?Ckt4>A{q-^@Mm?Fo_`NZ%hMK1>}p`U{cju<0d5tYj`Iz3%_!aDD$bcJNM0h;9{V zID*pa2bpZ}nnILz?8g1yPHf!&&1ds|aCv~9UJFj`|KUV_N+klvY9M7G&RzdWhdQwC(?< z(7ykhL^~urf3)rY#sFo5)PXQZ`~GhN?fbtSXxsnoMBDyvJ3wkc5)2Fs7VZ1LIkfNp z=Fz_Yn+B3TgZBO3BHH(VyU@1(+k>|K-)^++|Mmh&A5=S-%4pyJEdfa{NM8jKAFK!m zQ9z_R9NLK%{?NAnn@PZ~Zy$c``o_+n4cB)C8jhg!njo9~4b(4T2c6jkYrh8W`sNY5 z>)VH*UGVe@I?oqoK+c|B-xwC`|Hcro>zm5t{ofc0_G2wy4eGCbyHW>1nPH?D{?ZEFp?ikX+4hf z|0Zxj_5vROZCGIdu_5RGDKN;Rwagh9E~r8PfJqXNHH+L@EryQ1`r0xfiN-W z{~@~%baosFgY<&J3q*s~6NA=bg3kZrT5ayDHN7e4J)5`Y$>$5N6s-1@0;v&zmIoj; zpzs8(K>+yywC54DwFk6D5~L1PpU+?rWMFV&U}$1U;FzqzaStR1(gVYwbr&Eu=(q>i z5hlp}5s;an@(4MOK`mcUZw=fU6x ziG)Ry*w!EM<-cm1^X=?gO1=2onO?2Rffn zL6m_3bbf;n124l|Mh1ok2?mB@2GDs&ybL!O7#J?_F)&PJ0M%c-3`;?L9tH;RR%ZqX z|9~U|Lm^asG3cyAQ3i&|P(G-g2D49);p6|4APye`!*r$pclpHV>A74Osa;7#Kk1 zD?0-R11AGJn9aq&&cF?3foRYQe^Boqqz)v*#J~zZ<(8>|g@KKMiGhiMnSqIcg@KiU zg@FltMlB-)1Wr2ti3?N@fXd{(pmYf>@0l1F83Zyjd0}#}JONSyGD{FD2P&UI`2*CK zLskQ_r&uzR6Qm!c29!rYYCvj1*$re4D+3cl36dI6z5%HLsfDQlxxV#$GT0oD7%1<8 z)PU52_#j_^&IJXP*`Trqq?Un!3)~lj$g_aY83oCM_z-z+usletSU!^zw1SR_34ClX z1IS+t3>*v~cY@?WVE_tMnBPG4J;?qIb|6&@3|pY|4k N}sW3U;ynQz5t?`7#OaA zXl4e68z7p6f#D8_W@lh{0HV1V7@mM=ZU%-IAexVX;SGr9XJGgMqJ^28JIX zT8x3=4~UjvVBm3JU;wrE1VA(k1A_>NW@TWI0MTp=3^E{^oq<6CL~}4OsDNlr1_lif z&Bef=1EP5t7z{u(F9U-Kh~{TtumI753=B3PT8M$c0Yr;1Ft~tdF$M+?5G~2T5ZwHR z;|1u@+Q!4P%@`QEn;-oD|G)J>3G0hC1_p-aBOK9(8UAkuwGjR<28A0a4*o9&9he6` z&FCda`TxbBkj?-}zq|lyOfCkcnhcQO%L8D(1Zc%4hHnS zh?f(7D_ab$F=&=7WsN0D0)80GJPI$z_0!I(Z4YT=hTba#)58 z&@mJ*Km7au|AiJa0|RTeDFZ|E8;M@fdB+R^FVtB7hqj{qF2V0qVcM~YgS`U=)hIT&fO;LH#$)ocB!pXzEWemN0 zz|E!?*BLZhke|)}|Nnoi8KjC4YFg(vnETAZ?u!PQ)wJi||Nq?_ttU%4U%LGN z|G&3HjiGze2auVUO5VbJ$fEN9(#e-9|NsA=00rG5h%gHc4-0;={U6AE>?WWUL34`G2ALh(f0uNAnSx z=(zaU!xKR6?rrwC1y1Jwi&+dot%H`|Nqy$(13@AS6J|in}0#R(=-P8PNaJ?D5-Xbs3?G(()z7b z4-|3TE-EseA}XDaI$czFdYeC-{{R0)5E}zS>w(S>{4Opk9L+~WqT@ixr1=fY{}L62 zfS~_k%|`?v!idzDHsJ-R!N|JX2xOT=cLOLG|Cgx9{GYG`bTIT0nZvJnp|Jp=f?rsH zo!14{!O`6eb)G=$fl}q(W{0!?|GzlF3UUem)C0{&IQX|6_2y&M040Fl^+#A37&?7aL_+^h z|H00{&>Ny6(A#_g2WIA%T!Epbpld z1ND!OibHpZic7bPibw0W(g=v3Izvn!1cJ{l0iXQ=K6@m9Pa&L7!;w$NozK9JPa%^} z!v)NCRMh{}1jj`|`=S^C@`nu`qzo=@4LLU~u_@e9oO8pFk*|j0>NF zE1!%rpMW#;Odc0*XFdr>J{du3RZf8CjHzdp9GG5${d?GF=Zh*@%Fo60~cUT!1GQJ?rok6&x z0_l7XH*Rkvo-?-x63>m>7m4S{9e~6G#k7PQ$iWI8;9!B;8q|S-kpHIdW6vWWr zgR2Ak+L2GepHF}R)EekvV_>-P<^O+BpAK|R4(N;!g*q-i4!6U6EUw%xd@7FMICtSQ zaN|>e2RQ?%ZaKlmz`*kr&sl1Id5oVzqpMf*t z{5;Um7efa-1H=5U|Nnzpb)fPU)KHtl&cHC^>;M0-@f=Y0-oVblu;lCi|MNhK5c$a) zbZ#a%KRNRmFnJ=`<;dsa!sp?_=i|s1;K^s;hBePZ{KCV*!0_Vh|No#qK8jxy(EQ>I ziwQ?Q16NQ?z@rr8Dh5Xe1_scuJIvi+K_~$l-vTwDK;u@RaSHVDERZr)1_tnI0#IHB zwOV0e0+NGa(D9|9bp@b-Cs4Tr5(l+_K{N;>9Z$;u8jk~sfiS2+45C38)Pe=IdO`C~ zpfMYe7^v3=Dyl$i7zT}xfyPik^%_vAu6(I^P+Yns5EYMyayb4AoM?+vV1V%$(Gz3ONU^E0qLtu!7z=G~; z-xy|I`xelB?c0Pd$b9>Oeb>Nq<)HhrK3sVLOv$cvuqd+ zK+duO-8&3wBBj%(nvY62s*oFU)weC*)^oJKNTL!g4eb@_$%}M0*D>U4CXWFR)3GVCjK3C?guQ& z1D?o!XE3P#4w{1puldic`aZ4m+P7t$*S>A*y!P!_=e2LwIGsAJQrZr6q`ZQ160)p#h?dftdl6(ij*(YbGG_ zpq4xX11QZw_@ETYz~BK&aA5a4fk6h;0Ri(ty%xw? z3W$18N`lO0?wH6RQD1|aGfaYN!d{7S! zbl4Y&2htDfNii_^fQIhD_Cp;Gk!D~pIUFL*0FoC2&8zb>Fa$#Fmj=ya3otM&g7QIkDMmo&wL$&` z-Jh7?067l}#0RDQ7$kXTMh1op{0t1B;bxG1pgRylkmNykAcE2#sJ{r3hvgNJlR)lC zL~~y@8oz`Qbk;ZI-bj%C21W*k2asgL04hO2_Zuc4@j-Vo6d>_I_Z>DM@j-VUPC(*M zVPs%H++D@X0J{J11d=@H9z+KuKIlF~klR5R!iUdXmVTRLa{spBE1xW@5(D(~TJ(4sy{;q@W&4lJZMg~EK zr;LdF1xnu_dtn%4|3^j!h7zRs_y>xA=(-A!`5a6P3>&y0>li?MIVJ{%3($2LAigdW zB>h9olw>erVqk!+^8m@)G9k(nCI&tRXOMpAIuDS%4-*3eY#jxNAIgMShXLZpGchpS zLCQa+Oo(+Ap!C)TDodg3EJxiGb7} zVPasYftDW(3{ngyQT!*xa1~@8bR7yv{WB&8hW(IY6P#cFFd@n-Mh0;PR%XOH7m#{> zW<+=~GDtE=Gczz$AcemMXs`%sKSa8l>NwnSlXTo-;9UGX#RvLjoVX zt|$$O4_fC^fW!xl9rYmbL8bLVBtA%fI}#sMdLKvQ-$mks%zw>{h%eB(p3g|~pm8dG zP(p^f4`iMq3j;#|G<|{8Yof{9BJn}ydm`~c?u$U;gWO-vf=E9g^XgFKKmPAP;)Cp; zkH+5);zQF9NdJBiAL?F^`45ozAp75g_|WtMQva0&5x*e*UywXhKgd2&NR22B7H;v@Yo> zD*3A43BM=vpSQHt?z@h`yAZwB$UfOCbRR4T=1m z6mV3!1v&b<#=H8tfEK64gCZ8j25XH^EJ`l}#S3_Cl_5iXe1(OXUV3Utd_i)2Nk(a2 zwq8;NSRS;JDjw`dhWON!#F9j?D9BR`;1~pRL4gQnfV>E1fWse~u_+*9-96*uA?^UL z@B(qbVUJBiaVE&X;{5oG#Jm*Ha=Lg(b;a*O2%SM<*ZG zc+gTbu(RWfO7j@Ni4#{SkDAwJtXR~MVKyx zTfhkgW&kMt!Iv$<)Pfe}ftD}w!liopiJgAbfHA*&ssc?uML@gU#9 zG{8&;*;-tgiy@3{d1guu`eH0NL?d6BO}n-$duHi(sTxmPtX4{=oRIIGrnGN zWo}7g5`$iGNfCt3fU#04^AdA2lNt2V^Gfx~Qj3Z+^Yh|U81(Y;OH#pNNu`-NDY}^{ z40@>FDICTat)t{eMF{Xw5$Z!;kxrhKLCRWc|MkTHg;;Aq#9`W&mMu6(<1M zgXplEnZe;S1RL-(FeK=ruKz!=kD1}bIS2;zr9c?eO9xf^APgD{fMHNG9E3sQAPidn ze@2>_0fueF7#KhpBnQI8tp7)L-vJf|1`r161@!|!G^j@n@;PX2f7k>zzP$HYEnAn_ zI$qpvJBQ!s$7|5K!VL@z44`ozP~TTWYB-|kz&JsG zg+Z{1ft!(qfkBIxhhZ*@#!@CnMuvtE1|>!Y2F3;k1BMD0Mg<|Jg-iznSsi6q#2gtE zSM;)~26`#6w1O6+Iw&+KG%zu6fYx|A35T#WFgAepq)R3+DokWx5NJ?kP+(XB>OwJi zbh0usNH{n!GzhV9v>g;_b6{X)VPI?wQcx0=Xkm3=&;U&z?@)5EP&mNI!O&p%h*?07 zB?Yv;-bsi-M8$zIiBBMI0|N(W3rY)!VBiq|-4w^b(81!+AlS&T0Th~`w6K|hfdRHZ z0JOLYG$yeVltCC67n4%!C}WrL{Gpz#L=28N3a zkTHyF3=H74{kK4pP<)$#f#EI#q)!amr}2=1f#ER&1H)6O{4)jyhUW|n44_NcLE{ z4rrW%myv;i4>VrD$iN`X$iN`V$iM(vhAGL&z#zrQzyP{SR2Hg7o{@n8bRQrnVpSO# z7(nA5AfvSy85p#oYCvNjx==PqP9MrPWMp74W@KP6Wn^FgZLhY0irXhtn30hGJW%n{NFo4EMCNeTGOlD*NkBQ7;WMG&Ll?Ryx+B>y~ zk%0lUND{;cjdL$&WMEjy$iM&^6Isj1zyKQa2Hz(KQUJx985tP1GBPl1XJlXijg^4z ztlJG5!(e1!*w4to02&`T2({-3BLl-xMg|7hI&P2=Cm9(SPBAhtoMB{OI0sb++QS8s z1FiqQ%*eoSg^_{bDpU?MUUGwxf#DV-1H)ZL28Mf#3=H={V@Qk)43D5{Kw~JNwdt=I z85rI&GBCV@ii5^ZK<0jCgzOXk%E-U~8r1*J$iVQMk%8e4R2>5o0|O%y0|PT?tN~Q| zFflN&L)oD56_6QRObiS>ObiUXObiU5v3emU1_lwR8c`@M$;7}Q1!c=JF)%1HF)%1I zF)*k=#nhP?7&M`5keND63=H~A3=D=$3=GCh3=HN_ISVER25Tk;1{)>@2GIBnNUc2+ z1A`+I1A`M(4QQN(k0&b8g6WgZWT)sYD;GSJIKuv?B6+jejfi=#NKoAecr1ylD(Tn+kjup=$9Zrz)R-HUh~ zrFTzH5Og#=pz&4x{45$b>NT-W7A_4TUFcjkRh zT-mWr_|W7_%XdGXR8yDe_C_-I!7t^!}x1dsZ)a65y#j)2Zc>$bKgI>YW9Kx9b+)>ksqZpLX5* z=LgvvTu0l*7Ct()WBq6O8^^R<@0NzEZfTgyBHTAKq**Yy($p{PtFzk+1>wNZWny7* z;aiM*T@T&$-=leckJhcfj~Q-j&0yN&cy;dAuzUZ^oL#TJx$%1A-A0b@3)3cFtL=|| znrEgT%bRxa=I@F%o8zVSw=8m#JI-=>r%fv7?OU%;MFv@h)@A?yD0sZ@7gOztGcSJR zHOzb%^HWo+ZqA*S;>2FZj%VV_?!WqY_SWO0O!Z1O-^4F|k-yRBS{U_msaO1`ysZJY z%lm&h<;%!18h;F{yKby5Z+`vOXU}=7Z=|0ztx7po^7tpSs9ImeNAYy|8~^v7ogB&4 zx59~C@#@4^ulD{_yz)R~LC{mKi;M1FF6uRyC)l*kG{`$-(xF@Yzn4!tbkgz%!);U1 zOFZo+x;0a_+>Wf9E4)d1R$u5xsaUTFL&;k;s(+o1{hPJVUg?hT#YJ~bT)F1Xh^<}s z@Lv3@KIM-Vy$Xs?T#Bw8+1R3U$@AQvfSPq`Kb+QT#cVLy+@fapdf)Ai81)dB_f57> zt*8Ak@|^sd+a>?_tH7!Zzr2s{Ot|M6=+0^SueBoZcjWrcfIBJt`t6!G_J{>7spi-- zcSG}*rFRz{>vdzC<0yC1s42JR{ff|G8YPjA0XwnIzwzzjvQn`K_yy zCM(R3F3@aq+^u-q_H(?=x>kmA~HFJx}UJ z(%L0O8T+PO(0+Pud2ambw|iR-dadI0>#n%tx?Ec_Lwb4Xp9v-t&F`EEH$1w!ep{k{ z+tLYVyWX|g@N}D2K0Ix(Z-S-C&B6#7K0ihW&8tOe_Z(-(K3o}Rzjkt`?Q*#pKRCH0 zZ)jPb*psSx)yDpKtDc1A_J-BEr=A?SSp3pu?i$hXN|9?PCD%E=ZK)8yub1{R=Qa17 zty4m*^iD1`hkI>zb+aCIy}j5RWw3Ll zl!^MJX@M`(PO9uUuYJw@-r+s*SNA^m7xla*?VD-%O}OMk{A|xBYpyJ9d$CJI=?2dV zrTvy~Q<+V-XwI-PGqc!sA+cI4;ONGq!J69?zaGyCYWjGT{p6(`_y7M3iMyC}L+eP- z9?m1_8oSS({3bIacIM5kpUq0DR%CDo>ouK^le=js@xt)fv@cJN6)a!vW^(gk;5EMs zPqZ^9ZB`d8ntZj}a7%Fa-Y4&8vL}To^#m^ZRDL_mV;)o5jXdfG@xEbx!kgcB!>zX4 z+gpBbntp+g*JE0fJ+r8qYHd(5|GmH?VH!zay~Gyk#@j3HJ|Drwo^t%x@zwknx#k2u zembqqX4c!f2kM3~j!#2Qd{(btTxxH>;ZNRHVROSJSH9S|dg`;c+t1A^c=}%Y(o~0M zSugFp%d6E_@qm_Jf~p)i&On-`1C24l=HEaHK>S<~0pfu7S~4)S!4^wG`JX`@FeLed zoKOx_{yS)L2`U6KN)0+c01^W6+0oRef;vVZNvQru(D^`+5J)|Ix`zR>xA-TLdq88X zCZL6yAjMGqfoSeKj%NQ(a0e8k0i<6ZG_VWdg7@MYqv^kj=ALh$P9Ku`c}VU7x%UT} z`afvur9cY_ko4a}bKe8Vv?^Ey$UHmHWEGeP+Uv@|pp9l96Po^FH2ojY;^P&XdEIE{ z?Sf4Ef^7uZKMj;#z;`(M^9guDR=$IFZ}HSIFmR~+{|{>Wg4PdX+>`3UXTVgBWdX7) zHv>q&PaOk;h3fzRptdPQKiWN=E_@DH^*eKe`_nyj3=AvO{{IK{86f(>dkq}nYokH- z`(m-*otr5Si?AEF4;E1m&?csrcNx1!FP>c!D#+C@~rWqaiRF0;3@?8UmvsFd70RhQNo2>)#ecT>sV( zejPNFj-fkY_ARX9Fog?d-}#-y*IxtICk^f!@W1Z9XNLL+n>ERzlrX< z`Au)%&2LuwZhrIKck^4~zMJ1F_uc&V;@Hh^z58x{6F7eJ+tPhEzwO_5^P9=>o8Ll? z-~3i{{N}eg$8UbSx$ow;_xo;sW88o9o7n!F-wgNP{C42@&2OIjZ+=VKfAd@I{+r(( z9KZQ(*8ZE{Ht)ar?ZW<>-*`^k{PukR&2JVbZhrf_|K_)d6F0w!9=Q3f=ETi!TTa~k zrgh-vH;)51zg;8ezQM#^V^A2H@}4( zy!q|Rshi(&58nLNa`5K2g$Hkb+i>vax9taSesef|^V`XTH@`hRc=OwzgEzmWoWA)@ z=+Mn?3r^qsrhN#a&Js!o9=iGM#Oa&g(huGIR(j~>w~j+Mzs)~%^V`-#H@}@dbo1Mt zLpQ%MoVoe!^P!vHOwQc=CV2Sfx0o|Gzv&&m`K{y3&2L_ZZ+<&-=H|EL!#BUNoW1$2 z;qc9GHfL{sD>-}f+my36zfC=S^V@~9H@|H@eDmAc!#BS@I(+lnpR+f={XBg08{d(e z-_(xW{APLN<~NrkH@`(4x%n;o$jxtUM{a&wa^&VWg>yH*?L2bxTgthc->w|F`R(PA zo8K6Z-u$-a+|6$iM{j=9J9_h*-O-!h!jInkmVWf+w}zuPzfC@R^V`~^H@_V`dh^@e zqc^{OKYH`qg>yH*aUHw)&EWh^oM|-o-py~N_ilcxyLa^V1 z_iujFxqtJU!Tp=xOzz+OW^w=KH=Fx6zd78$37RfoIH?Gkd%g*!pFrvNijaG49ijKy z{wW5nXk}n3uK{?R09>W4*x$g@3{NEW)-+;$4Xnz3A z9MBy61gVeT7&5EAo4H*7=H_z!TbRrBZ)q;qzm>UM|JLSm{o6E`>))2ST>rMs<@&c{ zF4wV)`nNRK>)*;;uYYTE zz5Z>Q>-BHTT(5uI=6e0xG1u$guDM?S_RRJAw{Nc3zp=Sp|0d>k{hONG^>1cw*T1>B zUH=y5cKutL+x2f{Zr8uHxn2J@&F%WPWp3BMZF9T+?U>v3Z`a(ee|zS3{o6OU>)+Vi zuYVJBzy3|l{rWdE_v_!>+^>HNbHDyA&HehfGWYA>+T5>yo92G~+cNj--?q75|8~s% z`nPND*S|e;zy9r;`}J>Z9@oE#d0hXd=5hU-naA~SZXVaag?U{6mgaH&Tbal8Z*3me zzfJSF{%x7Z^>5oeu75k`asAshkL%x_d0hYY&ExtvHqYzd#5}KmQ}ew3&CK)qH#g7g z-@-hve@pYc{;kaO`nNXE>))n%UjMet^ZK`Kp4Yz}^Su7;n&1Nb*T1ECUH?|*b^TkL*Y$7Hysm#+=5_tsHm~d7j(J`G zcFpVhw`X40zkTz%{*BH1`ZqD}>)+J8uYWW1zW&Y4`}(&q@9W>vysv*N^S=JA&HMVd zY2MerE%UzqZJYP?Z^yi^f4k;={o6C|>)*b4U;oDDbN!o`&-HI=KG(mQ`CR|z=5zg9 zn9ucZX+GD#mHAx%*5-5l+ccl+-01D-^zTie{1u-{%xA?^>533uYcR-d;Qxn-|OG5 z`Ck9_%=h}YZ@$;RvH4y9Cgykjo0{MCZ)Seizq$Ec{}$$V{ac#f^>1Z<*T1#-UH>-C z@A|i8e%HTk^Sl1-nBVnp*Zi)3d**lj+c&@K-`M=Ge-rb+{!PvQ`ZqKG>)+h`uYU{k zzy2-F|N6Hw|Lfn{{I7qT=70U$GXLw}w)tQGcFh0!w`=~_zdiH6{_UIp^>1te*T0Dc zT>qvPaQ&NE!1Zr#0oT8U1zi7@7I6JrS-|ygZ2{N6O$)gGZCSweZ`%T{e>)a%{oA#G z>))OQT>thh;QBYV!0X?{05RHu76t=bp6}5pzGg`1zrDkE$I5UXF=D$eG9t&jV<{4H?iRB z-_(Mye=`fd{>?4;`nRy)>)+CXuYW5GzW%K(`1-eL!Pmbn3%>qsTk!R7$AYhayB2)? z+q2;7-@XN3|Hc+_{hL_G^>1n+*T0#CT>s`4a{XIa$n|e&A=kf^g5!ou76_-z5Y!s^!hio(CgpKLa%>w3%&j=EcE)f zw9xC{%0jPyYYV;pZCdE{Z_7fjf7=#%{oAq7>))=0UjOzi^!m4Nq1V5$gTUyxlZ)IWEzqN&3|28e``nP3a*S~EGyZ-H1*!6GM!mfXN z7IyvHx3KHq*ut-W6AQooO)dQTH?#2T-`v8le+vu0{w*#1`nR(1>)`U3!RxNbd=*xP zgjF}cv2Y;`;xaHWl&re>tzp&8ZxdJD{5E6N&2LXu-TZd$32Hr-P;~vqBPe*N2o z_Uqpcv|s=Bp#AzchK}ps6gsYd3+TB1Z9>QOZyP$Uf4k6e{ToB)^=}s@UH_KQdHq{M z=k;$3I-sl??(5$Ix)FXa=)V4KLihD= z8@jK5GXUvD@(akFFn7Udu=^Gx^n=vE!VH;>>}NvZw*kpKkUkIwnFYciHVDJmAQ}bl zx%KVGvRmI4oWJ>P6|~(0s%FW-Fh9cVgV{r={|cCI!qXebY!HT-4Pt{Zh!3MdY#4^Q z2}Xm~urWy9{5C=R<~Ie6o8JP&Zhm_pcJo^T)DDr;y$UH-wsG3+#A4k^P2$&gby+k<}Mfwa~F&T zFOwkAeF^3_zhQG9%np$I7^H806EME{Edhu781!y_6Oe$o6Q&PD!`uat2pmYd%cSRj4{nMq6cf!zbzO6bJTpdc&Yo#t(u)Ye+$BL&3{0 z1VH<-85sW9F);k`gJ96gc@PH4gW8KA3|spTqCso_K^PfKlLPr{_|el#hWLQeF}Y!Y&LPiCvnF6U7)AT6;iCzd@&$gU6L1A<6*0 zZw$0V1GK*rG{+C}qZ$JP1889nX#O9x;vaPW8t6n`&^~j0s7BCB0l{5evcJ*L~f-}WjL%w3+UlD<6kbH0qyk6L!=h_zO7)^iU?t(>tk zm92MqDrjvQXnkmCxz4@0fXoA}KZh9s;)Cu$gYiL2qCjUfBJ(rQ^y{ISzZQ+}ipGbnuLhY3vX6y{ zfnk9>1H*Ji(7GmWhE@g!2GG5bpmZz5zztsaZy?41-U|WZzX7d-mt|l$5B4uN!wb+} zc~u66OW->IxWW4gCcyVPbAwN_XaQvquzDVbhoG|&WEdDg`!7J|f!4lXkYZp+2g`GV z*SkANGca^Q`Lh@p7$yin&ItvnzXsZ)Aj8107%FcD+Dos@z_1+32kjl$AkM%5I-e4x zKAMq%!9W6`AGH6#K^%6+0yo2Y(0VpO28JZ4e$d$l3Q`F5r3?%V5BM1vK&Nzo%meKK zSRjcoA9OZ=gCYaNV`%tQGBGebPzLSMfrKaM?1};*28Pv8^II7i7#t)S7-FG(PVyT7iIw8Jps}W+PlFZ&cFb=SPsNL46M z44}H@f-nQaI;eWk{*40?2>*fhcN9n{03G75pthC#oB0=#V* zx+#}d_fh0zCWS$^_XXr<=9Mr6_{0~N6y>DmL0NeSCg?^6h;$w*vkIy*{bD^xBIBnc5sPApDM&MkmRpmIUH;*uh$B#2jp;O2q&Xj~-e`tEGx)*~pZvUZ|ALa>642!#0YUN3P=^J@ z2g7ajiHE2~sPl<;Ni8lZ%CAHga!)PsORXsJFDL=+Qq3zaC<5KM2Vy6K_Ntm8wx%QP z0tami&&f(asDEDj-^mfk6XAvoSE}fM|9G1_Kby!N6bwqB$8D zEI>3D1A`5S=4N1U0MX_Q3@#v=hk?NZMDsE*_<(3W28I9-EzQ6X0;2gD7$QKl8UsTN zh!$XANC44-3=AnC+Ju2214IikFyw$}Q3i$r5G}^QPy(XG85k-+v;+e~4TzS6-k$;5 z0M>Xo+8K0z2KerU10}34K)WHqXQGeZpMiFN#{b2jYa}v2OPF6i0Nu#27*sK5fSQyq zFM#+KmI}P`?&M>|Nj?|`#wOb7;)V9kqt7d z=?f?T(C_>B0rDZy_kFwoHC|YyLB=(J5(VfMio+lRgu7W(!26N0t#9||GhpiD;uCR3 zTOjYq9e^naDKkM^-seC24?YVHRDy!~T`DXL40E3S{|{>Wf!6XjGx_r=BtVv~gDL?R z76yhr&;I`hr7DnoJChF|PaCr%pFlH<3!eg$51)YZVLl$mV|*Nr$N5;m`>!il7#My$ z`~M%5k|25<;d=b}6iT>I^|*3Jp@}$hgU{Xu?fF-Ej&LuiOK}BMem?*IAAEEac+EY? zz0kV?+__!&IGhiI?ic{61syYJ@ErM$0e?P)3{174J{Rb`qLAnR|AY2NfZPlYhj^%3 z4{mV3Fo2bTp#YB>P`|B&m4Tt>`Tzf*wm!(5b|!@1Yq^j@%8lFoFdvWSF+L6#P`H8g zZeV3#*zg>CxG_Z|YxdywL^2BGSI~JzUx)}7(3p_~8v_H!i~s*Y{Rxm8G4_uz#iAuD z$XOEsYzzzzFaG}r_1m!Pi^tFh@>d5N14G4&|NlY#JM8*EAtT^;jE~3hI3I`OQ9c$& z&{1e0e;r|CU^w#vEe^Aw@dCQ502<$*QuG5G1H*?G|Nn#fiCFFN=W}4H#gb>7xLvU2 z8Iapu*cljnUjF|N>bv4Jb2jG12B1>BfgN)H1*qSQQ}0sj?!h7o4inJ12RGOm7(8D6 z{|_p(v6{;?hYKwt9J&24g+N7*3I_wjnOFb+!^R*$wS@%-1B1rv|NlYb16a)mh2s(| zJ7XNVnS!wjW7~=2$PEgkB^(S4F>n6=2lb^Pc6syhw1di*HWo)dk!DsGJ_lw^My$cX zBo^f2{Se!``-dM85jcI{r?ZTAq!+C zxQvK{rbS0?29SSBI2jmf-u?d%>brx~VB{@Oxjh$)yIr^wuz1o5ln+4V^chYD29@{! z|AWR4LFR((&VZEDpnUR%lYznI{r~@DpdOwCgpF$EJ@~sh|+Fyc;fg$4k|No%z z8<1KoZggPg1cf>J?kf-OSS*fo?lySO0BC_IXu1P5?gu)hU4u9x3w0LZPNJpxs?Zh`j*psr@c<#QzQSm>PqP@zA53=AK{ zA?yFI-MRJc*_~V8zTLU?jqUEOZ(?_EeN(%8>zmo#Ti@L7-uf1H_tv+xySKiT-M#g# z?e48_)9&8-w(Rb$Z`s#8rTi?p=-TKyc@7A|z_aOTvVC!=i{J4d&K6lHHTi^Eoxb^MAk6Yh9 z{J8b)%8y&$X8(f3A=C>D-~$sG7#MaKoId^6yecA!fq~`OwJmN;42q1PGbT#(pDupD z`JCxPEQ9?-*Om`)#Psqn1PJEB0RDeAn^+V&u`=mm~x)o;z|PDQwNI$$vL(-MKorCq1sFi{Txo z)#DN-{qHUBeqVL4;`YDE%<@KlJ<>zi+TM;e0^J z(aaJj%XN?UT=LOB+Vtqbx&zEiZx6_AJ@e`D!etiv!C&}p=p>$gdhloB{rSRLfA*g? zzxv}&sP5(1y}G>{qOFf*bGn_&Tk@A9W69bhHSLKHj=z~K%P4nntN-_(24UBdca^Se zdHijM#38+iKaN3yvp=)$o%QyD%~ghp?ot}RqB_pH8GZgNS==-|FQ-I;x%9c}?Ii(R zNg~E}&IOm0S^gP6;mb9udU907VcY!IKc6U`VYK%bpKbL<==%ks+;i5`kHvNgaovmN zs(f?j=k2`E4|k9L5T7C}nb0L?U-#dTi!puW|MRT3|1jQ}yHtoxqF!i%{#~D3rFRnA z4HrKhk(2miaWW;}$~$kWQ|jMUdG}UYEn=N~#>v64_+ExWr>^^(`sMGBXrH+y*Qat& z*--ny(nY#jkLLXk>kj+ze|NwA{%!C7tNiZE-Y2Ac@zLkX$jhyB4z2SF-N&h}Ty^Ec zk+YHO#D$&}-8#ETtn#7vAMSJ4#aCaBFj|$g#@6-W>@}sU*;QkgD4i90t()#ptjKrp zZuHXETg~OPg+1icS+-sFD7|TPZ0cQ`iIq?OExmGuaoNn(lNr*gYi6|1=UdPCPTfkq zN8M>RVTydbGx%S}%%K#vn!NB=fV{OS#266TR0mxU9S;^iZxn1Aiomy3LVK5zLiR{K~$;L7TB z`ByImmhN4}va8L?;MewYHeU1WeumDSmP@C`S4J=}_OQJWW?)cgJfpGkNcwN^3=2zS z6oXzd{47x{XNH1K70pO2&S20>smuf2QxB#~icroQMd8F3G3XVg=77{e7zH^c40_-h zQoWMYiV_Ar@Hx%!qfKF_lE!DG6fq#3Q3}!lJzyEE1IEruE@IFFor(&!r6?clGUySg z`6Uc`>G>skU@Jjt81#~gi^0x|2Oq1NlbM%|#04vXl_G>`P+u8zKOiXVKw zrV~^bfY_j8Yrg&e55CIN->Y*4)d!XP_9ZUUJFqCx6G;|-uAeL(7LxEUBgxB`412uK#4z#vt z3pWD;2!rZ3kiDS#31l8fT^a+#U!Zkfp!yYrLF=9%ra{aDu|Z=+Aa{V&9pGVL0O1E9 z0gxnk%>hI$XsiJw3{nSLuLi=8K$SI;IuNr6$zD)>4#J@IT_8CS2DuMJgZu_E59Hqk z8Vn2|tN`MGBtdH$pfqS49i|R>4H{G$9KRrTAJkru5jHvu3?SSA3J{PaXl)&o22H+z z+8&_r0<|+hYtvwE0x5y9LF*nsH^+d~f!ZG*>>%L)QUk&;b)d-^ko!RDzW6aPe8Hh^ zE7W};b)dP+A2`&3&MF0kF-RS#y#QLf2U=4Bvkydr;umygDa>BbT;>~lNE-*_HV_7> z17XnQ4@@0+FwFsSjxIrp>|&JhP01zZ2G2i*f;#{gcR32IM(+8CfZ7=%G>YZwN#u|XIl4#J@I z{|a&p3^1(1$iM)?AUO~wYW+Ww`(XBf^n$8y5DjV{g6ekA`v0IC+F2`u4~SfRv-kAp z+S!g4N#*IFu^JEtwL3tV0lc~*fI&y_5sSn`1|f#zwW}i*a&S8^rLnfKa4>+>g4X+j z&VvArBZ2w|px^)<*$7+z4_f;V>Jxz0{A)8n?v?|o0o|PkTKhlY$Ln*~wsyU6x+=5M zvpm@ubf#^nnPFOz<%O3S`twtIPA(A#t&czU=}GC0!U&l_W|IieI{Uszxij-@Uo|~$ z-+CBy7O~j+E8^4sa;%$uY5(>q#XZ}7XI-@Kcq!-vTF0N8Qu}^|rS`6+?@jJ3-<1mK#U>LN98O8>!`CblcSy* z9w=U5d{Da&JpTz50Lk}2*&qtU2lXL9Y!C*iUkYMCF-RWNSAufE?gO1O595R6(bw>U z=h&eNK=PpT)*py6FqA{r2!qaYe;~}j06Iq=v}U=CiGjgE2C?SZAGAhWh=HLIsva~h z$I*fdSOs1$jY$L4si_XpKFR`#6~y818@C|w z#2R(b9)<=P1_n^R2FZiYd{>ZQU;y<=K>SE11_l9X1_sa>pddbIP4@u-g#3Pxyewi3 zJ?P#A1wIA_(AoVU^`JH920{#=)!GaoJ}YPqy#xaT=&k_}AJn&K;D?kwAigxnJSheS z&^?qO{#;Oei83&N_6mUb3z`S`ZADbIi%fPlm1q4$aGf8i!b}3|8b`lwS_g;hdA2 zSOgXU8=0G$Tbv4Btqm3nO3g`4EQTy*E=o-Wi-FYz_{6(q=4BRVAPEJk)_iv=Z?`{d_mmx7nFV~RTG=M{s!h%Dupl7eCeIzK3}JSa6czYNuOEJ9dp zh6rI=>zY@Zn_84ulIogQQk0omjN$;7Qpi$xkRyXjiZb)kLDJxmElPz56f+c;6eUBH zK_$Wxb4pW-K?}A~b`RuaCShC54Z6oGIXgZ%BRf7VF*67M>h6?c6TRYm2H28r5@gtjh-7rV3e? z4ULM?_1P4z&+f*t{@H}W_0J|WSpRHH#QNu$f5feS2AM^T_0PdCcK!SRzwxjX$iNhp zA1|u^{{P>4ptJc30|Nv9lmopfDjfXV4t&26eRx7|i5f%ji!QMGS4LpZ+~{q7aOVI2 zP8SuH-e%Bx$W9iO7c2h$|KI%Me~DQ4WRNMHE-EseA}TK){{8>I+eJmDH$_Dw`f%?S zP;;IkJS_Ny1=z$H5EDOiyQt`Nm#8ST9_X%7(J0Yt{-IEo2{QKL-~azR4}vc0VYvLL z^J4QW#?A|!VG`djG#})DEeSPmC#VCl1GENw7icP?Gfbj4Mod8QhUNL=pzaexryED7 z8&9VjOJ|utxmIVLNNsX^`yV7Qqq-;GU|?Wqy;P#z z?Zlz&#A5lQNc!bD&{j=QymY&AXuGml9_MdsVqjqC4Q1%oYJFS!vKt(apwQd==l_4p zI+5-?5q_ul-EI<{ubK}Ce7|IQsF)jMqu~Ltos362byQwV{{u<`y&NS^8DDgVNpw1L zbe?EFAi#Lx`z6H--C+WZ$2%QaIxBg)r8*@$xw^$V{RCPs@wYnt|Np;}@1^zs|Nkd+ zyE1e#A#6AO^Z$Q$m_WBH3*+(5TApsMPG5#jt!}=~Jb~7e{H+`yoq8`B|NsBr&D43d zvl-;o*9Usb7{K8x{s$Dkx1r&%K3oU7l2q-n}M>f7SzAXU}9is`0)QfXs!)pEl7V2=$`El z|Nn#fl_0wj`k8W(4FHAL3Q!;D!~g%FvjRYBq2c8W-D{D7x@`h-ufQE928K5u(DrY5 zL)Rp`a0ftE2s41sHQ)dZn0);IA2gl;G9SE#7^(s^9ss(NTL6!|2QveM0uFf_(5@h6 z1_pzV|Nn#f*dX(<#U0Z%ERpBT4W2hz!OXxA@ag}5P@fK>-wk6eI8z5^Jb~41=l}n~_tt^; z>Y%M*_vdq9R>roT+L0TyR($~r1B1mE{Ar#EbZrHC26p03fw;&SY3l@}&;Nymfnmv) z|NlY#X{_M^auW}BH-XZk2`dA`l&}B)gZkSb{m`@s-uL6rr%;cc7D4+;GC+59fBpX- zH0FUtPc|27hW7xK6CiyHSQ!{@kf;w7?l)K&7(RSOzJ~-H?rxxaNSq;i2NIZ`VM%YU z+~E8G+6VLC8(Q9h?tKEyJ6eEh?C<~ogT_EW{%K}P0`DyX<&_XN1_qJuXnJG$I9v|% zv4F~g5;g_~lkflkgT_}tWdTSGv=2uAJ7PZ*NNf&hzvuV=|3PDqAax*nH?T1&{tT||0h}82Cx4I zxtXL`Ltp=I$G{LE3R(YOW_9~po7L@a)2wcPTV{3p+cvA)-;P<`{&vmk_P1wNx4(U} zy8VsK`t~<5>)YSdtZ#oav%dY!&HDDYFzegj(yVWPE3>}+t6N%4INOb7cH^YlO?f%@ zb|zb1i+6P@jF!>03*I^5)}+Pqlhy=k-%sJX#-|(HI(>(E>Z}hw(n`}WTCA8MJTrW; z;&nDd3$6sNWB*$;QhTa5L_bM#I~2;{yH9G*`h!xg3opgrITW|!*2iM&-wZAOMeF9? zloxFIAS1g_*CGG?m4??5f%8w@U_2!y+pe@>F586Wj7EJq&!yj)O9fLB>rE#K=2bZM z&tTdAH&8n)S*58E$cZKt@@xowXtSvfu#SLwC7=K z+h2N3r6AQs4u&tJAE{i`3t}cBSmsPI<%NV}SyOZ;miL z=Vz#JNYJtjd$&G8Rb#34tE;}RZKqH6{_k>b>YnVDyONhned4dX{&w`ZvB%u-6_4zu zg5!?IJ~=6@l2}9XHDO#_q}??2P9vwx#L?D zTNxg^@nM}Plkk17CA$tU+nCF-{rBZ`Mm-K?$?t40jBlGJ zbTmD>_OvuIHoux;wXok@fwT>zg%r zrsxX#c_@5Zw(WUG)%P?1bS4OY{B3e?*$IdB3>MOzk2OD-?_^*+!}daif#Kxb+e)MR z2TCE^3Fx?g05oZ5Dij~ynld&lYs$*LG>EUJdirj{3`PPfjOKE3?K|s2U^ksQ-{2N08~GNFrobe z30w>eAnX8g7|2n$_789~Ff8C^U|0gGkdf4Zn8^DFKZ94@4vHA4rg8 zU;tszK}aAu5C*M70@0wgO(5rh!V-B68%Pd>Vdf$4A8?UpU;yDWpfMwmB3%0iK(W1G4`AM+~Ty0%9vLurp{d$TG+61H&C-1_p4`1-kw}z>kR`AP#~->jOX-BoC@XK^V3sA4G%Z$3Pe)4#J@I|00hV z8DKbtgMk5rL2@8W%=&+1_wnd3Fn};fFUW5o8q~f6RoS5R{|e7+WlmSK80T_npAj?4 zRGew@U@d5UIH-LKYJPy);0zuN0t_ll3^Q0xtYKha^5S%Axd2*N$9af>iJzrPF(DHa zVk`{2EDVfJ0?gbDiaAV*4Jt|v91J@G7+DM$8#p)^9GMunG&Oh?I5|`{FfcfAatH`E zaI6M3;TiTaI2q1g<%qd z0|#hPBum3&g&Gc}CJrtE1yF-ffPrzAz0-mK7X}HIRT2wWrZGBlG%+=(2{3Rh5RhVH zOmT1k9U9BT(7@I(X9|nT2QP*N9E>Rfj0+7GNH7F2IIuEuFt{p2EtE`fVh|8wU}O?t zRA68YTgAZ8kN^q`kPpKcAZw^285kI%85kHqr-_2ZL2djv5Ce)q>+`|uB^V&*j)U6v zptIpX(%_&1F`zgLN`olSo?j3R!nq6#40#L;4EYQU4228~44`&8NE~!7WElfwZ9a$( z!=UzgC5!{5s~H#=YN6~p2FUt+5Erz{2t>CqFfg<+K+cW_@w-5)oER7wKyCAh3=9mD z85qE8_op&2Fo0G-O=n>||hI03CR`hk=1%F9QR^KClV|0XokU z)aN+Jz`y`%cOPb8U^oJmKE}WRJ_8=aJ;lJl0BUc8&Q=F4vbw;)z;F>H!N9-(yARR%D}*Ihk=3NE&~I@J`Qe$LbP-kRd(1eO>L1~a4ZAJzL zJ<#0%j0_Bhj0_B6=4PJDujCXLmQStVDO}uY=$e1K=WM*%&lQDdwwndJ?M>$teZ0VR z-MpuBZX5{nI&-t^Wk<;Smxr(a4|m(Mx@O_c3a9+i=0^uPIT_+_&oc zez_MC=X`k8*7*+>WUsfG_IqW@<;;T4;H5jGUe00NJnz(^eUbY$zhvKv%eU5+Z`rm& znrYgW;?&BC2R$@T@0d7!cjrlgop-Es&OYRL%)B+2JtQGNclw_VLbte|PPnoBUPwUE z?WRwK&SF#Ip8PoQ@};QDGd(?@zNrgTb7T7j+pQj*yZumg+bPR5%|B~zEPFc9ocqp0 z)ol@%e%x(Voo>nESg*SK$`)%&uV zCuho(hrjTg*&t!~^INQ|-NjYa490u4-e+ok+NIgGGT!UVhUJwveqBG+zv9Zr8T(45 z-yNCjxr$}_9;S~=3_F&3K6|KHzIf5@4KvbXM4bguqm&d0rINi(=+`r&BUqSRzf9;!6Z`h`Uw@;RT>dHM!bv^4| z#(5rxkLAxvJFLXME@Pbd9%-cP-gzU@T)YB_wMPA3%mHzKb~b5 ze$i1lo9*U$#^=tjHZMA`fd9blnV(*|-3hmgTHC%smQ{{R?xJwt21dS_kH0^QT0d2d zB|@)_ZSriFqlzD_Q{HX5{bQEp(b*?_qq2Y2+%<{}%$q%P|C;RUb!W>?MPHa=Asf+> z+UlSD&51o}#L0FWFR4%Ky2Ej8ov_Ayw&jKD!UwP9%}=?QlfTlB*Uvoecw@`Y;KG=s z?Mf1RSDGAYeipbx&wImJ!EZ16f^S*BuyCDvgELIv!HSygf8@TaZj1gA_&?>+(W{Rn zvSPRLCDr8^e(hRY{p0EP_j1b}*h^2I?>)}t9GHFTHAD3NS)0F>I|aqYO{{?AkD#ds zSISWRpm7Ay-Xtg&Y@Rrp`Z=Hm1yljZyse?8NlxC22DaC@t+`h5TsNRwtxt{|BQj*BAWS`phgptekL^c zTtEw7H>g?=1zImyist`SX#5jsd~USxd5RXEiLixHQ1^raG1cr0O|*T(2hk1t$Uqg%D`~L3;BF*v~|*;v#q_ctb29j2HzQV$CQD= z!sq{gP}%^kYsFaW?9Z3L%*BM&0MK~4j2Qz1hyUpMR8Uznibq3$+9B}a#qDnkUO?B- zY`ObQVawfbU*6yO#_-_(f6!P1vVBY+?tJ_3=gv3&4|l$4ez^0^`NN%W8h`J63;S^A zTfpBt-?Bg4`Bw4w&bRsxcfM`-d*|D<4|l%Z_}HjeEae5&bPRacfJ*Tyz{N^ z!VT^KH%lJKtV^yz}kM|2yCQf4uYU&;L8$ zq(0sG=E89IoAIYR-&z>%e)IWs=i3&ByWg@t-TC&1;qJGFPj|klFy8$(_0yeiA&hsw zE&Fum+wMJ`OY^F=DXjzKHvG4!+iH!5A)q`TbS>DTk`qNwKKIV^X-iGI2B?F7r+Z#=AbzZtOJ z{igfn&bJEIyWg&`-u?E4_3k(KFL%BN9EU0}QW?E~B0Z%tqBd^2Ic z`)&4@JKr{cx%2Jxmpk8He!26F`Rko;GuZEbJHdYUo9x#+-;BTB`SynW?ze!icfMtO zz4NW)>z!{R9CyD>{Cek`1IOKOi$G!=cfalUdgt2;j=SHke7*DS1;^cQufE>-roegk z8^gCd-yAsaeiQq4=UWQr-EUgo?tI(8dH0*`w>#f>xbA)n{C4M?3D@0kAzXLARdC(? zwt?&Jw<}zCzvX#hF@Z9|-`~A+h3p{tfN$}qN=E8gT zTM6&oZwq+uetW@t_nQFU-ER(jcfaNE-Tk(N@9wuVe0RV7;k)}yga7Wg2>!d@D){ey zv-*DLTk!Wg-*)id{dR-@?zcbucfaL)zw=E-;O;jYfxF)-1nz#DA#nFw-S<1+P6*un zCL(zEn~mVzZxw=fzbz2F`|XL~-ER^?cfZ95-Tl@gbobi{p}XJS2;KdrAbj_mgYeyN zCBk>VEfK!^ZT9y&-);!s{kHM@oo_56cfXzae&?Hm$lY%*zu);*A#(Q{!;d@P7Kq&a zc17gww;v*RzgdXh{U-P0&Nt&9cfR@jxbrRZ$DMC&Kkj^+{o~HJ9Y5}TyYS=Aw;0j8 z-yZ$A^Q}Yl?zc0dcfWlQz5DIwk2~KY#O{6*{dwox46(c441eDF_CW0JH;@1`L;&t?zbmWcfWB+-~ARM zefL|1^xba1-EYyq?tI%JclX;H zxx3#Af8F^eB7gUrh5X%by}#~!OOU_&twH|ow?cfT?HzVl5&>Fzht z-*>(l{l4?f?f0E;3BT`rtN4BAn}^cfZ#_zPzim;v`)%6qJKtU?-Tfw@eD|Ay^4)I< z%6GrDDBu0ILiz5uGs<_reNevpO+@AHx6Qxrd~;B_`|bSiJKs`N?tbe~x%+K}%H3}l zRPKKJqH_1!>)&_2X{g@)mY{m~TZ8J|Z% z2dWR$T~yM)`wh090VL-Fl>>E6wDj+OgN?_6fH42egloug2DpCSAoib))4vW-~9$UO9mz<1C;~K-Grg}T?8rz zy7Ds)O^ydD2kQQ%>EHdP3>_!{+4lt+E}*Vn9-6*CP&rVywG2(}Ld@N7ApM{&%tZaW z;B(1g?mPmO19eY%?C*X9g*i-a2UHH!U)8ZkjrTQBInWwnAA3j`!SpSF%7MC+IrewI zf#L%uX9AT2bzdjg-~F}#DXcZ1a-g$|PT1f5wh&291}X>c);in;9R~zj<^)bJAEF^? z5Y)C`f#&xo(Gb6b`b`_qM3YN^%7NxY+tB1fpmL!5$rqr>c|her2NUc@le2-!f$knpKnpV!s2pg$;SDr> zE2Hjy10@5{UFBcUI+kFa6p8!r4O9+v*SrRr+@8q0-$3O!Xe_}EDhDbiL1o+) zs2u2C`V=&|HBdP_1_p*2G`R&(`#^WuPld{Xsw9w^Q=oF7x%f5EaDmBnK;;}67#NnJ z>8pXtfyP+Qpy?}s$~iMIFnoc^!TgW{l>^<=CF2MQGniZiR1UO8_8^*lK2SN(*tZW< zAIzN&P&s!728NqZeK0dkpmLzQ**>AkX+Y&bXCQDv(-};k3{=jGfq_98O-=wR2f9Ps z9x4ZO3ky^Zw9h&iP3}hoBu)5&=Iznsu0ZAd7#JAppmH#`tcrk?6aEYg3szFn%q>VKF~UiU1)NXpmLz` z;G<}AJy1E&TJfuBaxWqwZ5Ggak4GkuGyrRB+<}(6Nem1O-=O+nau=X-pfw_FrjU4m z$=N{t0J<|&7ER6ong&64PpYBGsX*mGYfUWBR4$u=fng$=+zY52Xsyc%G`R~z^+V`#C1GIyGJtL}4m7(9 z-q#09yE#xf(3+zd=eyv&elWQw&^`ia9a0CHoJSZWJnI=47_!j9+93>*r$HWWK$Ek8 z%7M;@nT;lA0F?u+b=rdFKb0^@Ip55{z_1NXp9EB{g@J+L6q+0lRIZhQf#E)y90ODi zw4Uk@n%tLAh<)u03=C4{ka&QVSudb+pt%_%s2nWJ?m*>0cfa02^TP?K9B9qfA2hi= zP`Pdf1_lEch*LLu=!iGhJ(0h(M2RBkc@1H&0KxfrM%=*-ywwD1gp%7Ny& zGSTFGpmLyfZtZAtE>Jnp`nLsWayn2yfcEt4Mw3&3%FSe8U^s7n_ZyP{C>9{&3^LI2 z1$17|57)cjmVr7N(0;!FR1UP(PQ~r+x8+E3EKs>QpgB9YyWc?P{(wvcwH1GaLCR#% zy1W**yWdtK>3ai}1D#^H!|m?3RY-CVpmLzKd@tPYep`(scLgd3x-|VBn*UBfpu2`8+)>lZ5~v(#?vuv?Rc;1U4s_nJBAQ$eRBjmq1A{4= zTmw`Nv_8=XO^zWN5@w)vi&J_4-~4Ya)btr007F+k-&7tY68-u>2uB=;f&QtpD*m1d&p zy91R2%~6-4={o|I1Fc1EMANqeDhHaI?nTqb0v$gCtzDgIiCX`yf%Zi~Yg&(>`L70Q zCTM-@58J!n0zd%`Eei^ua-emutaf+5B_PSAK;=N|VTJ7Oek(whgN|8&*2#Wwzxxf; ze}u(R1XK>RepbZe?l(~X5hmvYl>@D-weYz64b*>x$$f#^2U;J#-tz9ZK<8l4@>=jX z*afH@XwAU^G`TfUx#OU9xM*?#A&_(pI-f7bw=M4zvdN37Q-OR1UN@n8y=U-;ZF3nP)+5A~d-VP&tr?W6@C|mP3;}0F?u+ZMH#^+X0ok z%D})7g(kNFDtC>6fuRCTZUs~hv{rf=n%n}Y9B2*o7BsmTP&v@L>Pu*H6QFXS_0}KI z!leT$2U?f%0Zm^6R1UO0Tfqx8Tq>Y)pmo~;XmSP6cmS>EZa|aEfXadPO0GbYOMuEf zU|?XlfF>6Kl>@B}|A8hK0F?u+8CUQ|b*BeZ4z!ls15M5WDhJw+S%4;I0hI%-J)eOl zX8@H0tw}$CCZ_?Fd(ObX@B&Rv0V)T&(@ekz)twShxt9!}H7}@g0#G^7+V=!BeH>7^ z*9;5{9cXe4P`Nh@3=A94pvgUe%7ONn z2cXH_fXac^=2xJ}T?m5Y%}=0tCu>yuPC(^AYx#B1h}hy9B99S0h(L|RPHZm&jgy81yDKA-i8D;eHljj!wZJ)ejy}InbVp05rKh&~^_CBLl-fG(RkZj_aWOJ51f$6{LFGVuL{iY? zYM^pFj0_BwXmXWMInch6PBghPs2pgo$#gWi0;nA5UXP7va=B1B0Y(Of<7jeMp#3V) zT_Zo<4a-cm@ymoiL6(Y&`K*JNXXG+Qr67Qg*6x2s|fy#l- zmeoO%y8|5~(`95}utSq`fYw!@Jy_9pcfSQeC$>RmrbIycjrxoX3?I&JIB%FEJ7juX&XichDT^}^-%k485tPNbChrHfT);-Mey$-XBfr;TxA|x(B$I($`~PU~m9!+XaOQ zPaJf;56Dvt3=BSKd;!q99*{wx1qcib3_UP;kQm4SC*W_uHPkcfTFbz59&;6sNJw-xcoN{npTZ=bKL4-ERi>AbMot?tXiqd-vOi?mOQe z+`aqlgYMmLIdONtfzm}x+}&^B^lFy z9^C$R?ZNGD&mP?V_U*y#Z)^{5e-nFn`HD``fcex4(UR zbo(3IRZ+{DWdiz`2)7#(5p5Fe}_Vo6*X-{u|TlVz!w{1^ve>?W{_P1+KZ-0CC z^!B%JPj7!?dv^Pq*t6T;)Slh`X7=p%H@9cEzlA-!{Vna;?QdnzZhvcgcKh43XScsC zdv^QVwr97$9eZ~B+qGx6zdd_)``fo?x4*GHzx_?@`R#9N&u@P-dw%r?M2tkj9E)e>sK1m|blG&QWy+s;3()NZ}M z=<@nkik<6~S)xpABP{mcEGVAutDUrNDxXYj7w;a?jKy^w8@D#OX#M&3eBE-6CFw^) zdVkHB_;DkLbHU}<*zQ*=f?sxAB1JQm{qc3eTFVD_RPMsS(IVbsL zaEkYH<~7^)?z`1)St?iB7~Z-epC#j(J=cf$&0=b`8wEdgoUqzde_qb+@<+`JQA^8X z!{V=aJm}lBXF1pYb%vApo~m6-Sa7)NKzhK8k8wLfx1?OLt@tzVq*^4m&poEQ*W0=B zMJ=^^v39PP-WGf}OxSMG!~)a)eIYvA z(u}w+p0L@y#O`5U@%nW}z20pfFVBd4e)-bosF#Pgb5!jKV!HQV##Da|@5vjx?{Axv zZr!}-QM52uwT{897P*%?^VUZsT;5QBPbzqCS<&iQ z*Z(`3{@=9Vy~VS-2%ULL3Lajp)=K|AN9DNc@(XdPmycg{>we3$MDW_y){M(p-|sF^ zx#BJs?XYahwzAhjI~V*CxTf{|Kq%9lkDoc0ugQAuHuIKVYMdn-x4rSq8Mblt;#{?Q zzPSh4j@|v%z0UNgywJm63cbNQ4EOE)v@w2x_1e;VTP&AJPx1eG`m)>;;k|pgQv@cT zzFmEn!QSTT;qZ+?Y-%*>bkmgEufl>x8%_!Bsa;P4;{w$|bBR9Oo6_fByCB2B zxJzh<2?K*Dcf(BDp3$4apqHLks#lg;RGgWg7hlAnSCpEgmr|JrVHD()Fz99GWtK4L zm84dbFzBUa=4CSI73G5u%+*WHh)*j@%uS8YNGW1~^B_9n6N`!xD20f5g zuq{RT3?Q2lb2F0}^wRT7z=R&yN{|``y`Vp1!k~5cFe5;HQ4kxnXW-la|M?(wpm7!uUce5zbrdAa06v2iq!!c%2bl>{cY}k0 z0fY^NA@ZQUGe`}n-wIlb4(e8d)N#l#Fo19dXafbrIM8qfm<3wX4Lh^9z=VMTgwvQ1 z_JZ_-Flaq8s4oj*gZi}~3>uFG*$3+1f@qL|pf$0ezAi`|sJ{!spmj+gd5{>02B`zB z%LI+9fy5dt7#Khp)PDxK86*!<2kJ+I)-Zz9f#%3}L^3ddFsL66QU?kLm^#pUKal@H zLw2BX01yW4eE^vS!XR}Z8ni|crfxzU0|N*bfGhw>LdQEmYC-GrVCq0;*@5sD(BuM= zIuH}IE)J#+H0}VxpnWkQIS>Y!1)@Rg(m?7!{(X?o$N<77poNbhNd^Y+7!!yITHggz zhkQOANDhQy=7H89!PHf}Vq^ee3(&%TkRqhBeL?GSKw~7J@B)p8fX=OhnE_G?V}sV2 zfc6%F)PcrHeke16(;P?*2*cEY)=z-!1*!XE%*24}{J#b%$k_!K!ayS;_|N}4aZ-o@ zgu%n!0+6vEpR+;?K6fEF#29jyEhuh52NHn8@U0NTgTD|A8dnBkkUYqpAPmZ9Fbv9X zAPf=*VbJ-15nTcdFucT*fdPa;av)61`G3gn+oHt40Ky=>ps)eapfmsqBhdMOA38(7 z9$CA0b<{g&*3$ugNlU)}o5#t-zyO*j0A)nbn3aVB7em5A0cHUP289L&(Ajw0J*o`> z3@pq741ydikp?V>IyjUVm>56>fPxVNg9iss3&REnRskj_21TZZhNNuJwj2fqMpixs zCPvN~Jw6h0O+gYu5^YQj3@VBY%q$!N3=9s37}Q$NFdH=(EMPI<;ZT%x*dg>I`(Xg+ z>R*R|#s-e39WqO}3|=d|P$=PG5)t5AAk4zh!ot8Lz|hzvz`)AF(#80UTcn3)V6UFbJ}7usCojFf4FjVque1;&EV@{E{qf0nHnC6Y+@3b&cncA0$M5vGK_(NrJ;d?fq_N9@q+jr4uK60O#&=j46X|p z7z6}3oERKpI@Yi`czh62bzop)Vo=~=Xb@mw0!4BIuSSam!=VWgN)n6>94sAd4h;&7 zrKSQZDlBXadW=mB9gL8&(LqCyql1B=fq?^@tC|f8IGLCo777_UB?vGaVc-B|HFgdb z&jU(|0vv7(4Kj`j2Lu_K7z|V{L@^x5aJ*#UsBpl6gIQs5LjwZ?2MYs35vHUS2O?uI4znjIOOe8ia;CNQwGGH^IZs5Le+crY-qIFa07zCO@!@Q!5 z4$O>eavB+&R2Uet>U2O3XZK++VC2YX7Eo{#U~q8ZU}!K1WMJZPx&zMk0t}ul6Tl>3@5I-1yc&M=6$&N!jQc|cu+nS;T}fkAfzB`l;o0L}A(c%V5p&|Dg5UJNw<1)Apq%}asiia>Kh zpt&E=JPt@LXwC*igW3$Bxfame2#62DpmXb;7#SFx85tN{85tPdL35~#3=Ce33=H0k z3=E)ibOJ#6ih+S4kdc8Q2z2fsBLhPuR4kg2fgy&Gfgv8sPXx_zLD?YlK{$<(fgzod zfgzibfgy*Hfgz8PfuRsIHw9H!$;iM^&B(w|3+03KfN&!t14A<-14BC_149=h14BP( zZj_OMVJag7!*tMm5|aAaj0_BO7#SGmGBPmCV`N}hz{tR`5Guczk%3_;BLl+z647&bxWw=gm=Y-MC%*v81fu$_^C0d!^ZUPcCneT)nY z2cT*WLFvPc3=BsZ85mA7GBBKiik)F(U^vUjz;J<)f#C`x1H%nQ28NqZxx0)E3=g2} zhl~sij~N*lo-i^nJZEHJc)`fP@RE^%;SD1L!&|7D4~z^9AEE3|pm}&k1_sau-tUYI z3_lqe7=AG_F#Lha|Ao?^umjB{F*7kRure`#3Ka%!CI$vR&>i+n3=D!y3=E=73=CpS z3=9&W$`Y)BfkBFifkB#yfk75j_b@RqC^0cGs6*w!cRw&NFlaI{Fla-?beI?z^q3eJ z^qCkK444=g458xYObiU5duKt$+A%SJj-6$2VPar#h041#F)(;AF);WrF))DUdV`?i z!AuMcp!vv1CI*IRCI*IBCI*IhCI*HisC+6D0|Th-na;$(kjccrkj=!vkOP$i*_F%0 zz>o*!gBr@9`QRcZ28I$Q28MDb28IeI28L>=Jm_BAS}41LiGiUJ$_AO!%*4RZ%EZ9X z$;7|_s>?uPAl$>mz|hacz%YS{fngF81H%+128O9j3=Gql7#L+PAFdSuOU^vdq zz;Fs`?rCNQhBM3z4Ck2{7%nq2FkEG3V7LL5yUonNaF3aR;XaiAfSG~eF_aCuyZ9M1 z1H*G>28Nf+3=D6X85rI%GcdeoW?=XLRRcS3?h`Wu!)Im&hA+$v3_q9|82&IbF#Ka? zVEE6>zyNA9v9K^Ou!7o73=9lxERePg7YhReHwy#kY-sJsvh1A{PV&Xt9M zL5zigL7atwL5hWeK^7_x3NsLvXJKGaWMKf+y$l*G3=CQ<3=BF*YILD&Lnv*;!oXm{ z!oXk-<%7(yU}0deVqsvgW?^7(WMN=%VqstawJKd%7#KWQ7#Mt57#Mt67#RFm7#IRs z7#KoX7#PA>7#PB#W<)}1kXg|z3=9b@3=D}Z3=GLE3=C;dxeOKthAb8ah8z|KhFlf~ zhC&tw2GF^AWl;G_76yhY76yiD76yh|s8~G<14APV1E@{I&~s#g#gn%>Jcc1x4cKOM zoS0>IGx=H6wP#klCEjQ1*p@$Sa9_@KwuJTJCx-K^`}%$yzH;!!2BEc{o38h=+$^iD zkUMgv<%M~?42w;ObGr zCU^9~oE1rDz=z~(rM1keMW#kgYqJETW zWW4<}tNz$c%QxFzfM}Op}A?~eX@!}pQDL`c7%cJMWUTid7ZU2(ALibOEa z!un%37u6rTIqkTZ^ZowLwh8hxmVd1HT>1KSQgzm=-&%R+&)?@NGnW!yoApAqW7edO zi`9PJx1yG5c^z62bLPl=%dcN}w-1_+-85!>R}G^7uG{|Ls@Md@N6p7>&NtclcYBjw_W8&Dr>1J(*6@qJ zThS(D8#uXX&oZCNr0ZPU&9yh)a}HvUlWafrr>jhI)1Ip<`l~$Cr6%+LJ^a^;3-h{j zC(yVIXq}A08%72Jhd=-4g6b3Sz2j(ip8NAPFfuP<#A1d!$P7@QJ>?A}Lyps*|Dbh& zptAr$cftoSGcZDLkaq;B1DzAl^M;Wj#re;FP}>ot4$GN=1xz2Y*yOff1-SwBUi1W}=V+IlyKplw=rAxaoO#R0 zuq5rzf6#hJkiIr1M?RirW`Di_rsG_EJdTI?I2@1hvABW!3bN3{x%*7t(c zquLX|v=+@CkVcR_Chr&-axxJ5knCBDWDof6bx;~gdB@1$llkXA6KK&5_Ar^i#N5V= zJ!Zj6u^3joV`Px1`tzRyG@yvxj1P>=yRn6O0+pZ~s~L0;^BS-`{`kIfz6JOzro z9q$<#ZcO|0AJpH%jJpO#W@ARQ*z@294Lf~!&&XgfGa0}g zH-$NW{ue>*Mb($UbP-J-s9*%;0gI1}3>kC({0H@!LH4yVIfKG6i0=Rsvk)UvE^veR zFXJO4!-{!-{yXAMHw}zT|F8s*GdC#Rt@y~uuw%iW|DgT}$UZD(;{--#HEih)oc=*! z^yVWYgUaGR|FdxT^*EYeK?xS5PvsLML(Gyt|C`|YocVa#n4S3qnpr^6x(iJos4xY& zIpz~1!wegY1Ty;m=pV zbRJ8vxo|Up<}n_8Vq|Do`R6~l|AswXI{0DH?#Ru&6Pv?81p&x!7M~dzZmjbZ{TtsTrV2nG6Gx<)O==SU|IL)KX_ymyW1M@#VN=g2R<`0Tv-3-Ke(@k-HZv0 z%pN%10ZPj(UlOq1?7}OuB{+=J78sD%np^&t0y%yNK+ABc^Np~}HRpz~=!`zt^kSa^fnitHW`ALJg88W09G z2|?isVq?Wn3nswqhw>Mo@h_mccLPiw<{<_Ku+u>G71$nVdIF7mgWP0r;R9&ef&p|E z5KJEAHZU8RfZFeH0g_&j{RUD73U5&QD}c&_#85C)zW~&JkR2I6A!Z?~1Bpjq5l2=7 zVuRFmU{MDWufQS>(u0ga>Q?-O`27jPM|d6siO(QX{|Tu67iju-V9^gtPYdoq{0wSV zJ9NDThdr{pVCPqWYf$}p818DE&$@Oo)fhJu+^PY?w-h$7F z1?}nmx&AHq>|fB{(X0(`zkz}t)JEyp@b(*M!3yXckejDK<}fmV_AK_S0OxC zu7CRtlvY4z?LGpjVPs$co%5?Uno-GHl zL5Yfqf#C&6F9!ny=>Fq3AhrNxy#CJmx8U35`wdinf%Y_m__0tvXdg3(pAEGSw9gpCSE_)74~PvizZz;DXeks( ztO=?fwD%aq?}5sL=B7dXMNmFyjvB<@dKMCXpt)*Lc%6dk2kjpO$=`{RS>8L3bctdHW4?rXWNHlLToExD2r~3`)mbehWTxHu*9nt*1ljoXc;& zfz}|ELh1U;Z^8S*nxJ&s<+tE-N&7ED^2KB*J?-*a@cGMgFTec;I>QN+bQ4~D_y&q2 z*#5VKYY@9~Zb0aQ8<2ci2&FMy4iN$6IS30vg31*L3rcc8>dysNA>{#76p2EZ09s22 zD#StV6Sxjl4_f#FQhgm#hQZ_~y!`+!D`5Nu*FJ#548{+*_5oZ@!1xZ=K7hjx#y7b3 z0bE{yj7G+w^>-k?N9Mb4pmH9xt`NjOkooQ#s9pn|$q3>nK=mVB4-$o}bA+%UB&a+D znbYtZ>K}+OoCM_y5a+<_58puNFM`;}7}3#EFa^>Nia*dkMz8=H0n!5#0<*yc0|VT>te9y6rXEB?m4lezpu*MO0PULuD?%p( zAm+o|2deWxX#})~5~Oq?RDJ=}{|!(+Odi>OP@MyE1V}#vtSwJu`xCV15^NtcWPH`( z3HJB^wZ}l}VD1Ht`GM>M?cD^4gXBScSok5k4^&=(+Fu}bp#7pC8kAT-@dIWvK+*=b z_PN4MhhG71(|`XKLXk#3zEmc zAkCn&Q|ci32g(I21Emf0{u3xXKw~x=ZbAG9R)|C(>j&3Kpg9K6`D)NTv!JjBnG4eb z;)BXL7$4+YP`JbR=rpqV;CO(hFIf5kxesI|uJA_I4_fOD3O|q?$l-_VK9G4J_u&jb zkY*%|Y(A(B3DOUehNT}+dH}f_v^N+`KTA!k7Wf-vZPhemh|H@SA}3!*30C55etZkXvBt7T{3_N{=9Qpg1bP zqYjksKo~`G=5xkl#TVrVf+u1_k!$)nFnH{*atEU8N&>CNZ5Q(IRf$z$V|8q(DoIw zePDM$6@b>Ug7SL;4)a0nBaqSt9P%*dfz*K5u>1kygD^-xsN95=cOWrj4AKMRgVe$D z2lxyLkOYcnKmwrL0iub+1kDF!YGk9(`Bb#O16&9)F@XFDw-V-^$I$qNwtr#q1f^J^;1I!R;QH0uBZS&^fuV_8BO> zg3gs?fVcOUz;lx@oJv@G9#r3f&Xt4Jcc6J$(AWfw z4=(Q*85nTY$6zy&2xR|*^AW5+c?r_K0=W;Y2F6Fy3u1!W10dP~Di2DpApQZUf5Cb| z0t}G5Nd|^jx$_68iQE#6P{6SKIlFLCdk$nge%a~ zJ37CE0ldb60UACGoeZFD84NJKfFc7VJ;2)wump{;0v`+6|6unqLi#&!J!s_@DEyJj zFHrn~$}f2O<3MvSCz^Xf4Ia4RkoB*ido4D=-H#**-H!(op^N*_!V{FAiFF?+{e$v5 z%)MY5T0bMl7pVQoa2c9Ez>07a$ngVezktFYMK#oXSonkN2ensF)F5$S`3+`2j1Q|H zKz$fcegd8Q11k4G`xZfbQ2!Cc2c5kS;)Biv0`WoTgoF4X{UH7lCI;|$28<6ne;ipJ zG(Q01!}No)12P}UsbD6u|3Tpfs^5^y?*$+agT_Ok?H{lvBm!AKhz+W5K{@2X3rKzj z?I8h~2je4Y1vAmZ2P}w0fXsw(LFp6JJ_CgVOboPV4YU>oRv&=MUr>1un{LO<9nP~?E>N2q#`dx`TO#6K{% zz-X|UP!1^nz`_rdo+$;)5{A9GLl_v$Q~B zu=s)TL1M^wLEoEi1{2Z5}0J^;ys_@KN3+FuRgXJozu z&kcauZXiBL9-5Ro~m7gF!$o=TXf#!WcV%WwXLGcEv z&p`5^@)<;f`oEy~h4DdR$QWd2b{u$fCPNjJZiUhlq4ZoRy%tLEh=ZKVcR3C+c31EX zdM;lFKlpxo(7tZubNK@93W4hkkiWs_@_mGy3mp-B4?O?E!F>;Wzn**|+PQomAY&>o z1X0iB>$q|cd}ofv;d|iwaS{Yk&*f`53ptk$G)D(ItH9zC>bZOsTkd`P_5Xi9XkR08 zSm0xW#@~5r-hO)k>W4o3@C_6{AoVrXZ@+>2ru*-IYqOX*pVOC9{q`HEK0gD}3!0~ap5+HJFW||CZ*!{Oegn0S5461f2AW3z z)urJ2;_(OYxqf%5-+ue^R_1%c^$*_)u73cZ=hsvH_S*)Z+u(El7PP$mw&2kR@cDlr zGZn6X_y+DDTzdO0;r@qje?ay>`0(vb^;`HkgP`{Bp6a*XKK#1=t-G`}-1~Oz z#l3IOUflck?Zv%sY%lM96MK2@o7&5J-^^a#`{wrY-nX!q_r9gQy!Wl_<-KohFYkSu z_VV7hWiRi2+xGI_w_`8weY^JZ-nVBj?|u9B^4>SLSNFb&y}I{J?bW?+X0Psjb9;5~ zTiC06-_l;)`&Rbq-nX___r6Vgb?@7zKTife<-=@93_ifqhd*8ObzW43e z>wDj>y}tMD+3S1XzP-NpjqT07Z(?umeN%gL@0;11d*9sN-1`>x=H9ooH}}4ky}9?T z?ajS!)85?sw(QNlZ`Hjv-23+I&Ao5m-rW1f_V(U4vA6fWslC1T&Ft;H zZ*FhzeG7Yg?_1j2d*905-uu?}_TIN?Z|{9u_V(VlZEx>=JNEY8w`*_jeS7xy-nVaW z?|ox?cki3nyL;c%-rf6V_U_&{w|Doxg}uA?E$!XCZ)NZ9eQSGn@7uI@_r5KAckkP_ zclW*>dw1{KwRiWvJ$rZW+qZZ3zOlW(_f72my>Dvo?|n0SfA5>y`+MKQ-rxI{_Ws_t zviJACwY|UhZQA>L-y}$SE+xvUp*go9*CidapH?DS3?tM%9aPM2$hkM`JKHU2@?Zdrq%Rb!uw(Y~cZ^u5|`*!Way>HJx z-23+J!@X~8AMbq=`*`o0+Q)m}%s$@x=JxU4x3G`*zNLM<_pR*Xy>D$F?|qy0@!q#( zAMbtJ_VM1gV;}E*yY}(kw`U*kef#$D-Z!>S_r8gJy7x`()4gwIpYDBg`*iPH*r$8n z(mvh$R`%)Mx3*9BzD@gd@7uCZ_r7iWbnn}-PxroE`*iQyvrqTFefxCp8{6l5-^4!O z`=<8!-Z!()_rAG(zV|Kc^Sy6rpYMGu`+VA2eZKdN?aRGyVqflkQ~Pr7o7tCp-`u|3`xf@)-nXH*X-22A%_1-tJulK&GeZBY1?CZU6ZeQ~eM|ds?_1fAd*9lA-1|1|$GvaMe%$-E?Z>@u$9~-VcJ0T#Z_j?*`}Xa} zy>Dzk?|l>ddGDLr&wJm@e%|}$_VeDiu%Gw7rTx73t?cK$Z*4#CeVg|4-nV5x?|s|$ z^WL{(Kkt3J_VeDiXFuDi}?tOFnb?;l)uY2Fpe%Ds1?|m!#eeYY_?|a{-{l52Y+3$Pbw*9{M?bz>o->&_>_wCv5 zd*8nOzW0so&%JMAf9`!#`*ZJ`*`Isg-2UAA7WU`fx3oX^zLovC_pR;Ey>HY0-21ld z&%JNk{@nX^?9aV#*Z$o5_UzBSZ{Pmh`^NV7-Z!zo_r9t9z4y)R@4atsfA4(@`+M(O z+TVNM%KqN_*7o<_w`qUxeOvbT-nVUk?|nP=_ujW_fA4*J_V?bmZ-4K7WBYgSo7lg5 z-_-uy`)2m<-Z!^@_r8VwyZ0^a-@R{T|L%Qj`*-i#w14-$E&F%x+qQrAz8(8_@7uM1 z_r5**ckkP`fA_wz{lE83?Ek%QYX9$jGy8wcV+{AdU1PZa?HR-UZ{Ha1e`903|4oeX z{x>zo``^qM?|*Y+y#FnX@&30o#{1vO81H{;W4!-u8sq(M%NXx}+s1hR+cC!b->xy< z|MraW{|Lqvl{cqQp?tgp6bpP8oru*O6nD2iRW4`}QjrsmJGv@o>+?elw3uC_j zEsgp9w=(AY-`be(f1Ad9|JyR=``@-P-~V=u`Tn()``^M??|(~Uz5lI@_5Qau*8AV4vEKi- zjP?GvZLIgd9b>)!?HcR-Z_ilofBVLI{~H_I{cmDy_rIyJ-T!9BcK@3j+x>50Z1=yV zvEBbx#&-W(8{7SF)7b8RTgG<(+cviQ-;S}}|8|Y-{~!nQ`3z=EiaVTNuavZ)qI&zm;*^|JKHF|JyW<``?yv z-2b+Xx8fB4jc+WR1R7)JC?7#P6)I#44WCJCZBAZ`4HUy%MBXuKS` zKL}ES4XV_UWres8MGT39?q84;NDLW+=e^RC7#I#Cu`7|(bRw~TBdOuvh%i$biMVry;RdPk#FibjBPs*?=j~c}9w$^ECt*7y?-t7y{WC7(jgR zIY^+h7?>Ft1eqBa7?~Lu3_&y_1A`+Y0|V$Vvj9+;%D}(?TI&nKpz#(E1{u8IA7uR@ z=*}h(ABsWQ8p?!F$mIv9d;^s?5E&>5E#F}CNg#QAa@Z&HHqz9|U4`=%-Q?whILyKmox-hFcreE02F|J!fgg73Zs3cmZ6D){bO zq2Rl3)q?N7O%QzdZIR%+Z)*kLecK`U?%OHBci*lFzWerA@ZGls>)w8QEBNl)7r}Sm zeh9w%#v=6Y8<)_#Z-PSazR3u^`=%lE?wg6wyKjy{@4mSTz55m>^zK`N(7SK>Lhrsc z2)+9@N$B0TnL_WrtrvRtZJW@$Z+nH_eY+y`?%M;Qci%n>z5Dh@=-oGN;dkGpgx`Hr z6@G_vO*|+XM)7C}jE2By2#kinXb6mkz-S1JhQMeDjE2By2n?1Gkh-XDdDVGB$T69_ z8@6Q}Ww1>??r5v+t*iW!wREa?db?9*>P2>s=MmdtS1(y}Z|!bVb)|kgp`Y4WH;bFE ziWhO7mTo(@@X##BZ$?i~TzkA|@A<3x+C}fev_r3Nmdati{`OJmvfbh*X6`Po?tP#j zpd{7zre9QT*|tOdn`V63R&mSQF=fHFbxUk6f8zJbKk0pb>1@}XpO){AcI)M;t|*rc zKW6(TgXiUru&Zt>9cv#5gq_sizDd z=$>7q`(7l_Xx3R}fot8jeyGQ#tXQhtlPw~)F37A-=lsu~FE%o*5NS9z zb-9khgM@mmfc}KnJ!fPJ*>;w7EZhA+tf5@^QKGiG``L|l#`X`E-;PVD^ZJ(7(Q1OC2eUBc-4Bm_D;2IlVaa;jSXI<%h?WX@w450vt2O# z&`X{l?SVm;+0OZihyKb|lW%m~A@0mv=T*69*Db}=1=9~UXDFV}vUh%SvT5s%stVnj zyGLIXU)2pb)V5EqQQdm&u3c`M3xAeg&fi@g?_(=e<6VA5)8bTG%UPz~Z%>6>dVHE& zxSxA3`+D~6Yl@5nvPIwK?<-IJu%%yZy0A{8GrKLrhr8bzd>Ot!c>CcS=pMiqUJT#C z>j4-T7!pAD0)p0XzWea4;oXOC74INp#1Zd4d`p0`VfiiN-G^@l?>>A}c=zF(#=8&S zB#`81y!-HN!MhLNR=oT0tpiDX0+em=?!z~ScOSl4y!-IY11bhH7e=3W_u<=tcOSm( zc=zGk2B?}FP#UHN7kz<9b-45sD<1If!#5L9cyitU#?GJ$*A@c}M~Ryi-yMXqzgdFr z1_qte%K%wdB3)%n!*Ui8HTF+7eGULPDZxOs7zcC#6@GZou z8g$h;Tonrg1H%r%kKbYhA!it{K?l-q6vCB&847JH!FGT+7=vjbK_vV_`W|?XaDeE? zZxtrD;rfu2pfEw}f&@#qDn=KxP=+{&uI}_BV!v+gQ^phxo^DYs4UN21~DzXz6tY3F-BR z5hT5W+(Zn1W5>V%x&sGv_c2WU9+0~c=@p**Kxq+_PT>Mj4Ipt4F33rSB-0DGzC95C z`0bC}?QavLK7z|sP&x%E50HZRl|}ycw-Wi=-*V)k=~Mppw-6{Bqz;5*?S8Ts4ac#!0Kmi5j0`kX&Ti+JkyY-Eo0g*m^py3EgpAO>L;4%u-8i1$I zi?_aIT)g#d%EepYIu$*AR^7VwEdyl6gr6u8{or%|{XvXR!1cftEf` zkdQvVT)qW%E3skm#t)J{L2H3wdSXECMoyp5WCu!vkn{-=0P#UMuehKHk}#nrT)6hF zLh9qU6Z39;Gm!lVE<-`-6eRmW2IAKT^KN|$n1Ab=$9zcmY0SU%%>c>ta|JFB?3)j9igkS&04m$7&YQ`IAID*n= zgE*wV2b~90&j49#;c@ZWH;>ELzAd?O4Qu+mrgHrohwR613>U6_TX5pmH--tfu$G@5 zG9SOak%q(>EPWmaUCah`2Z(w>Li+sk2;!atvuwW$n9HKHe?exUV~5ks3

s`uUsD7XeLLqX{j zWc~zsh+og_yY|gx|Fv&6`>%cD*?;Yu%>HZNRQ5yM4pIlgI{UAEGueOb+ns&azCGD@ z?b{WQc_0Y}28NjZ*S@9fzxFL>|Fv&ENcuvc>^J+aefzWT+P5$Ju6<*Hib1u)sh<7U zzP0SX_N`|BwQnU*HFKaeToDe&6e88(&`z|l2q+91u6>)(b?qBF1L*WJh}IrxID*pW z0*P$!IYXect3VU)pfWV0@!GeF#%td|G)M<}`MIy{+P4)TGa9aat2uD(8^eZcSkvbV zxsTs^ zumR}I4n~MPs2>Z$pmq-ogL*0;3=#)n(EWc~?lCgJ@DXkX1`r0xfiN-m{~^22N05O5 zgh6^iZU@nzy>y`T2D<-m-)Bpe8&6W6&C^f+d)ctMvC-$|vt|YchKJC5A3=Mnm}YY% z33O^Ys2C`)$TS>rb8SerNaYJD5Eo(eG?3{|2w>n6NoY87kY%zuTSB{lq9elsP7zTd z1{Vj01|=sB;VFzOm|Ge4GMN}~F$(P4pkpy%iog^>!>!FuO`#1zjY<++3z#|#8xEa` zJbQu{KKzFNw)PdF` znKCjkfX<@>-KAy?HOGdLfx(WEfx#Zi2dzN@sR!Mw<^mN%zFW-)Dh9e+4R)_uC{!$r zk%1u`ddC{*el?IeARNocz>vhqz>vzwzyR8N1U?_0fq@|dsxK4iel_r!^9&3O#Zb8t zMh1p5Mh1p*Mh1o|=zVJ-Gi#vtuGKLzFo5{H&O$dHaZVC3#bq2)8m#(7h+sdz^U>|FvAJ z7I`l~yCSYhI8D7`8;8n)Ps}rJOgs|cdgIg1hNWSPGG0BljB#G<%PGcRbW1;Edi?7< zKlGJ@I_nOo&0Z(5$Nik<0kc^*1tJrd=o~gJ-{(HFzN64$0eeOE@=I4I`JLWz_v40F zezLBm{Gofdi2PXou>H@bzp|f#k2Y>CiU{^v{C?)5m8_o8BKm2EelVt_#HiT#bS&lQ zWe@q1IeV7A`**J?nJeFkXIx)y%qZMu8~}EA_nPJ(T|X>OPO$ctNjPdLys-eKixW&8jmhB`0g$`t^6gOSM#~ z)V&t7Gqc>Kml__`{Ws-96>HdX!4-8H?5Yp{$u3;-{hQ@>3%RQ0QG(xYUtHzdj|E@*sfH2!-u{b$kmhtc?9 zX!@nm`1)x4E8<|Mg9#x}8G&g2Fo5{yK^;c0ECZM?2^!!);)fzN8bInNBP}ooDFxj< z4OI@-KNDQ}LPS974VKm72YKBlXkYhUP$i0_o)s-TL_mj)BFWD{T2v0QuO4(sGLpOvntCTR^M8Rf zA*sKP79L`th9;8yUyvh__*F=QGNAAi1YH7*Bp--02o93Jj26C*Xy&gJg=&U|*A~d? zQm`OM{|z+v??>~$Dw_W}(991;i;o60^EE(?9k6YX_+>!q)PwBTM)Pj~T6jsJ$#bHa zr-l~)_tDb-JES|jLH6~a#s3VX1Ot-)j23_A(c|Rrl7Lfh0yDUL` zko%UPh1X&<{YTNldn#Idg`%l{jOPAokR>3?py88_7QO;#@$Cjx3!*??uSYX40WJJa zqLojTX!&6cnte}@+z$$mE1(8D$TFz=_M@3+ik2U{(fCeiriAUz4F`gD8+Z8(MzjMGNnCXm}sy<8eO5$KiOKkHwqY zg-^ikFdvU2R3LzXfnkL!1H+oM|NmEm3x_;?(T^Km#H zxPR|W=-^#A{1NfhK%0XGH)k@WxYWD&x^z@XyBz#x$R|39eD z2f0@V!)^zrV_58V0bihlZaL@*JMiAU8aD=p7wP~1F9(Gw*iYblrF`J`H@Wc@FpFWk ze#o60bQa1UHwK1?tpEQ({Yi+sFz!WkV0s00mm^A;fb-rTkpArd|E-{5+RT*4b(oLE zliTqy==xN!8x`Cc7)rAL|Gx;zxL`Me?LfHEg)blwixr>?l0a@uaA#l;$^HKyd>=7F zKjQu^f4&6fm)QL1!VTI-v%sB!VM+e~|8Y<^qTa8hz~sg!;Ea@1z-O3Uac5w-kpKTb z=)PPW;bOoPip9|`+)N9w3Pa8!)A3+nkSPBDAJm7(VXgzydn^Vxaf9zh%mL{y`Trku z&K^iV{EjOHrU<0l+Q9cyfzCpkp=FP>N8--6q}1_b zV2CLF|GyX-7YO&)BRSuV+YN~aN(Z2Qj~Si}40B5V|1ZVRTLe|@a*U6~gWH9RkH;B$ zNhE~l2IaYOgWR~mlY!w%>Hq(>P;^yVSC%9T4E;zZ|Td@SHR;^M`?kWlvje>|w|1Wx1Ne2gfY zg7_9NGCjhYFhFHaix&e!L*4)Xu&x=XikRWWz%Zxo|9{ZgGN3qYW=aKTN>KA+ix&gK zhPwa%9YOAN;WMb=V_^WDeRRf)f#F5n|NqxO;$U}x^D1&)GhhnF>I_iHiC#{*b0=b6 z$_jF?i8lj7LOr641c`ZgGcd#;iGkc1*uM%$thJyP4|9e4o z2iTox;RU)+Zz@)Ig2Q`@Hv_|g=Kue@nHd;BVbcn__Yn0yz69oV*vb@FZcsY@;?2My z(Ek5FXdDux9}&+!&@=+NqSTQaC0DvZ?sqltVPH7Y{{Md!s9g?rJ2;HNaSgpsZ~-H8 z0JeKXL08u?fbwUF4+8^3@BjZtpz(y7KNXlJq2+7Pg`1!-UgN{SFr)YXe^`?SWYz&6 z28JcQ|NqZ`o8=0+7ts-NFQNjI7n)hHy#B+7fq|zFdtL{X+Y-JE3^INH|AWR*L1Bb( zmz+PJ0aG@XID+0a8R5&o@TTwo|7lQnVbSlvREb5uBR2zR|Mm=D1_q!0|NqmV`Vn!& z6oh>7C#Y;W;>*A=q5uE?H&C_c;Tefm-Z^mxqKUY0gX(!6KL!Si3IG3t&h7&F8CW-+VZ#6aYf$S@aGHVM(-^=ki!Hsn zfb01sehdr@lm7p=fwvP7X%4PG8Jm7LZctc00qLLe|34`0gZzaE%M|3G1WlPR2>3HF zh)ntaAC$a7!3j!tD*g-%0#l%A1+)&6fq}uopMgPV%K!h)AVpAr`uH<2WK8-0Ukjcu zy;0j}p!Q4%Hg`h&+2hZ^5HbD#|5&(w41X3d+hf!3#0_dAp7Cd3sF?Nt|80<)(DEiU zoE(@oV@Y#v+%CAD37VvrH4f)v36X=8Z1FRSefp9(K?iO_O1rs1^b{^m`pP~Qb zH_#cKAfp%j`GgTZ$mWCCxXeFLfW!SDgP|ByuA%E+-~@5s2{QFF1VHqk!J+?x(Wh?? zhM&GA7=8N20Kyg%I^HaTxt!`X~7P zoeo&kAjdzbEdy#Q!1RJ?*!dGR*v$u5{vdZi-3#M0z|=!MZ~%+lAoG#!kAU6}1rmp0 z(D|$2p`==<{jl@EVdldW!f2>{2~hRO=7ZWapzs65GfX)seS_9!Bosl-he<%`11~;( z1GxdjZNQ=iY8^_2Sb z2P#`Y;dh_{VixGUVNjbV0c%+UZKQ$r&Oq%(HXk%DfHQr-&cEhh0I$r4m1Ur`itXMr zg!^GE1_n@@9GCeHzo2=a1A3k_)IN~;ptcOc6jT;0C_$pw(l_Y*Zcz9rK+8+ed94&E09H{vqIaG`=0nCD) z9}GIL6{HS!-tdB7pTPA2NDLK&b%BLI=^vCoL16~d535fM?%f6Jht($yrO^5WtP?kZ zFdY)_F#o~A3&aQI3tav~)(;A2T=B0^1`Tfx$XUBE^Fe+Ak2~RXBEkmHFbnK{G*JA4 zx>e}mfnf|(djrgVGzG}{15`hwyMKWor2JY_X2|*%8@H2iXS-HwT#eq45E856FH{ z`hv#?2jm<&m^>(KLFb9X>;Q!~$h~m&FbNzqa`=GCKlJ(oOCN1*L9 zK}AS=iUG<;HVecC*#~kD+5-9vY!=6Y+qA-!o$CkfA z?gN?60BsL~_#pow+Xv2H(Do$Azu@u&sr&?$>&WE|sGsxzY95MXuyByw2P!8(=?~;5 zxKe2S4|7igBMW#O6O=#TYVa^Xet}72tv{jnSHkLhQ22uM!0ZFL1r(n!Gtg;d_k;2e zdi;UH6BNEM^I+yHK;sV-o*;L@(hI131dV?ohbJiC;0jNWTVZYj#S6OqpyCH)KQ8}) z><9TT1?nD<`#|Xx=3bEhLFF#Y4v_mm{)DTCNkC~(o55NQw5E@N!3|1>Lg@r3odcyS zpmYb6o~#DBmtdV5q)pHh1=&B%a*GkXrxUc^9JFi+t~Cif$FkL(8))O!gm zydd`yfR>(t?j`W?f!s>~GV{a#|M@cMAHnw$1Vh7u7^>j`;w}Qv-2|Y!A#399eoHWa z_ziUT0O(#KaK9&(`TLQg&);D2XcKq$8&BNbZ=iSrwH;yQi^ILU-yBv$#vDL(7HADV zc+Y=k)%RmnAHQ9z`uOcx)yHq&sy=>WtN!>+toq|Owd#-G%&I?rbF2RNEv)+Ex3uby z-^!{#erv1#_-$JC$8XE3KYrU*{qfte>W|;9Re${Utoq}(Z`B{avDJM1CRX$Dn_A7s zZ)PB+ zS>4BPZFL{NO{@F(ZCTyNZ`OX!{tN-}T ztp4LSxB8FY!sC^-=@`n{I;zAOX$_ zR{!xETf@h1Vhta^sWp83X4dfWn_I)jZ($7|zoj*N{8rZR@mpKN$8XabK7L!)@bTNW zhL7KlHGKSbt>NRhXAK{}eQWsmjji$HH?hW#-_#mEelu(Q_|2{HMXYyS8xtoh@&wC0cB%9=lZYis`aZCdlkZ_AoLe%sdk z@!PTHkKe8}fBg2W`Qx{5%^$z9wS4?0*7EV2TFb|8W-TATxwU-!7S{6dTUyJ-hMM zt@GnIvCfa*)H*+YGwb~L&8_p}x3JES-_kliek<$z_^qw;PQP@ycAS^b22b8 zz?Or7_#n&#Rks649WzvH4U!la10w@$sS`*a2y-(qGVFjBh9Eu&^Dr_HO)aWAxd z2Jf)~v9Gjz2H*JuVqb@{nV1+Fm>3)WC-M106`!8H7jh6@6RD%5dYd74 z(M`qkVQkUd^%qu1znr=IS6{ro#e*4!UJ9Xg{iYeO&ndq!T;CY9Uf9Z{_dw^vSm9;o z!d~1?mtK@3@@%P^*B1qOtG6YAVd<6fyB9wd+Oc!DHgnDOzXxxsKRyxLrD3Bq_hqJe zW3`pPe~(MY)2L(H)ryxJ>~J_{!4SK!aDhW%|Awe^QLm}GA0DiI^V~=;BUkQw;O>>a z2FthnXq)`($Ly6ozW(2@zC7{3`;tL!)wdPJiwYJf1+LsWeeU5anOToE)<&*iFg&DQ z8Sqai^uV=KTmom=Pqn#MQ?9Fa z&uE^#?;}H7#TI@I;ngob8yO{j{u?X#TzRLVvBb$+m(<0oqWjNYw=2EyM(5$;oB13Y zonI)HOiz3F>;Cn%CpXpl-$}8$t-ZN0zEULo$VcaW&TM;}yiO{pxf?00;#gk9b60}H zeD+6o9T_1*`|6;pXKNg%=d+f)+_zgL_>s<6x2G+~@}?xNXj`Ud9dJc#<`r%Qj!QNS z?bmngJJr0m-ebC)=!v6~x^G{--LAoyq-LG7IDQ^GB!S~HJRP_LJnB7ZSl`L5Upo%^3~_lH)U^);S}oh&z1ePjLAN;bpK3@X zccp^Z(PK|uIq$h4D!4iCN$CX#cZ(ORm#`&w+CKd`za_24~zBwzBAG-=J zewSBV*yW<$oBX$Pilm`l*SU%v`@KY3rZg`te4u(@f>g!1$Z3C_X2|nNnLIANCh>aJ zwLWLj?Vr9yPyT%QdD~o9>#+D^A!#Q#kG>b;nSA`6XQ8D0Pm>en3sl$blGT&Ge^{w; zMW+R;;dl0_-mmYxiCg%(--fp}m^o7PG-v;NvzFB|ExGrOu>1XbxM-EIu!fsy9@G2O zo_}kl?!H&9T{7+NqSMQNwWb|5US=q=YWH6slex>5b1AObxxdcxjp@Tkw}z(yo75t5 zdeu``R~hM^s#_&{<;Us@CfUPWt{Y|U-z+_K?q)^z#krdbGJovg3i#61RNilzKPghN zyR(zp})Yo53iFd+xxE0Fk+S%Rgo75916Ls#6TV>=S z#yia$zbeajvEJKUzkF-gF1FVz%**RMw`|Pz5V_hqRU`7>#$8wTs@ND5U+s_mS^x37 zEZ@z}saDrlvm80pBYn;6{<<3$+S=7dx{L2-a9PL;XZ%|5K6HEPRk6ZVTaNtt{o?$h zeHm;9doBcKrW)*Iy*$V6vTX7n+qvy+)*>~$sc}}@7s%F?`u;B2lm3i3XRD@G()=2Y zEv$EqJk}n6SiOr$!QsRPm)Rb3|4Ny8IQ_e&HT8+^#Vw~&*GeDQ9#p^4@XaLSzK1bd zqVJtKzgh*%J?2}}7G{2$eSXp6`^8(kT08!*A2d7Fo?vM7q5UTZ&l=rMg&&)Ko-lN_ zd6Dgu#9g5`*Tj`a{mid|JEhIrFKex}h`w~~$3e}B68guUDt_`(UhzEt%;A|+Gb>9D z%?`Q#xpFV}+M<80CI+QO6ISTlV}HNl^$azs?biHKJIzFQ@?PE&`1`ehu})pNwAc9t z`JHvE9cDd9n8nO|aM@A!&r;X7{rnXb5V1#T+w^10oCUg`Zni4?o8iu+@*&5!EbxD1 zhO&Hi&CSw2VY{8J9;x3a9Gd_CUeKX+hYEvlsT^k6aCLP}0FOX^&U=o`E!+!5M9lMyPj5lu>AXM4^aS!^=v<(GA}swXe+ zeHQHTwzWe!cmL^YeQH~dq~B326tvu|@?w(t3dOO2>ZR%xykAq^b3g2CIZ}nYjx7lmDlgM>s zRmU^F{+}jziRlQhQ?UApHQe?~ve}L-Ii40S>}V12ap%VKEHnQy?qqr3`uNeN;N6z^36@j^NtERO%OeNt(A-S3D0sdd%wiKE&e9!d{5r` zKEdUca{sx1B`k(M&$bG$@_Y9-sk405(=P40?Q2Y@o^OgWtNH%!Lvs0IjRgyWx7zOQ zdbQW--L2~nPwD>h>C|d+_3#s}x^V4Smftpqm%HXYo5?A~f9Iny%lo)i_L78KsX=WV zZWDJ)2hTs#Yu@Y>;=Nqb$X2AL(>$zWhvS;>2d^`0xh_jyQTN(gktgO{YC!0u`n4Q4 z6Z1Y!wwE_>YZMQgx%N5Fru|RX&va{EZBzB+a>gFDZJ+kv*V!Fk$|Lby;7Hh+V{Liv zOWYQJuC6V6_rLZ}rup(8mKMUckr#i)mK7dwJJQ{{I#_Spt~1Lc7VX}YIQy60_Esrf zb$-4Db0q|it2aMA73=Do$fq!E&!bS=wD_;rf1df3^7}`}y32Ca(vtr&pKBjW4PyOd zyW(2C8n1?-U)$L%#+axcNtZzTHR0dmUf$Jc`TF|WDiz7Y9=DFPtb3u9`6q+*>shse z@>y)IrLkO@&t24gTm*jhOs{ru=U7pp>){=y68ku^H)UR7dxYCA?}8A+1v3tvE9kA5 z>~J#9fHkb6uWZeY7xV64W|B#MG;Na9HPz`|vwEVda`<CHL&S1nt}IC&E6}A7*fUrfK_pwW8qqx2hj@-0YjiaEI^2-Z}Ff zxi262u<$FRlaqAh9u7VIce0P(h#x(a_~_=<`kwfkzW-0!U;kaSMEB;W3))vst4~nW zd$K$rd1LYHJc$#|mrnkS_>;h^U;b{}z3uaIc8jew_0X?1St{`0=2Ww_KQ9+9d(`hN ze1E>IwYm1i*#(iew^y)~{`j|S%9Xuy8)|QBU1OiD&REra;;(&)aomC*<=%Xs%_JUG zc(t6LtL1U^wG2<(#Mt+;!amn``bnhy3cMpFr10MQu!NLB`hrP!{Y8!ztkErrl{lze zy)~Zo@^AKDofR|v%6t4Y8f5t=7OGjzU_9~X*sYNLxc2`GY7kV2)1JK{f2VG5?mF4un+WP#Fhb^1L45)SMg{@)AlbtlObiV& zj0}Ya0!$1IYz}NJtU`JxQ!{eyu({gG73nR-MP%tiJVsLEW z5`4ol!J)wsv=<)~{4fmKlMh-$3fhOy&&a@lyayk&{~omO9;6nw_g;<>vi}~m?;f<* z9wZ0CN{kE)%Ai1Dfb6|jL)w22lGkKpV1Vtz2kpVvXJlY7WMp74hUzh6gv6~SBLf3y zKR!s0EmRJ)e*&~0AG8hl!)p1{)gm6*>OwK6F0#!`XkYEKYVX3FkGvy?!lx9=F|v6LlM-60wEN5Q8l*=fmQr(IUBGiQ|Cv&+wW7(ct|(7BCS`-xon%&Z@2lnOqyKZL+m?@7f&y#5y;TW|GvuyqJOpgQ0?;z2eGf{8?!HiD>*1G(PfPSde+OX!7gO__1jG4m5rS8s7;t zpa69*XfIa|s4zm}$AAh-Bz_!p&I}|3QXd8`RX{w*-b5yF0fpfI01fykuy3KJ>k^E@*qxuJS__gU3`D7$VW! zmyO2vM$_L4aun1E5YrdUKcQ&hiR3)+{w!sXCS?7fiU5hf8ZA6+(Zc^WsDeXMzZOk@ z6`J{X(e!tsh3927J|mj@U!d(h-;EYO_t4_wJes^AsDeRq?`aXX=vt8hq?_! zf#UxTT6vR$R)2M)`QHIez64Fa87==Sq30j8^lgeJKO4>c6Vb{S*cn+c_q(BmPY%da zAW3NafzGOea>3=#Vzlu8hi3i;H2zt%^so&r{9mD!=Up(%p!WYj%O8i(!f!KLd?OhL zt`85Px%Vepet3uGz790=qS3-v5KZ10%|B&m=|KvOzZcEEGidISLW{qxXz76qE&rIK zxknu>e3H=GBNx%k`;X?H-)QnNXzAfIntzU=xxWJ~JvE}qA3)<@Ml0_Fks=UewG3MR zc!uO3&{lnC?f^a!H;k?N;I$Jo5*Zk5^#A|22Bj(3-sDWko-0r=?MP%`h|wS2#{>$V zQ9K#~qaiRF0;3@?azfz2zt7(${KLL>8Wai%)4zWM(YUbGhHu~GH+=i1yy4q7tqtG4 z8E*LY&2q!HZ!R0Yee>Dy?OWuAZ{JcjeEXKW;oG;;4d1@iZus`CYs0s1(>HwkwqV1z zZ)-Mu!)yMx{Sfp2?T47nc>rP_$b5+d-@bw5L0DnN_iuRzzkOr4@c(}|l4DB`e*1Ri z*tc(!4u1Qla{Sx3)d#~;@h_ghal>f9QyXn;N-V&2M&Gvw&3Kq zZ?~Z09}j)|#&hc1H_pS~zWJQ`_D$jNw{KHUefwr{_}jNLr@nm)JpAq3k5k{ipZ{3H#eTz8#?c1Wm-@etH{`PIl>2Kezoc{KW<;=HlDrdfZ+j;ogw}dm_zFj^1 z?c0Pi-@bi1{O#KnklfjC-+az~`_^&x+qX4mzkPdg_S-j}bKkysocs1I=iIk%OU`}! zcIMo-Z#?I}eKR=!?OVb5Z{Mbz|Mu<5`ETETod5RC;=;FY2^YS7TX5mqw*wcxefx3Y z+c$-a-@fr5`Sva3;GZ(*o`*QKyH;qf*z6D(R_O0jAw{Kf6ef##| z(zkCCm%n`rx%};0#pQ3`wp{-9?at+I-xRKV`{r@w+qa%8-@a|Q^6lG)E8o6}T>bVf z;_A0=4OhQ?J972gw-;BxeN(vh?VHE7Z{Ku|eEZgL?c29C*S>wbaP8YShU?$H>0JNz zE#dmNZ!OoqecN&U+qWCnzkTyM^6i_%jc?ylk9_+UapT*!h8y3$t+?^++mjpLzVY1r z_ATP(w{JB!zkNG#^V_#KH@|(;x%KT^z^!lJCfxe=ZOg51-~QbC_D$jTw{J~HzI}_i z{q5U=+uy#Oxc%*$z@2a3Ebe^!)^O+Bw-tB3eOqwk+qVyQzJ1$!v~?VHN|Z{H&BfBRN*|J%1U_rHC+aR1vkjtAeqX*~G$E#<+tZygW5eY^1B z+qVx7zJ1eq`0ZQ3!*Ac_JpA_Uz{79f7#@B5rt;|9x5lI2zQsKH_HDzXZ{Myw`u1(^ z(Qn@*9)J55@%Y=fn#bS1ZF&6d+m*-PzU@5v?VHGxZ{Mzf)Ia(5?bFe3-)21d_KpA8 zw{It&eEY`n^xHR`r{BI6JpJ}<%F}P(ESo_+iF;n}xu63@SVi+TR-Tg&rr-wr(g_U+B{Z{G}FeESyi;@h{L7vH|^c=7Gq zpBLZ0DZKplE#T$1Z#6H!eLL{-+qX9_zkSnr_3fL_t8d>Xy!!TS%d2nSGLL=x_TtsI zZyK+^eG7U0?OV(1Z{OCu{`QUI&9`p`Z@zttdGqaC$D428_PqJ_?ZumK-vr)%`)2d@ z+qaar-@diH{q}9i+i%~_y#4k~=H0h%9`C+=>v{L>+n#sdzA?Q2_D$#gw{HpWzkO?Y z|Lxm}_usyKc>nEN+p%xo<{$g^P2t10Zyq1MeVg#%+qW$rzI{{p`0bm^$8X+qVOszI}W1>DxDz&)>cUeE#-r&gXC6PJI6MP2|hB zZw_BD%PPkI3=9{he8pRaAr(g?GePDD?ECr+bQe2JbH?27-vZ`-|7J1w`!|KT-@kFp zg_O|^-@knWZ=L}uWd07`&j(^Q{QmZh0oJEP7XSC{8+;icvN*%{Z=kc9L3$aG#2J{r ze}f;M4i}%paE0~zH)|*#M%y!g2d_=+Qy&LG3~{o8A(dgAqEGq|uJ+zHbc#rz#I+yu361Iu^t z8hZvtSSQqyA%h5g2zSEtSupfqaVNTcnEJ99HV~l?)1560SCHHZiwDBtY0K~fi#~LB zV%lfQ5XX!NPndn^`Y`?H${@jx&YiKaqCNCsAk60 z2Wqo`VhXpubcPHp?u7XdrVle*<}vhO(MLEx7&C0Zq7U6ZM7V%l4+@t>3|Fv(3t{_= z7=B>UN7z0G1{n^_@I=>#87|WpW?)G#o0z|U0}W@v!V}YfjtmYQi1Y$WXN1!WE5mjy z_7RSE7KRH%=z9t+??7o46bqmen^Lg2lW@4`GrYuNAG$uwa1mo@L9!2)kJwnggV&cI zV3@;Dz<^wS!qST{!wM|%M_Awge`k>FgT(`GeXv1bE(UHE%=p8t59Ur$22CV=F#oZ$ zdwm_9a!2rT+$LF?ZJ23-2A8RlUL z7f^o@76Kp|QBJ_@V`A7&gg!*P!}KvSoFzgZrvLO0)FAoqF*N@WEuwg zh3QVhIgceYnGu`+z=D`x=&B2!|)n0WU222!|){0R?VExdgM1 zaCq_^aKWOFaCq_`$iSlycen@~$UyQREWHp87r_HPNcO?>5e^rj18cD8BOETm2QFaI zM>t&64}2j)A7(leIUvJ>h(DPBVD{k-PsaZ(NZ|>qH_^idQSO4uBoJo)KL?9GM7;tj z&oK3||93!gC(J(d@Wj-|_J0Q!`_Su6OnprMQ?S^F@E@-FkL7;{7JUf+;nD{R8&rH@ z(${aGaRAUb18Az$V9mF0pd}#_R)6~jx(1`6^Xs<~V+IC+NngJSfX;4O{`DJp$-?xn z;J)mK317c~rgRsq{`!sSKLdlpgsU)juirL+@W-#;6h40aR`BWTw}x+Dzd3yS`pw|y*KY}}U%yRg zg{VcioPi;r2_gp5|DfsXw*#$TzX>#d{npU@^;<#9*KZ425c)x-_H0SW8uDdOdMlJZ z0Hx1B=^Ie`1(f~_rTL^F=LASdLCy(S5d%3VV2eC6_?!UHx^(1o0$kWxz;oT87U|c2 z|MM*-eg?;T$m-AFF_$Y-K7+?%dZf|L3D^J`TaiFJCt$*p&){82`I3JoD%@DA9PN@gJYk;=L8_HBSa2UTx`(U0HAXLE+l>ZrjYaX z+kx`y-xy+@4e*V_>_Vc%CZ$E!q_V)9)ZErt+JNEYT zw`*@de|z@!^S5trKYwF;_xYRHyU*X$-hKXN_U`jHw|Aevg}wXyE$!XsZ)NX3e`|a9 z`P;O2pT8}8_xanlcb~rIK79T*?ZfA9%RYSmw(Y~` zZ^u4-{&wxd=WowGeE#eE!Dv_47Beub;oE zef|8+?Ca-mZeKrt3;X){TiVyp-^#vz{?_*O^S5bVKYv^H_4BuFUq634_Vx3(YhOQq zd-nD7w{KrRe`EXh`J33c&)?L(eg0viP3-&UZ))E^e>403`J3DK&)>qn zfBu&C{qwi7@1MW5egFJz+V{`jmVN*HZQJ+H-;RC%{O#KJ&)=SX|NQOS_s`$hetiBW z_T%$6wI83qnf>_u&F#nMZ(%<^e@pxE`CHkK&)?d9eEv4=$LDX$etiD6?Z@YD$9{bN zcJ0UKZ_j>w{`T$1=WlF3KYtVZ`T3jL&(Gh?et!Pu_Ve?%u%Dm5rTzT;t?cLLZ*4z6 zf1CF6^S5O`KY!cy^Ygc3KRV`P;EypTAxE_4(VgU!T8y`}O%7 z+wafc#D0JNruO^uH?!ZLzq$SX{4MPF=Wl7hKYuIx{rOwl@6X?+{r>!I+3(Naw*CJ6 z?bz?n->&`s{O#HA&)>fN{``&Y&*yJqe?EUx`}6sm*`Lqf-2Qz27WU`!x3oW>zm@&@ z{H^WJ=Wo;geEzoV&*yL3{(Sy+?9bJtfF`ub@fRR!E03##U z0Y*m71B{Hq2N)TZ4=^&SA7Eq@Il#!sae$Fg=l~-l`vFDSTZm&S}-s&W-~A{W-%}_bTBY7v@k!2HpdV3`_?Y8F&sbGR$FMWYlM1WVB&mWOQU; zWH4o5WVB^qWNcwzWSGXl$ngIkBLf!$BO@yVBO?m~Bcmt-BZCkFBg4Ocj0~W&3sM*u z8Il+n89?U~urV+)upMAz5IDfdzfd?SAM^aT0Ftr^X(y%qa7wE11oxOzMs4J%kpL>!_xr{R}LKGz4cv4 z;Wbk}U-X}w%TL(4$^J_IY;MTwWy7o0FA6ZFMiH2@35p?KyeEC|y&Wnq8+k4&op&~N( z$7#!}hCM%z8a%08yv^m(%-Qc;_pH}QDrvCmmDbY#G09^&ck}P;LmIIs6+>3*{MFOC z(6i<|gRrsuElx3kn);=mw)5%T+deP)%2adxMazG874|t&hK~ zE|ix0TaxkG@QsZ1!Vv40p3X~e3vSgB!hJ2A?gDLivhSCoF($AzDQ zs!RXmU4Op1=ADb@>b;5gE9>r0)0m{NtZ#L*TB$=pxAG;o&qr2H^}b&HMJcIDsGhHPUEs;@I48rJ50BTWc$QvIx@EQP8R4rydGT@=Lc|i%-0NQ?9skqNTLZKieI3QeO_RzLVOp zVOEh}ne=9p9R)kn|FWuP-}8?)OgY%udD2~Ce}~6wrJ#>14;mdX`Q13tDI)yrb(xSe zji=S_)gROo-&r`lEwgrSP416C8Rho+=SJtlXY*OrfB*Vs_Q5~u?JG{^9Jw-YMa--l zPqgI3&TgG5$77~&Q-IB>Mf%{I-5Xv`e}-%S{{m|U@SRCh?n35=Oc)dx*cmh!q#2~( zD^OrX*Ok3Y3?K}iv4rmbZ#d4x0K*cT3=DrbQTP8JIm5&N!vc&93?R(LzyNMqgT_HX z`~G1VwD%u`LE<0`+W-Higoy!$|8OucfG|i7go)Yz4|5xs=3roG;DFc-YP*BX0Bx}V zHQqt{|F7=5_)%>^kkQ!kA!y%@EDI&8v zTKagHr5G6;Jr!6SN~X3bwP-LXDM5DOO=ED_;K;E{vYA0hg^`g#fDL+YYZC_(!-S?4 z9SkW90xAk2TnTAOW{JAN2hS|$jvFfa+S zI4Ll+f!qR$k7@=6hFTDVfq|ikfq|i!fq?;Z?tB|mtb>7p0kl5|w8pcSfq|iqfq|hP zbj=Y11H%-knyCy749I)5K*FGVu4aN53=9mj85kJmFfcI81>IW!6j zfnh%b0|V%swSx={42KyQ7>+YAFq~#!V1Vtfyv)GBaFv09;X2gJ8&LWt0|Ub?1_p*Z z3=9nS7#JAtL&YCJX%O|0fq~%>h{3?X@Qi_h;W?E3l7WHYH3I_!=#Hy*3=9k(85kHo zL*>3OFfe?DvOxoDhyK0J`^zO->e9SsreepGhe0!%l^i%v2>kkg`?eZOlyUbGZa(#} z?dt32ikl0$HM#dTuW-dImeyBgtGCP$DNQiG zB$X00Pt!0$%C#_dX`JW(C4IMc{CK|dV-;IY+GMj$M>^HtEzhvXW*0Hy_ z*DLKssKKtpG>?qfRkwT(uD6({DZhM1_Nokz{hy~i4~S2xV!P;<8q2&O(pmCuW^842 zPtYX^A<@{sp8NB9{e+wpE^T8OK$m z54DP2E4p6EW}o+4ASLE8tL%u7oG zmuKfjs4xCgtigN5MMGG3;@p+3jSb2%Etk1{JUj4_U`;N+sbA5I*LMCUjMZy% z56xe>xZbpIdKxtEvUu{rh_Z0^PaSSX)>}7M9fBqWIQ0fpkU)8$eON0&1soDz03?XS z?*s7}7p15Wfsfz6Z_xx1a(Gq8+@?FbYk68fbC@NxmJ;J)p7=Dh=NE7YgG* z%egsd=Cz}l$B(uTjtMki0yP8V{xxXw!D##3n9}N(Z z{|uV_jcD@E(c-ff%{90%RETa4zuM`-*rX#PKfX5Upb^?qpXyMv~`0L?wVXy$34@r}^J>kwLaoj?n( zY&84!pviAXOAnc7_Hm(=CnwO-QvoOvpkCkI~$_4b6O6UIvB>Cm0!CGlEt% zax>g#V_^7jg@FMy_bbG}%@E7Y!0@4-k>Ms2MBaj#fx)4Kf#E4Q|8axcm>=937B$iT2cl?mK00I8qH#K7<%odNEiWqb?_2bh@{rbEMH zH#-A^gCrw^9uLHQQyCc;7Q{0!fcg_4{Z3pA3=J-f49-yZm2fjKTxeos04+!b$#;YJ zZHx@dp!QGYWneIP&d31jB7x+c*%=rTm>C(0pzaL;Es6+bWXOX0zZ#TYj2Rg~$pEDO z5-S741$8C{JE(mXObiSO=?vih5l9|%4w*tI1A{a){=c#?FchdF)Hi}MpDx0@FPsbv z8*CUEHbd>J;bLHz5X;Dr$_DZ8Hf{z6feDNZc~JL#=V4$lIKs#PYBz!Go5I7ua9|Z9 z1E`n;@#A?J7z$1^GU#$c^xpxcCmTe3$FVXnJm_X%aDj%ekq`qzfEg15=pJH_{w6^N z1_2F3{G8-tU`SwPVrYf>_Y5dLCnM7LS!M=?gc=40(3%&J{_mjh1Nm_jkA}c#2#kin zXb6mkz-S22H3TO7`Tot}4`lx-Hj5Xu|N3@>;TL=_>H_;8-vsP`d`qzX@r}Xu$G59c zIZ#s{UG5gcFVL_g+}H^=KfW!n`GF#)!SoBf=5>MVk8cdFKfWcn{P@P;{o|W~GgKXn zhMR)QFo5bm;Q8a5g6EHK4IV$f8F>8orr-|I|H19Yw>_-CzB#1+0Pjy#VgB{aAq&EG zVE*;ZAQQqq!2atSXv`gi6*_->E9m_3&7t$hx7#?xU$OuC2I_u*x*Q<&7rG(pzp+F7 z0~24+1rh%bRSz?NLN7#|hXd8#gdT`EvM=rVe}VV7g2LFH{}*^IFlbgJlpkUjs2iNd z|LYs*SUgadtOlwE)II6q{{>zP%ErLJaFg%XH_*{fpka)Ye80Yd+Nq!}?Hs6HWIK`B zJlwy)>rg@VZ-Tl7WIsFqFYw+!WVPt*sf@qC`+-6BfX-_I$p<+8_{QM)?T#H)W57X1uP2>U18!*BmqEc%h{C!~KbA^nH(+kc7? z62~CFgBN!(Ffbt7AHa#<|IaAY{}D+)w)kVf;ipvT_^HvIb8q4^u67n}bJ zxbW*2Leh`T{R#xaPZmi($PMW3zra2bTsGPZLDr1>KxxpKYoPp+CIndv-Y5iF3!Y;P zT?=l;1YQdcn*Rfh2Y~V|=osFX<7jur9fa&>zjFn$|K8^)WMBR{A=I_tS9*Ve%Qw&j zCa8=74Sj(22;{u~4$l8NufBuVf;+Gx)`G*rp! zVD;l$LixmR2Jbq+d3nLA3Evn3`o1NcVECj< z0sq8r8+1j!2TW%Be!*Vk`-6*|-yKrAzZq~${N~Ww|7}6dC|Zw{|Jz9sZd_@>Y~ z;hO-r-1iA(Y~Ka4y1#u$>i*`yUHLs>S?{+EhuObBV4L{uzz2cv3c(Y;9q6C%O`)#; zTY|>KZv}t(zCUpK@y%dG_qPVyiQf#eO1>+&iF_~c@B8M!FZcb!*Pq`MX7qo%z%BQ^ z;7!N3gi`|F3j+JTUAWBo-C(NdcLx56-vUkxd_Pdg_Wi)yAKx0RettV(Gx1wN#>8(A z$|rt1@a4z11(QU-gVy;^xXJbX!|tEo9%xVewjrbYo5HjS-x^qcg5wmH9>6qoPXLI0 zrybHpIMDv<+miNQ-(Y-@90)Jy`SmTK=hrs{5Z(Rjn?m=mZwtDAeR}}HUBA91bp86a zpzGH+g|1)U9&|#?a_IQ=jRAxi7#IpVetk>n`1P#@%4g{O_3cH+uWuJRetp}~@$1`y zj$hw8pmGLhet!FK^yjw=r?I#h}=yJO)W<~fD!&mD+U0W&NF=@&%mmoDe*;;FU(LJ)uR^Gd%v`c+UepXPJx$&cY zI@9-lE|K1Bp2Q%XSULOMzAsnvbT-J^FM9R+QslLbk~GQ(9 zdwv$R)o{LNoUs38o!$0N8=klCYgo8Wg#EmF%#EEX66SsZo9^W(s%v|d{*V)Naxq+} zbWq>B=Dfi@1|N+u&Za$l;=OZTOz)I%tlS~=bhXIwGcEykO}p1c<<7fpv%2xc(+A>T z+!NT=yplAU^yB){AD1Lal_x7JrDlA zFYIrc-}0@jF4I~;`FLTp)lb&C`4#DBm6+AvN9^DAC;ebZ#r34_iM{bmTS{lC_XKX0 za+td7Ps_xK|EuQ&P3V*B(z>c=I)Q7Z(9TDlU-`rz@h8oCmLS{W$DFu{|4@Tu@{jAh z;z#T*7Ak!e&)mYI==^cD?4)VW9`IgNU&bFJ#*q+T%CV|I|E+V)%hWy*|ETt?RO0t(nJDyXD7zAGQ0%p371i zFTb@9RX%%_y)?>qrrz#nvDYj+%eN=zYO=1LWk2_1$a~KM-v{o3jhkH=s`qdSnd!Xc z;9=gVlGLHps2Kf2`gOp}M=8NY{E6H5N_d6Z1Otq1L2Le>I-vyw^MUJFBMa$cDFS!cQk$xyJJ2zOh2+wmX44wB9~D z`8nzc%jS?q}%HDIE{Fc;4;b zvE$gqNVPDdRfg=RZuIN!<%u!c{zGK>&tD6K{?1rDh3i7m$){djyUj|?zw^8jJgcUB zVS)RtRQb8a0W0=KWch8~(!8oqCM+@X#KA(TpVhH(&ra^x>u6(pt*EIq%;KDG{SuFf zCiVS{I^7pmUAXqOfQxz2w1ejxYSgcVyegQqG^0;+-Sih-n;4x<_e^}Yd)o)=L-Ai5 zA4WxS-`p7UIE^p0*~B@`(>>{E%^G#Ll!-OGy=PbFbN$oU5Z0`ybkt}L`>u1Q*QMU< znHB0bu|{|8flEvxbCUPvubap`VP=;8+)ERthe>{S`pe8!zTvthhp>6x)bfri8&(&d zpQir8ULs~*ig3>I6EZ5!OD-R{arRuzs)CoZ%xi?2r~W+cv@z;M#q*PTXCwtbEY%FP zP%vci3JyQ2x-Y0w#e3J&2lLOCKTJvaxobh~8lgZgg*FYD0+#Gaz0iF=$k^goh4 zQ`@BXt>Vkm<0Tj0o92su;weZAUwhwRjposF6YfrHi@95UP~S#9DdDs0>nmRm`2_4# zxvaBicKwQ58(XikqsZH+^j?bB$HgyRh>Lu>y1Y%k zH~oZih7ptS&9|A+6V!g6vAX!=SIoV*pyMYLS18PQIZIDKUtY~T`=45MiqpNtMG}n3 zCk12uPJNXxIP$WPVkA@pAU8d6N&Fp3}PdX0&0!Glw5((>9%-5}va^ zz;R;kMMZ7{7wzqCpEZJ5&djR3-sF1RsI{uTtXR2PA$v||emhUys`GzX{6hDie>mk| z=#7il|2daD>E^fDlP0HR_wD-CxXRr#=e0K$m#n#&Iq_4aMwOREFye81_^@qpx6mhb&)i)us(}@2&MkVw-!>toZ}XR5;x8Tx@7}=> zZ}?+Jx`WN^fRFohZ`HNTFno04--4J>r^gSc@%&%+Ju76}(abNGDg>TN{`$1~l4j`I zB$u+K&b;C(2IklGCqMsxPyHv`{b=sb1)Fj*Kes!b(iEF>_-U|6d6bqsTY&Ipodq}M znO8FO{Jto1<7fW*<_%LyLtpp4ESS#!#qQ)|?>|!#>^n^tygQV=mA~M;{Z!_thhF=3 zCcbT*GsQEt^W62k^K*~JvR~iYFsps-&aL}n7F<(n?8_)VeEsFOl?Nwzw(F%nXm7MS z@|joWQ)xTf)obr>*+0tW{_DA_{_FQR;agsjf40oX-aP-s3%<|A~K!)q1}uZtBq95SIA3s>ers zmEOZ>b+)-PU9M{0`qutIE$)!*wH>Qgolayk3CLc%;Ps9JvL}?z&ui9?^%Kj_>8ma3 zcz@-Isrc9IXAW~2jf)NY8pGdS;QK7|y*_02Kl!OYCi90W%;8-4!74`n!+h~AO4gc; z>!REZId`w^w0v&f)YQvh*-|=Z8sF(hmXH5s%h&>^yR!d&)Gj?~FKj9tC|9m(P+(-6d(Y zrtE~*7ALM5iL*91&sgMQxPM!rvQ7S_1?hT*sWYm)x5p|Z9sad@tKh5`$A5gd_;P!s z!u~@>9Ff5%P&dQOV2CSODfIGNzu(rVF2?o5{ok!^inGGiYs#=bV(6J zrYyCnI5R&Fg%e-IpjVWd15yuR6y%gJ=w;?*mN4j*q*jzL=%r=mWisd$<)J(#iyhum8R!p=4B&sLApul;&3xCFt9T)fR7+VUMmeV12m=qV#_fwFns&}KOYpf zpnKLpScHWEexxBt9SDQ&KL(izQs=|UzyQJ%_)*tIgT`PC7$AB<>h6dzFn};w0<6hMSg>H zLKK3+4#X-#Qn$s7i2;N~KoU?4v$q1O4&>hlW=sqq%mZ4?096MYk840uhrA{pstoKl z5F51C8{`_0c`s_27(f`;`u_k~$ol^rGf=33*pT)AG7Qof>;F6Wm>EDAG~Nvg43HfR zV$2LM%p=9XARvXh{$D_jnE{4Dch!L~D11SF2Vq!x2GO9k{~!z!2jPIHB`FVnF)_gK z5+())5C+MCFfr@@VQvG{pn*Rr)N~Gt50KA6>;D_9_*8Y?=;fDWe_yvn(BR+7r7F`v zYgj}60n$SAPzfE8na!at8Giy0R9vM4*WED?}0=3EFK z_G1!R&>*14$;8DP23jJ|05S_S4k^RHz#z-OzyQj#pg03z(0UJ0T!Ys2s53y;-+;tH zSQ|tzFfiydFfbT0FfbTF`7p|qfq}uCfdPEhnp#K6Fi%)kKNUkwsV1+CvN{l9PJL$_d8hjgXD>+-A5 zesk0FJ@E3=fy2M6!@s-fDS4dm-t=f$lhTLt`?UIIt@-a#A9CrNn;wH}eaLE0)uZ#@ zpWo+l!}}%M1^Lw?w#JN(GuT~y4s3mK(>lj!tJkF$r&h9DKe2!73)U$=6rNpB{r=WN zZC+kf}Jp44!E>`eOL5TO~epBh2#-Ol6#zLS>4ix~ceFUXb zC>Ol;^&mKtLPS9FTfmtY!M}#a{|w5U5NQUGdQcjHa>47(B+=|MMKk{~8b1@J8N5~r zQVzp}KxrMc-vh=6*|!zV{<~=W6=>$OqPc%JntB^F_2_HekE7|=fjI`c7XA#Hd6&@m z326L(j0_A1WSJQP7#J7?8AKRPGBPkEm_zo%2r=+5fcE1&(1y%SfcWyP3=9W+7#KkA z0`b$?7#I%3F))Dc`2_K2Ff%Y5*vZ6Tp$amOj{$UNP(d&QI4(f)v)LFJ0umV*K=TG5 z{vVLL^&oi^#0TB42`V%|_5-Kz|i2xz;FP(c8-U^n~j0tLM)^l0m<`#%#&aS?>hpS7X?}y=MUMl z1d>0>z`(FUmjOJd1LC)U;x7>4pSz%aLb{Oh3?%Q$%D@od57{3D;tPTrQqVXSWcc{M z1Z00a!hfGY{(Hd0Ai)Ol-%M5phJ-){2GGO}NIz)prowh6h6PLz`7BU)nK3aeXn^oJ zKx^-wGJ?xfQ1}Id%zMtru)+@_9}QZ|sn5UwDz8E2?Pp3=HMqwTnCqj-a)sF_3#wLHhYv85j(F5dI5eV_-0dV_*R7{{qS10PVT6 zU|_fmjo&XU3=9`M7#O0V_JP)zDo7#X4|GrL0zE{0=(8~}D8xX@c941NSr`}utQi<2 zp!y#&GcY_5XJ!DUJ5YRq*5H1yWMJTh+IIuA7V|M9IQ@Xa15^oq&}Lu&-CYPWuauF2 zp#dp84l*$?G(2QvI05y48>pg3N?)s(7#JKLBGTtOQ2GdCU;y2L3o>sq69dD72aF7$ zb|uKZ2P_N>4z3IgJy7@7fZX!{p+6P0*7Y7E1Lz!Yka|Cm{r3>@w*nOYi3|*&It^sL z0V@N8f-eJu8Z*%%l$L^Cje>NAkMH^{xxi13gFrFTh0dTs*6PXYsY{~JjCVNm1a zJ`+4Y<+Cy{Gz2g()Ijr33MfB3V}j-{J_d6p1_p)Oj0_&kko2Sg3Xh$P3^x=Z{LPFE z3>yp>7#6XC)|&D#>||wNSP;y>5DshR znwOcJkywNx1rY+vmZVvrNWpX^7n^{@b5ip_6x`6{ViTO&^3t-CgT2z881l14nEDrBL zR3Pg~&PYwpj)!%Di%W_?%;ekxWHlz447sVfx%p+OD56!FNL+@ZRE(f6D9TUE%t6rv z6)FblgxZo^PzmC}g0?6v+1SL?B;F<72)nQ$Heu&@OYFiZu?jQWIo=$*YBTJ@rr3qS zDFfZz&hf_BRU2XVkaN6IJPt1z;?iM=U568PtDUeLLJ~t61wPY427bB;Pc(6cxK~a82W>O|ff-NaZOh!!}Ifpdh{|wK%`D zC^;3~9bn14{1p5WSZ&TuElNr)$}dKV*}TMDh*1Tld6mieDXH+{U_CnTeVe_}bw!fI`$B-1pO!)gPV8Y*T9uxk4vzYMro56&? z-&7|2{U$Tv?>CVNf4}ie`1_4z!ryOy`u~1=)BpF|gZ{tYZuI~CcA@|8w-fz;za8lR z`)y1A-*0RB|9)H2|M%OR{=eTQ^#A?l08-oc_uGPwzuy!(5N>!e^Y6FUGyj6uU^C46 z`|UlH4_XV}Fbkm$=0s383e2wm3)*G~W-5gL{f0FB!vN~qfFusI{sEu+3t}fAu@5vO zi6gNa8WG|SNbCg-2=N3Y_JcZvcthPE$a+zbWem`T>pfo6~Kp2$A zU$Q~=Ot7#sFo5b+7AeTQ#FIS8_&S3aGx!Vz(2yo*-jYR(8TI`9g}=b{sKu&Z;C)Lc z7XJdDpYO(wx@SUSKO`-8FfuTJ=38NVCTe#40`Hl)vgsFi&je_00<>=mH0A#1|Nnf@ z9uLs@`JgE$@MJ0j0|W9NiWVWrx&x43Kzk_aHvR(dq0j?)kVp)gn}#WMc=`*x#$Mp| zuWt%}etkRe@7K4655K-Ood5OBfZ_Ky(0YD_bHBcU_9P^H{Pk_YxnJKD-v0X5u$SpO zXiq@E`(NJ}Kx*&(`nKWsFYuZC2fR4HUwHBB8)y#&XrBdW4?)92NIML)KSAIX zeZOGG{C&bx#_tV(etmN||Lfa>v+Umu-ayO+r4!IT0g%5A>?OVp0a8DTM?+vV1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E1VZU`LM_V?Qcq&c3HJiX$4Jwro1Gd)97 zJ@76ShSdM7<^GyiMMN<$usplA#f^zUkx`6+fuThI>EZ``msx(rGT2XaZOO2{cW;@n zjA7|U!|H2KS3j0vc%X7C(e$C4$eg)4A9l9eFSu_d!J>J4YvMttP`39ctM1n9y}Ej0 zOYb(OtAQW5tiE`tb#J-9En@qjx2Y|RLBAv!*5`RAM5jIXQNOuaoHx!rJX^l&P(RND zrdqkha;^H#RsR}wUH;outSD#OzUcYEdd}hg%-+yquS}C}PWos?2Q< zzdpEn+;sl^na-YRXN9gTeue!v z`3|TrnY54fasCxHD^8Q&Vbe|TZ@jer%egnV3N}xFvd!9j_cpu#{~d3=s-6F>{^qLF z;fxzgmj}#kR4;n1BCgw7{x?>AbKGIgUo6hiue}b;ENl3-^^V%^9}igjzj}yRZk#UU z@q5`{@BG~*@jmSf&z0CI8@!oNeQI@lZv}I^x-{Ue-|O z*Uvi@+PdVL+?EOLoDf#wZ2zT2{Aji575f~6{+`KRb5H(U%PF`?L|<&G-P~Z7U~gAV zT_M9qdj$4PJQi={ADo z8xLyt=t z?``m}VOig+`&h87SwS2g%*q%Qo+G%$vd%k>n>{jU`p_^e;Sejp5_Y>X7XH)gCHyRx`kqBcrSJ zhu5T+I`~FnfZCcZEGWF4+W!c;dj_Tsw0{tU zrvyS3LDhkHpmUXB>OgZ!APk!S0m*?d%-(jW`#}C>$Y)>x;RoGd9!MDjXrB;>0lL2i zWFANcc~2ln4uoOmf$pn;scZSm!~nu9ph+i?B2XAW>E#TN`7f{+q5BwNW`LBy*r5Ar zKxg=Y)Uk*$Gk`Hj0Tjd3f$psV*$Yy~A;!!A!Z10IQW*OP)W0Bg3S!I*Ap8N85kQJS z`*)!9Md*4FkUG#j6$pd&Pr}Rr(V%nyy7LBRuY^1^0|Zf1)^U;%>%JP7^DuguMxxsVVItuXzDZ! zm>Fzf3nGx@K<0w%1nC9g6jNpfkbgmJ5C+ME=utcx0;3@?8UmvsKzs<`+W&8m1lse@ zz;Gc1RI7s6kp2JI?*9w1W?}$gaM2CD|1ZXxi6O=tf(!T<7)tn{Ya9h2=T+obGcn|N zL+}p<1_lrYwJ$(*0|9E3sp{{>z!GQcno4+8@TgXBP%nEn6A?pwmb zzyQJ^y`Z`TM1$HRpgIS%|G#xxn(e8*cdRZ2S11cc$@_0Nt2x0A-iOG*;J^S`(<0HQ z66ONBX-}4cfrW`PN`og(k0Fq;hoiwwl8IqMqeu#eOvV=#mWBim1`dOeoN@(@4$Boc zrWOY{K2%)5vPOM{@;XO0RuvxBWW_z2`q7Wr1DF_CSX>UUxCygq1_&~AFo*;>H8M7^ zfNrN_U|5mCa8xiPVn%}whr_8>4i*NEM#mNw7AG$5Kn(^bmLwGxkp_{BAU*~GEmI~b z;RKI>Bqj$D2Z20R0fr-H0zVqf44HYWP{Ei zVPIg$gEU_mKyB$l1_lPu86d@=F*F7S22eY^jDdlnoPmJ>bmm7T^bW^51_lPu*&ZPK zKzBKU=w>YUIfBGN7<8{A=uSsadw3!P1H)wKosLtX_c?;@Z=3~E2*t2_96{W9(7PN# z_c$(QU|?9n0J*ynBnQGPknVAW-QlJ&vF@FzoKe zL(uyhL3_4AcQ~E^DT3bRc$R^I0o0d*3Nf5#U|;~XcR~A3VPdd*9Q`F9v>jx?Feeag4BTScYMLXzyP}65!7A<-SG$#N5-JGGU(37572ub zL2{rwA32enH%86o?e`9OsU0|Ns;lon!SU=U_xU=U?w zV3350NkM6lS)e`E3XBX4ij0sudNddr7&I9f7_^{jw4t;Pl-6ZrV9;Dw|f zB=3X9_hn>Y@MC0P@MmOT2w-Gj2ttxy=Mea~FFRq^Lgl~+3Dbsq>N_me_uUAbcYG7e z+ynD2)w53cy>9ozn{pS{d=4*sbY-{KDy4Zht)`XlV64}Vb=vS-F(|?Y$5 zI~^~g9`1PP9T+2Ya@(>kKf6BXFZg<3ZI}K0=74}h=T2>0Zv7xG?D0;)SFw@n)wvh{ zJ6;xY`B9s)&$Z_GmYW^V(zSjRu3F3;T)y$~9Z8Shvgya_pWc|$mGzC^*s$Wbk0jeC@ikTOT=} zJe!iW{qwa(fcgpJ1){TBgfAK}XTDbAT1E$mYUlX)LBoAk?e{8=0 zGP*AD+VdZC`;FKteTv?BOD+ASUg-bd`Oc;F%`3&h%EPQbb$5%X&UJFV z`bI?I<PBa%fvUfV`bgP@}{_+#fSMC=-d~Rz7!+*xI z#plv{pOv0^K9^_flvAuxt1>6JUtE9e(YFNd57s;HthvEnEAT#H)6Up~qO!ld!n#@X zp3i=K&XT{ojyWzoJtx%X^Vv6YVkMt0DI~jPM$a@luy%HUj!mPM;>4uC_apkJ-7k{4 z-2H6!^l5MJS-&p~f3s8M<(C@??B(+13&JXWJp-Ox{;=fLjfG*AzAX_)C%xx>uj?CO zvwf;td}hzt2|uJGWX06~>t2{6_Tuz0#v50xC)PbNUMXqE{9%pY4%wxG-`DTrkT|in zU#`t;;*R$PHySzZ^sV}u15V9u`ki)np=%4{$w{*R3T_-OzacTxS7q|%OP^2h-kQ5( zPx8*yH@o^GXC1cMu6VdTMAm-w=~tKE^QoM-yz$j(?xk}Z*cOy#>0G!yL2q?&|LvDu zQ%>>7SA9&-eC1td{3X2ZPhWiO&fbrFp+0jWx^3@m|EqbN`^`kn$k`Xd9Qdb)*B4t^ z-1vR-4FB(K`z}d!%}=TB;<=u4^GkT=*`-kS$u`iXk2d>6&%O<4PiO|s?e){da{EVq07 z_s^IhYsM28V$vD3o+ZHA-!F6dl;yK#1jet9d2~^gJDV$K*^;EN;Ojr;NtetO<+8C6 zKXQAWdGRapfK5hnbxVI=V?M8>Z5za>x#sAx4R15WeoV=owYcd|$CEbg z`g{2ijkZkd6U{HgLZ)mojI7^wJ?ZcDid7aiSF1yJ|Nc@@{&$01Oa*(FyMW)0oZ7q3 z!*+Dpq)ztVuX)`2wf>gpB_Hj!%U(>~%<-V*^y%xN=g(bZy>`^F^zhUTJ`+Eh>xpbr z`Md79^l3%$?Msp>XYds1YC1|swq2O{?&7ue2NSJ!97wd<(R|MibQLqG_=IER_7Z43 z>l|p{4k`;e_vSaKF^a@*gEYs%A|QDoRWK7wfcQRO7K8w`tM)*cU=k!Ri!`1D;v*H) z;PEtR&?OdN)u3}C7#Ps+90Z-`1eFG>uR?P#=sX!@c~E@`7FxUV& zhYEBj8E9PbLkS}TC|p2%PFV&915HK-74W$s+zhKY7#IW^85lroxk2);LHs5LhAQy6 z6x<9}pn+Ua(;0k@g&4zi6$XZca>Si$O#BQCALc{WwS)AlgYJAQhMhyh&9F;`fgwPH zkpXnSHAsG?ECYjs5hDYr%>v@{@-Z+hm#)e;O01-}{KciJ%sGcYXJ&%m$;8a`nX3=9UpVdv~{GX#Ln0jhwVE5gmN z0d$9U1tS9}*?`QyD9pg{;1~k~=sYG6A2bHJAQf^)0f@hgje+5T0V4ybeGlR%f*SM9 zjNmpOi2s*|fnmW61_n^u8N>%&PFE1d$Y2O{&l~{;27^_QGxEUlq6`cMXBZd+p#FKl z&A{+r3h0ayPT z@c(}n#RD{l06ND>!G?h$ zK;i#?a2wQ-kE0c&ubtVEPoRy(kx!(V)t}FS=`k0dh~r^C0mox}JdVftI2@1ivAA(F zfcjSnHVh07ivRzIf;!r0`kf*A6PQaFu^8aU&8!3ycSbVUksIW$9X1RM9xDI;dxFXu zu(_^$JnhUrAa{Yyb>mB5>cwKL3pe?Ur60>$DV;f#OVM3P+Vc>&zHdb6PCx2Gp`3XsGTC?z`$T) z@&7+)>;mLBP#Sk&isXW%a!0Vc9UK@KCRqIc4;u4s=p zw#S));Ru@81!o3^188DTp!UJy8l?A!GXuj8G<7^K3=CV)#1vd0;f1W%#03&w$YLHY zknlnli*bR37qVD^3naXd#adh-;e{+V!-aui2AW&exG*qGK@tOn^#K;*wPC~UcnU-p4j9;;Rrfk@Pgg{|Dd)XC_RDd*br9+hC6ou|AWWF zUHB9t_*lSuUvpd;7@lAeZ*gT{cw_hfKd8OV-~wt!K-AB1Wnf^jM->N^30qtl7-a1K z{|DcNjjc`uwaJpP)Mt>k1$sVp1J#qDHBLNk3=A$F|Nq0v>Sm@~uETsRPTYAADgs1# zaD%cMsH?+Ze@Ypc8%wviMDRJTU2T`8fi6F|I+ZjZ;Ldu;2HwFd;&;S2H zVFwB?P+8dG#=s!s32l2I+ArC#ve1c}fdS;cHEs+HCZ7NQgZd4iyp3F!)N>)VUZHKg zJ8ldNDW3oTe+5~DE1b%(gp)I*-j{J_U{LY;{~r{mAp4q`{PJnoAeVY*a?^{9A|8D}J|Gqs~ z`tRF>uz%kI0{(q7*zxaMLgl}22kQQP`w;Z++l7h$z7-Vw`*vaZzi$^F{`ba(Eo1& zV*kG>S=#A8s)H-#3N8f8QKD|9$%q^6#5M`oC`m zC;xr>ko51Hfd2n)7efAj6Y%~2O(FK*Hv_@{-vY}2eS5GGr1t-}1r`6kJ<$FCO#$S` zi2vU(%C5cTg{LfOA>50?G=rXcwL+lJJC-x?bJePc-e z|IMK5-?xDDf8Q?5`uFX_?tkAVtp4|HL*~D43u^y??+Ps7{{L-3)xU2I+5f&J?ECkv z0TdqI|GpLM`uA-?=D%+YR{y^psQLHpg3G^e1!n)hImG-+bOLFoUt4d(y96%_yb))4&fn?l;ZZvqkjz6BKi`*va4zi$(g{(V!h{Qqr%=f7_b z75}~+@cj3!A?V+?1%Cg&1uXyftzp)`Zwg2MeG>@%|BWH#|2K!of8QKHX*clSH-)%= z-wIa#`!)d-&RhO{OUV28ZGy+YZwJKwe`Bcs_pKr1-?xD9f8PXxn7pA8_pKoK-?tCJ|Gq8Y|NrfP<^OLJ(*J#PDEs$q!Tf*U4)p)~CJ_1W+X0V% z-#)nh`?etG-?s-P|GpJi{{P01|LJ|X`dXqXjb9!T9zBGv6BQr$r!)g2{L-AN+Voh3ruMQD0~ zwbwx50mB(FDYro4pm2H6{{P#D_W$5JkYRl#n7Wx!g(pF6W{|pnQ1d{1m^_RYEB{ss zs_#JR_&Olz6x}S4+O+ekX`ntDNSzE+9jNXE$suFSIu#Dkm^4V8GE^O?E=E=ZV!x@L zyigc4@5{iz&p*Qpkh-)^-2T`XZZ;9r z2Lh>cg_?)Wzh{@62oQ(5FBqy0B(usty#M$ZA0Bj<=7PC86e3 z;87ZREbIEy7Zk1_bu*yqu-U8UW8DdAXM@zOgsQ{lU$0+p zE`!?BAa&cJ>R@AF$o5X<{Qd{DW*nq$3N)OtrGxzr%gaGy79e#;pyr{MRUmUC?-X4D zjTL~@oy4Q=K==tZP#+hh?i^GdHhUwoZ%qUBB|z$~Le+uF5s+QTxcPXW9cZl#NZnni zI&AJMZ8$p>)P@GBdxS?_{?dQzRiW|w9I6h~9z?bi#C}y)a7_)W?gLaEC|`l(knzgO z7tNqGJRp0Spy7-y-pUiTr-Q~QLFxpc>af{sSJ%-E8ixU?lZ2|nmY%!Z4IY8|av*iO zP<7bs&5jB`09soFQfCcShb{av*>3ZK`W7H{3!whR=DuYszjA}tD1p>DK+VIJ{;sj! z%mK|?fzOUN$(jckVkk8lQl1iE@(dnNZoO$I&Aj7o2{w>8b1fAy98B-ExowjTkQZEdjhGu4poP(UJ%w1$^?xC zg4ErHs>4?PF`cj01C3FG)PXQFGb6)^BmciWY=O4nK<)PM|KApb|NmAH4iQVwC@Cp0 z0`K88(KFODhHl|xkmFd${1?|APWj)QOVRdlE?b`Ey5RddYxbN2*Y|&1pv(7-Bkys# zbW!xwoJs7b?PQ$JPmqjDG|ZL@;QTNt^ZSn#3SJUjy{A|1k=S=>U+sy|!oM?D{$e@) zLg#SsG1-LNDdv;ZZR5j>tuu_qB_TZ>(<$J?q^LOq|;eT>9Y{xvMtBEIBTvKLT{j(w9 zL|JHV!J#j?l}g$1e*+~oc#myjkGbSre#4z*nV8qg_?OLp*IqDq9irN0R=<8C-)5tY z+!v;EFHMk?u&S|~&m+sZ?Pa#3tf0p6eX9$ESX=OyLaKY(*dogEpM*kF8zG1 zS8HzUi@$dsU9fS8Qn+KYG_IHJpkvrK&UyR4-di!FYX|4)qKW^$Tg69oRXt*vTDtJ{ zt)=g-f4ebB;?#%28q4LA14Wn3o_a#+=gb|c4QIbT?+oAeBKz2HvsXz6R0Njjn4C#E z!}8?$(x*&Eyu9s5UT!57u&8yBxEs$lR=Jz&L?`08w= z%N?_?B_HbAUaZ#jNDj06;Q5&03nz1~frz_eWY$NY2NX!YbJvw*aui#0O ze@Jyr+tqNi+fz~dxRS8Pizf1z1T)T*~{v6v{w=zCt-PR}=?wRMb3$J~ z@UXgI_et|lC0j`E)PKgyHr56^)~%Saf9f4cE9b)M2f2C-f!qt$iOXcYyV+2i{I$Gw z%9sDA>Zg8JeKXO1?=0c$PfY(W?MoAW)>JRYyjIHY%F8B~Nl!!h_cXH#YpwpQ@zG-X z=M``37G;ZGtzX;n>E&UyZ|ghEkIQG38}$GE5HYFa*_ZDh&R?FoY3aKgJj-r#FKs!r z%IChhs@x8<$lqDl|H=C0Fl}p@p7$s?D~igMdp z8{18)(|38-Ra~8W{ySIXZkbe(wxske?^Lf&^lrKGZM&%Nb%phd!iAKJWGAUe@fn2A zxA#8ifBt`fvEd!ZNw0&mx1619B=*=w*ZK0Qx5l4*);bnH)@x$puUk2Vy;9Ord*UD4 z`)|#RPFjEF|31gOb6(K(WA_*ErYkR>aJI1H^@0P}PtUr&vg)maWhbBY0b|#P_v4@S z90@Did*uE08r$^zI_dx2h+erRhpsk^h~^xms)A3YodBj9=$99DOD6 z_xXJjUe66{Uw!Lm)Vy`_y=`~QCBB3|YHb;3x8Hfw-*0`u_@DcemcFZ(JvyDvl=zsW zPCKY+zLs-KBQKYv$I7ONRlKVY%ut+DG|feMWkS+zTakrdt(Tj%%F2{~-`%uk@9gc> zyEgP$iWRfUO#Plz9vsG8rLQkC>+fk>`L(fmFPdI<_02u{aN5tax6bw~DYU(QZMy6& z?pY~Wajxc@t&03O;=*oj_c;CY&7Z7?>65RU@p7zkm)DuT^Xz)N(~ARG`))UG)!g(- z>1NBdj+0XBB6&;ApOp!;S-q~meNF$^=9rYrY;wykG<2-(N-&LRkn@}S(`wSgKSx)c zGtkbMtTDq)y@hvjLR!|@MY9!-ihAg&HLkgv`gEamUQet=^fSX&rPEgx77G5;PhS7) zuER;)8D>qt50&5K-Y@HverJ(g#0D+4lUuSRkDV&95?!r)Ofe+tCcAcm!pFCK{hcXY<-&ZyEzHqtXd&XQ_@E8FyyWm;{SPVw%=VT^pk-;V5yl z;`;%uZ19)}X#W9djR&aRIG4tG1~(mGamf?cEOV2 zJA(ql_YkXUaQuSgK^WAY`Qga$eU2j}jM$(J-P7)%mIp`$1beLA54HougUP^XkQg#9 zcmp|S8zjuWG)Qf*!TC_g?)d&?b!GC+Xkq<7dX_y^uXu`M5=?SCzlS`_xGF0f?wYP_Wt_D z&H(D+LQL|3h9fAw3TS78#{`{0>)@gHvU)81^{r#!uWveweu2{xdU^$&*IEEFW5KU) z0vG;%W7zQb8@BYi!iC|xj|(KuVCnT2XhA>38DKJjg!Fo2`7iLf=%DlfVuKC9M}YPQ zOF`yWV9H`Z?nb0njN}JOlc4m9E&&n;;o{;9Nb4PD;DPVoI$RmPAL;q^&BFsy#)8r< zSlR>P_d7kmzWMb2`sUIL2~U;YU*B|~Y_K{81_qPfU*Bwce|>w?^XuD}o?qXd^gz^t zuWt+uzp$p) z2zQ3>f7~E;!P2W9=)y$EJ;`A6JX%+R?Eo1JD_3DONDLXDIrANyUN2XJDA{`J06Y!}kg6 zzJGh+#qb@JMnUNnWX}pOh@UU4`~J;g{r7Jc>mlJNvHtrv1t=S&4umz?L@h`zV*U4T3G2Uq%UJ*Yn+KA<04VzdNbUOX-+rw7{*41F2GWO&JJx^y z*0BEjw~F=OzZF2$%z)C!>aejV5UCEEUQ)ya)_?zIGU4+#fxn->v4eNRL3A&Hh9fAQ z3g~2i1C33gq|=F?znz%)`I|}qXK-3TFIOKN`~2+y$czb}zxnL>{*7V6cdY4@!HePh z5>H5+!P4n(WzWrSr`sTFo4&9!(_IA+>M-0 zp~()E1|jJaA^_rpaB*&CZYm^YLX1%O`0auh!}o%^&)*mXK7z|qP&x%kdiX;8x}xs$ zH;MYs-vsI*;rF5L^S2)$^&mwsT>tqSNB!q-JL*1vJ5cxe+Xf_ggZj_kEb2dhbEyCP zO#x~KNSg+feWLF3w;Oezzg?*N{OtjfK9Cw1PN@Id77(jC@Fx4R-cO#`w^yCLhli+lUCIJ!$;k@Ev@MVNib#gh6s3j9Qa0FeIeQfH8RP0(yRcLy-&v3{TNvV33JGJwISWuM7hW z|G;v7KnWuQ0}O-K8iO#%ZV(2|eZb5H(V(s_=$?C!90&(IElGKBNSpzNO=1`rKo}$k z!o-{}05TVb56FV<{$^kR=>_>6M1$sqLE!{CU!Z5bvf|On)mNmH1DF1v-!fzG%FU%9 zHJ~{Gkb00BP$B@W=K{^2fMVn`GXn#tZOXs|Sx>gWK)|Izfr+t)`Pl?V*A9jj1`Y<- z7KVfa4GcV8JPeEm3>*$d9IF^QJj`+yh*>bGwKVjxa5$+j@hn>+#g=@6;gAC30frz3 z#YPSmE(L`ZA`BuL2@DJY3r@K>aWF77fp%yaL^Lp*3}6aiasch{1-VF2!ll8XV*-cb z0jI{(3vNDV;O z0t^X^3<@qiEDekdj67^Cvs1Vl7(5tq*Kjm)FqjB%FeHdLTDWasIFQ0TIiN{Ep_8eB zMS)3)gGs2sorDy--qe zn7|<7qSV0Tl+DF|pemxJcjuPmqc0QWgh+7KR89 z2PPH)w?>AL4h9c{w+t+d0xT>7983(3ArcJ*t|BZP3=ASib(9$xm;_kjWDjdHa4`il zGAfxUE;z^#Xf#7mLV=NqA%THoYa=g1gC_%nfZz(b7KR2!2L=XBCJxXRd(ft~LkxBj zI~Z774&2)8ag@VxUk8JOyWjx><3^qo#zg`-*Lhkvx};XHYV}NDm}SxxeTrMbQqpM( z3!~B$2bLy*fB+$e3;~aZCeV^jpH~VD3Jk(73=9S{JhB%`F=RF1b&* zVc}t55in-(;84&I5@HZgVP{|nP~miN;7VZTWC#GQuH+41IKULZ%HqhxxWXf#!J(c( zgV92Rjto9A)A-w%xYSLUR2UkrF-WioF*yh@Feqp^bSMe5 zdn#TOnZcmOvaGR%L0N&}*`W(uf?UQa4UHET1Sha+C`PDcwloS01qd`MFu5_bEMVZs zxYNMNC7{X6l)yCM0JBL41A|vb1C!GN21n)uL57u<8(26R926TG5)MsMSd%dAf`Nov zkLb>Z#y%O2@(zhECf^Bt5)KS33>~sFJQxEe1Z~+M!l3fbBaWA$!3lImheLw^$I9b^ z3>U2yx+bQ%Zg3Q6U=U#tU|?(vbY)<0Xi#8a6LVyDU{DB9_`tx($e`%J>BZ5opn<_r zQi+MB(TRseqD@pmDM5gNLEzvF5e|n5B}H>rNhnTa5C~A{5^_moVRE=+&=kRtDgKbb z;h?}Kg@%nm3`?Fkuvj>pb#-oLSimIUz@X5|q|?GsafFdYfx&^Z^~NM{8t?!WT#PLe z93~AOEJ9NjfJzB2q0_RYTn3DehZxow zbTKe0xLovDz+)g{@_@mSVS|8Vi{u54hNearFGYg}1?GkZ4nYke23LjvF3`j=3!@+h z0|U!K1_uVt*#Zm<4US9~R(N?HC@@hJdXmgEi9?XNWO5c`5K{sJhXX@G#)T#}j<7a& zP=)AO!QjNoz&Xz-#7e?}{i$9ur^1Q}ObkmHCmJaUKIhrU$LPrbGW!^>|6vBk7M2Dk zW(Fn(4xaSPM^EN1;Fz+Vg@Hr4qk-c9M=QgH1||g`rm0R04^t%MCRB1HJ1_{VFfwpz z+APp;WJ^fkFks+#(UvL1zC_6Mfr62w&LUG92h|Nn>D2J#eL&Gi#zqB?CT6BG7N!7>9>b{&3aSh| z49`@U930&n7aJU8b6{p-WK>{in%m+lprGKu=EKCIr{dt?q2$mhpv1+{v`B-|gTc{& zse#3-A=1@_L6~8I02@Ov8xJFcfPxAa<6%Yymj(tFHHQWZL56f51*aVjZB8$kW-z!p zu^eUS;O0%?#fx(c8$>9OR$N!B2s_hO;2Fff3ayxtuJ18hBG#zSmVAzNHnkc5pG=z86JrC1$SW2G0htL72RIo71autP1r9Vk{Ld7!ftOF1p`e9<;gEoUAVZ&( zG()4u3kd-Sg(DK4Ob!YnA|C`8I2bw@d2|^V7K$|~GAMC82(f5*&>+|#D#)OrU<+!# zfZGG0^)8?_SD<7IYGZ)bm4Vibf%+<-wGz?{3=DD%3=E)kMxg!~sEz@xnE{O@=%Sso z16nfzTIT@@U(ost5Di)f0a}v)ntK3ke*(3uK<8Y78~{5@$De_L0d#IoIP`2B(4KMF z**Ku_3efpD=?swbaX{zdfX>7LnGHGG?y3{ z7_KrfFo4dRxyiu506J?1`HYz-3=9mt z18T$m1&srO`jCta49w6oWnkyYfV6Re8iNcB3_MU8biNGeY#Bk&{b^7!(AhE)j0_B* zb7f?pXUTx}&Z{#rFo5@)f(&ASoErl=F9x*7)rgUS0dzi$B_jiaH6sIqEhFT77|^*e zE{qHepeZ2GURuzZFQ7ACLKqnsA{iMNq8J$%Vi_42;-Pkfj80}`U`U7ZGZ`5evKbi| z@);QzilFWBN=62TYDNZzT1EzjIz|SDdPW9@Mn(pPCa9ivMg|7ZS*6{K3=I8@3=C5k z85pKBGBC_$WMG)f$iT3Gk%3_$BLl+{Mh1qZj0_Ab85tN>Gcqu&V`N|e4W({mWMJ6B z$iT3Tk%3_+BLl;3Mh1qxj0_C>85tN3F)}b5V`N}B$;iNP7HZ!)Mh1o}j0_A{85tO^ zF)}dRWMp8t#mK;LkCB1lAtM9B6GjGxr;H2?&lnjPo-;BqykcZvc*DrR@RpH*;Ugmh z!)HbYhOdka44{G7A5b%YGcqvzV`N}pWMW`oW@2CfwH(>NO)~}tZYBl>9wr6`UM23u?FflM(Wny5s&cwiQlZk=h z9@PE^ObiTGhDv4zhH7R8h6ZK^h8AW9hE`?ig*P(a z6ZmDnZ#d8RUEu=b_W)k8?-!)Rz6(f;ecvE0_MJga?7M)1*!KVhvF{5M#J&qCihWlw z5c@8mB=)^PN$mRsC9&@U%3|Lg>iEAKD2shBP!{_xpd$7?K}GEQ0u{0E0S02<4OGRx zE2xQmKcFV|-M~=n`v(xMF7~}ZUF`b?b+PXs)WyCF=!kt!2xI@Apbs%0tj|#F`-4L= zDC->1{g_}Q_Pxeh?E3*rvF{DGV&4~7i+%U76a(woU@7)}ilx~11WSmR14tZ%kqr5| zO&qKiNeIjY%@2aA1JJpF4?@JgKk$N>`M?EA2S8}BVkn_tC-yzdPV9SwofvqpV9GV| z?+<*$zCUmi`wnVff%bQT%$&4L{Cn(1@$YRL#lJsWD*pZP4)O18o=e2RW}JB^{+;8C`1dRC#J}HpC;t7(JMr&t-id$z@=pBwpLgQlS>B6(=Xo#w zomewL>y1I}LeM&4P}>kR{s(Fsf*RqVHMgMkw4gSkCo2O(!y~cp3OmHUKUgI8{Xsay zPYb?ahSvfYvF{EpV&5M)i+yi!7W=N?EcX3?li2qJC$aAgPGa8|IEsCDa1{Igz(MSL zgM--j1@>a!AJ{>{4`29$f)zBT=)FYzd*BlB?|Dlh7!x zKK%CtZh4q_`1IqGD^+J;*uU>9D~w+99TFxWf5H4n$bX>m#O_^?Z~?gof3I00{=IpL`1kH5;@_t(5&u4K ziTL-WOT@pgTO$5_(-QIT+m?ub-?c>i`@SXO-w!Pj|9)(V`1eyw#J`_gBL4l-67lcX zmWY49wM6{;y(Qw`pDhvp{(g!0_pea(zn6%AXILu!opq`Bcb=u<-^G@Sf0tV-{#|{k z_;-V);@^#zihnm-D*oMjsrdJhrQ+XXp=ki*S9A>WH%Lt6z4&*P_u}78-iv>Cc`yDw zLHv8g2l4M6 zAH=`U_#pm$#Ru{4J3feiKk-5Q`;8Cc-(P$X|Ni5H_;-$v;@>4cihtMmDE{5!qxkon zkK*53K0?&b`6&KtV@v-o$F&*I-%zGC9crQ+YM_82f`FBSiuyHxypK9mOeuMiX#pT)m}(g>mS0cs+E zHt&J@Js|aA{Cfry zq^t)G37%Lc{=MLo%y&?FI=f8#d(9~s@c#6x%f!EToRR_8RkxRkf1h#+QeT7o3UY($ z3i0o{E5yIMt`Pqoze451ihpNW zDgIr0rTBNMR|9)nr`1e;U z#lPF!6#xEjrTBN=RpQ@eR*8Q%Stb76ah3S@@Kxg9(^iRpkGU!Sy=ayA_X(@Szpq*) z{(bK%@$VN_iGP2&O8k4nO^6@=t`h$)v0D7Q_G^ZG z_wF^~-BmVvW8u9P^YsJ6It`+}oxmNtU$6E34(QC!O=dBh0 zzT~F(_o}tx->0q>|GsIh`1dn6#lL^KDgIsNmiTv@TjJkyZi#=Na!dUCiCf~|Pp%dJ zerK)t_b<1^zrS89{+(l;_;-=p;@>6LiGMd(C;r`io%r{}b>iPE*NJ~Oxh?*E`a1FN z3Ae?+uUjYnecw9q?+v%bzc0Bh{{8AY@$c`}iGM$FTm1Wn+v49v?udVPxg-9aW4-uy z+4bVz4c3c)w_Pv(-EY14_nh_O-`m!Uf1j~l{QJiB;@{7%7ytfxz4&*A4dUMgH;8{% z-5~zmbc6VJ_YLCTqc(_tFWn&iy>)~5_gNdnzi-3Z#Rg4XWS_MU3{bXclnLt-!(Uie|Op_{@rt<`1kmY;@^ulLgKVz zqxknJ8^yoR-zffl^+xgUJ2r}cKeSQ&`{j+|-*0ae|NefX_;;2~;@>4ViGMfTB>vrN zllb?9P2%4xHi>_4-z5Hh$|mvei#DOU1LT&$h&OE#|GsUL`1f6##J^wKB>sK>Ch_k_ zHi>^fxk>!{*-hf#FK!b5er=QZ_uHGqzdzU{{{87D@$V{|#lOGWB>w&VCh_mzHi>`# z4f5+|@$amg#lLfH7XQw_S^T@mX7TS5o5jD&ZWjNpv|0SS=4SEldYi?+n`{>UZoXOk zyY=Rw5k3jG*}fmR#rB=y7Tfm?H`%^FxXJci;SSsP4>#Gcw(V&Z#|58I?Yn@+C)Qqt zJCO49!EFeQPoKgCneP*(2w?a#{x~G=ijIqa2lZiKW~3Y!{|@Tg!1(BN!v&e|1ruCZCzuL- zzhEl#UBFD}dxNRa_X1OhdUQ8{`3^$gKR60~UtlZrUBFT3`vDuF?*$G*-yLj(zE7|b z`rcqK^j*PL=zBn+(D#OXq3;U$Lf-@Og}zV77yAAoU+B9)wa|BmDxvQT)d;+xO6Yq* ztpvD}}y)ST6K^!E&MR2bK$c zZ&)exoneL0_Xl@`z6;zD`hEck7u*s0&TwDo`-OW#-xcl%eV=eo=)1!mq3Ug7Ttc!a-S;1T}Lz$^TH z1CQ|c1YY6q2E4-H_yC6|8c`rD{QZNF@OJ|d;qM=Wg}*-#7XE%fSor$_A>r>EgoVEw z2n&DTASC?VAzJu*LA3Dq3(>;g4Pu19Plyrzejx^8Za}i|_X+93-xuTve^*Eq{_c<~ z{QW?J@b?c1!r$L768|nB%mlWdg@uLX|04144Ppqs>kbDS)57PeyWL^}657O_j9>PWoHln!>hh@G$I4bj9;h4<#2Pb8| zGaQxqe&7hC4aaao=DWiQnePoJWWGN*A@g0~q|En(lQQ2QghIwNKw}%A_9>|to8un% zvwv4eVflW*js5!tH}>xvV%Wb6xU+x%;KBZVLlFD-24D8?6MWdeU+`!DzQLFMyFwiM zcY`?g?+kGeF#!-8o53)#wQS!R{vymTSk3nR!$!964x8C9%wMpLjb!s3wAjA~n6rO> zV1jV}0Y!-WALOxt-T#4~{ks4^`}YHhY~L^BvV9lGWBabKPx$+WJhty3_dCR~e-FUn z4|2^9$YZ0}`~w1z@JDukfFk?%3zF>L6U5oSPpD`6zCn`xJ3jYs*vt04U>V!@gxzf4 zH>_p*-mn)D{t5>m;RB0bT;Wg1`~$mbXFe$W3$CzzpKuA{eo*>RxWV>aK#u);!3l`_ z9R%3FAGpT${X;3+cjWN7z{gH7d|>7~TqNE64`Rfd|KSjB^Fi@TuKNWZuze>c{1@D3 z`%X^$GQ4K{{ve+H`-FH%{$fZ*ln)b9An6m7em1;f!&yGyOFst5?B4@EvJo^NU-^U2 z{0p~*zZ={U{?2e&7+$_9ToDGBZvp3o!Q}(PIpOac?h1p;2T=N%a7h@PzdjriCMx}a z%AW-)knjPOpP=$bK!W{y10N)OK5NAgI`Tsw^z?G5V@Bjb#pfyFHwMC#arI62%RPbVC`2YVuXc-8@hyVZc*EBJH z|MmZW{$r3MAwfZqobm7f|0)0e|DW^k|NjO5{{LU{@BjY;|Nj5~qF4R>$6J~2OT=Zr zZ}}nf-NK^!`<2%+-)sK;|1TpY`~AdYneQ)N%Y1+ESLXYH$1>j;4646Bc`fsu<&n(y z3IG284-l9Aendj{yMUDJ_aA!I-ycZGem^ofFKokM_U}`~WxwBfE%ROBx6Jn)|Nj4H z(5?R70#%YHxeSmt}fJDKlmen9N`@K@&h5pmh?D!*mECp?$= z-t+JO|BUA{-#7e_`JN&v`+bU-?DrXBvfmGY)JVyG53m#Xe&Mmq_a7HzzIXil{~zSO zmWMLm|Gbs?e&e;w_Z8x@-)kPqd}olC`yTR8=KC6un?ZI;%6{Jia@TW+A2*20exGoR z{ri>2GT*m|%YJuxAoG2Wxa@a^cQW5O9?5)fcqsEd<+;rFA3D|F8Kh*tH~jnmAGC%Z z7WfHi3f~h>uzv^nJ>de^cY!nP-xaQNerH%I`h9|9)%OQy*}qRPssh^q(*w%;^~|89 zzmPR$FmV_S8t>g`DLV7I(2}5RcFTbzw_F);nEtWt1 zmi*Y*(Cwpf_^sq!@BQsh9X6em_I~&B`MM@&$L#3fTSxbO2IU2qTd>ifu?&zOKp5m! zOf{epZ3qUDAbHUKPzDA@1_;f-z_6hOf^4Yc10bfKFA z1H%Q-#0a#!1!V)!=1-7YLGA(B1EN93VRsWq1~-Q3g{c6!2V^G5H6U6RYA?uTptX7+ zXMxm!)Wc{H8)Qxd6ZrgB5EJA?kT41c)d%+%LFSr4bp)tCjI0182T}tv7bFkrA0x|y zo^BsgwJeTv0gbiNEdL*x`lDcM$e?A@d!C1765{2jPepGT%Ws;f2h15YBiZ^Bsf> zUdVh0;ffbB-$A(Hh0J#l?sy^d9fT*mkogY6GhWDi2jK-TWWIy&iWf59L3qOpneQOH zv0gfG01`3}N2UdVh0;Ri2dzJu_K7c$>L_`?gC?;!l+h0J#l zW_T&{9fUbv%6tc5ftNDhL0ICY%y$r0cq#K8gf(8ud7gYb-(GT%XX!AqI%AiUzG%y$sp@KWYG2=90)^Bsf_yp;J4!Y5wJd;I+(m4JbBvE%P0OEndrf2VsZT zGT%Yi-sJ|CHMa@7fZ z-vc!F5polz}IO<1o!iV8GX825jnSYZJ zoUTE3kK)k~7!3i)xe1^#hKCDXubq&y{r=#9&37>Wpv$!*$o#~*3los}iuM=gAoCsV zF3dpYA1ncF(Hjlo(GVC7fzc2c4S~@R0EYmq?FZ)2nRvo1`@JBI{d+++`}cx$cJTf$ zP@e~%GeCRfL1WlG3j?=2d>FXp zA!G2Chl(H^u;rm62nTL?*ci9vq2tXh4;622dFXg=%R|S*TOKkV+Varx!j^}P=e9gd zJhA1W=`0(zQhl#hhJY0Bd%frUoTOKNUZF%VEwB@0q_m+o=o?9L^s&0A6 zsJ7*yqt=#(jiOr~GJ0)!sJL>=!-ZS6Jao+2{LpdZmWK!5ZF$J}b<0D>V_O~`T(IS# z;=(Nt71wQfn3%Nrp=0vqhcBOOdgz$H`QgFTEe{zdZGE`#>E?$Ew{8WcTc1aA-(`@; zCXN39$Ufzc2c4S~@R7!84;7y`KN|C`_sy7P~LApvyZ1nB-~1_cIA1`P%+22G6n z{}dP*7(f`*t^}=B0j*hipvA}l!=N)}K^Phv?YCsqy4#J@O{k~{1 zGQhA1Cj$crgXBP%nEU;Z-PgdxzyQJ^y&%7VXwdl?pl|@)-IrCEo)DmsadN@K4U?Z7 znZ7r>=GhLA8qnFlAoU8!PJD!1oApyj|f{K-hYI|WdNO4QvnqKog)KfVx`bG zWYj=a)k5hy1_lPuok~zHoB|z70oz&#y0fOL?iJ|0T*zWD_BANu zI?}yeAfa0f3=DTb3JhpCl>Zn?BU7L|!Ja||KzD;Z zXJBA>0p-79U|@I+WrHZtJz?({7#Q9|?+g3Hz`y{yBMc-5x+e^_xe;_<*iVok0|Nu- zfQUa(Hi&}VBL-rFF{qLOGf)Xe9O6vS`^QjK6XvlnGBB_+GBCjIECbzF#*M`eUPcB6 z(7j~>j0_B*yURc(3!$kKM&gSwGBAii`Jj4Ul97QynvsD)mXU!$9xAQ~rIi>N7|^Z) zX8_%Q2C_pHss_XcVKpdU14@I$w2{~#KIqOgJv1?pxIPv!kT^1i-LD1`1KqI(qCwc0 zk%7SkNk8cBHFG4s1tS9k=q@&pS}P=R(A{hxG0^>NAR314p!cR2)d5{HK<}7~LlR2>g^%JR{`rZ9TLZVQ5U|+#-oSF} zdxPCq8xEy5Kd^eMtl(UJ<_7Ej489{hkFFh>`_oz={4(=4jkR{y-)iQsc-Q}hUs-$p zv+{!uvsa$^KJ#MYC((2I^1sTTPOEt^^U|(|GcWCG$-nqBl{a4ay7s~Dlkw%@{;LVx zqHGF(ROpYqH>+1&uQmRyAb0ZWk)Efg3}10d{FxV3u;u;z&+Do`96SGWuj=9@jf);w zPgUD>>Th4)vWHy1cJ7T_IOSls%(2wz;ldU#Tm;^3&R=Dich&Tw)G6^^#R&q_Pnpdw z6)bit7c6#q{y0VCjsEIqZ}nF{^PZi2IpzSTT|-W|oh*ZRu6fqQ&%1l>9#~tv`?9r~ z$(F@Y?CzS*$M2j-Tr`O-J#~j?-%Ja}{+Skx=Rf@3I=xOMKC`|- ztz@^$o?iDyn!7BSjywyRl=VDlQWmq)%4d$gb89BAWl1`^@ArNV=a({X*R`BI+`O5? zltIVDYW3Ii*#~vk>=Z3_+AUh_^z&L#TXFFqfuV1mv`F3a1k)?Mx9a(zaHs>1% zYerYiziFHE?U&AyO65rxr26)?l=tszDc`uvD}{4WM}D__&L&ocfX$_Po7XXMH*H|% zZrTuH^zU3@%k=!_Q*TO^)3LxolG{`D!ob89j`+5VsOJbpU}|GyTe-u>jAOx269zUmiYebKY5 z`ELekue`aja(eNvM(L-Uud~YM6}-8c%DM5I!5X9Q25XFBKjiRVkCm*d^@%BY|M7m6 zMTGe@!2{P=m;au4LS0GJ|Kp6vwe5z2-^|@-X&(MH=fg_lP3&7=Mtz)S*K+3h^=}N!XM%!bn3nhkaxi4CVjm*rn%!XWh^8gz#zs7?j3Vb}-8U|?VXmGMYi3?_2@36cce6$GO3VNjh1k_WX> zK{V)YR}hU4gX%ea@*p|T9kw7E!eL6(mLshTYQ&YD*ELepJn92#kin zXb6mkz-S1JhQMeDjE2By2#kinXb2Dr0f$W4?*%q;-#=tP_F5irl!FcNg0(K#i^>NJ zA`t?!WWPU{Df@lGOxf=avt+*~%#!^+VYck|4YOsxADAWk{lYBS?*X%AzbDL={r+IK z?01Gavfm%vm;HX>zU=peJF?#&T$26na7p%i!fn~_3|C~o7hIS9o^W6G`-8i(-#6Tq z{r=&e?012Cvfmr-$$k%*Ci^{MlI-^j(`3JYm@fOhVWI4IhXu0V6PC$-Z`djO-C>&S z_Y2QuzYDyS{hq)o_x-_Z+3yNRWWOIcDf`{wg6wyN$FkoqJeK_)@I>}|0h8SK2TXF` zO%BR^f50O5eLUKex^ z0*D6PgP_5{!0_+?|9lZU@LB5lpm|=4m;qT!43ScG~RDUl}V@63=Fe%U+`hi)t-x)HizHdvG z{eCQ2_IraC$MW z{XQ*4_WQCF+3(v@WWOIvk^O!xMfQ7wCja+uDYD<$Qf0r3rOJL+OO^d@mMZ(*Emih= zSgP#zv{c#eWvQ~?+frq}PfL~kzARPt`?gfs@5fSQzaPls|Nbmh_WQR~+3##=vfsth zWWTGW$$mFWll|_NCi^`sP4+v(R)OyZJD9$=rOAGumL~gsS(@zkZE3RKkEO|ezm_KZ z{aKpq_it&k-`Ub-!Qr8nF8jUV690FB8{FT+(q+G=rOSRVOPBrLmM;5!gKpLL4O&&- zx24N|Kb9{0{aU*0_h;#{-@m2HerL;&{VtXv`&}(V_Pbez?02^eS#a7|a60N62s<2< z`wqea8glUSwLwETAPfp)7!6{RgF(X=pgSEvbi(l%aK5-OD;N1nMskcD)iW9bqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsK<5xp_?h($gsEk%Jp%(n184ya?A};n4F)Y}0jmY=76&s% ziO~=k4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!83T5(3ck|KP4=W?*Ijtu>#Z06G6J z=MaboVkeK+0V&+mJ)kCEZc zIS2-wWdy>Yv+qFrH9#12<_`?3FfcHHFi0GPLFe~1bTTr)un8*z0|Ln?+jtqg^qOB7rR7y=Rwcrr3HC@_GIV&maf<6tJ`oOwc|U&|VZp1_lOYkN^V% zgDL|9gBk+^1L$~f(B2en1_lPuxe0m<3=H~EHAYa{n1O-8l!1Z4oPmMCl7WH2ih+T_ znt_1CuMEQdV1_p)zC=H?l85kIX7#J9W85kHsKmrU54517R44_RBpfeMp zLJZMR2IxFMC=*P9&IW{?2M7{?oe2m!{||KLUn&CwLplTMxqhHC{qh(X7z#id7#J8p z=la3U^Fuz%4|I-S83O|Y=)Arvs9MmOe4z99VCU|EMo*eRX$C3}J7W)YwjS&pj4lQS z2GF^ApfmF(FfcGoWME(bos|bW6A!AD0d&S4@_BaiK;iIOWXEE^!2OON1grk-7ZIAC zK7->?W#Yewn?pAi6?|A(-tyz?hPNr=Cex~CKCMjr_pCDU-{EM*FIx5YbE6-BUXi^x zQQW^E!1HBxw;$T?dUIx_ebkYOe)En@oM7VNsa=10 zdGu6{9}CPpJfF^Q-Kb*j;mNssr_2Q9857m5&qn@z@zH{D(oz4pr5}G!O_Xff#P+Z; zu|H{@`?{Snfs3}!nVok&l2PZwO2L8;E1MVYlxbfrvg7W~wht9sYd%IZ>^Uns@6*JS z&3vE!%{a85GyC&_jgITL1+PCcQClG1`sbI{jmPsUt^X=cnrOK_llSBA9TS+FQ&z0b zIUgCbC2QiLhni2iG~VBhUVH2_dyeo;(Z&xeH!c=yx}0R&YB{%O(b1(lWg3)|?r(58 zw4cAK?L+jERV7Z{<0$dk>-=^_4_Ml z?f0#A?OiT&Oy|Q&W9O6=yPFT~za+TogX%1k`@FM`OtjDuzWICK<>k9ew^trtcP8@0 zww*Ft@3(G@?>Mx7(%kG@E4288nU!r@LFWkFo<1d2&_KM&c2ZWe!TF?hcRrRLsyFlS zWLdRSX7l63`^#MId*5kFRf(4#iF~(Mf0elH*~q<$lO~?e{;+c6?;R6nookYW(He;lG7q^70P)+9 zY9uE)09A*ZF3+EXa6qz9W zSSALB15J?qj3D)EnHd-ixEL8g=L>@PACb%#Wcc_$i=BZ%ppKDY5!5`;LHG(g7#N-l zL(Bu6Svf%+Qci>PgUSy9bp{4d84co>u`)0egflXL&cXrlf1;Vs&4KVB$Ucy|2^tIx zpfVSv-UGCGaU!Jr2l1O285kbuLh26?A5@lIP-9>K9lQkMpJ!%Zc)-WV;0|@~7FGs^ zhA2jc%?uFter07~Fo%okx~h=B5MvoJ7Ruw-Na9XkcGPl%O);e#b3xV{DPcZ2M+ zWCZU^1@SL4F)#$QBI5Tf8w10K5=I72sQYvo85k0DAay=Sy(^k~96{l4g|Kf1$h;N? z22ePI)T@H{aSROCpzgD0Vqg$RVPKdH4R3Wc^Vk>}7%pfsFo2qkApN@-7#JR?GcbVK z7$E*OHU@?bC5#N9_63Ol7!=-57#O-$A>n7n!oc7l&&U8u*C2WD8G*Wx_6LZ63lx8r z3=AAB5cNx#85kU%K zBs;`B16Brxgfd2kOVIE;%fi5Lz><*xbciv?ybzFmy^u4pK>W2V3=9*H%mbaBct8iT zPZ=bCmx+O)pp5~1Mk|QV2TE@f7#Kk3Yk~Qo`0rp~0JT9td{a>P6d~MS4w6@5V0aG= z{|qJuh6_!Q_Ap4j9uotDK_Vi4mV)G45a|JQ&gcgXM1Fn4$iQ%5A_GI98pOYbXz>R+ zlXHPKq|FC1A9SvOEV(LOhgFzW1g8?*r7}3JRf|-HgLk9yx3e-N(*=-ke7#Kix zEy#T*K>5dzf#Dsrd`)L#V3<(M2yWMd zWMG(}gQ&lH(A>M8iGg84E987^ka~YK_qu>OTZ)Vf3s@oPaSf<~zr?^`F9hKqW@TV- zh-PE}of8Mr-^b3taG;)%0o1<$@j>U~8fYT&&vUf;ESs5u!Q>Jn=-7A$K?W&?m!SGs zkda|IG&}>@7#ISO{0}-S)YLY~_D2~bJp9c;=?AI)KL!fVHbnUNu`@7SsAOblhq~_&DE;y>GOUN%KOdAoEE&P) zi-YW!0hKS&3=9vT>YG62l?5X_ej-5Ohg81LXJue`5XlHW`x>PGC?AUp=zMulKQTg) zf#Ji^|NlX0g~5@JqnXK{Pa%Mh!|^a53rM~Kl*y0%{|`!gaQQfhJg7f7Ly>_&;Mo8F zpt2Jr-^%33$J5U2$S2Uo;>ah`%<9jVz;uXoEP`B)se!S&k> zMFxfq$N&Ea^|L_w!S<(dK`e0OcH!dVa6SxD9Rn3}=JtU|LdrJ@B?g8E$N&Ea#Q{h^ z7W)mD!nycFoYCy};0E_EBa|2z4xIS^9~AZw{obhVci}4t!Qy;3Zf`C=5jQkL9l1g6 z$u&w041Z4j{}1XvgUkf`DFNz!M{aOAdO?YSLE`lP|DZlFNDZ>Pogv|7P>307;Jz=9 zG6RFo>Hq)1=O;VzaUko3hPeY1$a&~~cHw3U!X6ahxJXfEVEA(S|9?>ZiS8!2xh_}& z!<8G{E?=U|z>sqG|9?y@pkWcvnSnJN^58QA!FCWCM4)pQ!AfJ9zndIV0EY*d&%gklgBO?qIsfk(ul)CC zyz<|_@ydT^jZgl&8K3-jH$M6AVSMu6)A;1Sm+{GeZ{w5yK8;WQ`!YWH z@7ws~zaQh1|9*{6{`)gN`S0KOG>rL zdL^k9B@B9LnR%J zsROOQu#sV40AWx$1X2eI2ben0U1cEiLBRnk2SFINMg(LZNF9g<-AM*hcR-eb0faAr z91D^J%?CiwS_Lf(f~feEYSUlAW@LLpmG<4L1iRJ4uoO$f`)QI z>OfX0G%zxNa16*}AVtvmSP&C577bHZ)5*vH!XQ3K4uoNB&|DOV4KfdT?GQ)}2*d0J ztyh7m+tSC#0KzAb0tTiIH0B11M^Lze>J8AEB2f5)%mQJUI?$XL=-L;MI#7M`U>_rB z8WE%fjA80P_W^?J1*v;-j*;OB4t1b83z)hW=NK7Y;7|veBL#&q$UN{`t9^_NpmkO- z`#?0vy`cN!VCFqJ&&cp(KcvnBI}RGRAhn>ec9=Sb3!sT4Mh4`22|;Q=7^DV-LG~WF zz{qgm03!p)9+-JBHt3E&5F4cK!39Q!2L~9z^A<35pz%`>`zo|N0I@+Bqz)8EAT|ht z>;%y{X#1H|4l*););EFVKp3VD78f8f5cWC9$RG!DFo=U@22^O28V!Nb5Eu=C(GVC7 zfzc2c4S``30?_sUpe7jDPq6j>A6!9e{uvk=szD2UKy1kRe`N+GP%|H_7Dia?XJG(g zuu1{Qoef*gu`s~!3eXxCM%4BHN6xV@z%Xdd5eS3Ys-QL+2*dh)AR5%x17VOj2!q!D z|KMO@fZ-B;1_lrY$$>C2>;GYH1JOQ=3=AL)(hF(^f@n~G1QaNs_5b^Q>*bFIW<-~^ zh)ZlqyDU6aM^Fc(2GpMcsRyY6g$1Zz0rCT=-DL;r*I4CeI0Ik+y z(QHr%Z*t;jP*6zpI0as)1kwz~T>%21r7kR-O(Kj>8q^qCRtqfXVmimr1+p%HfklCV zfrW*Ymz`Z4vUZ-)fq|1jgvCXI#UVjK=m0Axm+Mpp#s&@}Q1=mRA`8e-4h#*<42K#R zBt#A-xH2+yC^N7yF*Go+FfcK&FhsI2F)+0-f}%}8ft^F31LS-L1r7#=29RC`pFjo% z4j~1w2&mJgz`)SJ?90TH+@Rn%QOSWt$(0ARv%!IhrJ;j~Q-O&=fQvy<$U*%Al^^0v9FF%6tX}XV-=W ztPTkcPK*s46B`&98W;pXOC7+yQvnVJ0Y({yk`VU>p{527&^6n$L1_Wx7Z8TsO$lOy z_H2M?(7p{&e+|TjVbC59&{!ml4_bo*V4Z^T>&!Bb8ustClanRTdhz70S1ks@VAtoRO6odAPfS925 zE}%7nAT}~a-a`Ts2dx_d(I5=kPXbz}3<^ltz7dc(XzvJ!2CW_U05Q-oBrh;9fcBAq z)>VS`k%0D%pzj$$(+1u{0uqDmBLS`b292kH#6UQbfq?;Z|0-x7323YdBnHEvJtQDD zY##||{U(T?03y&ZXkQ6PC>cZ`VbER^Brco@+J6G)KpCL@C{QMx0(4zyKPvgL2{2ZUzR1 zy>K3cv7dnfyhijO0|Ub$h!C7S3}u1#ZXAWOk3nf<>No=f1858wBz6)+Krv{|Gl+Sb zfq~%+hylfC85kJOGcYh*WME(b-FbW&Dt-k@BU7L;tZPt#>rfg*-2f3#d<#m0sM`z- z40jk9818~NSTJZ`#(mJ*dIkpYUJ;NI(0DG0hT$hr#&akQqCo4xK{N=1#)(1nD-Z#i z3u0hk0FCv&gYse2dj1A{CUJ)m((c`V`}Z3<9vMJNpt!-tij>QopR7*rV<7(jboH5nNgv>6!~ zK=+7)_KN63)gYT=fFx#!#70&_EZYc4zcCUUq~8RI54s=RoRNV6G^b<9$iQHQBxlXY zz+i*Kw`F8t0No7^+PecX2ZTZMF^-H33{FsW&QRJFN`usZFlb*Ai1uV;VDLhd1BrvM zHx_YFf58_?+z-lz-8UWp<%8DW2Qe}*1Vi~Dj0_B+P&UYH7!G4(Ue3+gXC?9lxJ4h@J$_KGQ7-{MS#D(KTMh1o?G_@efWF#@r{sE8}I!Gp87h4-zkBWMBa8g8;G1q4J>p6IF~1 z4AoFRNUnyFfuWX>fuRm6R?o=5(7?#R&!PB%lwD)5wBLl-UMh1rIj0_B* zJ!v5GKzJrp4TufHvl$r}<}fla%w=R?n8(P#FdwRB0h9)>$%ZOk0u_UD8J42)LHpo9 za?2SR7(o4S5F3V9qN#<6kJ6(dFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRD zLg0az;`a$+is0eJ1M^hD>-s11fF>{*7-sW8*7vXEfvoTEaDlAvf04rsJ~IY1-wT>k z15K!c=GS(dV_^WztAY3+EK;rd9kk9r;-Uh0o&OO=MesWRCC?PV>-@QS(boAdPzA5^ zpTWQYK9fa|fq?-ur}sfv5xma7L0A#I&L4Dc81g!Q6DPx z-XApe3R>@fflm><-XG*PQo_FF-~azV-pYJuh-C(c6N7H`_k;zi-y;^NLinJm+`TH_ zL38j0Qz7gBkBKOLzb2yiz2FYx_irMK-`PYJzl(_~epeG!{2rjH^4(2T@q3u4;`cOB z#qVXJir))#RK8CWRs6mT#8y`MeoR#H`v(n`@6SXP!C?Y(Z>Xk%sh**pp@NZtp{aqH zp@o7*P-=>TM`8&?T-QVsygn2(7YUkkFD^+eC{8J1xOAC;;S1=X7X}7~oXn(LhT@$3 z@{+_n1``L>)Wiw}5LKMXfK_ktJ@WOIzaU;OXniTNo6EeJG2NV4oQdM-lnSt$(e-Zg z!KODkzZluWP`#jeS!8?l1F`7EuofO0Iunri66j<&Gjv7t5$FUnGXr=v3Bv`@K~fB$HT|HK6$}iZ zd;`+Q%mB(c3=E+B0^x(F^BEdI6USin;Hh|q4{$!{ltu;yP31_p*)P^g3416oClNGHtT6Gj-oYf>QUK_vkLLyiO_ z=Q1;ZP6uOP5Lpf5gGvJi@ERG2deDj!1_n@h1mQzg4D2}vQx6HK18_d5lwkm`p@FCe ztsr1vxN;t*9=e*~0*ntT?HCv$;CxUi$iNT-=YvW?kVz2C%peP4KuKl>IcSVR1Xvh8 z{s)B^%zcauV&L)>cE}?W126atGzZY6J$TOoFZj%s2}pdn{R^gL32SMHVA{{LGw2tHVA|Gpm`J!8-zi86j#77=G2k}8;-5|9f4B~^vn?dOjG)Kb7zz-fT2FZaiNFFx! z3*&>%pmPXkVDM%F?XBTu*bEx0j$~kHh4OcTA_AlsyypMo{{x`2f)WwxkAlYAlM(7q zp{WO*-3Hap0J8rcBLl-T&_V*RATI;xtgjdF#R9wxpuI3Rkoa#I85jgWiw2V1|T` zKAOA@69WTBB_yYV!rKK+-Up2zhQ?1pIZV-PJ1H%=l{=*>ss~H&V zpz(bgbe7RN28Mr7dC*yMQ0IW-?=}+yL&IeT2GIHyka-W87#Jd^F@x(4kpEwT&N8Y+ z@INv!Fmy~s@PC39aMdw0IEaJVX8a7Gv+){`cv549U<}ML1%R#@zt3b z7$lJR1|aoF_FIC^-a|6q33S#X5+8Jy-vK0k5a?_tBz_b#1H%d=eljxy!vZ8e=q#xj zNc}uC0g1m2 z6n;qj{h;tc;-3Jy4~c(~nSp@=iGK@Jl_BvTGcz#!K=R)k&{<+ge9)PUFOc~EnHd;v zAn`d_7#L0<@r76z7r9o%qA@P-27#KK^!cQA?wjok{8nZAk{6ON{fvPej^`4-! z6p`eESQr>yAn~I??m^E3;^(q3Fx)`mmx0b+MB>-8FfhzO;&*_~4n*QlM3bM% z!oc8xB)^D-fx!TYzXo)+91?#U3j@OnB>sLD28IkIK4>pv1QP!un)$a_7#J#$rxC zpfkCV-Dk&&8b0ozvnP?%2ZGKjL*hrXGB7A0@l!x&>ml)TSs55MAn{Al?5{&Jza7oI z381q`k@U|*^Uoqy)c9EqIy)6fJ?Jb`WdH6%v+o2e1496k`iqbzEx3pU)jzk;_>a-} zZ_)VQ(D>lJtYFh1^#>QEi3}D2nJx7@x9Ubp=kUVG=4G~ zKMRdtipFn3<9DI)r=aoYpz&9s@wc!sFbF6!GJw`Ff$FpUX!0k}_!rUmx6$~o(D<>UTKgOSd0fa$%K}}u|4eG6ds!!0`|0}yaUaZ>iJ~(Z|L8eTem{`WbgxaU<3=H7) zrz{K%;GUv@lSK1_gOga;nnM>EaVR(#C^|4KVqnx@Ss<*yB*4L@6Q#<)&>+AdFukdf zgNZp_3G!8~i1{+>xHcsJXoeYW=a~|{^ zOqg)gGa=Ic>)X^3Jd}a zY-|n&Y!a?MP8tD*Ck`esI9TjpU=b4f^8e`lc&XPd4Gat_CQmFLBvfiEOqh5;<%9YH zMW>D?Mn(<>4$xMErwk1XM7#uii{IHWu<-P_FsM3%P9}9+qr~7K@C39>-C;xHVFiW* z8Vqb4J{K7p7*(dQF)%kaI2=e|V04(G!64qSq=`#tlGkMhAqP$ye?}HFiH9sM42%lF ze4R`T3@l8GganwKStc+zF)=7G7BG0Q2zW3sW=M%Mg-qixSaATn43>!@ftiK(l%m_d zkR?nfav$?Jc&uO)Fy(Lr-&nxOu)$%{0oMu290CpukY%Yj1C;02L&#;1TYyf zG?uVz5MXIwNNC_|xa9MWQ&Paefx*E;gMq<*aic0|+k>l#Mvnql$^i}rE>T5+1}_H= z4Yq70p8zHkhO?SSWO~VFKgVO-w6!807^O zI2fAvx1}@)OlV+eXz7(wV%gZk+{k3G$R()JL6bpJK!SzAr-eyENT6v6gR29>lP)6$ zIkh4+UKSQc7ABR%NukZZ9AxAR85kNI7zCP_7$$U!d~tAMVV%px(ZJv#uh5{uz+x!D zB08yufq_|3g@Hkey~JUmCIgp3!yJw$5?#WNnv8RGyf_*fn2akExSXaiG6;N_C~DXw zx)7A_CnPL&T@dm_g^#Ua=_vu0Mbi`&TTegFxX`ft6ysf=?`(?$8(26RG8QvCDmXg0 zOj^d^z`*Fx?0BXzK`YJ0OQN1dNlSxGphba4B14%eFjr(DgZn|Q9HEMYfJQb=hQJbq z87CJon@BWtHu26`u!d8c^EA&{oj?Yj*$)gFTwGRxhD;d_a?R(^4scXt;*DT<(CWY$ zp(vstD#Db)#0)Dq5vxogQLQx=GF5wm>4((SwId^I-|hAz`=NslVQ4$ ziG>>ji<6Y|CPN1a=Z1-mJWt|HMS@&4m>4A4Ia!k!m>8HDMOJj^XsBp0x-+j}+`z=a zB*)5*pe9(81x)AFfcT5O!IW|bO>c&*JV1vAnm8|@#}#w6$XzE zhlFzmYz>DMoD>5E6F7wwO{An4nA{FEa4;k=^)RwINH8!cbr>peEZr0!VCz#M#Ng?` zkd=S2Z=n$hIBSRNMoSFl|fz^4$v!6>nzEs`zEu~mYBA%UT}v5v`&A%(|{;gQBA8&glFRS8_2jtncmD1uJ; zb=tt9;9%6IwLyT9aT4G#(`RuGE*6CZ1{WvLa0rtEn*algB-^SLUs*RWPhh!}#Bzd3kEwydiGgFn zG=&gu1r~+|hK55-91I%V3LFc0+nJbT88|%73bJrCIW#aOtZ+ER(8q9qw5QeX(+U}T<#ZR^v#H(+Zz|^$jK>)+kCJ$YQC=5K%XtCmbE33>yzPDKI)RB(Ul*Fetieu+C68ur6)_V*>}MuOZT);=sVl%)z8l zoN!|Y4_kv51IL8tCJK!gemF2FvM4Ay_%cr5DGX?6&p0H&aDjvA2CD)?0K)+XMHQ{X z3L$gPK4bV`#K*&tz`#(-6>&hALsglLfiYM>gj+yI_zNhe88*A!e9oiL!W$IG=FGr- zf`P5_h=Z}PBqJANQYXWs1_ee&hJb)3g+`tOOi2uk4PtB)6B-nP5(G|c6`v`6#$4JS2WCuATGVh%O{qx(Gy>*s zz;Hy0flJerJ2DV_Ogbp^)j1U8ZmeV077bO#(00)^y0TTuWl?e=7Jt}Rj91H>s zkr%#ZDKHuyIpY>3($X+dgS9n4(NKDB>r1)f#R3_%3l>UD@Hn6)2$`&K5@>K_5MbJB z)%d*O$^sb;FAawYjeI-;3=9IHl>!VR3Jn?x4-^bI0+?6@&atorx3DZQWfEcJk^!}3 z6s|QWbucnLU}?C>R5FW2AvA`;WQLkgAVcE|hQt*H4VzkzHV80mKNRt_fl;VIAWGn& zN{av!lSKiGpuuIA!2HdItd}LFK*dlK0|O`L(+A8v983pJE?_*&?x6Pb5r<=j@G~V3WD1iq9-^tGAK+DWIN<~Xvsw(Mg|83&<@x@ zmW75c);AjEUCo6)4;)S%3$?L0Y(*vK7knw zN(Zz-Gc=4W3Tzz@H5i)M7*qsXO*k1Cc6Bf)I2>Sb2w`C1^kf8WTVxR6^59@{U|?`% zv0?ace}h?rO@@Jii=~0F#75w<0814^7efMrgbTwg0nolrg^oT(mX7LxSrH5l3==y% z85vkpcsLmtSf)%5=@K?zIUwNS!64|EW7HtxvV$G8hnJa&W43@XgNCEd1_lL20Y_0E zuELH#R?0{C7X8?Na-M>ek<&Jo6AcXlq7DiYN-_dm5)=O4|EDmKsnw&uL!5zAL?lDx z!2jjd0({H|IGS46O&A&&TRb00aB{XSkl9oie7T@OO(K^^pJP#~#O%vT4i^e$ zI0Q7fY!GB%;F9C%VK8!05)j}JnCTcO;M%~_q{zX*z!A{Ke%eWagJIchhe`nkMz$NK zi#9Sif(DgZ7+QK97%oiwz`8Ygk(R)bBNOJZS?(2@#r%MQ(Sjjtmu9Dg1B;9cD+3dQ z2!}$qGlPJ}3(gRsg|itr_*fVMG6EbJQxp^`C%6jnoDvA+@K_PSbU;_B#W7(Cs|YKD zg8-kRu#|`f0~ZS)E34@>i^SC|YM!pF9n3x~&7b)gR@V5iTvRff#B{9Hfq_S0mjeTX zgN6r#G$Uh66{9lC>aBcI1`HC0pk&Qa-ORg3>Wu~yQw|%~W<$0v?MDYY811p0_M+9pWLx4nm zs{#WL3sb5NhCK5)?Gz^Les_ zqlke;MdwF^OYa&``^G_>A%%_QK+1x=YFSSQ2LT2JPlgbln<6hlW)a~;&$ zWnd6-<7sGN;AnHW)_A6)9ou$Qh}uC!PN>uQZcwW8{X(hEcZM>Z?+qYauJipsmCkpC zYMt*3s&&3A)aZPFP^0tRp-$&JveO?NutDJ?%YoRS{jbLkT6_ofn?d&J^9Xto)&e>WQ{mjjinfXadP3b#So3yxcS2kpO}0(Be6t+?>w zBNpG69kBqf#{f+)tvq7!z3iw3XeteSzTTQ67T^CKM#!%}V)6aoVTe3vtRvLL9^{3`Q1lQ`TLGod_Q=^0=!lRr2fnii|^-=?7wux;``Mj5c5Iu*N<3y zzXj!k%)4{M;`@Ch^^cBNe18fJbCCS|BNpF3LBj~7|34@Wp#A~LGaa?~&U)11J7|mu z#OFO~@m=63!hga?ExwmR{Rh%7cGTj#Bve0$FMZVFyBv~w#iJJARgmP>j#_-zM3UDz zYVmzH5?}wQ#rGEnA@+gnH#%zZeHD^^)1wyOi;&b?9JTmveH4=ZK=v!Yw)k#?ByWGz z;=9vPNLm7!=XccNdmxg$&JT<4K}hC@9JTl!jwBy-)Z%+A5IMw;#3m-i5?}_|M{dH&j2!{NAG$-zOl+Pd;k#eIb(kw4)Z^XF|;f zsh@k);`;)qdXW8#k<^3u%Z^%nUkQ~5sb6!{;`@52c_8;~JZkZM3zGcyqZZ$HA(_AL zsKxh#pfm+u)4;%R>8Qo`t5E$Q^YUL=e7}yQ|JG59?{}f`2a^AD#Nzu)r1bgmC@Mee zhsF0V(C`N3>0d`JzW+UH0bYX!az9868Jix1qzxDil4Ch$0h;Pz;5-J&2cW!Q0~Hg5 z(jaxx#~|jyXi%OOgPI4UL1IeBEWU%rc40I~Oyd|NkHct?nDH@4IR>Lac6c3wq-_`t z@`K|sNIB_u3{sAO!Ud!j9VbBD3Zp^s6ArZlMuR#%c~Em;G{~IPV;11D8AgM|D8UWT zFo4k@v&xS_>IN7M62peup#Ff-p!%a58aJ?b0qL7_3{tni{0j>6$;T|f>jz;pXpFr0 zFeFT2G)V66KHs1^G>wkB6qW`_&l>T>v zoBH1sPDA8W?%RBCc%=W`;D!G8fXn*d1>Qi!UGCd_7XXPr)&I_LRsZ{fYY_32`!?Sn z+}Hp9;gSCL3#atIE8Nomo&Ytg=f2JNfCu{DH$2z>z5pb4M*sVQGy2~h&gy@Ea900& z!#RiU;;`fJr*v6Z&+%Uzh}G!+D&t`95Ky z&i4Zob-pX~>3nzS*ZGdFCghaOcZG>M-vcJ-2h7&_&M+Gye+EhZ1W5mE zo$nWB>wIs3%0EEz%Zt-C-#5(B`Tk%I#2+C4ILy=e&M-&kyTDwX?+tTxzE79~F*jio z#9yFzUjSu;{Gf2g=6k_Ho$nVG>U=j?2nj=-GdABBEY$ffut?{7z(O5x`gpSm68?Xn zdO>lbu-O7E=dc-)pFwFUV3p4I3#)X#Pgn&pE8~pK_XH4owa)hqs~~P!uo)2_YtGnw zpRiBo`+z*(E`Ab$K-h#x?FiL*A}W4Bs>#Ur5VDxm5@pz1(;kh(yqIv=RI z1yFS!P<0?aNS!NGodZR2_&9Ql|q|rvX(baSq}S zC8#R6!aCP3Bw+X4wc z5Fe!O&lX7d{n!Et=N(XWpP=eMe2}^iP<3yh>K;JVJ%g$P@j>dIK-E2fs^d5h@$W6D zIuIYE?gmud6{tD`sJe4dbs#=S-5IF56Hs*#P<4l(>Og#ux&u&kd!XtXpz5|k)q(gR zbz7k7HbB*_fT~*sRR`jO)UAN3TLM*g0jh2uR2_&9Qa1;xZU$7{52(6HP<0?aNZkae zx*n)Hg$s~yX@{x<@j>cZq3Rl->O7$8YM|;se2}_IsJarUx&o-W0;oC=AEYh^sxAYn zZU$6c5>y?C4^o!^RTl$QcL1s`45|*q2dN8zstbUsdjVDF1yu*)gVcF!fs{iHTOs8c zs0{mX!REWcA)W6Dhalw+sBBsSO}7FUZN3*A*7?5SFr@4`uoY28Xn^X#qdMO|9EFr8 zpfWJGg9ggdKFF1~=e!+2wdIu!+9U%25biNmy(D`m~ z0-^_I{(=(_^$WIHdWjL!E0Xk7-<11sl1W&Hyr^Cd3Xd^fnN^F84zruhQ*biPlxrt^KmRfxN;9Jl!H z@&nQi_;B3f`w}KwaGNFIlFfI9iMrnlChC4~n4tUp!2}3>VS?`W1rv0?Zl$R1?1P%U5zb^NnkT?PP8RTw|IteG+?;_CfSm9**eF@ZW zAh`=Rw%?B^*nU4_WBdJpg6;P$Hn!h4*g(txrIi)uAaMXJ}i-Q@}-{?8z>pCGY+ zAhCJQBlIeqxA@)w)oXync7d`%ZULD+K~nF#gOuL)21z||Tn1dR`CcHU_k979Sj-ih z?-!)>zB5Q8)MZ?;`EDSs_dNkgtmKN#_X*N^-wz;(f!y#xTJQS;8HC;*ka;qC-x*{P zVlzPI$?APiKoVO5GEY|T`vIsJC`=;GTYNWRv<0WvobwjnzkGv)PtAFY?>d#N zD*-f+Y0`-B^2-yQCnecu2Qzhm}2 zKtb>Of?HT($ZB<*LnhoohC5eFax- zz8k3PeZQct_Z_4Mgh65(KyJ~{`wqVUm4Sf)zMr^e^Zm{>o9_#**?iw}&E~trb(`-j*KNMn zT(|k2aoy%S%#Mz$Hs1v_^}Zj_goG2w4v^ReO}*~|T6*6>=7TUuY=WlV_YazoGHlOz zi|?TF36xguAhG`-v1Kkm)PUUIa^2>8LzmunhHgmupK#sgyFs_!_YF|~oa;8zJm4M>>^8oL3x8$|2eumO)VgUl?rVe#GMh7DNl0s?9;+_3nba08MD zKHRYQ9s*_a+(fV)kk~0VExtEE)ifZn7a*~Z+_d-(szX3-d4R-bxCIdh`4!|o5Dmhh z{wFRBk_WjDM1wFcbs%w&JjneEbo9Sp(9!?SV59#%0Yp3Le=pF{|K6aZ|NViN{`UzW zF$M+(kUtdk^uGt_>3=_92T{Ah2cg!%Q~!GaRBg`# ztN(q1uKxE0`Vey!O!dDzK>g-mhH%548#dn`=;?nK(AWQd!5*TP!5HC&1tti;J-A`> z{ez+YcLgK;?+(y#Fz`dDeSoBP$qk$D2Xytne*n3|8Dee&QuqpZBiwM}hRt^eef{qR z`ug7uEFfwRxFO69KvMhWhRyc?BmM6UM*80qEFo$cToGy~K-GfUhz7Ty`QR32J}|kB z$Ok^REWY1?mirN)w09d)zT4ck`5q9i|6L(M|9eA+!S@Lr2H!7q7<_-wVes8ST>ra6 zr2cn@aQ*KaA|T^HF}H2LF9_HF9uT4bJ)zg&yFs79cZGg~?+yJ1-yM1kz8CZue813R z@SUO8;QNDqgYOIz48A)|F!+980%R;F0I-vt)w zgUh!MKOk=B`3W%xq(|W=#2+Ab0+bChU*WFJ_X}(EzcZ}W|2|;_#7_yUG5w@-*XDb| z8vXAR*64rVfJYrHtUzXi$`WuGoz%eyBayo{-vvP7w-VwnPDl5Rq&!JLQnv#+9H90rK$4eWM)C(}(4K*T;Rq4ay*LEca}_C%n@C z{@|YecZO1v?*gSJ-y3R7zCWlj`R-6_@_j+A$#;cPlkWzlCf@@o)f|dFA5BBEYCpejZ|KMZ}cIT0MHs3cq(f=-RTmQSkDgEyWH}t<3SV82T z+_U-a@KXP~!X5qZ4wmNM11!zIPp~)tUf^i{{eq+UcLOK$?+KRX-wQzEmJmHG_ies! z0FCkA)Bk?K!u3s5t_$g46BZN48+HTeEP)!@5=ngO^y z#K2$)_8%y(9(jqGmmHAf*IAhTjjIG5juY z*6@46SwnEznDEf%yF!S;cL#5S?*_&O-vyivzCSnwk=yXl=KF>)gYN>K2H!UvH2i+x zpyBt1(}v$KoHqQfaK`X^!5PEv7Y-VJe{j(7I|EeDg@-oZ9l{O12Y}{=4jO(BIB59Y z;gsR`38xIdKR9Lh-Qcw0_k@Fn-wO^JexCr+$H2f4@W|%-g#d%^7rYI=GgKRW7pOM+ zp3q|SJ)y(s`+*K4usaJL*?d^A^8+5+d=~)Cbp;uGS1>jBUSMJHUBJ@d`vyyc?*Uc@-#=Ix zd@tZL2IqYX7R&FTb{Z(ZOFXstuFz@lJ)qNoV0#TzRwS@k!u$IRSS;cF{Rb?T@czC6 ztL1l4UlXjJ)$+Ryw4Jzs)$%*fcSwKe0juTr8tC|d0-NRc7HA(f}<{ zj}H{=Gx)A>#NhjZV+P>yfep(Iz~ciCmK%KkaL4Ss!U}`$pz#5Q0|xMZIC38u)CUJ) zWHF0pHs2YZ*?bpyX7kcJom;lJm^~9S`>^KNa z9Vjk9aSg&CKY;q~$YP*z5D-QdD|v47UEsOR_ZQD>zW;e<^Zmdxo9|bi*?hNnZu4E` zxy|=E&uzYUJV%VJR6Mo$zG0iecYzHMe}L=&i7nV}@SS0!0erj#B(`C@!FPd;koJ2E zC``5*eE+c0;QNIeX5SP38hlq^HvE2p)$n`3O|$O>D-6DGxM%i#0VtmDn0>#n!r=RX z+h*TC{6oYyC{2O<2Ew4Y24Q3|jTbiGKRmbj&hoAH2A(@6(YVtVgj2C zzAso!y!o(rMD`OXzCajR45kj2mq6}?#W%7TNFN9zi>17@`Ofgt=KGBoHs9a80JSG< zz8`sE^IhYm&3BQPHs5<*+I+8giHPqNPi?+m*lzIs0Ms8p{{R0E5<9TN;QNL(i1-GH zUD#pp{lFRna6jY+hb5Ti;DpdJoR;7+Nr%%CK2DUtY55)0J^+;;4M^e(I4!?}+7+O7 z{{v1$T?ZSdnF4JSfaDpt@XIS;k)H$A53<*R%kn#@jR9gea9Mr_wMRhg16&AqDsV&C zAp07)G3{G|WZnaA%kQ8%6=a43kL7nz`vMd{Ab(CcYWV%aQN!;aP8fdQaMloBAMSW* z^IhSX;rE1Nm~xs(N{ z8~~|*toPl4$T}C~-wnqMzY82U{9bTa@B4>idfz9UfsDo3yt4VO0CMMHL!!;|cxCfF z;E>^Wfg^@QyBpLd6gX`7J>ZDp_W&NF?+v_=x)anEbU1AIeZmpL?+fIOzBedA#6j^@ zaM04RPycBLDAUyxz+J;BE4yMVpX_X&DN@cOssmCg4BAhU^3JL45-&dl(80a{pq z(#9NKNSXq%5Aa%k2el(X><38V41AW~LG4dax^v*eOn1onAc25<0~UGYe6WDe@;j(4 z3U&jZ<#$lK6~tEHN4T>A$_BaT0Y9dDkn@3qfaP~k+Yw~O0s+hKpmr!IAAtPHP-pbr zq0Z>LLW9xw1Fc5z_SS(nHs2@I8GXNiMGh1W4L|k1fB30~vn_Yyjm>w3YNPKCwMIDA zfc*8~qu%!opY(`s(}BX}!6&`%8$Rn1-KGQiSE1hMdqcg^cY%|7-#45?;KP&>26h-i0%`VI}%M&A$A7=0HoH2&^jWDIWeg8B>_KyBPwqwftH zjlLIbhU5cKd_AZ(`rc4$^gRI7UgkFbet^gLd%$s{?+mAmzF*jH1a4b`;&IAbo9_Z3 z_Y1t!Md1x$^j2;KEd1g`-fDB{SV&Td=IcO{=UJ+_`5)-@%I2nYti}Ck{P~-0l?wEaN@H75?z{mKzLNlaIuON&FuLNO4yL^E#qFw#~#Qq8iI|UJ> zFcm?x%NK|s+T{;K5bbhMm|vJ?{QbZd()~99lrR_=7?9iG1^@s52VrEf3mcZIFS-$8mn7$o*!yYcr8TZuP+3dj*? z{>=IR|33&L`xB-PxxEeY1E>v!EC$jC!pLGgpKZRc_+<0F;gikxDW7b}p8`vs^!Kz4w{9CjIhFW6@M9b`TTgTw-M z8Gmos21$>ge05-t@pp#1q^C!i-NX6&pptKE&3uG~nJ`hG0`}4)- z`;0F(-wVFjd~f+;^WEc%&G(ouHs23?vH8B{i_LeHuQuNWzS?|;+2Qcf=KF#B#@`K~ z;RLb+Bo^?%`1^%B#@|8agD^-e;eqk@2X~<5hp6Ru(3}IP>`j2OLEh8(YV%#;q4D>I zhmdq(@zv&gz(eEj2Ob)O$NZW^Ex}{fpfNvC8VAv!JjVnbGg^Qo4+;~IJSdJp@}M>D zAUie`Tzev2qTMu_8x)cK<0yJ5dQN2|9>$41}XnRVlv-szTfz2^Zm_No9`RG z+I&Cq)#kg)H=FMU-)zA9mq2Pjc`4w#@%IJajlp{fK;Z)tYxr*b{lRzR?_e{b^XC)3 z8-M=*RR_`wayN(uVUQa^7+DPFPLMxAYCsrf9zS(@A^3CRZ#5bGoIp1u) zzX7=&$(`Ud@Wc3fzz>8wL1G3!jK5F#fp8~C%;AUe_XR&7@o_>F(*6SNM*zhg^Oyhs z!R<06aZntB#4WzteE0co1K#rlcI!8r?-y82z8kQadH4_!pF}9$bQqnIgA;QwYe{V3CKle?jIiz#@;l9^iq5<#*8f zFOb_=BrU&#=8!;a6-mqQp!p^cJ3$iR_611n2S{uMDa-E*en8e0G)Q6k3Aqh@K+5tv zXbuHrHjA|7chI~N$gMKcnEGIIwxIY0g}p+($@heMlkXdvOujd?n84>pCVU6A#Z10` zz#<2V8-p!+-xqAr!#Ve|;=9fF51@IKN)w!FwtTnwexS_cdqAbh_XI7|?+p5;-wUiv zzh7`Q{caFw`u#$j>Gyza)9(VCOurXwHvN8Ki|O|Rfu`WL=>d@WWhUPzRGNG@_+j$> z!#9)f2mY9RU%+Vky@1v9`vxx4?+W~;-yQx!=6lY3xB0G6Zu0#?C4_(DyUllp29xg_ z8X$a7+!)N$`>rrwkLdXzP}~O0*Zc0UK#%D8AW+;qXfXNi&}i~qpjz+yhC03P0WFYz zFK8_xC|*DqG%tz^gXB|w*nEEgG6NKE1lAZ9{IL060E&wW6QbQ&^TX!*0?^!7g$dE& z0h$j@0L4j#$@c>jO}~Gb1c@uqJm`cnlkXQQOujGpX!3o-XGoZX(sw|)$#;e-lkW#E zLd4emu=(ClZt~p$Neq;>HTc)u25$3{lOB`?*+?DzfTZ0{a!G|^!tGvh&?wz zVN!1L{Qv=VPe9?(X!3mlDE!dk;KL6@{edg|afyTSoGmoZp_jJ~NaC>acEul??|c5( zfa@J_oc^)-Zm`Ytd&4%<@1VK_ghBOQ!8X(H7q*#xzwyWB`x_+npt|P4Hq-A0+Y#zP zVhY<$zc*|*1(&xC(ujV*0ck`(fI$Y)4{!jnq5Xgc8ALzefDED^z#xn02RO(g`T<}5 z*nDr8t@~YJjV`#KWuR{MT|nOK`vyfb@c6ud5M=$HgOC}xpVJ^@1{t4MHTw=dk{YES zu;>5({~!#iXFy>B!Z-ffd|&X_=KGevHs9a;wSntn_-pe$K+5d<0&%nNAUz-q61yN} z_T50j>^tmoa8MY6%mLv8|Ns97VPr9je>UG4{@HvN`DgRp=bsH+AJ1Q#?*fu$-y1~D zzJv6DFi32Iq}g`?G2+dK-Q|qzryc+Q{|8}YF_=0~`vc@w5C-`HRPQ2-f%JhevY5z! zo9`R`*?jN#XY+l|Kb!9f|7^aO{ImIf^9;gf;C`uruo-xKUZD{Y-=H=D$ZsGFiZc*K7CZ6Z=KF;IHs6>0 zxA}hOKO(*j{@Q&1AZ7Obf(RnML1G2cX5SM;5%B@a10b_O7!+q9j4YwwxtYmoHqk+=K~T3Z7We}E*epnxzt28mq(WrOWez_bUseYu2y{2naw$nDDq zSmcr0mkNrO@b#W9ik9C&Yj{BZNKv%>4qER6VlPlc_~QW*TR{mSo}gs;oq^dF+-Exg zVng?N!`jTq?Mnt_%kQ8yI3TlKlr6u5*7bnWDk$s&oXx*aa5n$`z|H*o0S|Ndx|Iuz zw%;E(n}1hu!IT5769nl8VO(`7E^&|^P}~J<*ZY28yB^LpH5^Q~-wmwHzdP8P<5VNU zWc&StmHGDuTl4P;56r(aJT?FR;l26y3%|_2Z(z0ft{`mjy+GdLdqa-J_XoKa-yQNT zzB{l%);B3I*?w2BHvfJAWd2U`?-#b4e_ycI{QHDM=HCmBnSbAK+Wfn~1@rF;`ygv_ zbeL?v2UwebXRw3tEtqV-7l6XX1;Pi#UBNoN?+)wrh+gLdiu(eP`VD$St@8ne9VqSu zT+P21xSD_8(4hDIK^vm|3ERH{Qim)2LE<3!BTTm61>DTPJGhzS-M0c#dx6RJ`vyz% z?+!NRM7#42lkN8hmge6ZY|M!c572tG30CIc57?N0R|v599uNqLt1nEp-w%M+Q`wq- zpRmdN`-Cl!FbAdo25a;026pD(6Q)AMc$jU!Z?HE1UVtP9O8XD2&A)E|iCLL{4@k85 zUXWz*{lFFT?-znBzB6b;?6F|B{Vrf*{`~_1buP@d-xs)=f4_hh2cS0N@*j{JMK(g| zGf?{04`v3?`7AGfFf)M06+ZN{F@VleDfur1zK;TQjw|S<3()*7=mv}n0^;!de!%zq zY*YoGZNSs44nAYyjgcDo>=N(a%nYFOTR?|Qg3cXa5P+<;yC8{r&yRwd4)~mbfOXp7 zefk&585lq}dw`bu{Q3VsKjsH3!{7h^^OYGG7{K@Y{AFeM|NnnJXiNumzfVM+Hu!#@ zXP^QalqiV6VD~UEFuZwh^WET%&3Eu#U`N~Up!qqE_cq@_b%R2W{`Z;}HsEV*2 ztuJW(F=$_#0GsW1&>Gz>Hn!gdzS(@&cw+-D_YSDpg7^F^d1dq6z{wW8jwpxO_B&|J zPt6${@EWC_XExtwys`Oy;FZny3@2Ogn#7*hHsHNb7g%h+mz=Tr9xz|$yT(#KG z;C2$nADizN9BsjCf|q=@0naZd{D$uFlGOw6?~##(>_Y+t9cV94g1RkupEYPLVE}0V zm6I*_d>>Hy0Idm>khT4ua?$4dluI_>6^sM88}Rxp&>AWRP*{W3Np=~1KXA$BdxWDcIRAtCbD+ILA%AVYgZ6KO)|o1NoA03gQXNjVkTs8YAp40#KG}fRUV_$YdN|sC|KVW!{ey$; zcLz;K_~wB2@HpCn*KT#N*@DMYO5WRizu{>6J>!zicTjuf#uc0IpgmR#G;G0Zwp_m2 zfY)vD{IdCe0u+xH=HGLE+I&}eY6Bj}0hRZlHDOym+JNWAKw}i3`Df4?QqcM@P@IDH zqJj3NfyOa79Bsc#ytnzj&^7J*X_Y@yX`9%4?hNJHFX`2iFIZdf!V<+ko3ip!Kg8Wc0xE*PwPLsEr9) zrwdx=58Af~+J_);*5*5C4Z{r3KKg2-?{BWyd{2011K#uK!)p8eg@f&Pfj2hab$;4_ z$C^O<4+B79>|hR_g9p#0RvCfUrGVBYg2tslYluPn62dptq=K0);ys9kgCwGDVrW&-H!3Q%9? zhS~QDP@XI`0k?G;WNp9q+_3@geFUA`0NPiu<+ROro$of^f5<`hR8El91GjNNdke4J zv;pr41!u_Hs&GwD}Gi;{)w8Wq2n8Ui zoA01GYS6e7Xb%)xgP+M;UbYCl|&!He|`~3l{?e_{N z+wXhs*nDrfWdmM&0NOjMaoXnlms2+1bw1dD`z4^gub};pD_+}tzpz0cycS91i_P~B zj<(?S*AEY_{MvrJ(i(s9$vAt<86tUpC-%pKDlc!TqHv7eVVQL2D08zI%Z3 z#~qvRKYrPK2koN;tuFzsb9HdE1+Q&A^T!6fR`mfWKi{(X4%(*)TIZ_5W(%I%2d&*+ z04k3`YlKc2eh2M;ZE&*veqfIN_YI)4KB`T=gZ7Go)}aP~_Tbi;d|&e0<~wLlENC4r zXf16BsNAYC0gqFI_TGZd@>ufR2HgGytv6o)(pPE%ZU=+LWCL#6dh$VwPkR$ z{a$m^=DQ4No!l*(?@!LyfcFxE_7{WJ-Wt5O`3^cC1GLs1v?dp{)(Eur9kh37f~EO) z(7O8;P#Cb-eh0P5C;YbgZoy{z-9gqCJl}ug4rDwJbO!&4Nw(h^GONCuIp}UG$|K_Okoy|$-yO@*CcQq%S?`BRq-`$*azK1#Kd{1-I`CjIv^S#YU=le7#o$t$> zbiOZ$Vg7#1N$2}DC!O!loOHf_bJF?F=B)Ew%vtBVnzPP#GiROeZq7R2!<==#r#b6< zFLT!U-sY_HeVVh*_hrsH-?usId_U%_^ZlB$&i7}|I^VxJ>wIT((fKasqVrwNMd!Pj zi_Uj97oG26E;`@STy(ydx#)avbJ6)e%|++?G8dii+gx zzO%XNd>3=o`L5=w^WDr<=ewJ$&i61^o$qO`I^WA&b-uT`>U^K(s`GuBtIqdrt~%e3 zx$1ns=Bo4knXAtCZ>~Du+1zx#i@E81S98<(Zsw-*-OWwsdzhQf_cS-1?`3W}-`m`D zzE5-0`M%6e=leD{o$trobiQA6)A|0)P3QYJH=XZn?mFMa+;zUIx$As4bJzLq=C1QS z%w6Yun!C>TGIyQtZSFeXr@8BVU*@j!eVe<^_harl->L+5*$htBsl51sGRJaoP<^U(Re%|qw=F%O;Z*F1E- zKl9M}{>?+@JDaD@cQH?$?`obp-_1OAzPowqd=K-~`JU#f^S#Vd=X;x{&i84aI^UOh z>U`hksq_7qr_T3lo;u&3dFp)s=Be|Y%}eLIn3v9XH7}j-W?nkq-MnU>Z0(fMBHqw~GZN9X%AAD!>Ze008V^U?W! z%tz<@H6NYt&wO;gfAi7#&gQH0UCdYKyPB`gcQap|?{2<2-@|-$zNh)>d@u9W`QGNM z^L?7H&i7@$I^VbX>U=-utMmPuug>>pzB=E(`RaUU^V9h*=BM*r%}?jMnV-&gH$Tu> zNBZB>{B*vT`RROb^V9i0%}?k1GC!T~+x&FCAM?}se$7wk`!heC@8A4%zO(u3d>8ZA z`L5=#^WDr}=ewJ~&i62Xo$qP>I^WCub-uUx>wKT)uk(GGzs~n<{yN`}`RjbY=CAYp znZM5WZ~i*p*#dOFiv{R>R}0YjZWf^P-7P@pdsu+Z_p|_=?_~ix-`fIozE2C#`MxYb z=liw*o$tp2biQ8;(E0u>KVKUlyqIeOsW;_hW%N->(Jge18_G^Zi?(&UdyTo$q2nI^WfTbiSJf z>3nw!()k`1r1L#3NauT5kk0qEAf4~if^@zw3)1<%ElB74u^^rA*MfAuKMT_N{w+x7 zJ6o{Mcd=ld?`pw1-_3$`zPknMd=CrO`JNW6^Svxs=X+bQ&i84-I^UNC>wMo9tn>X? zu+H~u!8+fc1?znO7OeA~Ekx(LScuMdwGf@}W+6J?-9mJ}hlS{TPYcocUKXPBy)8uN z`?L_9@5@4TzHbZB`F<=!=lit~o$t>=biRKJ(fQ66s`FheROh=|sLpq@P@V5?p*r8g zLUq2Uh3b4S3)T7F7OL}oTBy$VWuZFXw}t9_KNhO<{aUEb_h+Fx-@k?Gd}j;O`7Rcw z^Ia`W=et>$&Ud#ko$p~`I^Wa6biS8`>3nYs)A>FvOy~QuFrDw)!gRhL3)A_2EllV8 zvoM|S-@v`Q8?;^L<*l&i7^E zI^Va2>wG^JuJip`xX$-y;X2>Hh3kB0i_rNl7NPT9EkftJS%l7aw+Nl@VG%mt(;{@f zmqqA&Z;R0RJ}pA$`?3g~@7p4Dz8{Ow`F<@z=lin=o$ucwbiT7i>ULo`EC}a^W7~<=X+R`&iAw^o$qB)I^Wx(biPlE()qqDO6U8wD4p-e zqIAAri_-c2EK2A5wwJF}t@Hg`w9a?77@hB8F*@JXVsyTn#prx@i_!TW z7Nhe$Ek@^iS&Yv2wiuo7(_(bKFN@LnzAZ-Q`>`0E@7H2Ud{2wh`Cb;M^Sv!j=lirco$t%y zbiQwk)A@cZPUrizIGyj$;&i@$i_`he7O(SNEMDikTD;D8vv{5FZt*(b!{T+mr^V}h zFN@dt-WIR(eOkQE_hs=q-?zo=&Ud#&o$q0ZI^WY0b-tG+>U?iY)cHOwQRn-zM4j*35_P^G zOVs&(Em7zDvqYWm-x77cvnA<#7faIlu9l?p-7HDxyIYdZ_pl_L?`cUo-^-G8zPBam ze4myCI)jJ(`?e&V@5hpKzF$ky`Ti_P=li!Lo$qYPI^V^Tb-t@5>wGs$*7@$1tn)oA zS?7CNvd;IiWS#GA$vWSsCF^`&maOxATe8mgW63(-uO;hzf0nHC{adomceWIr?_w!B z-_=rdzMG}!e0NLH`5u;{^F1v^=X+U-&iA$yo$u39biOZ3(fPhDMd$mm6rJzaQgpsQ zOVRoMEk)-$TdK}?u~eP!YNU{r}s`H&KP3OBwGUu*ZJO-uJe6by3Y4y={n!HrR#h@mag;tTDs2nXX!fMzoqMZ zXUov}E|#J5T`fcByIF?Lcef0k?_n7_-_tU5zL#a_d~eIp`93W}=lik@o$uQ+biN3mnq()n(drSsh_OXqu7 zmd^LIES>LVSvud_vUI*r%hLJ2EKBG6wk)0R$Fg+3U(3?@{wz!9`?oBe?`+vR-^H?Z zzN=;Hd^gM1`RwI69t@C|bw$Ars**f2^W$S!@ zmaX&sTei-3wj7=BVmUhB)pB&co8{>3mPi)A?SOr}MonPv`rzJe}{$@^rp$%hUOOEKleAwLG2g&+>G>f6LSP z&X%w9T`XVcyIQ`^ce8w*?{4`z-^22CzNh8ud@sw_`QDbV^L<*r&i7^cI^VbD>wG_! zuk-y{zRve&`8wafl`F^cH=lin)o$ucYbiT6{>U73zGSR;crRS)tDNZG}4Dj}_{CzgDR8{aK;T_iu$d-`R?EzKa#< zd{-;d`EFLE^WCjT=X+R@&iAw;o$qBuI^WxhbiPk3()qruNay>uBAxHYigdnTE7JM? ztVrkkw<4YIY{fd?#fo*ls}<{fH!Ifp?pCbxJ*-&gds?y1_p)N0?`_38-=`Jpd|y_q z^L<;f&i7-*kh29r<4Pc00velKuk-!D1D)>%yLG_hh6!hEzDu07_-=dF;(G*WYzL$e z2VQX2;`@fP7T*t?wfKJJti|^yXDz;eIcxEq<($QLk#iQ`RnA#_Hvye>bk5>?$T^5y z$~nlmILOG9vlibo&RTrWIcxE~@T|r6(z6!dE6-YduRUw=z45HY_tvu(-#gD*eD6JL z@qHpxZYq+S{@k|sZga=td&M1#?Y?>!GJzHfP8@%_mIi|;BAExso_wD`W}p~d$v z4=ui%JhJ%S@W|r(nnxDjZ#=U2&hpseyTN0N?`s}gd}n!L@jd2=#rHW+EWTfPV)0$% zsl|7XrxxEAJhk}#;i<)Uoo5!`Q=VCTU-8W1JHvB}?>5gZzLz|=_7=8iW%mbo97-SQS2C+d`B{F~%gE$Hx zf`I|XhpEFwb1^V5pvy5aFfd>fhnkF`o`Ipk9%Kd#gVcf8#LysnK=)RIFtU09br6q% z0Vd7>+T05k0_}=oU}yk)8Y}=NVD@ocSGEBQj1ogG1Yk*c$T@t}!9zL(VCjxrnvmzo zH5aCj*5Sz7_K4lLHf(l%$tKIe;AGLgr@!(n!FnlUx|T%AsS76K9W4h z{y;SOGBo*qG(M7Yuz!7!1VHB9M^j&i#@~g;??B@(MB^8snQw{44@FWB3jdWze2{yf z*$pfTlHUYoK?smMD4#%hkoeL@Gyfw@5*nYNJOmR0=~rfCV0a+Fz;FO8&&vSH`V06O z7>pS~=J7IQF)}bT2s1DogUU}qGGCD4vh+=lAUWME*J zz|Fv5!wfNxAwE7mH$N}FxFoTtBtD)Y-ZR8EJ|(p%H9fPqB(*5S*EuIYFEu1FDJK;o zhg~KEi*4MC$lP*A>OMjJ_u@pb53G$acVI`PJVi39z%L+NkL``Ls4pCPELL@ zLrFz{ zw}7EIwWPEpHLrxBptPj4BquX3l_51R1tOG`Sey!0T%1}`oSDLqnV(#e!;n&1V8oD| zlV6+)aZP+lNhOGtUs?ik7{rkHB2bW|mXu`Xrsk)mB!X3dEd;r}gdx2sF|VYcgrPJq zCqFs6poF2Iq!?sXd=W!_L24dDNpf*&Nn%M!5y<5rhl4~5N-7!B@{6)zG(&u9MP>;@ zPG(ZFUU9yj8HiO{l9>bI7&5r~cse=98|fLqS%!MXPOfrX)#k%0kLjup#ia)N4>c~G&|^U0hH46F>RpnSp1 zOkM^C7I6Io(gQLRfq@-lCx~WZU=RV(EDQ`1AexPVK?X##GcYKCXbuJj z6%ftIz@P!5xfmF9Kr}Z4g8_)aWN=XGC%t)7ekka`C&AEY%S0>n1} z^FdRP83`c10+w?&US0t6LqPJNYfoMt0P{gsXMnCPdAR}1j{(Uq0GYP{%m+CoV+Dvm0n7(A zeKIzH_zhq_$Y~inK>PwQKL?~ARQ$h80P{gk%{T#)4*>H^K=KzrdZ zUjveV0OBiv`5>=kya4e9{{8>oEu(TcZ2|(m5NBjyXgoAqm4TtRtA&Aqp|`1>fq_Bu zMDq`}GV$)F7ytkNZ#_`L8`}A_H$~+|Cy&bi3nvfvmNE410X2shUR-AY>5o=rU~v9K0hxBGH$_DxI`(ky z7Elw5A++;p@Qd*O|Nl20W(T<`MdeMyZjgZtr7GRcA0V#b>utXC@BjZ!7L^xw{{H{} z!uw#{Nt3ZzD@0bZn8@pqk{Qtib)Q{+V*Xzpqc^QA}YX$~}<~J-^3IV+? zDk=dlxc~nD-`kw@1QI>EFc z;}K9`M#sg&(*;N;Bz!y};iC+3XX}BITIBFyd=UkcC@q79PdZG9zt!^p|Nqc1+71q* z*ARES-Uf+>7uq1TZ+QNfsEEAq|NZ~}3oeL)m!Q%nZ2~xq*r7r!|Ns9d7@)s?fjx={ zQ2x#>|Nj36r-|2c2!HuP{N)WXyY)bc7qY*YUNpfZ_*+3i3G-VwLOAvx+;5w~e&dJ8 zz1{?}1;wEyvf#Lf$9gETBP)H6yQoOm+uJi7cToWq=O7wXjDu)U@eQIu#Wsir71tmd zR7`_tQ1Q(0QuW{e{~$|C=e}MKN<=RY{{8|F@UYVP;@}B>#XH1`utAmzsb4=WqE5TJ3Z8=l}mZ*&$gbtVCcMn z9)J@3e$w2pl}qB2ZiGtMh1r79B^R@8lLEU|9SNbfgk_>H`pY^gk*`iVbQVlMpBI7~>US$9H|G)9b8b$^NaPbrx9v1v!IY{hq zxE#pgGN7V94P@bu|DYnCzXjCPZGOYkc|737x^LhF)_Q=y71RP~e!~;~;uk1@TvQ~$ zg*|^Os3ifaMfQT4(4GHYD?!R7%YS>}wL@sw3)SyXgG&55kF~xndC>fZB{U3FhQ3$@ zv!m1jBnZkU=`hu$$&7C;|AA|V&=()!3ilxDbCgoT@?Qxg1DHXSHiOGWffv&u<{fuY z;Q-Yj-7YE|jYmKp2M0;>8;%SnMo>;(57qYLf9Ii+P2Fo$Yy=n>THlt)Hosx{zeUAC zfPo>4DX233#Va&)(-mCD8l}4Q309o;vhsH+*64VKAP)co_hTpR9sC6 z3x09(8z@;;%7E%Qh5scg7BCF1@W8~2ui$!1q4~%E65SUPAiwXa_()CACbSLBA}q zNWZ8wPao97hVXLo)Ah?ieQX8>MrmeiPzxGVWegR{{j;OgTmkc|6@R%&j0`a*RVj&V+XZy7^{L97;88frFmFbIzaju z7{F(}*L?o}{{yHX;^T1RE@7!)u$QvdGEz|jWkitu9pC={2aQ=UIP!6{GCA_` zv@^T$3AC{|@`*IFhVflcW^(7dq3pgF(;^)J5*!+Zjc$M|?0kMnUj9_3^4;P!)> zK&q>PkxUNYyQA#F_dwZ~?}D-yl6VRdJCz7~ys`Km*`7os^FX~6P=Olo;mRlD$fw}JClJpk;RIvH;$Zv36gVH|<8eI3$KiOKj|J4* zQD9YuMcRHn4f{Enth_Tf*kfw}Q=`Zw;F#SZoQKE8hw>556^Q zj(i)~y!aNdF*)(AU`yp&!{*AjfvtdV0b4wu0J43cj@$$$28NEG|NnzJSs?qM>B$)> zJ#Ao4;M>CN!?%Okoo^4bE8hWT556tTPJBC<9g+C1Nb+ucdzc;hb}&0Z<&&U%ka|bH z1I*r-sY8a5fdSNB*z@!Mf6(|Gl3N_%ZVBYupb*NpN5PrzfPx3#1_f`vJqnI|2NZnx zHYlX??ND%p@;Heycqb@) z+CXWrnc0s|$A!(gHIs>Ea(O%J@^#dx%hY-5A$(29^+&2=Jw{( zapN=a;8So#687MB2CIha@j#LU`Buk?58SY22xMSj&;oUg85kJkL4_Fu1A`m`qHF_= z-9m+NQsPh<&|nFa3BJPu#sp3eemHOb(p}wY|Via;OAsq5(9T0~(wG zH_xGRAPThBTN1>8VpRqP2GG45P%eWajDbXhJLE`waMPcGfdMo(BFezPz{$YC0Gbm3 zDFO8fK{N=1?(qQ4O@P?4&@vvx2HgV!qA9_k(J5T|1#wA$$4IeDf(J3MNP+4*EW)Eg zqaiRF0u+RRL$vMp4^fb__3qT!eg~Cxp!ot&*#Mef0OfBB4hHZYK^`Iu;5&jqa{!>S z3RJd%$`;UE0BBeO#0TMyOxy3^yMh93!FL5EgxG@b3OW#I`yEv79b#kvm$RU95!5VY zXn@=m^Z{CagUSt1+3XQ+3%)CeA>0;xR}iQ>4JwC0Wi9Bgpb9ny@LfTmav4&LE{QTTlx>A8Z#1Vb${Q|9^&9X3!KKTo-5#USa~|{Qt5D+wW}= zw%?~k*nVFYVf%esgzfiZ5w_p2Mc96S7GeASTZHX*wn*FWVv)Ar)go=bn?>4wcZ;I_WQ9&+wa#RZNEQ@wEg}q()K%BlK_e(NMZqJn1R}0$0-6nn zI~~q|&2d6jE-)}yfC36!CWAtffdMp_08$K^p90Yb;PRl@Wnf5vPz<0ME|9zusFDQh zhcH0#0upCtfRx&x_<-<1F~`6F6=q-t*H{b;9uQ>=%;23?3=E+322l^XQHp^f0jdph zV-*7fXsrcA9#lg!Fo4n}gbzx!3=A=#DG{)HAhj@P-2+4(ltLI7j=<$XDUE@l16mO? zgJ<+1YcL?{L8*;_0hGQWe2B&ydLSNXRt!|@GBAMVz(69*43JtDltv(YP%36%0L_g- z_|TRHqzS{o49-mq3@vazC^vyrLNGIfG-!kb!eIc-%63!q5xaO9lyc1||kx2GB4wD8GXo z!N?%Y0Gb#9u|b%H;UlEY4&p%FcLvG^Q6TxNAO;kJ_{i%AK>U|bIS>WnLz5ba%K+kk z2Duj+Ka325;Q4oC|AQ4m36OeT(C8c&D6AO3?pJ0+gfFP{(qcrU7bXTi@H&%cG zBI1*gL5v|7X}%s59tn&L46ylp5Fb>?bU@>efkBD^)IWyBCy3twT0a1a6!11gafVJL z_b@U@GE4<|7^)w{U(JX}|4a!iABds?8^#PIB8^H1=C;!NPRFGKNXE% zg~sng<1awtZ${%EM&n;+MqPh$A4wkMzRyT}ko(x7Wiu!OLGp@7e2}~e8s8g@AA`ov zMdLFh7nKy3l%}QWB{RgwdpQTi`*;S2#K$ur)~LjnNO#HW%nwwk65Fd}ki_grS{aio`a=@O3u`4Xh^wLvH;tP`FOEOCHvh|WG7~)e?5=#;pz|Lie zkH=7wQUUT`aejP8VqOYp8Be^sXFP0GN<4@Ib}Yz|4DqRXDGc%PNyWvG6+sN~E|GqY zzMjqu@$n(P&M-H*`}jLK`o#OYxdpq1#D_RK`MAb2fCB;KVbFRS*lHKhni~fP%oQyL zu!S@TNkayFi;rLqPKB=VLFhAJ052DU3BXp!z}5i4#6jz6z{_rs1wc!TkooYnL@0u= z6+Q?-Ly$i+^B@b05W)rw@hB^y5Hg?@JcwW}E-6Ybs6@ybfYu)sWTqgCz!wrB3qlu8 zAqzp4Od*S)E$IS<9I`ZIO%$>Sd>Iz9AZ&dVvKVBQ7P1I*c^0w|DC&{F>vUC zasbwqVxVzo(26RAdILzxfaPwKMQPCGV91KoK`X;R3&P@y(1Z(05CVpfrC{%QUQs@ZlK3J9 zy{zOSgst%zDMb*&N{Sftl8TEN^gx9h#HfOt5(d5W{1QDdBRM}e7qkEmB*LIql3Gy$ zaT=r`gy@5^LDd6M*c#eg2UVk>egg=@#+^V0z^Vt(svA%<9;6P`p8#P{{R2`1!Z3B9 z_U5<$|G~`yP(K5NK`U-x@*o<7TNxmIM38x)HVz0cU;?dF1GQTr?K@Cw{t~#I4{GZ{ z`X!*g38;SwvJ-@1%^gs?7Icp+$UIPg1%yE>hd_3L)Pcl77&LSH7wSGxKL&(BE1E## zX&`x+deC$ssILhU1NCn}7_>48qz+^!Ox-N#xEx3wxZlIhzyRvU!sJ0TsC)Ais?Lc4 z(jNl#i9r2fkUXf(528WpK<#Ic`JkQ_sGkJFpz%MDA3zwS4n%|6)i8CS{u2m;=X5}l z43PDJAhoQFknjYV2kKXW@HbAVBB(kL547qDW*(@&1;UWt5J(mhA0QS;4G0@CK>A^z zz8I+829g6|kQ@jf0k?-C@doOjfiP$#7)T8WgWLw9{gBjw`fXqglLYrUK&luRvKSy~ z0~F4n{u~H@VMMqKqy>aQ%d0@WL{PH{)UN@pYX^x#OhKsUW@KOh^&Ua$K>fcfau7NF zoXjK;Myw8n>I|^`&M?9D`-3{$@1Xku6ZU3(2agjlFfder?h9mKU;xQQ)Z2a!sJH#D zP;dL)px*YoMLlHf1!@X|L%r>Hk9ynhAL?ws|ERP5{-O>cUr=xRy`tXsdqchL_XH$; z88CLe?RSBC+wUCpw%;Y7Vl$vL%={Jgw%-@j+kT%=Z~MIiDz^hl!_?rSHxQ`~mwsZ! zHR^4@n*`W?4~Vk;&WQ0^9E)R@EruJD{|1VWRE#l8F#A*g%<%fq`N9MkIqk zYqrFPLfzPOG4F3zF2B3i10M zHrwwy?6%)k*dcrtcH8efP&P;%2#c`WewSgl{eFhc_WKn!+wVu%AZkH!F6_47eb{Zk zhp^jzH$l>817+V~v;F>t&G!2fHrwxCko1A{!f*+@?e`pZ+wUptw%=o*`dXkgObsr& zhDdd|^b;%oht2l8$p+Q$7m9VhbHHa{7#LKb;Rs5v2Nbiv88a|2JY{EK_|FU}TQWAP ze$P0l`u)j0Rd59t{s?RS+akZ^~k*DG?!sgi+V z1&;KJ&5wIltAX7EN)I6Rk^_)CWk6{gmX2*0LE~Q#-Jm<;WBeJw_sT;=7#K`I?nb0n zjN}JOlc4m9E&&n;;apf!y`bne=<+?`;~bJ`Iz~t-&5wRe$Sb& z`rQXfUkH@_W}fQzKl4<-f0?KHodqh^0;NG_gYcC3s^5F&tA4MUull_NDz^kmgXHny zIYg?%X9h8HBA_t1pz!^JsN#2aq;z@)8jhfJ`avc88>qcu#LU1@&%gj)mYQ)<;d{nq zh3|LnD}d7ldOE$pr}+H^$czgL-%}Q-erK4ViZz{TOt<}hW*Q{UVChsDwy^-}fg3o| zDJbnhmB6Vh&lN~2SGSyFVeo<0>o7y^fZUBpr|@J4N`s*E2@?SEK{!1*IldT_Hem(q z2f6P*rrUmhvrpmsfmx8U6qHUu<`>L@_!T4BL2@Pg6~5Q(SNPttU*UTSlD-@$n`ghmcbWYP-$nK-d{=>r zf%GBcCHob=&)Ki=eae1??>$g8Tc9+uI&ADUM5@E4mlQFb{R-brKFEEaARzyp9X_ki zz>otCM^O6Qpql*+G>+8_o%aU~ZF_u_`+nl1-1mmha#+)64Tt>q2_Q2*$bEM?r0|_# zg96s{d19vR_neuKID@56UD)CRs7HR_NS{z?6iVT{97*Z(#yLg?4bYw#BvWcY?nb0f zjN}JOlc02pE&&n;;ewKkqSV9`P>O|&GAqb_Uop$}`;2{Z-!tagg3DA;x&>LOFc;$Y z1^eW_OYE2XF0fzj`-6RQ-#_e=`~G7eBy2(Iz<9shcaHsX-#6@&`@UnJ-1iko@&^0m zzFX{<`|hw`?z_T%ggy-@`@lZA?-%yTeLt~J?)wd>z6hus*lY#{hJyWa-!t~heGk|# z_uXT^-1mh2a^D-!)WFoD(-lOjL)S+t|HVGJ?Y7`{i$wf(-~uFQ7_2L^E23UU|7rW5laeg?@2 z+>`mvaZl#^jk_}6U)+`X{^70+io1V+`1fSK9{|w|3=BJn z;vPbu!abSq5%*-ipMa{p0Hr~C0+7^!_!;+Pz9-z1`R;K~=DPz_Uj>>PkUDI*fJk-N z^pYa>;I7PflK_VA8?G^a=Rzu1k3ho_lui>gvcG}W7lGyz{xd?_awh^AzMqI>_@0x= z01i|1dVft5*gGQr(kRX$Xl2QZPA{A{lL57A##%PC!ETHLmCZz_30}d^G4h*>lr?nMR9Wodc zWC|P%7}^Xt7?T(c9`|TE2)QsaHXLF&sKCImLV-o7N#tS%gE~{@3x);(hL#Kk78a(4 z6vYOmmKV%B7@4PB@L=X}a1!%qbZOwXU=TU5K){JbV<8I*3lnF91`CHG*CB?35)78- z8X8#=7?^^UB)$kSyC=37B)s5KSk>0W;J^^+(7~c8Aiy9n@lpcQmIwu=1FhT)O^iz% zSp+oBEa3nx?Pg$La^MkUb!3^rAucq7!=v#f&n6)z4#gIUwg68CMji#0Z3h?_BA6KF z99Cpuz`&uvps2va(BL>NtiywA0k?+gK^_6G76yg@2LZ+f zj0YH$nHUZ6BQ20$TflUr9%J%Lj#jj zg8`_U#68R0-Oy^ zj4aFnPKOy7Ua&GWGAVSqF(@#&DX@U@9#azwgMfi>1A{MqaKC z21TY04h~iWhD8lbD@*$n92ginn3-f47`PZY5;#D6Oc@TifX=XJP)JfxNa$i=^8vL3 zR2U97a5=Cl%5X3!FbFs>FilWkV3e5X!4TKR7$m^CfPq8QXu^Rd#!QDT7zBDA$S^2y zUr=ypV$fh#a9QHW!S&>Vc_{;ES&TqOfa4;I2aHTCOd1Ru1h|=c8<;{}I9_-d3b8+6 zna{<*#K^dS!9hicm5HUn2~=D#Ffp`eMaB*N@;WXf4$ZB9= zU}aEYXkcPVE_C2rWYuWJA;iF_BI6O%z~rE$FsUJB0!tTzKm(6p3zHiIivo|M10$mY zufqivMMfzD0Z}Fv&{+u_iiaS}S6vyHI-OWLqz*6!a5b#6U^8K4kW^r365wE91eXO2 z3=AoZ3=HXv3=El!3=BDp3=DaU3=9Q~3=E~9f`x&B0d#&wB_jhv4I=}1AA22Wdn{D0 z2}*;?RM7r~Zbk+M&`wU!nhMY^t(lAr44{2Wa~T;x#WTYKMh1q3j0_A*p!$|FGJyBJ zgEkL=)>&*~WMBYoZUU{b*u}`eu$Pg6VINd2X#U|aBLl-xDE}BE1H%bM28Pp&3=C%& z85qtoGB8|*%3Wb(V7SW2z;KO`f#EtM1H%odIA~4zJw^tGhl~siPZ${(UNSN;ykcZv zc*DrR@Sc%@;WHxx!#Ai}ke@(%IesJY|1vT#fa+!jCI$vZCI$v3CI$vjdSU|&dV|iX zW@2FAVPaqaZ8Hb0;}BwEU=U?uU=U|wV31^DV32~UlV)OIP=vBom>3v9YdkcW7#MV* zVj#P9nHU)Km>3ugnHU(1m>3w0nHU&Mm>3w$m>3u=m>3u=nHU(XnHU&sm>3uwm>3uw znHU(Hm>3vbnHU&6m>3wmm>3wmnHU%Xm>3v>m>3vBnHU(tm>3wsnHU(Nm>3x1pmu@Q zi-7j3Br-8DBr`EEq%bisWH2!>WHK=@~go%M+DH8+3GA0Iw#UGcho%gR(a=F)(amVqn3uiFflM3VPar7!NkCDiiv^YG*lnR4WK4 zxW&Z4aGQyN;SLi6!y~A=Crk_sPnj4PUNSK-ykcTtc+14V@E$4$GUEdi1H(rq28Pd2 zu`f&v4Bwa-7=AD@F#Kd@1H)7n28QWSwR2b)80NAtFwAFRU|7h) zz_6Hwfng~N1H&>F28QJ<3=C^o7#KFNFfeRnVPF6q&9Rk*fng^L1H&E`28O*X3=I2N z7#Q}mFfbfuVPH7Q!oYBxg@NHD3j@Px76yhhP&>{+>GLcM3>R1!7_P7|Fx+5aV7Lht zzYV29;dzgRf#E(21H(fW28PE_@h2<{49{2?7+yj7Z&(-@-m)+-yk}ux_{hS*@QHT&GyAusx7rx{S+m-TYrx#z+)XgS` z-bWuevOr~zb|$}@Q75?u!yH)70mk!e<;|M+W3kMS7qCZbcI^G~FsBzon6xYNhdCX?2&tw)a zd!spn?dkG~0)N=#4`g#6xXV7{@UC}f@95?HRa)`uvCh2w6EA-5ySqK?N>1LJ-*=qC z?}Ri>KYwr0ky1bQ6`ObL(G@xQ^kBxP$9-$>Yd>wun%8*4eX`<7o{3jZUzz-`{Y|&F zR)?@D!vlUB+Xz{XvmxqU*G>1Idiuw+w&l9#xeJvQZ*OiDnC5w1DaF73{;^M1AEche zm$Tayh1)8hQczkZ_fUIo=h-RS=jbFQPFIWKKbtZ8*!_!6i`b^bbKO4j$8R#xA0pX)hE8h+2Gp)wWp6AF6&w<{qmopa&S9mev!tqGW(!{)-5h>of?Mc|e{o?ORWi-BbSvVo9M=xuXLFD~AYtaopu9cu^&oZ0urr6InOOzwuLRzCeK6r$<;RZ`%aIr#9``NU~_qXWm)wI3LzDA(UJaE1B{v!t(rl*`^ zWT-j+=f5u~6FKs6K=;4-^C?s!cDI4*Q_vjoIYx#B=l}c%?UexSm1}15=M(Vc<8VC8 z#{xPPX9H9oyy+jYj~2Yw&>6Ik)}JqcX)_n*MnxBH29W*_=NK6_T=?^!57b6P=tu0E z^yh0}Wa`Fh0BCC5;5;Kk!^J=UV?pf&uzoi_o_5fFQs_S3AifKX%<+s^3~&N1nFg6r za-NZ4&gDPkU}R9Z z{^vhv>;hzOGm{@5)^SmgxubYA1V%%E<{_ZqY5#qJyZ!eI9`@fI-0i{R&d8QFJPp7Q zLzY*$=KDS5nlD(5$xh$zKX&?l2c1$SvCH?n!!F%QO5{Qv)7V7Kpgv+KU!Z~y=Q-(t7# z_ln)V-_`$vPH{lC8NzPa>H9tPn(z15|NsAw+3EXz#%|y5yZ-(Ezhk%Wckk=IpnYin zZ|wH{&aub$`;q_u|Lg4W{hqML_xs=f|NnRF@%^50-S_*3|NsB*+2i}Y?Yi&xSO5S2 z|FFmRyUt$U@1T>h0`~fTU$WQt`@#SJ{~rN~?e+cs{r~^}GW&eL`|R`mKI#Ae|2g}7 zzc0G(`~BPh|NnPi_x*n9y6^X+|NsAAvCsGWgMGf=mxA`S?f3nzvETRmvH$=7`|S7q z{_48#chHe^CHsB9bKLO#{_+3+|8w^HepkNX`+eEJ|NoDG#1Hs>fA|0Yf4dvL-y?4L zem@U#{{i3c1qXb;Yk<@r@cn+{fbVzx|NsC0IpF(U<)H8PHUIzr_c-YLz2Knl_r;(y zybk()KXTCb``iEj|Gzot`@QUj@AsGg|Noabg|NsAAdBgYnfg8TxL1&%a zzTx}*(+%J6H~#iX@AWr*zd!r`|3AlJ-|us8`hI^3GUu@G_nkL=zd!%~|9{G1 z-|q_!`+k@E{r~@g!@l3&9QOSVI%n@ZNdBhp_lKbPKjQoS-%a1|$N&HTZ*au-yZ9~N z?~nig|F3b&_q)w4-|zST|NkF&%lCW85#R6k{{R19a>V!hlq0_14gdfDpK;6g`<^4d z-$6&B-8tg>{m&8K?@K}Pb=3E}%TeF&C;tEcUw_N@`|Ml3-%tJj|9|~0-|weE7!;33 zeZSwo<@^2S|NsC0-tzq}e%tr^)&Kwh?>OrF{lQV+?@Rvu|8I2L_q+dX-|s8`{r}H# z%=dfpZQt*Q{{R2)aLo66#WCOS7eVoU%=i11W4_;a{`>#`$1&gUwYPo0gU${_PU8m0 zeZSAT?fd-}$o$*B-!I?x{r(8#m*c+Q=N$L_ei)SAj{AOpdfWH=+5i9lGu`q1E_KKE z`?>%B{~O=&{qBCp_q!G-Pn_`mu5rTm`$i{^-*J7w}8^aN#E~V@A`h<46^H_?{|Y!zTY?f|NlSWl<)V3Q@-EVgVN6_ z-|uHm`F=P1|NsA&Q@-D2PWyg01-aq0@AnILeZOx6rJ2*d->01R{jT}{|NpmleZTKH z?fc#2|NsAYPWyi6xaa%*(7*rx1_c-JGeHADk&-i{KjPLgq zpm09p`#tiW?{|a$|NocY^ZkC~jPLiU|NsA=bkFzupEJJSr~Lo_U*)Xt_x1ODzb^xY z=ULzHXYcubpA3qZv%cRKob~;_=>Px!XU_V5|8ds$`!taHbH3jL&iQ^{`2YX^*Y|wC zv)=dpZVXa?&iDJ2bH3j}XFzT_=llK1Ip6Q|LHXjm?{|~)zTfBl|NlSayzh7A`@Y}j zg7VaP-|x2feZS8El||=$zen8n{XYBu|Nl?U`+hIF@B7{8|Ns9i7ks~W-uL}J15^%N z@cq8{zVG+xpmOhm@ArN8eZTAd|NsB?ec$gb7kt0#fWr2I@AnfIe821d|NsBR1>f&q z@B4n=@$dhCo{PTU4KDhA*Z%+iKi31_@1hTUzi#wFkHTmSw4?{UfZd&4E) z@7wEpZI>y1%)%DY6O$( z?EJuWGqLoxXTIMjOmz5;Oa0zwzTX8VIeb6y%=h~NBz5PX`F?*e(c$~uXTIMZrZ{|m z`ONqGhlvi~e?Ig5UNFhwJL_}b?;9pLeAjsH`#oT?!*`+QzTZDgcKELL-1mFIWQXt8 z&waluOmg@h_}urq!6b+8$%)1IS%3e7_q^L70QC&gzBl z_Xm?5z6ZSU{Vp&Ww>p@PlYte*ZAZ0UQ_Lh=CG3&me6l5Vs>B@Ow)@;P)*7 zf!`Md1b)8}5cnO`%>(zBK!?k;CIlZl`hCo1_p*o zP`p9eAitr914s(AKLA9pftm|q_dvt!0G4n7$y188zWII^5MTg#3v3h*1LQVPgKxgy zc^DW#+cX#~zWIXIM>u@c^!siDWk2xp`yK*iZwvGL9sy;8)I@Xofz^w7`+ZM@ii6n3 z5H`d9*?!*{jQl`nIe-pXWytyF`&~7G0n7$Df|gU`SY)4JijeYCw8>q2d-u;vl^XA>s+`F>ZxB7Q8# z@4FHf@weZ6zbj%9|NhPQyDWnOI82c3wK9UZ8RTCO=0?>Ejyq7;g7O>Vci-$esTM{l0_z!wU7I zaJnBTJ%i)XJKgU)uYvl3DzsL{Y?;s2-Hxz&P;`Oif58v+~4D+vPE+Sq$Kz;$O)%foF-S>wtynM(rgrx28 zAHLsf4E?_IGa%v`l%7+6_3`QXcO4;rsmnRQ&i4-|y$3Y*3zp zn(1(EE~H!nnGX{0HA0j*d5}EL0Ln)o%neQ3AiW^>gW{3thcCG70?C8;{CLU%PGz#^0dih|q1j>!I%V9dyPT$gdzb!SV~ptuQlrLm++u`FDppxE=v1X8^egUzre_>-QamVde-M zBl5^{OFyjTkEyZWchLSdumwoi{XkLE@nN0`hzJPei$KU(4@1EUv=}z-*8bhM7oeT(*G4!S#Zj zFM_@5r!QRZ8W0;AChMSX-uKh@I|#$vcJ3!QkATg&3{nraiGksR4kCXc+l6dC)LyWT z`#*iZ3nABWA`IZV`}I%X?=sN53{uF&AixmA31rTwty&y9|d11#d-|rv{YunT?`N7*f=fQSC(##fLgnwUp zL(<8uU%uaedt;#4cyWfa11eC@?pyE%Mpk)QLZjA(qGcYiu{`UP2GK(Lryal-p zWG*ZXxcDLb%jDkH!);3w7g{i<+T+^YLLU{J=C4Me*1n$4(FvH@dSp1(`ey?UKhaH$#+2Elfa;W ztR7S*gZTLB9Z=m4vKv;ez5IVC6c`jhZE#SyfZ8*la0A5wdN_dm$H9y} z4ItMe41XZ$0aP~gf!GQR3VZ&brU4Ki-F%QcCI2A8*$kwYfx!V}CwiEG7eg{IF!=vL zv>&M59sspQFN3fdKy29%gqrrhh;TL!0l66x z&OJ!#XZ!`#5ggz!0i}Cbn}0b-+yPU3BS^0U1K2J$FN9r?yvYJKXX{^Zo09?5R@nhk z&%odSDpL=F*bWQ~C;$3>zl!EgSlBjtgX=F)u!7aW%B7niy$lQvpz^g4QkH_#23UOq zqKpC^(*W|v-M^r^08x*F;u_?JA}>&109E|^U*GQ_46|#gH=?a_6jJ7c{RMIq2ehBX z{tx0ukl03Vzwi7G2seQ20;MZyq`yl-=GeK%#^@t&oUO6Pa zDme6l)WGz*A?ejc(rbl7FGvkcZ-Y7_oy^9O@7(@D(q8mG-|yuhb^?P!$3H|_1PXtU z94tIR^&_ZV3aa;(g48oGIQTI8eLwKe7qxzYj+ubuK}B})&-XhB!`${Y8xhw6Iey>S!7;?ZAWNXn`}d#kcMyh|GcgBY&I*uT z2bA#*ly(UJf8XyQ4AZOpACWd(tU>iAByE7iVew-6A2enH$-f0Th^df8XyQKFoY~(0CC8g9AuB|35fiz}s5TC6i!1u(}L7J_8QJ+W&}lSL1)* z@5<2j8?rd^I1jQoq&$a&1G4zl0)+efL2hPXaG3QUGzSPC2UA%4ADWh+{V$Ll%rD?_ zhCqMKu@Kx2PXLV%LGu@QoI$G)GwK2XnJ4BO=^F zpl(QosfW4^q+bN;evlk2z2!3^(pxo@4GParC>vzgG$%!2S2)O@hNK;6*k`F1PW)cDGUroEa0*m%=6JfjOT9G0hjM!Gv`Cx32s|hLF@vn zNA8<}!XGr(1u_Gq30CJhvG{#wLr(Y5aucM67@WoC_uY{VG@ir2;K%0oU60N0J7`X} zi_P!*A~wJ8pi`+gviW^K!{+xLbY|~8Hox!R+5EnP&Pea!^83!t?)M!uCo044_uZV` z?>p!o4G(s|?}_Yw-?bSS7}jw4eJ^46`>w;lz%Y^B@B2D-zwe-V(PQj>-ygI4eFq(9 z{EOZ1yEup6cYOv125k<%?`|A^-$4gVL~!_h&*1>o!3+#l9Dd&?a`=4*odvg;!|(e} z4!`f9GmwsP_zsby!@y@;`+a}L>GvIUPtIRXzwhE) ze&6#!+o!qxzMF9Sea{1#!|nIIh1>5tXp+>J%kTRNZoluKZRmbne%~)}`+ctf1wN18 zcNHE;-2mc(@SCteaQK4QU)24;XVP1#L(&4921Kol21Hy>12Jw4Iy%G@D(?CId`-IaIu8 z9i;CD6W;(8->CtvbK&YA3qkDNgC@QoYOmlkRCA6)#alq*_6!VgbIwD}zo7wcSHQ)e zK-GiVZ=myqKpq2y!yBmjuNvTaB9JgR99T6W?%{>fF!zgULi{TSrD5XgP`-ht-*?as ze3-ZkRNPn7?>nf!3=7ZCM4g%%$W=opQGsq+I9o? z??R~fDowxdpf%+%^}99wzJpGAzorQZe~|g0J6UdO`h5qje~^&^mtk;oK5IhqFqal2 zeZkC;(enEaTEotx?e`sYX9`T*6e@0_4aui4aX+YdiniZ(&^ZqvdqMt6*Mg+W8ZAir z0f~d$(*zX<@jp^z{Iu|a*toKU~-F_Dn)+z{&b9W=!YIwJ@qw=dN1`{__f+&mBU1Fr`G zZHofQ{Rs8@-Vh1#H-DJlcTfQiN+TdSg)qPG3nC$T*&@vEJ7_aKXqys9&NIyK`+-P^ zyA#78W`pWYkb6tRAmIcur#B3u26D>)1H%HS9LWDW!XWMi`2nQwBvcN>#)r3sg6ks& z?kGq)k%)rWuM!1G-v&_-|JX!9@{ey6q@0S2g1AKvTCRZ7Bp(99WZ`Y14KWJ z-`D^N0~jBl+dy(%O%VTs*a10S-#6rXVXQIQkmdFLLm{R(NKX%v{t2mG-!J52suRfc z`Yw=!DGt&P^FL^b3@EM`7z98^Y%svWM}R>BbOZ&cW&n%B!VjbhS-nOxB%g!CL2=8% zz`?-7Ai!YK3@H~t<|B(cG(*ZAboD;Xko<+NKB5_tk5JWfFr+m@@;j<}4u+CuNIWru zT@CUn1UEGMeFw!O(vTeZUiOY=(AWy7feUV;fE9zzNP(pTkom~|g{2ep@PVZxkUNpp zPigl14!Yd}WG`|!ENh08;~@3O;@g`cc@|_ZvUqYRBpq|W;{|j$0|Nsror8D~dqFG) zh7-+@^vK8n%8g)efr-n_kn)j(ffX9R5cONn_tRZLXg5*GYL1rPFqX|;O3OZu~q7GCRfYkm6 z)u&Kbx`Nbz&!K>*0hxiWCIO^|3vwPKNDgKWvR$c`+lGba=s_J z8j!spH4{K;szD_aBui7N30tN<99>Zo1NX)C%@B4u{3=E+54v3Fz4$Q7Z zkea!Wd+~6osQ{^2z`y|NH{en;5u|1z1Lz1HQ1)QJX4e)_e5FCsGbo+H;tM%FUjeBR zhNM+wH6Zg~ZvFvMV+4s)Txuk`{k}6;K;jga8Vit`y^u5pQUfv{L?hdk08(=plEy%C z*wl1@)VLtbf%yyBoDCo~?Fe(Qsks4CJ#DIhf+2y?Kh*#lCOj_?=A4e0K908*2U@E0~UEPa088RkLa6l4#! zIMo2DnGcCmbTzQJ@agmWexL>tr|4=x_JYEv1f-@G5~t{DVCKx}^ZR~gF{J!KR|7H! z6jrN1Wx_m2`GZXj$gZOxHS;0m4=yziKx!62${$>6{({sjhLk_J)JV1YeLo-oDN{jx zOprQ|J3(Oyax=(12S9!of}~YkYMy}92t(o&ml}?KzwZY`AaROIjSfhS20{%eY+-2w z#0I%10Hj6`Qf4BXgIs2ofYg*h(ke&|$S*K+Kx~jX3qWehA!!w)24p@=4Tud=V+sl% zHc0q@)~jF(pEDqHI3VGJOU)OM8cs;~;8G(o!SDM4E{NZ8sj&g6VTbq~Sq-w^6F_Q; zAbtm_0r?l^FAy8#uO5(^Vu;^CYC!&lsR6M;YIcCsC?nhq(hE}qVuRE?0I5-jr~!o` zNE}@a%S6BL2ihR{3uG54ZK0RF1|T)HwWfs z50IK}h~LrGz|1L`jp;s{y4om|eLbHC6~UAaR&oAU4RZE|3~%p9o|Q$PF+xAT~&i!W6&n2WCO?J4g*k zFH8-H4N~I+QZpNp-$80XdSPlnY>=AeZGPVwx*+}njm2Q|*I|&FZb*C~t3meH1CW{? zNI2tC^9Q7+7ZP8%)JU}ZeP>vQFbCupn43XtkekgwYF0w>DaagIWI0dPJg(1jYFg5KUH5(9WK;r2B zIskId6iA$c%)zGS2}sRUNSuPyfZPc)2gC-2&peP_>k;7$5=U3F2c%{r!adm3a7^|4 z&M*m*Hb8s0K>h-mgPi6yKx!sK(gv~`WWW1>)J%cIDK0fRAT?7VZpNjiXR6=#1Ct1Suy^=cshJ5$V<0uy%-I8SPah<0fYwui z{0^#*kkiH;keYr-+CWwV@*l`vkeeB%`+aAa010PYY7{_fCPMs9FRL;;S5uw1PVi4NEm|D!2AVL3sYkaQnLl21|*JdR~SgmR)iXC zVb}q3&t`3Peqb6TPC;t0x#tH+&2&hdg4BTY z!rTmEgUnHw;rIQ(1W5h@sX?|2WF|CPmzwz?HOnC8pxXs=&n}RfXUKt+Ex7Db0jbGF_zUDtbT@l|)GULPKOl2J{sGa*W2ZSFHOnFS9VCaW z2A01j%<}twpaqgo(ba(L1%=NJkeXIVK1EjpGbav|Rz)FY6zH5XY<_k z%=Y_!KmrmzxYTHX)JQ_Y2bUTjkQy;aIz(23oDM;LBL?@(_WNEj8!|@+8utaw0q4#3 z`#xwhAYFsz_56>-}kk%A#+BcF=Wsz(81Y$-%rnm%(sB_f!1r>nCZ zB53{@bpIeecgzm+`~GDP#0=1y6A*@}2jwl$94h}jzwbqvz88lx8Qv;$ap=vd;45S9D?}R@T|Fh-0QwI zGLSi-d;_Av<})%dT!h9ch|dfn!1G@a#=*IeGyy6bm_Y@t^C5H4p!+dEX9$Dv0tN;K5cZxAS$6_jPsIQ#P+1`2AUXf}kTqkV z#ql3N1uzE#Xj%`9!{+;aR|ehF1F`^=2|yTh*F6IRL+pIW`ZBQnpaC8b21hIdL(+W6 zTCxKmeV|OQz`)SJ2*DZiA#26J6HK7RVIU0h3kZYM6M>QA3uGlI%`q`DFo48iafdA4 zKHu;Ar1_At0VED;OMue$iur!uH_wNZPatuS_gNSj7*5Xj`+j9Uq)Y;dgX$d69jdS9 z`+fg9A5sp1#6iKq#>l|Hy}<9g*aAqLg2X{V3_3Y(!2-YUstX`xB*=SUcQP?BfW*zQ zi0@tC_uX{?B>q9_!R};YV7Rxy?|aMw$eIL@IM|&`3=FU|3^EsFFGvoQIY8pY3m|zF zS-f$9-}lZ1khBUC2hFa7+&OQ7-}jXZAZtiKZU>pi#LU33dx78g6AK_~3_#*w_b@Xs z+*#oF{pAA4ngozI*geb)41YmxUkFK~AaQWGF*7j8E%f`Yy%4fC03;3$H)cqlvR??v zQ?O_Uxd)WLe6fiCU*PvWdLd*D0LZUk^O+bJ6c+k@FIos$GXoL_n-5~Z3`L?r<_BEz z`o7?z*Y|{rUf&rmdVODT0kO^`0f~*I4TbsPir06CD_-9ju6TW4aM|m-!)1hi24psh zE(9mwy4QDuYe;%PYa6e7eJ{A?^?kurRB?nZ1Z%=AukQ!$d3{&7?e*Q@me=|eZvjh<~Tg``d;wV>-&X=Uf&-)@cQ2H!0Wri6R+Kr6LDJra z?S9_{cldpm-{JRNcZc71s~vvdy>~$5kgSI@=Qkka3jTP0pWulZRtEn(zc>8$1p5)L z5z6@8==a@0&g(mawAXioU@x%#3vyoH4+wdEPhf)LAg}KQfnMJk1iZdq&_*@?Qxj$S zd13lN^+UPWcZG0-`5^m2&J+ms`o19=Ar2CQVL_zzTMNp)z8BPEs&gpy`u?B_QygRl zs7{9YAH=`V?e!hq{~+;#cI^JYhh#s)1h4M~(=qLF==b_Qp$}6WWbOx;|E0aYUzh{Y zk8b~lnO@%;reL@K7lrzNLfhgB7J;BMnLtirct0CbzAvy0gr^x$IDyLP1gIE@%?)jr zFM#R=i80QB)G-NAF;LORIR{dnKS0teJO@&iD_BA70F}j{xCE8!3Q%<*$H>otl;IC7 zAnHJNXwHGuO9{dVH>=Nq)By^@5OpBEhI9PB{|B8B3F456KfL$)KH-hm_kj0a-yPn2 zegE(d5sw>?*dXH_{Jp;`SbBe7;N$&0z|#ABfG;GkgXEAgO#I9uzwcKVKx^h07(i{8 z3F*P#9qhfoA8_&heiVtsfK4c^0ZY}crp2NTZ-V_UJe=+z6e^0RS{=UG&`};$v z9H`F$l3NgjkbAMn?>ne%1!~)a3xh4Fs=E25~QR`hG9ygzQBGh0TQZLEk5A2>Q;j9)bhb z2Z7TgsQ+pJTG0A9@O#5Oh<;Er4qg9+%|YKUYzg}Auo;3UY=-Cu^;tK7EI_j#Bm~Bt zzTYQwAi3jt;P(m7A!!Jd)G28IBcpzk0I3VRSn55EsvgT8;*7W6$~D+F)Y8U&6%kXi>p28IplLEk|b#K#u? z0y~1f3+xQ~-mo2lFKmbC2jy#U+Z!$X4LW?kUuZ{!JIKEv3<`UJ7l`l&l?M+P7#JEJ z1%79M#y@y00f+v87lGd|An6CSE5Yr1wD8AeKPc=cyhPX!YS&$0zzjcJ`X7h{eHW00 z_#NaQP*+5N5jFhqx*rtI8VLQM_9MD}Q267r|ASi4_W~sSpsdruz`(HKb>R1ew}Ifj z8=x@3rGLW5!0#Xoaytlv*0qE5D^vu1PiPGS>j$|Bm;Mh$LEk|bq!)xi?RU^!Sq_tf zz8{zj(T~sn4<-eD2Vsz2Q2GbeAE5pe!|TBBAPf=%rNIepzTZI@qz)M$cop~^gkfT! zxpPoimtY$F9fU#pLE#6|3&JpUFuDO$CR#wsE|3^#%owDVw>?{U@K10TdoAoB|A>u{Y5DkD$9EK=BFMBa-1N%mAu4K>V-&{^wgP zv<029#;`}&4t%~>&0gE@pz_?KA2O~AiU&~qIyghl>5LGE%pZW#9LV2Ge%OKcF7>Rp z1D##NAmIs_g8-TT=l}owGrWupfB*jnUA+SuHU|Ya!|(t9^Fe+F9bs$3$H?&i|NneY zdi?-Wx7ZGJo_T%|$N;cvA_&kOmQZB^CZ69LcFKNl$Z`7apyT#E;idcc31VBn1w0S@ z{$Z2-cY({!-wzZxeGfP-@V!Bct}WjRK5hQCV2$AS z25ryp2MXN2FJN>0{-M+PyTVha?*YGqz8{!*?c0M~hwlrNJiZ5nIDcO-N%Z>yEzj=? z-X7mKL^*#~xbFV_z%}ph2DA9SC#-V%eqf2)cLs~#?+Y58zdIb>_-z80-1iMf-M=?1 zl>KgS(fPZ;aj)+ORyuv3@Z0gbLZj3701nUZ1xLNU7aa2XZZO5^JE#s{Q1A9#AcO6@ z!%w&G4?a76e~?x3{e!CK_Xn@tzbD-B{=OmE;k!VCQ3JuFuH$#aK-z(fV=DW13VkQO_1dH-mu5>`vDH0?;EZ=d{5Xd z_`P78_jiT;9^W@ux_)OkxBZ(zxYKusV7KoJvOK;QXm0%0An){DV2{9ehGp*G74|rN zpTO?;UErA8_k``<-vbVMeJ^BJ$X)#{ z;F8<-4_aHk9r)n(one*3_XP8h?+y!OzYA>k{;qJu`@4gN&-Vik8^1kBV*BpEUHQG? zv-kH6(>8wFu*2*7g+;F49i*MVAGq%L{lH)6?**Jb-yh6#`2Jy{$9Dx4kM9LDM85~T zcKq(Zwej1B@9y6htaAGPVVBqUf(FO$2HO1J4UTX8*04J0`v!B@?+jNRzc)B<`4-UO z{Qbl6?cWMYJiaSftp3)pm+AX~SoiM@I&R-LeD(fr@X`Cbz;5sF3bNb29rz&d{llf8 z?*-o+zc;iyfB*2q<@*JFkM9gA4&Mb1Zv1Aj(d)az8}9D`yElFd(AxHGf!mgE8-BWc zpK!?I`-2M}-&2!Ue-mJL{odfP@tc9;#%~U59ltO5;`Tiu()oMC9H;LLp&s849QFFH z@Im1Fh7!l`2CA#SB`lNuKH-Sh_XXy`-!H6m_}-A<@jYR!_xB5nJidRJ@Ach4*7f^= zUyk1=ym9-^@Ydt|0^O4D2~AGl3m$oV-{9!{z2Q0AcLuv{-voF(zZ+DregAON`+Gs} zwQmPBoW4((?eV>!!1X)BEsyUD_PBo!n9TOwQ)~4%gDc+OFD&r-zTmXecY_j#?+mfb z-vuVQeBW?v`?m>YY~KZ*yMK2$;`M#PB);zf*WJE<_~G{b!&UF^4yvx-H)wc%Pq^gt zy@1{0yFr=9_W%pm?+d1F{AR%H`aNKq(|3in-rpG{L%uKA?)81bTaWJ(6rH{|taSQ* zppfl5gS*prgEzmvUD)gN{Q$qm_k^ti-wXb`fB*2B`?~;>>-Pi?-uzTaT3*8>y4T6}z7j!v& zPdLH;ox#NQ`vh0#?;8%Ye`omW{M|rl+c$?x-rpO3xP5;B%BxqLzZAS#6kMAFrdVF`-;QXB-#_4;({q5g2RC;_ru-@bQ18cYM4>&e{YmjjJE?~Uz8$*uk zcZOds-#2XV`X2Dw`}+lB*Y5@luHQd2JAZeO;`ly+$>sZo1s>lo*o%B`;CB7akRJ3s zz~AHhhMUgcC-^&lf6%t-Tf;N=?;o-qz8{Em{yxFg72F1Nc<=aqf`jLG2VeK^2R6HZ zf3U{;`v)%1?;n16d@oq%_-P^E+`kL_X8WF?>hXQTM3?U$?ssRw|^^m z=J4G?g5$dYm)!RU58S>7Z1VcfaMI~J!#uC=4C~y#H>hm-T_7?%yxG^8S8-TkgBTIp^;T zC!D`4$Zh-f;IjL7fl{aM|2MDtW+3MJ{QwInuepDB_~!gQ!Pn#ahLfAWE!gbw-Qa-t zcL5`x?+>gzzYDmyeph(q@!g<=?fZefZr>N&b^osL+3ov=R|4NJOmh1E!D-{S3%{Me zZ(v#dZG*1J_lEuM-yh82`yTLz<@*K=r|%Dx_`frN%7m4U-zThd|1RL~`aM9%^}B+g z$M=MZ9^VZd-M%*{Z~XSaPVW1K%bedod~*N(!Qb_}!A+0v4yGaBHw18gcd+*Ot`M~P zo5QN0?+*W6z8iep{7nE9PLn;pCp>2R-tfoeyTEJj?+J4pz6)?TewSXk>RZD5pzjV> z+`k80as2*av-kG{Up&4i%=Gx)@Ph5TK!C@0g>;Ya4TrtHKX54dZm`$=yTe7d?*TRT z-vge3>R_+$A8vVkcUbNI-NDB5`vV`3?*S59zX`n9{4GGm^*h5#(eDCgKHnV-wtZ7r z>hZnc^RI6oK=EX<@ms?JukRmL1$|er+xBh2=U?9xW;=Zs5ODfF;fTlg1%-~^1@>?J z=CH&2`+#A=TW;%U;@ZRxz!}6f-4NpD38_e_i z9HCLPkM9dEcz-vz=>9!mlhgMHw>iHD zEOPyxu*K=S!Eul8ANriW8*KIX{$ZWd_X+#GzdyLh`90u?$M*#~Q+dz`gNX!6oS@QkBHt+8R?>)XNs z@tcEX@OK6;`|k^Ga($n$d*inTSEug|3!J_e9QXQOAmjP{zzvV@4Yq9G4=8W^7T^)| z{layp?;oT*zXzCZ{Kl}|1KbV|;CK4oV7l$wg~MLo8EiejCmePAzG02W_YV((zBgpL zf1hx`{rdzyr|%P%cznOW?)W`nmHYPxhrGTg9P|1vz_R6=!e#I87wWcsQ~2fdeL;uQ z_XWBl-w&)6{4TJ>?fZiXuHOwVd43lNV*WlsXWO?0LUP|5-tvD3jk6S7-TbZKlgIZ7 z3*5gKT;%?~;H<#+4{kx&^EZRz+rKT?@Amz} zTaWJzJD9#RB)ES6aKQWf2XoKw7xr!ZcJ|+@Z$??GzZrb+{?1?+@_oZGukRO5Z2x93 zRrLD?uHf$svi#o<@NfC1uqNpH1v}>N2W&jPAK1U~+k|kA?+%mrzE60{`29kO)AtW- zp5GgqJiafO=k$HSRHyF&7d^ixEcN*Q;GM_!3EFPo9k_kI8>G8^zmV$io#B!5cYy-t z?-MS#e@`f2`!2vM_x(VN{r3gIuHPr{%6ZU%k-@mA*h0ng3f zHrxmTw;w0m4Eo++z3m&rW5@3aUYox;Tn_@bHQodSe*bVS=zBwG;CE2nEpR*N`<;Nm z?+-v{_#bBf{v;sq`-=cbpC2^d1*)q+b<~F2LEt)rLCWL1fKBjs2atO*g1;Nw3i|%w zX3%#9&&}T^NQXe`NXy{w2@iw5H)IEYZvfe=5b}M3qz5?7INS{Se&ANn_YYbywXWYA zZUuc`6BhXW!Q-IspmDSfk|EzWe1iB9+Fb!tN7h2lK>%}*h^uSC=fp99`bwZN9#EGE z)E7fiLJ^bamG5_%SH9m3Uip6adFA_k!E4{|4_^CzPkH70z2cSc_bIP@zt4H)`~AQx z-|t^u`F>Y;?fc#5weRW7S1K#+4pYz7|`-(Td-#5JR z{l4do@Aorre7`d+as;OZP`e1!w*a+?K)B(d<9C6Fj^7O)IDRj9;0SKFgZu`XGd^Gr zi6@4}#h@#E89-tSpkf}4i^D=H@|hWH86`yTWYG?*TJCzXvSx z{N6AVzd6t9AohdCc|qAFW5}H{s5?cP#yy5 zci83mJz+OQ|AC#J-vxF;*f9Ih=_yeCpfL)N{(zI7-xr+q{LXOF^Si(a&+iwG;nxqk zM+RgjXq*`o{~&h4P5gR5YGC*g)PB%-3n=^(Zh3y6K!W~XQ2n5BW{~~|w>`fb+$P?B zA?W-gXeX@faD)! zJCWHFT7ADisPg^(p~d&RK(+7p2~ED=9jXy}6k2@0J5>38FR1eUzM;zZdqcDD_k?QS z?*(YN)5u1E}U)wU679-uHO0A^LD_qu{@91c|_Ozzt z>&=o>g=~=gi`vEDb}WdEj?%#9`s9o$CQY+6kPx^U%|4UZRty|~JW2{YE*1>s{QIwR38AePTvI@|0vZEBd!=)p93mgw2zr#z1zo5G=Zvu@jrFHfG#Vb43E zWqBtmwXoT~#ZviL!m(~uaXOAYuKlJeLSg#s# z+Irm`jg>oI&%JMS+bwa@B}eH~wg>-ete+>7@IY*{>z2Es%CfF|W`Dbpyi#`_llA}m z<-gkQY<#bE@U64cpV-OrQ$hXtmSo5{61EWB?iLf4x4Mi6M1$lx>LBSPqhWElM+1Zn z5+B7xgaC&C+yCFc>i_?Ky`Koxqe@0YU^E0qLtr!nMnhmU1V%$(Gz3ONU|5Dgy{nHK zY!5ofgUk%f;J%qdCIje*5C(?lkXZ{81_cIo1`P&j1}U&SNG%K(9A#zzVbB~U=s0gs zZ!+NuGXo57;AUXhAPfJov@|hW6xQB;<0fa$vARPF#1axf%%z1DcWIkvfG3aSY3e0UFdVw?p0|Q{sIUvYj z#Rzg0_&f~(H%3MWW|k8N6d4&DSOpk3I6NMJrv617xC0ox4=8XjGB7eLC2%UZDKHtR zDg-n!`S36ZFwHp3BETXb!{F1$aYR6Xkt3(%pJ@EVmc=h88uiL1&;(UF)=W3@G^l^3NlDA zG%&C*2ncj3x`6IOWoTn$VPH^bVDOmY$N=)ZVFy#=M1}=Y&EOsP3{D&jOd<{kmLxF< zB!G?w-rywQ<-p*<$jHIMv4cUt!9{^n5oA200|yg_Kob)a9}6=Bg8++28j2WH`0t^}q6FLQjWt|oXbSVfjFto5Ju`nbtG72#;xJf89 zi0G*(e0{USgF^*mlmdeTgCHY=1w+^$5tT*;h6WWy0RcwE29XX14+#zdCXNX$3=9m) zOj#TZ3<48aWmZEHmY0Ko0L0&*IZ9AWg7&n4gAW4(gD+?w2?GNI z>K!Z~eAPy9R?yv#v^Gjr4U`PhtLjyW90xFjQr9o6C0|P@Ahylg93=9mQ zJ8X&=7#K>RVr2{r44`{zDj66Usu>sbcIqz;Kg+f#D7V1H)Yg1_tne7y|>t69xu`XABGs zFBljYUNSH+yoRcO1Et?GFfhCW?VpG8KQb^dd}d%^_`<-z09tJHlYxQZ7Xt&s9|i`7 ze;_rCpnSl<06OOZ#08z-04ireY;Hyd1|CKR20ll_`+5-j>7i45$5C#>33=9lX zj0_AiP_`^11A`ott;op0pv1_)pu)(&pb8aJXJlZ|gt9^AXfrY}=rJ-d=rb}f7&0<2 zSTHg$SVHBkptLO`1A`ru?Fglv85tPd7#SGc85tNn7#SEm85tP7p>iN|{TLY-f*2VX zLKqnsLKztt!WbDCq8J$%;-G5c85tOopzIVz28J{!JDrh%A&ZfLArHzgWMp6{Vq{<_ zW@KO}VPs$^V`N~cfXY=u=_*DBhH5Cgj*)?(k&%I+g^_`w4Jy{n$iUFg$iOg}k%3_< zBLl;9Mh1qNj0_C37#SF5GcqvDXJlYl01BhPFF&SftjS)fw`NY!y*gJLEi?PIpI0j; zGyGlF+`x8u%U#Ws)HMb*3Ww@T_kWmu`AbCKhiN@q?|uKnYC8W$?fzoDNB=^<%(>qh zH1EBG-P1nhFWg67@6`BxWs~BjJ3Y*CsmAMVtv+9CQckg#Gj_@7G?^~*k+V!8fBFlL zRj(EtmwbI^vA!7NW{I69x7ZSAe5|T7T7FWcUTu}pw!7~_;$91hCVQ>WOIAs~5~UrR zu!ZmO)$UVFiow37e;1{$sj*jiGBMHnYQ*HV75m%d;+T)DG_CsH(XKD?Dg3-L@5Bcs zuA8qE-L&w1f3W84pH=@Aj3-n#PP6IHzV|)g)6~9WXLFUy}lyW_dU{VE1W(QnTB zsk@mz*&bLNl5@NJo8!{JdG8rNoZnINI*0w~?BkN(TDq8Thbi-q=LoA9UyoH-9Z{I}YwNuZwpssA@=BI< zUOsB|Q~wv&?z`So@AGep%G3PR`SsI{8g`k@wQTmDO>43>wuW?WeSV4CS?Ix@GByG0 zfZgAxJQh{@__jwt_U>A%_Z;0W=Yqbj{y5d1-*OXY!QX&Z!Nt*SrV<@T4tF26lE1zA z>sFaL^VhDo(zRR!V()nQEXH_eQZA1x!^R!Xf|CoTKU?xc>R-ay%Bew#yo=b1j#YV` zsq4=4WMgYK`|7c3@2t8T9ICUp`RDLFiej7^{ohzROO4yKZt7Yt-^F6gOOJYk zTO*t3CE(EXeXs6O;q)CfCzo8#Vsu@bazB69_bHBZS8qPmvfer4+2mKhUU;mkFG_C- znE&PRtqifwG9ka!7cCnCleNw`ax|AIKDS#VT-?b!xn;$1$t?E$5_;>m*j}D^{$}aF zqH4AuM~_^cc>d|9a`QK*s{AK1Y@0y+4o*O4Vospa>VRlyEe@*>2i|YH+ zFaM1Wf32JO-pOk$*r>+(}QTG1D7BTa+R}W^b(^~ymu@3DT^Z3MccODU)Yo&7J`=65C>6fuuWn$`BgQCaVU&z94(L}ayY**@)S z@S4ee^S6U&!_NC=FD2*g=rj?I2{qgKXHvDXh?RmCWd6Aw&sVfve=YJYjN#G@qX;NL>`j$W%b_$eEm zw&!J3=&zSTo$2?Fepod3+0@j`lYCj+Rvw!c_$_(zX@7>=jHlBcBLse_hArHkLlP{h;eYE%dJnm&H^S!&TbYI+>(?3x_ zw&tU8P21seg2FWg;R6N6fO~#birn+jHZWLrdZAlYi&Q#5`s?pT(#=<^H}IdrEz;$KKDhO5LcI zA*;%NYWu8=0OlgE`jq$YmKC(m`to)4$Gpo<55BHu<-TC^k^PYiQ{K5FEWZmcZ_nIw zMxlG9sDs6k)xCQc-jH<@IpgO!(fYr!;QsGZp3gXb^i|f4I;&&%>fEeDoBki;x;Xc( z$Et)qDv>H-?H{f`ngyRz1l5Ni3~F44|#~3^ho6P}|fJ*0^L~ zU;yz!?Leq<22dMx2AcZGpiSyf1t9gspvEc^A6gxPML_m10WB5=^C0GjLfIe+BoDfW z5yS>z5Z?;iaRl)o>T4lPFbT5nh%y7ih0RP1pa!=P0}n&290S9I?~Dvb!S3f_*w4nm zkZ_He0n{EAWDsHSVq##pP{9DYPK5!aej_sj!-Yl$1}ms~P`j+55YpZR$ukHuFa+2$ zg043Lt8Y?fVA!ydiQy6>$UQs^pbPi{oERBE?O>4lGa!v`it231yw{&)!n28T>WaQhmhUW12$A>kDR1E?Ji;yd#)FkE;GX&Zz1 zp!O<59s@%a)V)0*`<62@fI4F!`DShghJqIe^%Y!5nJd3^@jd1AiD9lE5K6N{oiUXb6mk0Bu6R;8x)G2RCuAacFP}1$A9< zTJCTwWDF9AVURcy8{Hz6y&>O0=kI{(P!NWn4+A|VLo<^xc62p>L%)9(T~$Dgn^*S3qa1fWjGut9FHa z2aTa6#h{AL1w`0 zhn)lEus!HI=xiv1Z9(5BY=fK;g{(htZ^(Dh`A{Ie$o4lt&w)zV8T1`=HdMflpzj-? zXGASH8}c1A4hd2Z!XM5BeNQ+a^xfeih=#;B$UG1R?dJvUs|4+noOM3rdkpv{RmhoX z39o{_KX?`NJ>YH7_igBM?}Na5NU`myM0WoI_t5VT+(W-Bc!YjW@Cg0B07QfM?vQd% z!7cQAf?MeK2d)r4vR*LTHT1iJYv^|e*U;|^+(N$}0I78g{m$SX`u%`+==TNQq2C+4 zL%%Edgnno63H|=SJM{YjkXqN!?+vb@-xF||3pSjA;e$u$cOK8s?;0TN75d%9EA)GU zSLpW|uh8!^yh6Wk@q)NZ_Mk$$`#Y0Lg*&#^yogK=y&;4040NgX9?Ug1=Wn+a4h)y?i(TBL33CjcY@9;-f%4VyTb9{?+wQh=Reio4EZj=1j(Nu z^EX@!{tm()K=k$C?_Egpp!{2KG59+O!{nzT$%E3f!NuV3APkdtxD)by0kr%8oBurc z`-bPi-#>upSHa)Ck>tVVKM($1fFvJ=Bo8+KdGL1wBzaKZPhS;s4wRQF@8FfHi&hj+o>73Kzk&z%76wFZ@`pnMSUGVnVn zuP{6g{0_=%pmPjBXSZFj7x^ym9Maafus!Je0i&Srpz@;Oao~4>&B5O{JPG{H5E%6R zKz0!LoE*>@4GAJa-y1dse+QjK0y-Oj!7liFfPTn#0nVWB27d#;ANUshJwQF^d&1k` z@1V0C8*T-DcL)jspS1|uPk-Tg;CF+ckn$y9ZqRpy?4a+Uvz0*SiEOwR^c{5m9O$g1 z4O@f0gUXBvCL!M+{0;nWpb_+a!Iz-#4sk)>L2U;Ei{S49TtVP7VlJ=-eK+_R{Qbf4 z;O_?CgCXYz+z{pOFQ2PgT<{pR* zD)&L{DG+-UkA}c#2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-R~zuMohs{{H|! zWc|MZXrV9zh^@fD!Jxq)%OC@qZb1zM6R-jX(EJl$KRn=}}wfb4Gy9 zs0Xdl2B`(PH^lF}3JV7ZlOuzOf;dkg8%Pc`wv8N+h71f0p!M9K-~_GJ0Lg*Ya$7P$ z)~;AX*K*rK*K^O&6kpYz{WMyzqeQK+vGG}#_DAhlu1~8MrT)-J>3Fp)kzrYTtG8#z z>!Tl6@8sOH{p+2Q0x9OFlY+DirKexLtJyroAwc*!gGX8Ki`DK9+Ms;~AS>Zm2jp2O z53~*kv=$f21+NE9D zhyuy~05PB##7{y~Ux>zUMdP1=>IG3C{my9eGeHti43bA*7X@3l3{nD;w?Wg76kOo7 zIL1fmiBMwpnQV&}n z599AcQ-1}GzYEFzf(#%3gVuj)n4i6p%(4HCx74SYEuz8O_ z?o(l4kcG;NGBGd&s6h4ufb@T5WMEK0l3xkBXGM;I0hCce@<-6z1KQirAk4t9lnt`( zYz-p=gM%UiLoak48)(l3Xcr7k(^KF&NUyi!w`68Itq!@=}va7>ZI8QyB6R^YV*xQd6P+L2+(;abg@o>DAY2G$av+Kd5{rscLE(~F=AwIqs$va^CO7p<_;!6t(QlSw56@r)w<;3UYm&4>i!2^*5Spi{{B^G5S=9Ms{ zCFhmofWojKGX+GIW~ML{L%ouoT2cTKF0L$2PRz++$O4I*STH0eC#Mz{Go&PgfX2Lp&?W8ehS5Ooj{WD?YNg785n&2od)g7`cPTnwOXZA=U>$O30EF|aT| zcn}qg3=p_bE{X%xJ^{^vFM*a3prVF}fstW@`YleF9IQM8$$?BbpuLC}BnN71fyzqI z{3)^;76wL!sXCweL25u{F0A|k**Xnr4qG@glNWTG`z5&D>5g7QVc>NyzxLHPn;J{toEXcr-9%`=$K${++< zu*AT?@WU5!Z~Px9%>rt7g7#neGcbV86@CJx-}o~yurV_*d;rmc3=CgDv0QFm!-uNd|@< z5G}>PFabnMGcZg6(fSMwGeEQq1H&8;Ez7{L07T0%Ff0Ml@(c_sK(qn_!x|86%D}Jz zL@O~cYyr{A3=BI!vR54{us^Ibsl z1>h}%U_Qv`4A7R!mmmK9|Nnn6XlG{zXt~SF2Vg$Pstiz7|MCKu4_f_}F#)9i0GJQ5 zI%5WizX8k#t%%A1U7!7O0hkYRN(N~A(O5ZfccZUjyypVv?(_Ov;^}d1DFr;S_Y`A@bbf7kpFu?`aylxmk+>vkXJK6+aO$Z`0;aWGd?JpA`2-w~@$onw=i_iZ z%E#iu4er-~`Yjdj|NjTIn?d@Unf&<-D!KSL91rucIC6vcL406jVA%5h|9?>15u~Oa zWJepwj%F5rz6p#>fn0n7j)(bp9FOsFI3DL?apDFI9WZEs#tJ_C{|{<|gYqvZBZB%_ z79alq2kkosnbpk16mgi31-!pGf{B5l=EML0pf)Z@4vSwBnCh_j#gQ9)C)^As28J^q z|NoB$S?0*c(agjY2{Id$E4P5^mrwuygZqt+d>rje&U`#=%+7oQAU}YE2*nGI+>mu# zZFtwxEfLFf%Y5`1Buky*Dz!j*LAl?C z8DbtN6X5jYVeEbcl~y&(3=AHh|NjT&bdY{fd^yx2;tQl^0W$+b%jf_9LAe#KhA9-T z2;`0cvZdps_G6X*nQ8SJDd-2 zR(@ZQ&HNpF7xM>!?+I_&zHjIY1>dc#0JGYki-A|!F;~&4&MCVFZ6|eH+aMSeF5~oNYLGopgS55 zq%wb>Fr5#4&m!n9MbKS{p!*I%{s)aVfoPatKzAd<*`V{bAm{(Vg9di~Uw{N?&YyvS zV=6>7?EF6!24&D#3Pcb}%49PzfG}tb8`OyfrJ*Hx3=B)^pqPn)p@bPSzYmfJxo1Zn z1H+Cw2$o=EU;tsz`Fx-_1!2&>DHsNgaDgyL9E3sh`v(FT7+~0iiGcxxL2@8W%=|vG z`#}4?Kp3PK}Y3Ovk@52)cll z2!Mj5*M1n7(i5EJBo=u!;uxosdZ5O!x^U;vHyfzELQ@o{0$8E@XuGv555=ez|m zFfar|HGszkplr~YZy+XUBoIVLGB7ZJ$6i1jGz=OyiG_;AL1|5>797354sZd550|P@klntXm^Qz#B5?}%hkU7~r=y`H`@`|RHdfm8j|Nr;z-Fh>4 zU!GxiZkFGg7O(T=o4Vvl+l!p)bFbUxe7k0w^X*{Ug*UeaX3dLQu{HOmZO*r2PxTp& zKhw5=$cIt-ZEG>1Phx=dEi+11Ij;u|SKNg}c_r`qN<{ z%@SX~TQ_cA)SheX^||)`QMDJc9_MBi?larnsrs$gd2{;olU3iZMqGM5hw;x9N1=6k zDv?(>&(??DEu7P?zin>2{x;LiqAb59i(yCd!F|>XXMyH$85s6~5+PI!H0Qkol;Du~ zpt2Ln1+N*f1tmhL07yM3jY7HLu{+QlGmHA(cEW@abb{37Aig^b1H%Om28LD!1_mVtUIx(kxd7BY5dQ)rWDN@F3?>lY z09>gEFu0z;HpDfx#5KMunHbhJ}G)g9ifx=zLX>`mdlh zJa!BWpji_TA2d6oAjQD25Ojtm124l=W(EcWX9fn)8at3YXqs_>Jp%)%UJ*cjNnGfQdurM%8Kyr^I=xi!Y2JqQTAo+Qq z_;rSyqYC2dgZ%3NIcpQdPY206LeBIA@j;iD!2Aoce={h(x-dY`cH(7lVq#$Upoxh8 zI;8XhQhytizHAu4^YI|_PJ_-nfcgi-2ethdAf=xW76yg{PeghtWno|tKnjnQAoGn7 z@dx4;An{kTFfbG#sdqt(Kf0|cO3ciUPfpBBPR)U?NGT}E0IkD`&n+!UtpKfw$!0(m zD$N5g4gxO?VnAp&GXZl_i;D7#5G<%@T5)AwGFTMM0<8clN==0uT%4Md2Ir)wmJ}yv zq^1-k7A5AwMT=2HLkT3=X4LGnt3}_4#rIwTyEH25+XFxE`OyDb;GSgFY3rZ?M&Ihe(%1mJZ z#XwO!H0WS~k)M~G3YAGo%}FhRane&u^2<_-ic0gKve1}?@`@o#&=`s{a^t}(%Hrce z%#_Tc)Z~)KCWC2`mA(F22)Dlpt0U1yXWyZ%Br6!j#AmTbHv8X6B zwJ08(@L+x}&P)fdiNjO|O)15YWqdI8&}<6hLJ}m%+Pr*_8$qmMQ0(Ovf~-%?EK3Cm zfr2{)CJyElr6z+V<3YYj&IT?1D@rW}ErbJQY!DZu49 z259w~0f-M>^OlpDR8#^IG(=i)23xy^eZ?ALm6|zRkFg#?Eo?;_YcSs$MpwQKj2?VT z7#;amFgo(BVRYo%!03%R{STUd*5PGf;CcH0Kj_?L&|D(MoN6H71I8e}CyY*fFBqNp z-Y`1yePHz9d%&2Ab%xRzs?wG34WkoOWjNm(MpwQMjBa4v2vhu^d`B?-fiaHn3!@|7 z4@O76Ka8$?4NM?ge4%n6b}H0tkb0QefqYLG9ic9RiMjK=VRV7o4PLt-z{kMQ@$~XZw8|y-yBAFz6FdRRh4{m7@hbQF#3R&N*v^y!|1}dfYF0*0wZX((FQ&Sh8xfR z{|B{k7@YZJocI)6_*7i@G+g*}T=)z;_*fwKCEVa+V7Nd)9cXnB13v@9iD&=+gW7}) z-k^03j-Yi8j-Yi8F?>9S9r-wpIr6a__v7P0TPPC4Cve!2kLQ>pAIEV|khS1*=l}nM&kV=5ULlb043jJ01*R~*15BVL2xpj__%1Mc za0fue{rCJwWsA~Wk=b0eDz|isH z|9|i}3Bq1C`1+hMXr4{vTf^wiw}CMLGf9EgKim*tVA$~D|9?=M6)8O;%n9Us!{o~M zfys~W4U;3^3noV}{ej7i?+ud|-v_2*zAsFUd_R~R`Tj7u@-;Af@I7G4hpO@8dji(u z#P^2DiSGjwmhu9$5-vuNfr01c|Nr3e8%I74=$Z{bK7kyhB^yrMAb)oVGB5vhxbVri@F_U*sW`%Nu0NlEBNviY zp44`PGXj(}(ohK;d<*r0Jl(6}3j4I1MF(V#s`uyI5X z9~tX{S4Ja5Kx3GobCp1Aqf(*5puQHA38z4JXMi}MJ0p;e69)I|Kz(@7Drt~BXlxQh zgD`0S6o^K~pnYM;d{93TnGX(Ar~v4G4iFPG4hGs|1!99RYzz}L)(YZ-Flc@RM1wH$ z*eQq)8s`L!`GVLW3{E2;1_LBrfS90k3ZjjncW9`AI7k>&E`wHrg63KDk;JhvL1VD! z;-EV}Kw_Y=RM0pth>Z_}R+WOzHwLKz-8TZ-0|H`$FlY=KRxX0hhX#p(_M(AShJx52 z%nTy1U~nA@S|N!f2hI;jcZPuO1c6C|?h65p3xoE*fyT5!<2|4=!(j3t8Z@pBqLGG9 zKwL0}ja{ol$Hl>dpf%wP3=E+0X;6Lw_0d7%pz#Cq4v4S|6RfeSA~zc;*u%$qmJhkf7T7Y1Ihz|9IN zhoxB|=TCyp+Xt16YeXRH6+rt*Ky^B39vW1Sg6a!UU9zGMGX4tUgYX;EuG8ltG+*b68inylhE&MPeZ?p zJq`V?_B8an+0)SPZcjtMhdmAbp7u2Kd)d>_?`=;*zfXG_`hD5c(C^!xhJHWxH1zwm zr=j1UJq`W-?P=(Dwr8Q=#h!(JS9=!v-RxQDceiJu-@~4TeouQA`n~K~==Zi~q2H%H z3;n+AS?Kp|&qBW+dlvfr+OyE_&z^;T|Mo2OJKOWn?_$qGzpFhD{ciR=^t;>h(C=Z- zL%*jz5B*;DJoJ0p^U&|po`-&4_B{0aw&$VWk3A3le(iba_h-*Tzkhok`kn1X=y$Of zq2JYBgnl=B5>j1tjed3PYr+9Jo?Y{DRs>Z~-U-ruKnc*muyj8>sNGp_my!sgi*q z2iizt2Jbp%VE6*(Lt5aVyaw_#GXtc@Z~+ux3=9m+;EMqn7(nYtAo7q_JZKLZgb!&! zgYqbZ4{70m_ToYKkXjtH#sk6!nvR(zGgP8$Tk}xn_09{xI z_AjV}VSp_92lGKKNe0lhk09j?%-~(#3=9d-Lk*b0JsGeRm|$j*2e&D~9Pn8dAHjP- zVD4jN5C^Zl`T%hj0}}%;1E@`E0C5(W4{8@TAn`%%d60dew93dJ#{gPe0rNj2gBSy- ze|!N+J?Q)cSa>lqh%$h7A|bm6bl(axA9SxBG9Pr89Wo!Z{RkA_pnf6~10MtEe1j8> zkaIdf?)lHaz;FhM54xvrfeZr!6B}rcJTHSNX#aa719+a6kwKP0nvsEF50ZLi(EfEK zKIpuP4M=>@-Ev!y_@F!Gb|CRVo34%^@j?4qK=BW%6BrpJ7&<`#2lWsO!^i(q(D3=A)j;`0Z{zb=q_Awlw>y}ef&A!kQ}(w`_Z z1H%G0$i0^!d2MC}1{b(~Sq3Xmr`8oRHw=>ZWM*J+aE07C2;xVA_Cvwd%P}CYZ2^T> zDM&xm!61GU8h;`he-SeS!vrtL+%3rb?aT}e8@w18K;w@f{%K|g1_d8P{M|#-{~3+X z#=^kB(uBxw$ZH)y?m4+hg@NIL1jK%jd^-yRLmp^AhyjwG=dv&`z~=fv^6Npj%0lOk zL445KoD1d*44}I{LHz413=AAd{&@nj-vV+^CrJJqXs%v@0bH(u_-w2U3?9((7Iex6 zFDqg$8zis7%D|B2$-n^W&x82(tPBhe@c5Kvh-QWCNd|eCiGiOXk(Gf#1j+tlRtAO# zN(>C3@gb1@CXjxA$i1r|{$y4L2H0FUh`$)k{;eSMp=&Wf^2b>j7Mgfb_SsF)&ELE@EYnW9VUn>|qCunStbIvoSE-@<4>&W{`b8 zkn>JJ@+aAl!(Wc!DjNd>4^sGj1i2r&wgsgAHyZ;(7E<~U1l@b($G`v@F9OM{f%v`* z450C05Z{TNfx$r;a*q~>AHvSSu)vRj0W{tQ;wQ5s>T5;@DTW+Shab9D0wiC<&cM*n z2syhSR36M`M@=6a*b(jrrRO~${h)z$@c54m!zFeGh7C%P^HMo+H2!uZK4>k^L6Cl=wHoJ<AHV^3ePZlJ`cE2erl$koX|=HE8@EH2yqJ28IA6_ijRyKgEey8w7Ii zHBJVG4@hg19&<7fk{(TfN(D>WX z_$Rp;7$zXCwYr8T{|AlF2kNYYT?bk(_VK?I52E}6#g{sgJScscA@M=se{g|B>kZDnTV#o9F0F0jlYSPfdP4K+W}q%23+U=F@!UM=fcmJ zL;6v$_5X4VvMBu&kmpRk3NwH(cxjgaWK8DCPho~9oFZT>!O6e?x?vqWjv)Z5ix?O> zehV{naEpL3*g&-N|6ptXK{ROG9fU#63lIja|Cc!@$NcFcQ0qg1!38oSR>Qz>gpEmoNsy6EL|KS2k->qhf!RTTfr+tA zVLGUjB*MVY;K0PnlE%vrz;=j%!B>}I0;jl3><5GL|9ljwG85Ed|7#MpL zI2@S_*jN|@96%0aXmVg-Vqg>yVr*bkWME8aU|ssU|RpoDgW>Vqg$RU|`_5=}|GE@drzd4+l>pQxa2$f;6K5 zOGCoJHVy>`!2;%FWnl&ZkA_7pEE63V7#frm4=^lM2w@ap;&ftQU}9kikXXez!F0j_ z#xO>e08Ivl1)NTe3`{%>Djbb%EKChr0gF^7EO5&45C~wJ;K0D706JL`B zGzc&;ac~}FVqj=YnBC7c121U?C_m&K74B(qU1sE6|7@R;!m4U&9qm7AIpuvTaMW|0oQf!ie zpTYqRg#%6v2Np3fB(Q-dqvaS2bQL(bKvS;_4JsZj0bC6%Q(7b$3>a3-Fkp00Xkbt} z*TJA7xPXU6sX;-6p}>KgxrM<&Ab~+aR>?pCR6R2=^f+)>wN24@;V>DL?HNFI78A$? zK1wPF*k`jav7Bz;AIMTCJ;864S^Bo@eUI&jQz zk#KD|%q672A>`^Pr~t}491Sc28V#Hd1*{DMJQ8ipogOX%>{bbGEG!%xhE6B+8yOr5 zd=!M1889$%Ix2v26QdvlgMg+314E4v4?`D&Bm-jugP~W;0TB-ehK9yd91Ig%7#JQY zFtKqqFg7tT1TZ8xG^hv#Fmi}oU|^lWz#t~%+R((H(8%_HP56bo0E-5LKm!BALWc=k z7#wW$EDo8qfU;Z*ON$x<1B=214h1zP1r8PlP+`Tu!YC!6!Pl(D7|_VTqXIg|je)^| zrGY_^g+*=R1%-x&1_2HRmnJ4gB?m?ZM#lvT4Gbaz0uvb|1Ox>b6apBy)fpHPdzzRu zJHFOy3=IM;9Kj9lVhk*5pgN6#QN!r40fz#ELPrA^6R$%O zBZFZVheQK!i3f{-gQAdu187`I;s6iB0YMf4ZUq4b2aW^{P6Gxb0R{%njVj=@D$LBF za70MRlYxa%h(WS}!9jq5L4%3Kpy8MbFO!1;Q?np5n+ivZ0|$q|LMIj$Ck6%)4$!f8 zpyGj3LxodAfl&dp<>5dh0|Pq~g9GTGB?bis2Z2zIMIszb8w6AYK$V@FTMH|Lpo4-H zuj3Kjr5p?#O)hL6puyP#49-j<3LM~YQ)FNfSSa8MD%KhgF|aTw2rxM@EDRQvVi1_X z$a+JKVTA%{A$&*!6O#ag2!jVBiy|lsFfaswDgtnk2yPRA&I>vV+LyqKc6r#Fg#^oV0aEX+zK?74Kb48Edv9?dj>f# z{ZC&Q7#O}WFff27azF=N{bXQZ_{+e+02)sPx1~V+dqxHZ(D|#NbLv3GfWiwzb1^b7 za5FM6@Gvqk@G>$m@PisWp#CHy0|V&1UQl}rqz*Lp3Zg;BNrCoeg4iGoD$qdZ#Dd0R zL3|lT1_sccAVsJ-pfOohMg|6TMg|5gMg|6LMg|65Mg|6bs66PPEJG+8biOm_pe##9 z1_sdCx;Bgq450lo;5Y>BpJZfUaAIU&aA9O%aAjm*aD(atokQ%!$iM*F8-#oYtv@3J z1L&NcAVvlT(0zR%_k}YuFhnvkFhnylFvK!4Fn~^s10AN7#K^z^+IyA?H4{`pq%$%w zfDYEmVT6pifzF2onNh;Xz)%iVSINl0Pz_~+T06IGrB!`Yc zW6Ir(kTY44<@y;J7(nMDO=e_ZfQ>VQ&c_9>C1qe>n9j(+Fav52NZ(9G28LOT3=DIi zVxWCbpz-KMj0_A*85tOsF)}bLXJlYl$;iO4nvsD4bQUaVe0n`21H&fJ*<6ea4BMf4 zLGzfqpzPgH8e|7({2D|bU}Ru81QkER$iM*F19gItf#D=n>=Yvd1L#b!bBqiO=NTCo zE<(jGGcqt-gR-wf=^IcQH1>Uqk%8ehBLl-dMh1raQ1Qo%3=B`8Y>?f^_!%Pu!z)Gx zhIfn%44{2uACc63W@KOhjfaEI%>Bm5!0>~Sf#EkJ1H&Ii28Mr(3=E7+3=GUn3=Awx z;Bo?NENDC(wBL=JiGhKiiGe|giGe|ciGe|kiGe|qiGcxh902*&MWny43XJTNmVq##hhRQoKF@X2! zxI+1EObiU3ObiU(ObiS@P%%Fy1_po7dB98z41r7x44|`@LzoyCKx6dbP&JWEkTad5 znHU)2Kx5rdanQNg$xI9kDNGCu=}Zg^p!?xL9tNHFoDEfz%f!Ht4`mlHF)$P{F))C} z_bZtodxJpg8$eA}CI*HUCI*IfCI*I1CI$vj3!|HffuRqyuL`PvA`=6{WGH(olm^WO z%wl3-n9an%Fc&H|pNWA1v_En&6Xa}xrA!PA%a|A#mV?eqV`5+c?HvNyyNZc{VGUHz zdL{-2&>5tgp#05D3=G?t7#OxQF)-|8Vqn4iGcyM5CAmK@QaCo;WrZl!(S!_2GD_SjLZxS zEX)iHte}1G%nS^i%nS@X%nS^C%naajNkRL}#F!Zv#F-fwBtacb1_lOMW(Ed1C|dza zD>E}Ns4_D!XfQJ{XfZP|=t9K}nHd<2m>C#Mm>C$%pkn6C4B$BnYi0%p(3x>|P;m!l z1_me4+y*lPgF93VG?(E8auf7SKBg|@g{O|(si@pUWUecBA&Bb?J-N@By9UHX9OMTY zA6{^ukzvY-@BhL3hY@Reec)@DUHBxJ=3-gQ>%z?dT2J}lJ|lz6$?yL=K!XYh{myXx z{(K2cTd?SN=4MLZ;uCR0TVfA76b|GriwBGhHRrzn2jykZTH017XFk~3hd!XQ4?Xz; znDVij3qEhK;sGN=%moa8f!*Z_((l0+z;qOgen)QbIpRAWFf#C5{Qh4XG?onZmk->2 zXOMmuz5u34SUljt&2$Wlv2NVVdzi2&2Oa(fYP@MYWMnvV{ri7Vx`X%^Z3%x6-vdTw z8%8WfJAsDlK;s}e4;dL|-1`0>w5F25g-;=gj|JSnXnDxUu;JGC|DZLMAhV%syZ!kT zVi2eCF)%QIPSo7+kda}_t?&PfKs`jTzrEr92A?_U!l%Kki_ICX+{`y%;%-QXQ98oU z-NP>GilR0c>OoYskbSE@j~E$d-2482J8D`(tULGT3t)N)H30cMOb_ldsHn>^J{}k7 zDVZLia08{aC7=V|pM3wH0;;FLenty>(D{Sd5B~$FwI`1l84R9&{}0}S4%UxItI#lW zV8W)~nVSLB2~&B@$gtqq_W?csaK&Rr2A}8O2kiVqP}vr(fg$DAKoW@*Z7e1efj&O@AKY)DsBb_1;*s> z4nfe*ohDj{7d4AOGFqSKRjxzoF&{#D5R? z5%;|Sq(=avUg1aF_X#5LVEZ2M#()3tGw%BVsQLtn`0o$C$9*sO57EDYC;t0}pK;#> zpz05B$A2&Q33108?u_qGxHG=r;m-Jeg*yZ6mJ3i?ga^Wh1=tDhjPGBdatF9GzVG19 z_`ZQVYM|AIpaEsja*;QjBH;5RKrsYb$83=p20nkSfHfR^ z{@Q~{Vc_%E%)3z6F?Zx-fx0gYpo=R&?L5$cJZKfY z4^%gT!UME!88qDvTDSbimXYEA|Nr3bBJ`to$dRE<$T`*P78c*(Bk+$VW#Z&4+mtwFPJ3y{lR&G@1S$p8WzfaKX97+ zd%;Am?*g-A!DqA;Ea&^)_mKO$!+h@V4i{vH!vfjwp!3{5?B@IKz+L(M!z1SJ3M*v4KTv1>4m;n?K%4)&!eiO*0W0~wH|%Bl z&h(h;dxA9ocZWl=-ybA!en0R*;QNAK+}|5sutCm!`ylW=;0^cpgk`edCoE+8Ua*_* zJHsum?-zbDeLwJ&`}+hXj_(h4@qI6N!~H#AGTV2B^RnMTYqk$qv3)Q2%lCak8Qb>> zllZ6k22W+bA1Gw|e!z?K`vO6^?;l=se>b?w`+b2X|Mvwk%-3cyG^Y;L4=I@|0=olWc zeShG|{hh&$4SW_I!!*9{7cOvqzp#?;yMqk>ci7o<9|YvS8-z1|7kI_^eZp(T?;9R+ ze+Qpew~p!i0%5uD3`<16A9%$5J>U~N_zb%M6Xx$5UI~1^a8UO9gI>1p32(T+Z_pL_ zzM-G(`-2&L;PdS+T;}`^KjRMM#{2x=KXfpEZ#XURT_KMf z3a0N5E^>Zvc+dU)K|kO31&`UjA2=!deZftx?+lY=zb|lQ1D~f?u!8UV0$q{s0id+f z!3;iMPvIK>_kxSu-$7^W3AD?8pP(T3yJdMb`Hjg<0PZ z6lH^}-#bdO!0H*^$$bCwR^~fH0ffJy5JH38`rxn3caN;B?+>72uzUuh zLFEpJ4!Dh4H$1qB;BP=;gVZA91GmG!C(MZd9xyZhd&7+Q?;mc5e>b=j{#{{K{P%)c z@!t>3jQ_siPWbnPJK^6K+zS6*FggDFfyt0E{J<0ljcgu>4Rh0mMnruC5?824<%7gP z{TvWY308QEYA(or(6A7wI|#b{0iW3djq%?%G{=7rXo~;-peg=)K~wy92iEBC7s}(l zHyn-n-p~>GouMldzDHogrYJ~!f%boFiu%4`N7Q!(sMvz72)Tw$QQsGAiu#_g10e=- zhr_0*?*W^lzJJ&r^<7~*svJn(;18-;!ltP21)HM2PuL#yeZw|{+@HcMaQOf#CqU&Q zDE)!T3lLu*JQ}>e24o%#&#;2jO(&!lg(n=3f%^d@4+<|34Z|QlDEvS)2!r-V)U8Sd z>uKnU1=Aq4ATvSg?t?f`JfR&eP0Wk`9xylld&9!`?*|sdf4?v%{`-PC@!tg&#(xi( zAOAgJPW*R+Iq}~w%!~idFbARcf_LY&FaX7;SguMZAOTs~mY(R3<3@32?2%g3v%7Bn-Oy-ZL)fle&v;qT^sf(cnT^OB+dR)dT#yZZ*R}_nrnY-o)!Nx{W^D) zU-HQtmmM!{;Vuxpb>MDDk!XmL$KE{`cCHNFVshs6rtsG81$(bV+rHjscV_9QzR#>i z_AO!$9tlEuRYLCPz?Ppd*$pW6}N}Wq$h|S*s*j$w910G661>K z3x*{Ve(iAPtNP$+@ulL4`qVQ%8W#H_tAhMzH~DvXOSkhB_*Ss;al}csAZ@f-R z|g`Eqo1u6E$ z{QoaxXs~$w)Icj%lAslhGp@* zTNI;X@0&_K=i**EB>|$qnQL`yJx1^GNe~hiL@_|#wq?XlwIjVM7;l<5X_J7WXcb?v; zOqk8b%YTJcq3QeMhy8uamX=7dy)F6G#57^HWBBDm6IZIuESkx)>#qN z&X4~y_U#lq-L3Jy;P8&?eCPklcYMpz`YZSM6HD;I7ir8} zkHqztofetQhQz z9C^0J{iDgdtnX75j%;mzww2Lf-N&ok67BzXW_7(;XSTfPT>QH4E+6J@dN0ts@B_mQ zg}_w(yjQa2w-1*$6s&PhxHE6f7)DrpRY3*k8tjL?8|Y*&+ho1nf77FPt@#GJU(D0n z^TPk9$1QHXnfJ8Sly!ri33e3T*)#J9zec4R@8c{hWKk*d=Z!YuoGx3zuls zil2IUPWZ@L>G@0-bUO-^Ckt=dRg~x`di~GhEBcR@))rfaE&98rQc6qJ@kfknLUz~& zA3^Om9#f__PV?DYS3ldr|9@2GOp)LF-`Z`?h*p1g`u&qL;@ZynC*ogNIY?_xQq?`p z{ceqz`^VZGl7BBX{ck^^k`pTXD zCfmwh-MPGl@m%Sy+SAw8-6*R%xJKgpnS%@DUW;n3`*-q!S-kX>tsYx*_LN%}IOVtP zlyPO1ic96p*sncfX5l;eid#xY^lEq7?hDzuMEi63x+%Bz%RCqU7Ui?|vX7a2R>b6* zr#lm}H*r69*OmT#x&PV19gh-9v+jHs{c64INhj|j0rUEwlic5OAMScFjdK;z&2+T(;pi!Tb>*XbIx90tjO#zR5%KgiuZphcob9C$%u z+zgQOC$=rKKk4Lp_08_blWJ}hM#${!{mA#~@_RmJHJ)O$AOxSi4if`4*FblD!}y@K zmk*2sKDQat7l#Rf)Pwe*!1y5b$Y(-<67(g2#6xbLT z%D{YX28?rl(=ziiA-9C5q+-7(9CW)lb{WDqh^NOxPxl3%Fq$5plb_CjA{JksS&{*| z_B+2QIU_YW8*&VAYB584Jm?PcBG5J9@wutR#fj;u@u?LBMWEw2(U0d$&&f>EHPSNx z9nFb+UT1tN=saA8`1qvaV#saj4Dp}?OLH=l(jo3b=z<;N2|ADy6qum3n@}1Q%b>fJ zk?~{DxDiwyaxXFyc#%0s2$bJI>2Hr5c<%?p5h(peo`Hc4v}O)OGcz!J0nscB3_n0L z8w0~15Y5iOa7P}pHtqq4W@cb`0-{+M7+!#AR_Hyvpv|U@hi6MOFmyMAG9CCHUeGCP zkb8Kkeg7_w`%R^#LHC=2Cii=rKu4&-?>7aVx`2GYDUZtk3nvfvmNE410WV*9aUFCf z!=c+!3=E;YT@V96q~?jvrw4y91$Q1k_*%XDLOY)ZzX<>T|9|7*b}0r1kj{qPAOjgnRl1u&Ij!|T314sX zmw*5Nce1Fw`19}o{}<-}|NlSM3{u4iHLdd-%zdDP&l(R|gUo9B@bCZsZjRQIrJOHa z{{R2qTcXC$Jqfh3zx7hdTi6Y*EGqvmoqVbC|Ns99P|z)cxDz(`#jbxK$GwsSJMKld zi;6<)ff9w@<`2*Q|3B`c0y_ATq0>c$qqiA!PA15W761PK?@dvWh(4S)A^1fVSpO=B z{u|vcDh90wN-TPtOP+)EbLcTJfbL#a19Y7;_|E75e?d;ymti z5vq@&tRyihCso1LR>3dS$A-8kCwq_0Ebvkh35y z{{8q%DCN)p|KRh~_&D77c)a+z zOIRux?4_)=j8v3B`3AIJ40ILtp~vtQF7%Edv9%oeS!>9by2rm>C!@L1|E18MKZDv=0ij zH6PSp0j;9}^;1B{UV+-npmj8${vK!@%^o>OJqhB2*U^CXP=U^_WdbjeVW?naU;rJt z0NURK>f?bkM{o=7(ji05C#PiDC|Kr zC>}xKKHC2u?f;MV{}~wANBjSy{r?n|(f%2c)c>!`~Qtu;C(b1O0m;C(b0{r~xpeKZ*T|CTK9KAJPl zS>Sy%pz(FseE`_@(O~rdo3p_CXh8i?Vgnbs|No#O7Q9ygq&Fck8nW&>mKj2W1V`~` z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQP=G4O!nK?p1t0F)!=;j!jwL zPu#Bf&aeS8u9C0`Lf@E|_1$BB)^~^b5Wd3vtnV67HY|_~=4XAkn4k6i#k{QVALeC! ze=rZC79^iAKkIwO{H*T<^RvDOAnA*kpY^?Ae%ALN^Rm8kfW+r#eHQ@HAWdj^!u+i7 z9Y}H@eG8EIXv$HzGl*1&qKOQS#Qd!9CJkBN7qn!3XJ^t)w4MgEjskSFA&3vcIUsj4K-T48TmG(}lbHlsS`S+^3tvqS(#*iX0Fnn` z)TQ>I1KPsAFW8jzy(2s8JNW*}4UqH;(k21A&ys|5^0|Ud2?5yt( zplpyj5Pp%J_5DM3*7pV3S>IP=XMLZ6BrlPZ^<5z+>$^ry)_0B^NVtOZ2;^jax5&x* zz9Bp7`+@AN?>n-yzMnwS2T}vW9ywXx9gy^b^hF@?Vd}8a0Ys|9rk5143)xxUO%lSs zGi(q4&JNq;!N9;E0u4t{x?OO);u~n}5_Ipye@4jpL>`G@-#s$JzT1>R(gu3E1)T$A z0Wu>Y>^nzQ)^~;k?CG{(OV)RhEs*eqrQ1KCL#B~D!Lg9|bXzbVazAXwT-)y<8^Fh8 zBbkKB1f8b@y8i>3WxxtlK<-9Lwg?Mgnkd$n)Q8$ zU)Xns9gs8%POl6M3-C}3I1W<9gy^SK-mxc!oGj-3;X`UFYNmdsJ;rQ z9MlMg3I1WF z1ciNPa0tU%zDjJ*`o3oyB+g*z)C6`|H`Fy6SkfuT4Ino`mB6Wn>!II4?pd#=g++3-*P6U$HOrdk2#EgngmkPwWf*Zm=)(yTiWF?-u()zk49b!^{TJ zH}-{ozpyX#`woyhq559nPzzFzj2{rG4p|R5?0|it-%ScazaOX%{muct9R*@a3^W|U z>GN*IH_#eX(7I4i8vv9>GYUh$R}_YRXDNh)FM9g)s0{ty05YQ>^t-@;(C-WzLb0aL z9XqqW$Lxf}87zGku7bD$MtWdLpRjfSObv{_QxXcER|BO_7XilaU-m-MD`>YDDBXh8 zf$m%d?STZbzxXmR@GwEv$b$GFoC9(A{qIebIEGx&ynf8i7Q{Q*>;1V{{~01qudq&hrC5GB>%14^%f-yLoSqO@0e zpy3EguM6%~d;_IX&^;2MtByhIs67e;zk3u1e%B}u1eaOp>9uHY;CBO%83lpgB@#lv zGdN&RuNix?zVqxsO|SNsP*YSC|D3stzmI`of$et>keN<_-z6s4LdsYWA5{PEhxpyX zDe(IWr@-$EoFL)Z;1u}11ImWEYl2hY_Zd!s-#wfHzXv!4es@5UKj0Mj{e)BC_X|#e z-!~wM?{EtI{=q5mdxTTq_Y9}N?+H$U-wTlBVP=DA=fLkjoC3c;a0>i>1FBEJ8R8zW zJRX9BNOgFOAWEvjDe$|=0^9El_V(XFd(mN<_CUiClwKJWvcG}u1Lg#s!w=nu?Xl4I zyT?-7?{Ajd!qY40Ofr~$mc@48AArnQVEg??O5k^f2LV{iSBd>u-}mf;#2Ku7)ja^& zga9+oVGU+G6*Wb}Y-M1`xoitgub}cZLJ&VbyFNUs>l50oZB z=@ml)Y5=bF{{aG^J^u_051<#j!0!K(W{`qiF#|P$fx+ZA1cO5Yy8r*cUj~K)yo_M% zAjiPqA_v(+0oo`IsxKV=F)%prF@iDZ4jT{#^@Tz83JAmY{)1@HHe(P5iGwg`|9`-H z1_l@g-M0e5AUO~wX8%8m`-B)69E2eE6ocXlWCrs3e~sPpNmuj!Jz37$cJbh@-5UP0 zA9JZPFo4fu1-0!!*wLW@bU~F+Mq3wa0UIMr=e`c38A}?tuL`I$2JrBJwoZc8g8~h- z*95fRQVzs{VtEG0J?Bs^xOEG%1GH%wwBr{h4x&N#6>EVQ3=9m=>v9=Dg^eKt0|RI? zv7x)lM{cZ8xjk`S$Fgswc-{`5RQPzrOsQ z@1p7SgHD%uGgFqWG;i$vyRwV3ATlzl<6x7yvShD&@8yGP;nyvnz1h@1SuF8DPVT8? zDm*`I3x9bBJa*%&$~-@*drrjln}rcFGwyaB0G)mCbW+K|H7`uSM`?$<%*B!n+p3OWu8b@{ z{UG(QdzL_AAoYnL1{8zB4|GNYlnZvB1&jkti?I7_K*AvXpnG2w?lCZcZvO+F8L<^~ z$CUvC!y6U`1`wZ{nSnvzF#|&eIQ+O7Kz9jEI1jpG5+a|-$iR@W6LQB5NIfWmkAN<{ z0;}f%--Xif7}CE1$**E$U~t&az~C(a(Z3vIpC06%ACUY+P#yY^fuRkopBsGF%YuiH z``|(H`pgUr1y2|l^r7;g`)3Z^V_*Q?^8}LL!NkB|@Bnh>6NnGG>m}e30|O|3g7}{p z85ky9hTM|_;-3cDXNvG&EE5C6hFc8aYxF?!pnYZxDvaR67X%r^!1o3vTw`F^%Ls9Q zGsr)C85lr!^?}rb?v>iGn}MMRD$fAA|NRjILm||?v7qz_YG8xUd=O^<-G8*a9AB;Kj^Nn21^D8(4IGtJm_wj36B{V zKzEUW_+cpai9zn$+RwmX1$7UoZO?FxfdP~cKItMln>> zvA8%hJr5)f6LBs|O)N=uNlngANeuy=Dgcp4E=o2w0`tK-i~LG+AreW&o_U!i;b6Cc zT$7xiTTql*T~{Zx)I5f?)S{yNBB)ZZFf!XYC%-t= z%!DB=EvK|N149NX5R{sj0yZo@KDnf_AT>TI9^|p&l9c??5{9&te2_)OB`KMC3~9+A z6B*J#LS`mN`oT6K@fp(6Q%jN=O7p-}T2X2u%-0~>+*3GgVHY~x#BsjCaKB@q{)y0c1Vpef~98yXM>KefvG?eh0BB5 zCZHX%Obj5%%)r9H%)km}gDNm424*N5BnxRJvNIr`c|#pG8w2QGEZ8`laAqbi0|Prl z6{yZ)U|=Yb%;W^w-2&x9&emaNm;mLAfYq}w%z^R+!F*Iq&( z22i{32$X&Rr5X4j;w(^_14{EiX#prL0;MIOv<#G1fYK^ZS_4Y!KxqRgZ33k&ptKE? ze!14N55 zFz|qAaRvq#entj%DFy})5DmJ&4n(ssFa&^TWd?>25Y5WK5CNju7#LzeG&=)B0*H2C zU`PScG7JnEAXK(r|X!wwKF#K5ozL@O{b901XZ3=Bs=v<3si2@q|;z;FgcYceog z0MQ~03|Bz34gQ~FfcHH z&sGB6bcs0rhT7*V{a*}fRcC;jgD)3=I}&{|6Mp+ooyGHiaSzCRP@nwe zgTEmEgS?snI!^B;=q#WAi>H9(1sE9^ULF9;gS?&ry3+OKhQI&+tFSRJG@SeYKZcEg zVZ-_V|Cg{aFnl=w|NjX#1_p-*|NjTDGca6u@c(}YD9=9n|Njm<1B1hp|Nl)m7#KD@ z`~QCd2Lpq^^Z);ka4;}jc=7+g3?~Ca!t4M46F`&7Z~p(E!^yyK;oblL99#?x1@Hg= zm*HYyc<|x>{}?U?hJa81|IY!5fBOG_1L$Cd&;S2l;bLG=`27F>3oZr*htL22|KVa_ zIPm%Ze+6y^27@pE{|9h0FgSeq|38JBfkENx|NnEi85sP({{O#$n}H$W>;L~pxEUBg zeRoiwg%QU&NPA@d|6c&Ada#^>1WJ7%{6q2o|5qSCfbU%c-`j?`yU?BQfH?C)PA)zX zN3?4OT|wtUfKoIl*1pL7{|~-57GVbBPB}+D3FcfzOcOxk*Pt^k7#J8*wEzD<2I|Nm z^dq}rf-3U_E-Y?vgSi2e2tL^S{|~ws6?9%xD-+ls2siliB`|xy?$$%T*v^p~R8NBD z@|W2C{|_4T1%)RlTtM?rbL{^A2le?NW}@BW=gxOPlX))-7I!&<+y%=03m6#~Je>dk z2jwJ)8EEbT-3=Ly88o19y~D`BP~-gnKd4WEOD}T>_HYIHNd|NusSCnSAomzBF)++< z`TrkuUoDcE;5!|CL3c7TZ(`&^i)fH%K<4EzF)-M;{r?Z@Q^CRrbZ@GM+yDQdei6hx zj4-;u$~*^W7=gn12onRtm+AligZgeb%s9Zvd{Y8fID^8LgPDP$VgLXCp!<#?W+3jG zgx()0!E_0W3GUpXSVgO_h&pkD?;a{)W?(2e@c%#fP(1J*d;WY1A&{fNKsC%1W(J0q z1OFj+NW$bpA@ZPj-NMYkFy+Ai{}!OZH$-{|r&aL1nEreY%sk9k9N@?eD&fC?^dI^E zAAElT$mSzIzsLt^@1C<7NQWh)Y-)7>*qO{~uINpqQ(` zl*I+PJrktbh1&&U3CLJbO?ZcefkEcP|No#qF-TuKlMf#c^bS`SJ_V-pTzmqKhxvG5 zx3Ri_EEjM?5dqckDy$3)EGPf}w*nn2aUgg z>}q8~OUG_}6BwDou?8Nq4?EVlVqU<8RXtM-7oUhTW+nrL)df}th8H*f{|D7{Aa}sy zK!K?kDXg54!wS?2-~iQOH~;?!jW>YwVJZI%^02tlnY#{)s2ez)f$GVcTmS!q#$a%m z=>Wcf7QJS0&Z9fU=- z6E`UC71$XVIPU%b4;se-`2lp!p8=BtBr`HV?nHHAXJBx-_y0d=>da}_yac{i6;xh7U}s?X@$mnDP@@fG z1~fhR^C{FplLIKXxPvpHBQ!ySF0%!di834v3^9-X{|AjZf%IbWmjhD{mbB>19Rc;N z^D#aiXZT&OpmYoJEV8HzbS#U5f#JZD|NlYbrJ!sED(B{KFfjN${r?{{28qM|21cgq zP^*yZWG8Nr{yQ8D3^mXG{|DVuk6Zs{Ec)HRbvmehw&wZ&|DZWCkefj1!GM#2VaN0T z|3TxZAT!%R?F49<;?HLQ9+wN@WMEKv@&7+)Y!svqRQF|YGB6mt`2Qa?-Ut!{nN`Ed zz+m&@|9{XJCde#E+KS?WBrZp8P;X%YCj-Nb7l`^F9)AW*{zwrBs$#)*U*Ke5xbfou ze^7G_WDlrJc*4oRaOK7S|Ddr;kUgkwb^sM8DCHpN{%4SzLG90)m;e8R#)Ls;fy4~B z7#OC%M6?M&dvjg57#OC!{6BjCD=3gg@t_TX1DCSC7hHnONn>;5gR|M-Id5!oAhEqG zvcDf#k^TMritO*VS7d*Gx+44ghZWi18CPb1=USQlU2+UXFul< zWS{*mX2{wMP#y&ht67}S{toK4f%+w&J|3uR1S)$R&Or9rN1TT2vj=saL2Fe(<8Pq6 z4Du)FzDkf=LHAXH`j(*kDnWeEIeTfRAp7h=dO&K4!47;N-4K-*K4gLKoCMvYwqRj4 z_+ClSeUhL%AurTsf1l8w{e8o%Z16pgpgSHFCS-%}cTA|v2H)ohx_8Z?Hv7B5H%L5A z@Xr1Yx}y<%KjXCQ?;EPKzi*hB{e8jDEb#q_4L`FW_e|Djf4}f9>-&Vs+20xJv%eqs zngzb&FkxCY_};>R+1cL@EX)SqF9>oe=srP)2icG_0iHn91?=8Hkb+S>8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiSCLtwk?L6$u0CeE8`&b)WZScJ2)kBV>d zZIfaRaF^ThmP3vI!%3xU*Sho*PkU>p%;qt@+;-NGYeApQ-o5@71-Au#jvu?=A@^Xi z>&m}Dj%(J6#!GLw5`Ade^sv(Iu%HuWl3DfIH}aP8&Q2B-h)Nf6kgZ%Cd#ARldVay# zw78N7+mvU7uYNSAuXo`@%LxfnZ4Rh+ci(;1AM|@^)6-`uZ4uGh``){~+GUooa(iQK z#^x4X{k6sh?^eDNTe~EdJ7>X!T%#-M1)nec3)^tl)4TAdkF?qG-)!FxD=BO_H`TWE zltzQqr}=Y#e{zkJ>Wm6)7ClIzP8hsG`ANY~eBGy@S{ciK)IHKdCF4oG1rzPA8PBxhB zdqp?Olb2i4WtZ3uhv~!raYJ3@*ser^hu|h*-Ja??{BTMH+=3X zEBqcBVD#&e@8^H6Fd3pPe0Lt#(b6dE)6S>>h8Y zbN&Ai#`kN1pn&h*3nEiyPnJ|}3zFpv)Bm{B``y=s+_gWh7v%i8q@evM)%Ml1J<=;* zbF*c<-?m%*I^(iumv1yIy_Y{XUs`VN2K zvdQMpb_W^T&lR-mXt-e2dtthY)!8tG$FD_oL%v*}Y3YtXh!rrMOM~=aJdZ{&N1^ z(YfzIWpDa1tA-1=f45xi-ZLv{TJ5~u8|)_Yto=WIqrissY`lf5?`s<^%P{-AC^v1( zo?F$WJD6k5wr+9wzA>ALf#CuZ0|RJp-$O3uy zFhcgSfX0+BGBPk|Gcz!N?!-)GW?)#%#K4fu#K5o0i_|3?` z06OyG5hDXbBLf42I>;?d3}AQVGchnsV_;x-$H2e<+6Pn3$iT3MiGd-PnSr5@31WUT z69Ypg0|NtS+iW}&0|N&W1H%$#28QcQ3=E*PCtE@47#SGWF)%Q+L;Y370P(L769dC8 zMh1pZW(J1sObiS^86a!_nVA?EdYKs*6qy(p_A@asOlM|b$YO@9<1Yf;$H>UQ5X8j5 zkix{k(8$EVpvcU?aEF0`VG(FQ4>JS94Q2)gUnT|yMkWS^_lyh-^2`hj3mF&~Vwe~h z_AxUsh=TkFI`4v!fuRW+mJv)041CNC40VhQ3?WPm4D%Qn7*;bdFt9K&Fo4!1tzu$e zc*@AY(9g`k0NP`f#K6Fy$;800n1O*IiIIU}783)*Qf3B*6(IjGLhMLmW?%r_sRN3` z+l&khyBHW4K>I>L;ULMxz_5;qfdOPMXffMWMg|7ZdIctCh=2DnFff!dGBBtyGBB7i zGcaf{GccS3-4n~ez_6Z~fk7IyR)vv)p`MX};VdHq187_QHzo!KcV-5La%KjG(@YEu z&I}9;SxgZ3o?&2Mn8wV&0NMk=$qWe#&^n&&%nacD7*0$K440S~7(nL$s4z1yfL8U* zWMp7C$;7|_I%l_si2=NJ_Y^Y&!+u5v20KQ`J_S(P1+5JOt>P18W?%sA=>es6&|Zl+ zMh1p%1_p*$Xc&R+_A_B-VCZ3HU`S+QU|?ZpV3-Bky8!Y#69WTiks!$aA|?igGA0Iw zXP|Vz#J~VL+Ts@zWM2s=tp_qNFwAFWU;wETWoBRi-Q_wPw9lW3fngOh0|RJ_hbc1y zgC7F}LpUP?!+Hh=2GA~I~x?@O~k%8ekGXq0CG@XFdgVz4kF)%PhGBYsj zVP;@RV`N|e<#`t-1_sc|!-q_ew6_#K4fv$iVP`nSnu*nStRs z69WTiVdObx2Jkv(P&#_U1lcDDiucz{3=B<73=G>CAo&sGuLwp4231gc2BjU)o=i}h zV`5;?1Nny$l1D)Kqmh|`VK*}a!we<{hO5jB44q7neJ~)qPBStv)Pn9KWnf^~$jHC| z+NT9dt2~Sh4Dm>C!t(xBxFNG)g&94IY*Vq#!WV`gCZ!NkDumXU#BG9v@Sd`1R_ zE>IXUF)-|5Vqnfnhll1H)%fT85TgpbMKoXHnZQF))DEf`Q6SkUK$Z7eMJ2WG`s_ z!E^=&hLem833v9`+^D?85lr$4V3@iF+s{@(7Yk2JQibS z0NtL7SW_!Je6cL79nx z0krQ5v^VJ-D6KIvFo5a{P~3pRdnywH11RrYU}j*r&&M0eMzza@*!L`9NUd!A6+Jy;m6ZBQ-yEIyw_pBoG4HpGpv$E`XSm`~x zWPW9cqREuSAs0jPoNn+<=qmP0;kKWrE%40AammADhkhH2B+c2&*V%8OQFqGt>8YgM zf!nscEZny6yhZXR^9gQ`B`R#T2XF?hyjrNQbVH7L*||Mt`O`lvN!*df%%$t!^}9vy zr-C6*^<`s+453@AGENjX&V6z5@U`Hd6_=t`UuwEib^4WamVCh*<=@e^Pdk`6wkCQN8ck_YZ|rkM?&{7i?iXD9@xVPN zNmKQUiYD<*l3X`>mK5$ft|a!nv0a?O+w=Xwd*T~Di`&(h+k2jHTwiIVD)l^ppT{L! zQABskAFagjBE$R1p?*tDX79Pld-&$6<%XB+qdFSdpLUDM<*TYaSs-q5Ij1* z-Yxm7Tu%RgV6u3ey0seH!6e%ZaJ7~i^PohZG0NHEy$#Q)?$*!xy?-Hzppg^ax0wa$3MH4vrQkKupIDF z2>sz%Fel<(?+zu?tlmj>MJBDw%iOJx&z*jEG2h=r35KSipI@3gcKWC=&SEJ`yQnko zpf%Tnqfh6!S-5Q5$KUH$Q@XwR+@v$F|J5IRE%x`f>gJ9kt;%grnWpin-88ruF#GF* zF7t*jPX$|W?f*Ye4yo5=K7daD0I?MqKxZys+y8%H8ao3Bvx3S|=>C6&CF~3^yhMh9 zVUGf6cNKUeD+8$5aoNGn0K=g5nIKHc{(q5^Yz#2WBgMb~!l3meAWY2uf0)}q^aE)I z1`r161+D4;(V+Dupfx9;`~TjYn!aCQx#zBpzx>(PNXrMgR`&{n_U41yQlPadpmk{t z0!|DZ9Ri%33M~T690Cj+PRz-yj0^${TntPd3ltbR3`88*SsHxKDlv)(9AMxP=wT4@ zIMvkspu(Zq;g}YLe9bx0c{qzwaV=X8TS#K6GN%gDe0>RW-r8D!=pMh5Wy+8Lm>J|m<( z0qP?xWMp7i1nr+G$@yNoDOqyFv0qcsXWfrWj+YtTzbfzl9aO>Yw%9QCZP&@`BCjsL z=SyTtTBco~{$%dv`A+xG?)sGgR-nXbdHEnkx4_{aG`Oo=Kn)Bvrv#)3TCoW?7eWNf!hS~OP7U+BdB}Osc&%P?!d7kU~v{qctUg)yd zK;&ks+A{ZImY=KA-p;u5=8UuJ)i>Mp*Y(}M*>v3D*uEp(_r=oR&7W9o)x2eSb-dex zmG0TapmPUKeDYa2Bk0SS_s7=Sg2D+I7lIN7Q~hw ztc1h|wOgQE@cw%v&>|_Q0LXlCaE5{ifcQ?J3K+r#t8WHvs6gWPpqak~l!%e!dC}xA zf);5Z$zKO8s6yf&Me~mdY|$vFkHY}zzd)6P-NOS~1O^oVxi=8aKdxxu^#PhTL0UlS z#RJFCMno3o3sQO}-malz|Na*~f*Z{uY{l`H>ccfz-F5 zxvv|vX9;W?X#YC{gCJV?$)JS?xSffl-WXJPAn|L_?6W~LZ!=o>%|r{Ib!hR66ujW` zCZeHsfhYwA28PpU>G?WnaUMt#8h&1A{sWyK0F?&EH>fX)%$GuQj|!T37trEwF-$Ym zzEf!atppXoP&J_NpNkfr)@bn|j23^l(EO)~rXMuE12rD(A0{;SPewD}4UM0S7CtM` z^5a~z{JI)Veqm=UP~QsKebQ+5f%-Ve@-xxQUkBT`1r6VWXz9%pEq{JNi!V@r z7ukI9;!CIiC_Wyb#n%Ef_kBQ%4|%lm&=^hqAvF7MqlJ$lTKqgkOHajU;hhg^P(a-a zaw=$S0?Gx)_Ybu4Y#T@sQ~}6;PH5&gpruF97$sCW*t{CF@D4*Oe{|8(M>iUO1)BY! zJrl_0m!jqG{b>4iko*gBe>{kQ8USLRK}%m7(dw68s9F#OQa=r?yxfCkK2mUl%NJd= z^yiKi-;!wI*M=6~=Rp=jG06UAH2XngwNPnrc&|lE&k<<(+ZHW-&qhmc;JqzS13~tQ zAbAMHe}|UdrlPs`1zLQA`r%OHz~QkU&A&&`+}DMc{&bNFY>@qBXzr~*E6-BV(!&BY z^ERW|KMgJZv(VK0qJ{SZwDdm}<~eA2qK%ebk?$A>xxWQXzdTxaeMbuqAGGk+Kr25c zqw#yt><5iw!JG)PUk5F|WYO~DOEkU}T6jK3OApu3($i10`1y=hUV+AvVeSDr)e_CW z)6v4i2~B@GT6}@#1YqWY{1=9n-zK1$Z-bU!RnW|zgp@x)?u$l?uk~o*w;M@4$bKcX z{O5z_p9GMhPzQt5gT}g`TyXwfjTWD~(83=yH-W4^6)k;ep~cS|wD!|$H2=&%OYfk5 z6|(uKU}g09hQJt%$>XWOdlg2l*S+90bktBCADbYs(aU-;kU8{lUWA z?;BR;erIUQ{r({^_j^KM?stdY-0vF#A-JJ17wq>3{ty~8M+9mi@vK^6n)pUDEh8%QS?27yXd>IMbUS2i=ywg7DeA3EsDOoSQLGCwZnvncvL*`nzC42z=g^DT|_qmou-E6eLodj^!;3H(f6L%qVJbt zi@x8AE&Bc>w&?rY*rM-WVvD~2jV=1#5nJ?~C9dc@M_kc&p17j#0&zv(MdFISOT z$ZsGfE}T_V^u6F_{&xrUg6|1h1z__Js1|$=P%ZerLABt!!OeUy2I)_@ng4wQR1K)< z4jO|5o!$kK!-eya%y)q5g_&QVjcLAsHpC4e^FeV%$b3*9)dsEKf;!+pM8WrjfP(KE zd?Dr-HWhsrh$#3TkXi73K>$RoA-&+cf^Wh1hRA~N4}2gPs-5A3H$=@tP(o5*U_csT zfhj?u>(t3JzaL}@=v+P!jR)&>7JUc#4}?LHlTcdlU7@JpyFv-XokpES-#3&Ld{?M0 z_`aYJB6gvo;Cn-H!FPd@g6|H+5Dc>-p$MYpG01-n3=H6O0+Yl-Taamf9>^>Q2Jjj( z5EB;$m79Ky3=FTK>m)8rDEMB`S@3;955%1lx{AIlOepy7Fu&mYgIe=7Y&-xq8y_#Uve;QNFv5Vt8n zX_%WEHbcZg{0Ey0zCYMs@LdbkIAH+Qz#viFcx`{t_pSX!-w*c}eZSaW^!;gn(f42d zMcq z093pNv^ENQZaumhWPYkTdFF%WK?${;K=xdo2=Ui~``FzJQiBb#((;AioQz~6nzhySM)t&UeWimc}3ql<`sRPGOy_Sig`ufH_t2jeso^Z z_p9@YzTcQz^!@p~qVJh=i@yJvSM*(Qe$jWe`9iI?AC(bYW zK4*T>_f7MQzMq<3^!>s7qVGTE7k%ejQ1o4GLD6@c1x4RO78HF?Ur_WtdqL56!*xa9 z>lPG!F9g}WxafP&f}-#J3yQu^Ur_XY)`Ft%ixw1pU%#N}d!$9t_w5UczVkE{ec!*J z==&$BqVLBS6n#Ixpy>PE1x4RoEsDNBTTt}0Ec(v1u;{zk!lLi; z3yZ#MEiC%p=U?>Qcwy0Zn}tQ+-4+&o_g`4_Jz` z6@AxTRP^0tQPFqrMMd9}78QNZTvYVEVNucd_C-bC=PiPyCFGQ_Vr9|y4@(O{MK6QF z0tnr(r0{#e*23=xRu_IZSOUQ?Jrkg6pkvdZBm7`eSn0KtnGZ^SSj~kACao>{&iJ2! zL3bU5HeFZro#{UVgZ;Xq@67)h7@XG?eP{X4z~H;C=sVkg28O_OMc>)~GcZJg#6fE! zH$c+=xebssp1H2*J80Oi6r`VlfuRMYkAZ< zzkdu2yVn(cmj#`RxUT3s=-z~z>x#aE&JcONuIM{x?ee#EMc+Z|=2+JkeFu%h%dRi_ z4qE?by1wW;Xg#R!`l9ckdk`LODEbaM`{(nR}eP=wtz)-oq=sVK^28Idi zi@q}-U|?9XzUVv40S1QM>x;g#9$;X&w7%#&+W`iK=j)5Uvman!_`kmBJI4VA29XU# z-#HI3FzA5%cYuMxWkb<-?gI=AVH=9R^BiDcNZ(NOofl;OhNAC$2N)RoHWYp5Kfu7S zctg>5fddQ-n>G}E7d*hgaAHHzccB9e47WEFeHT8!!0>TH(RYyp3=HfWi@u8m#-i`y2N)QfHWq!CIKaRVv9aj8*K97NcVduu8 z@1S+(Pqr6**FM0&z_O$0yY2x7hN~NkzUv=gVEDYT=({24v{PsT0rfx8`_E7*ycDSa z2`UruDq>(@0QEn~F(1_bB*y%Nsm0$JrWSu!m{$D#z|`XJ3#J!;e=x21`+|AJ-yP-^ ze@~cF{Qbeq;_nM)6@Pb_Rs6kScJX(G*~Q-z<`jQtm{a`yz{2A12@8wAJIpQq{$Nh= z_XTr{zcb87jER8SkL0)?)P5w!{h;X2F@rpm)`8NNP}&7b2SVu>D4h+Z%b|1=lDE(^J<)Jqm}Z_^?#sg8&E|Enx0Wv z!VW&q6vPLgP4zJw+lQ|WIktu+iLxCsAp4MSy>DoL&$)hKMb1s0*%20xaNEZ zv40rmdE_r$D7{*zWw~xkoWDI0I%G4gVO8Y zKD_4sUQqYw8^dJT?+={wzdJ~Ad`}4b`R&7j$KO6Y=l^cNxc8gFha2AtW{7?l2x9)e z;PbC<8)!-=OTI6Nzwu2V;ODmoVgJ7!(Ea&M z!0N}h1g`(z9KP)SCa_1~dxPP_Zw%r8za`xL_wB&>U*8IhFMmt$xdGZPz;I#0^=}GS zets+PX8Z0iiSN6BL*93Xoj<=d*xdZ~;Vu973l})QPXM_)i23^knLXbeJ_vlD;Qiy< z1Gc^2HUw~f|M23+HvulW?*RgG-vh4v{Pw~A=eLBaZ{G~`e|%ez^X=P%7yREB2+Dm| z(Ea(1A)DZPc>Uwsf{_2;E*Sjyb|LHMH-k+~-w){j_*PJQ{o8^|Kfg7c7Wlpa6h?1;eVf1~ z_x(Zv^LK^JlJ5ts*uF2g$@P7~_Pp;0et!K{@axyN0_7*)4scd}e~?x3U7&#Z`-kmJ z-!C{F_-0^#^IO7h!S4s!zI{tD-~CO%;On;s^ZC9TEdTjUz&ii?2gL*544&NhCXm7Q zeZ!w0-wX^nz6TiJ|7LLG>$eR%OTJIwk^A28mjC;P<$U1t!VJ3peQS8m_Pt@J?Dq>! zKfeih7JT1uYtJ_YalY>lynlRK5cTuhhTH$XfzCPmP<;KHLjS*S4qe~A3B=}o59q!A z?SS?DZw=0Q-!B+F{5HX};JZP>&uEkJtr zHwV+p-#$G4`mJH1?Dq+7H@_LIe)R3Y_lMsO9RB&Ofbaje4~)OR9kBlSEx{uH`+;eX zzio)l`<~D(`29isrEeE1pL{demh)X9{QtKDl5*ca{JQ?_fiBDU1cR^N4tQ~XHz;BI z-f;Hkw*~U|za0pD@NI+JlWzx1^1m0vJ^uEf`qH06@?ZSkA-x_3ge+%F^@U0>E=eGrIkG})$?{{rSz|Cj8y{`_W;1l-xi$v_3eW8*KZfX z{(qY=iSPS{T|d7GR9*TO5cdDuf;ar%4UXLZCh+XXw+q~I-yfXa^DQ9r+qZ;`qTdS| z9)0^zbp2bxDS__-;s3ua2>bu-!e!3y22(}9FA$ddZZJLndxO)>Zvm$TzJEyl_RT^3 z;Wvd1qTdf}&HK&}`0d+)LbmS*if?{Pc)|buLdVZ<25yhPHCX-pR&bH~yTO&O-yE19 zf14ot^IO0lmhS=D%-Xc+US_;oQ$}4l#M(5BT2yrobon{lJ$W z-xf>~{eB?q|F;ie|G$CG^-FmB_1l6d=Iy-t19H|MND~eW8phK$DEiKz&CXzCQ1pFnGtwdf&{_1;5p7vyBS7u~nGbR!$Xy^e zFn~{MMOMYY02;=$rQ-=JgA=sGV}j`a9#Ny)y7fYXb6mk zz-S0CFkEDxl_Sh=#P;FkwfOZL7B6Dqx}xx1;9t`RALrxulEwZAgrC=yX}*6@ylJO+ z&D!`DnYzEZyX@2__p_KhbBpD4en&yyBz6E9ajZ2Rp|s;Cb4{|7#56^BpG zJ$U8srvF6=%YUBfKdf=|sP6oZo*-MHH(yVe=xz^t^EK!D!OmuNmq2mxX_w6>9A41e z_{l5GQ+c=Or+s&q7*2g%UtcBiX#a^x{yk@QO|0$N@@!#h*3sumDmm(`AO4FdMaRp; zAJE?=q_028bkicwh4JZ@+X~;Toy%VSdef=gxl{XRn{7^csr!0)+54X91}ygP)=Pv< z)%8)>rCyk1xz}&+$BxQtTYj+KQS-iW(_U|%=$tKO*HvYG%j=?YE+}uQId^G&$G%&l zj)xy?`|-g$qWqAJ&+}EYGd^Ex)i)4}dTk$nE#;I%TkGc)l|};9QYi-f^J}E9iwFf> zSy!o%xz0Ra;Qpghg{$frIy0STTfWO)#E>i5y)x<0GtpXa>^{ zYx7V0)G8WmqnmQYZO-URl}Jxa2cS z6rNms_NnIRzE+RdOI}C*nEGLba?)wLJJ*=B&N<8E>B}BTF;cM7XgsG}Z8teBhw(*o zz43HLriDU_nrEEp`lNi=W5yHnnRirP7{A<*fBjhMLZJ=4_3OG!f3W`9<({%&!L9`Y z4|^rjci#_Ym%4ayed&|zWzQwf-~GAKOxXW*J!@`o(rnQcN3Y4AP4R4Ga@U!t+B&CN z_V%4sOC!3tQ};j6H%m1V*5Y6M()z>wcN;&5+85dUZb>~|=og$*#i^~@cx~pg`$Cu4 zxgz)PI2+etF6bu0_Rebm)lQ$>1^*|@9k6goI_{IFR%|uzD-W|vkw@iJu3KJ?FC_{D zZTJ>UyI&m?{Lx$c3RC~%9p^G4R6bpQBzYj?Y|D@JrfpY$GgWGr$6szaD9^I@wNp;z zzP8qoQ^~so3KQ>rTDPlo>xBwuKXWDLl@snZiny=1XnlnLzrc@a3%fF`RCKnB%b#^M zs5JRmc5|YmL(|Q5w;k*k3#7R&xIa-?p}y(0^{{8M`4OzCo7)q80-RU`SGIS-h3{adQt@N0|k##wBS zYS+*4HNE6sRj~Th{g?$!%hlxcr>yOGu~q58D))%Z6?_ZsT;?cI4BhuOooP`;?Aaw3 zmc%VH4+(1i>7w?NsqGho0;@@0O>*3JJ?f_ekPz;bSW< z8pu^!abB7#G0FeV;UycVS&9o)?!COdqbc>(=DI7by*sw!Jdh=}K!73i^Jq`-P3B<@bTqcSLmL$D15T`=DNm;s(I%X^o|@dOjCczo&3Pw<*?I~R|?GzT)nbB zNr~rl>Rz_mFNjLNQXpF@@5d~#;zjQ}2BYNCtj%+*BzAGjok=n|wk74$&)I3eugg9V zou0eOSl%-(!g;|7&IZl>H>y_HE;?;6mr16rRPpGfU0MoOiu=3r>)wVg_BR(`xEi05 z<#u3Ga+Jx(km}FjB57wHZDO5rv2^{*8}fgyFS~Z+%*D+MUsx^)v3RuVTFBb(4X3hK zh&TV^{bD!y54zu*|r7V&0?`yZXF0g}ixno3-GN?}xQ)!GWnGI9z98ba@5*e)=?lXCpD^F@z%buo zr(|^co8woyT%X*u{9e5{_Q+1DQU*b`?H#`>C)O|BtN~F8g`D(B)n?V^&YG=I6L6Q`5{(eC^@9SsOR|jN`zkcqM~acQG0@i&*smg7Y|e=gPsIV{_nQv)%T$N z0UAl~vY4B%?z`ZUXK^EV!du24^@g8H19v>F?=_fHy!HXhPoEoK@5lFiIaxf_w|M%I z`7(34&Psay-7)jmnv%PbD0A7?*%c0&70YtKc=m$Q#+v30!NC?cW9a3?#pvg3~Y{E5t23o9 zBMx>6-D|mLd6-H+1g4wHGWb^?68p*1zfo@2G4biwe~KTMT`=jG?031$Z!*EVwVfVq zocm=Pw@XGrHrrPBGL2T3LSH!&>^Qr^;b{h+>7=Uuz@PrG~P$=z@A^tx3g zB($^b+B}mxY_hdA8c(^-E_kpo!k?$%^)BUzj|+Ft=kM?ETQ~j3nH8GHgPDvNXXdJV z&3&|Q$@7_K9<&>99+_M9`H!&Pu^hqKH!t;fUX+{2q13cx>BUoD`O+Kk51ldO1NPQH2dU5}yUoWHYwDl@*& zWiMXw%AoxbnioY!?_ z^BVQ175UC70szeiWbiXEWXMDC76t}} zJq)P(|B>ZE>*_!lwC(}auLoh!nN%zcKr{Lo45WojSGiDECs!(21a9n!w=zQp*lHSBpV` zflYyd!9k#u(PIG<3&I5J>kU{C|^zv5(Y1f7G!!oZ-8#7|&@ zteFyG-~_7&-JJ!R*8uS~LF*LRAbXWTe2^PK@oW#(54u-p0~-SaXw4i*9yC9Zz{0>F zizM&B%D?~`e*wvZ&X0mQP>|u{f6!T18(0_^f}!d`H*0QSWq{tN&dC58S^B`rzyMmC z2h!gT)64+6FZ|KEYr<0?n zf4qU7Ap@KV3J<0RW(E)j-%;FvxT~0%ff;^B@x-cf@ST&O^$4J|vq0Vgg)I{UBSWFV zBUVsa0?EO`3nT|JuLLRwQV$9X(3}uV4UYl?13NDRg8+zTVPFse(X0#%5+EA1fC8k6 zfq{YA_rV6g0IiZ}Jp4+UfuZ>gN4JZLKzE3WNb7+*+2%JK$3aty3_$@ervCr`zxjv& z_+Huxy(MZ4J6`?&|Nr&-ZW)!sX%i4|Lhy^1|NsAQJUk0*p2+_a6`2 zSs?MhLx=U0vx@%N)I%8CLx?@yi&Ng(%sPHr&5r~UFoHil&1t-`syQGlAOQH2Z ziE3koz(N78g{3mBmr5kMxmr(_3Uzz2w4N;G?)KoZ^x!B_?k!_ze!~+4@+u4myr_aY z@dyXV+lB{Te}#A*LWb`EUH#e}q9V}kqr%f&qr%bt`)ot|Z;)F+D#CYwP94N2|CND( z0lQv^e$Y@ernw+F5DtDJ`41GIrzAoC)#-InVF~zOqGAKWFZ%z2QiVnI;odTa-aVjV zi6QvK%fBG?v%u;lx?NOMS`U?ZV76aI%RG3MI z2VOtv1sy2I(7PX$e+$svo&Wy-2c5ep^8f$;0?-+G|Ns97ojI8D z|Ns9TObiTL{{R2~0d$rj$Wx$okZ5<+g6>HJrRjn{|Nn!^XV4vI%}joL0{(mw?tC(i zdMD)(>55E_^C3 zd>Sr%I*uUc!voZr8&vm!&e)sq2YTln*p7(fd@KwMAUROnPr)H~1$189pa1_s^&H5) zcBT-xKG2ybbN>AQ4_XTVkqZFJf&2tI!*0Q!|44VJ`tg~#@>#g>*|>m00umdbwip8g zD2*-o^Z!5Sj7^X^AU`R@fc@dbXX3!^Z!4njz`ny!e`=w zrq30u4-~|scr*k?Ltr!nMnizS5CCoE2lWlWYswfQ`+`920Z^Y8RL_9=iIW&m*OY+{ z5dk&0L3K2!4*^<723k`FIt%pA|Nr@*^HKl){|`EDmI1U@Ob*mxCDD1K{eK1q(AWbA zgW64?z8Q!Hg*PZTNBjSy{r}Pa|7ibzwEv$59@ZJ{|Bv?nVg1I@{y+AyfzkdyiH*=v z<)a}m8UmvsFpNV0rT>4h7`&&f=TI?tPuZM<#o#?<82$eTkUeD>{r|(o-?8@p4`W}e zk1tq3bMyt*D!wyhR(-#AxcK|C!^Pjf9WMUPb_8KozMi3;fu14!Zjg#idAo7m4Z^;f zsQ~S6klA`V0ZUW#YG)U%*v_5jGv!IL!9tc_M?d5m6%c4*yoO`R)fJ5l=S1+jIS zo7Im^YPGza@W3eeVCzxIU*;C&FF$JCJ#DlYEZJb;B+S$*&wklAPuz~5^8~U8{yddz*R0$$ z**~e=@*7vl50jl0azdFsJx4zNDl9CNbr+B{&=t(zm1&~!Ej^$?`F+Ovr;k&Yr0CxA z-g|P2>GJQVo;>?l=@fj*+iP*c`sAcn4^}H5+SBOdF!#vn=g;@P(W^aoKGxCWaPp2{ z7e6Iw8!<@EUR=B1x0HWIL7i~Ssi!Il!rE^S<*80;6*|AQE!~B~>FkR=9p0CpKh#m) z`k-`T|F;a);%l7UySK=n68Q06-~U08*Q=@`qyBZL5C8DFzKi3*p(75v!~Zt_bG_#M zWm;Xdfa4FBx-E}OLhNNfM(pHS#$f+B=H>7A^_QX^#kNPEm^>pGjooS6%WedVD zxhWjmuBGjj{dsB!bA*1=y^;d;)zwxE3>Ia|C)QlvNoqw2gI;Pzd|FXrZfbl+N)dtwHYzbUGnqjz zJ--B^KB>4EY*;+_x}BWNylf!E>M>LqO|b zpnd|~D)UJzXfwHKtWft`T? zgh6*;f#g6Krmh<5HjukPWiV(x5^M|-rViu}(A+G@UXVJ_creI8pm|}C8W0AV2g0DU zyFuzf>SPoc7-R$(7(jfG8W0Al0nwm10+|P5gD^-Px_KaR(EWnQ>MR5p7(n-4f#g6K zCI_NHc7nt}_=OMy!v+uoib3*F<|s890;3@?8UmvsFd71*Aut*OqaiQ|LIBtN{{jif zI)w%_?h(Ss0K&-Y{~cl(860vU_z!5Yn=tD7e~mas28}!j z1|4z-!k{)dsGSPJu)Yk42Ce-EVURcogVz7Em@zWI@Ez#=!XP;iCT9IVvilAQF))BI zNH3_p3Zjwc|Gg{xp59z<+97-QYQue79)7u~uUw$Js6p%dKz$)le}scMM}&u&K}3;( z+jADfG=VvsEIxrO3=K96PKzdpcQZ3(7kqX-B;dr5!@#g&;e`1PQv_XA(~m6-VBiyA zYfumXnI*{pSt}1}kAwO&ilBQ~85kHqeg}oODg$KgKWH64XicUrNRWYn0d$@nhzaVG zfzG}Iop%R1+s+&$2)Z|zfq?Wg`R z6fiI_cr!3C_%bkn@16#&?+2~t1ogo{(qSNifq?K>`z`ziYHgSPMaHksoTh(iv;WBQ^ zyHf7Pw=z5OL%*-`xUr|XjFItfo1fv7jj<0B`4Y7%x&OLdQr#dQe;}*l={jMZvcgNc zvpKpsidJ0K`FV+fvEH)fI;TnCg4gSWbplUyE}vA!$oTe?){)PCJR9Ezs6Rfs{FI+k zMWahIAN$7R%TM_o@?c`ze)Zu;j%7LXG>!=CD3{!I0@3sKethPA_tT{dmSPU#DG5J5 zDy&u1pIi8WBeP7Q>UhW{nL-z{Uenkh<&}2)5e)pk^RFed)SO7`IQox&97uL}%o~rqfIm3T*W2AxX z>i4>$SvNl3aADiHbn(?o>#i~}`b-Vfo!FbMkj#u1g7ky(9au2~1Gt;piY6b7 z#z#Kd7Nj3^*D*{#h@Xk3ejOVB9U5N_&HbS;!=UZ~-SZ9;0+|oWe=t5MJV19z!}uWi zos0|&6UrGFKxZlnG4L=5fb2WVzyQi`AU-_b_q9Jb%fQeH)qjndfnmZ!1_n@EfaH&( z>A!-;f5^bV;9$wX@EociG#*oMj)B1t%KyT|z_8&A0|Thc0GYRnk%3`B9;7S*@j-WB zD=dYSS0H{DGXsOe6$S>-dUO!~DI)`eLL~zOA0uc#5)T9D9)$}?;Q_kuTVOr|!(OO; zY#{f&VPF8IT#)|jj0_A76$}jXq4J=6ybqjaV0a7Ve+Ats{uFY4IY_-83j;&LI|c?& z`3T}?GB7YKkYZr?#tgB4IVkc}7#Kj~WFYx!kbNLA=-woGP<&c5F!VspcLn*^mVx1! zAVfcCJT1Y7fx!sspK4|Xh6R^FCrCr&L3hPI2xMUR#RTEsW@2DiaGHSuboLy`z790| zyqFjmF3d;7Cof3;Edv9n3Q8{w-(z41g}Pq{6n{2|^vuh|!0@1ofk8tFV%|eE z{TD%ZtDjcWCmypz!r)VDN&5-zi2027?NOe_n&!cN&r2>{%EX9Nsf9+=ZI= zkC}l%;1vVIE2w@E(A^<#85mTdd~+5Ch6C>y7)qe(KZDG#VqgH(i6H+j1f}Pb3=E)i zLqUAd`J@LPGBAMR8N>&ThZ!hB?w<$o=YhiGDg%QcG&~fT7#IrXGB8Ym+6US@!eGw8 zU=5Xz29A%l`THCL1E{VC@kN;!7zE}rFoZ+h7tP4P@F0MJ0kjzjB!8Zn zf#Jae28Jb2c>zWS1_x^f26reQbO@4wH6p*UF*7hEJY`@w29;lc7T!vr^m!JMpQnQO zR~Q(sK-I5BQ@;-szb9d90eKieclkM-Wncic1wiim!^FU#@PUCr6zcy^3=9kgR*3j% z1i3eqfkBBCl0HCp4Nr(>U||P5)bz~alGLIQU+0|syws4yq?}ZU9Cn%bgbk^Wbc!{L;J>m;{UtNGwXsEr#)25ehu>GE0o&VG zq*o>9iqUVeN|esUrxfio1BfHdSov?PKwq^Fi7 zGo)96sCb6-s?t0V3nEYq$|%VhAjK(}MXAXp4Cz(nMVTd_kSHhxYbz)%DP~BoDuXzj zAwIqg=5DYj(yO2n=~ZbtrNtRw2bL5-(tA#3QZi`Muo=kfC5g$|AT9A}iJ9OX#Z@3F zLxw0HPp5c8JtI8>B&MDbGRFeJK@vC8Ge#2EGeK~Sk!6fgWlRyuO!bg#H$}G6T+fif z-N)0(Io=4)0+rt?Vhju%lmGt*m6f2ieHeT7{P_ZyD;T->M4S)v2{<0(<8eIB$KiOC zkHww4jtg^x9_Zd$&^%&|7z4wBDgXb2`j#Mbo0(kr1R|h&7M-|b_&A(F+Y7;We60{; zV7M~n|9?<@1yYN}4F*i5SS)kl&fybrLvt6TUiu@(zz{I?|9?>14c$y;HdH8xK>TK{T2^ z50E}kdrL%;fuUpe|No%A07zdmlRuwA0%Y?l$XpXi28I>0|NjTI6+!ZCOpbg!&CD)* z0u@|*JdTI?I2@1hv3PK&@bS1oIpB6sjwA!ahuQ!CgW9AZeb97)2tQCDRA7k{ckU7{ zNTfI;WiC+gfbWMnBFVr|G3Wn(P}>S*E^4?cFwN!S6L3ZfR~K%k5IzAnBoWA-RURn@ zhJd;M|AWT1K<0q88)kQva_RRj<BG4F*~z-xuhXfY0N1*jw`bfn&+{3HBx6 zv-=;olzeYER|39o1!T5@u-tdh{V56uIKG4KFj>G=@*Q+93FvNu2X=DbLH8agJSh48 zz@g;(f+Hp0LHCCU+$#D0U~kEHgRGM83A;+b_lFo{lzex%%>Ug%v*de2M#*>3-4r16 zL3b5^=}}@d1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtw;&fPxZaj0!ZC z0@_Q=AY1yq0V)Ps4+%OSxk0w{JA-oRcSc4A202Cs@LBGl00OUe&@VtcPMbCIGt=}TlI!U7G|iN)9~cejr2FJhg1vhtz}|W znlH6T{ZxkclifGAJianb{(jHB{r21U@z~tWP%UW8X-jc;6nh)_H|gZD314ncQ+qP= z&8^GH6|Rr9YnDHK^0}u>Kq27|zuULvJ_nXF9KNQxfBq>SS5Ltu78Plmo_77VU27s1 zHSrY3zLI9|vOmYB*p@bV=*dNU9NMBdhws(H_M<^vM}+TMg|6^@JY)S={$EFGmh4($ zSK?ZILaB#yD*KncTi<#7yT5ILWy!nLVgaLg&&03h9FgVopLor8Q27|fweaK5u1ntP zn_g|08Ph(=qW$#JsdD@O6*D~wi7<^gW3ogq@7NOaob@3${5vv!{kz=a9b3&=nS3f_ z;R&Y$sn^=@=$L=w z!o-Q6`8W07>{VftsQJF#Li(isq@}9Y!hZ{E&HGxG;A{6KMqaI8O2XSIZ=%;Pwyi!> z{_UgJ3*$qYttZ5V6{ktc%)EZqn@QI5e8`c+!ezEKicK}2Ma1{mcbu|bv|6?`Vf%tb zXLm1G_-|i*CtG$$boz4Mr7XYw>rclg7{(Xf5t7kc%lo3Q+xlACwk=twTTHA!cQNJu zoS~;tlWi07CpcQ>?X|u>H|af1EgF9me8To`Sp7Wq2k-nwtK;0Kzt_d=Z8%~5=bTLY zHC8jB_^rE|7loFcGk^TeW2^4MO%EG(2yWWn{b5grti(D!fh}Bm2fa@iDK|-Focnh^ zm*G}}+6E!_6vMdmKYb4#gmo-_xrwVgTe$wb-P`Y(n=U9!PF@yMBQyQg_Kl18tIQ1e zwtSm|vCpZUtXmi@H^`@~V+r0NJWF`jjeUidPJeS)cbu=TcaixLYEX1L-KsvTROgs< zd0x+q>IrQ1-={VoF?+N}d1kNk=|5F_8kP#&R%>3d>A|GKGaiQglYC_+m5}2W_PUer z(W27HayNILEaP4F?C~obiJ$z>zuei(W;jXmW15z9zu%9v$I0u~u&@Y~bjQu@yza3<{ekGE z#;~34cNR`DF|6ddeP`F^>D){1Sc)izon;I*JbijvZ{%+Ev}-ft+MjYTP-(y7yTBHS)-c7R8_P8 zXIk%)2M0Ph!x;8egR!|G;E(Wf8~ME0m$l{$GgExUCl&qAtJk=+l{klgb zgViMO`{WcBubAuaZ5A~5<-T3n73En`S=O#>me*rmeUFHKxj@|0u4~=Q;3uswAKsFa zop(3)|3cOc5BW`$*5=LGd*orOyz+}KFORq35-UDBKUvOj{VU(T>U*1olsSH-u020p z#VtquzWGMqx>K4{ig*5szgwI9+u`T)waa@&7iK(Vn8(%fkNxxJxZ}rc4GzEC)!h86 z=;_z$fW+ut{~c$$^?3!ljbGS*JG}S8nKkCp(Z8&OjpklsQ~m#YUT=ML#tyMN@1MUu z{MP55h0}YF%Fihpggd6DF(g4ael}FCde5epmqRgjt7K6>;6D1f;=sS zf$RmD2U_p=4|*O6Xg&ypL3>g_@*q1wG)Nt2&l+f7AINjfF2bj82=(!-EJ&vGxGZ0n=83e^3bs#3_jA)QMKUm!`SSs*6p{uz)u zkW~(!85ltL2xxN;ND{O+2}<`v{Q*+P0^NfN+J6a^2FEjqJr_yc14~8*5YCVS$v`m7 zzo30LptG?+;R>2R1ntX&$$?bD*qa$3ZBCFn(7d8cEF;`5WOblRLO}iisq@HXWbnYD z4s^K^OkF}QBSS(gBf|-hK~N0Z(*An}j_Mur+tA_H-d%mAqY*$EY9xKPH(0P-)4 z50ZzmN9oZJ7!84;4Qwt{eE)j53cNxZrRqDVz9dEOsM^sG7!3i+ zLO?$!GYN#D+m09*J`{gHaJk~UMqKIlf@>AuUszXvzi_z%oWBh~=X^3SFo5J{#Fc)Z z5C<9eD~K!oUIAspT+34^?((eXH@*Cnxzwd}E{eB>>^!oxN@fC5U z-yg)4e)otg{T>ll`aK}7^m_u5Jj`qm{UNUO`-`~J?-$}qzn_5WV~B^i2PBUV|G;4; zK0V~fWyFzJSNa;_n?F zi@)1^Dh7wUEO-MHL@$U0tvmAonen0cyF)?gcZPt{?;%#zV6`B55C*l|I<8iH*SQLb zJ2p@w6Lg-&1hf{I19*!tNDKU27Bm%LIS}FTwfH+o?!YYD?*|-ZQS1ZBqhnBe9CR)U za(mDQy5@a772iPj8iUR_LX@M~-#b2Le{Xq{4KAxd>Gc2q|DdA|!1{S~ za=y<1neid}`<*St-x(%gPp21dReUeG1&K3QIz8tONvAOLBo^!kU3>~Q7a{{W?-ne8 zM&xkjfXmU0xwhX;{vgUxrB`$bkT?h@RT+Vj zE9f{Dh>-`fzHhi)@!jEE_IHL2S>Uo2lx{(i8uuW62gz+Xm;HSONDTu6L&v%7?-QVG zkU9{aaW4D&f^*s51I}fCk2sh8-2+Mf#JTM67tUpWzi}@6`wk@W1Lv~8zc`ouJ>gvT z_kwfT-!sl-f3HB22bl}QKh9-;|9~V1(#LTg62CAtIB8Gi{{if^DQ8I)c@Wh#j6aWLz9#=)%bGY)3K(@#kT?jZmt+*BCZ^~b=^231D`?mks$!HH4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc44MhM`#|8E2IZ1yWW5L-+b6c|_-G#CUK1mNpTAuPV%T0rVSS68GI=f@}KB;bfNpS!kIzmm%1h0OFDtGr zPEO3pfhmJ3$WKd2tb~c7>L|`kFG?*bEdpKa0X3wkBpxA}lbKgqp_`sqk_uYSW60p+ z=@%LiZ=`1iXMwIBWMF1sf?^PhiGdLcCw@4`588hSI&%|r2O7vPAU}dsd@EhY43mTT z6C}sXz{v0wDhE;z3o}rdgUkT!Ck2Uv(!&-81_sbsqi+}>>+KFOLe?=EFfuT3F)%Pp zWk8%Y3OX}1g9&nGC@5`!&IAnuB@U2bBw$cFCqenB(h(2>ptJ}|%b;}S?ib3y{V*oD zhHr}erCD5y&5nJUq;g@)QcxKLQU?kSA5gXeF<4j_7^Ru5LHkcZdVjMrFo5_tYYA2DcQrwCcwa4a)wcWk-6jqqW}|g$q_~YX6BLui~_98 zB|8`e*qBSUFbc3Umuz4Z;9xGf!3aLz7vycmsvw9rcvx6EKzGYAK<-8pV1=AH47#tP z33LxfBeT~*J`Tr2e2|a}?R*;iVlfK?L*wDPl|Begu>4bbZ6$dYh4f zq1(ldr8|_T)AdESi=9CyQ@4*DOSg-iMR$muP4iF2PS*#Wp-=c*R)SphlZn42myv`Er&n`_}IyG$G)+au`6A~?E0WPmPa`BiQzZ?wHGeG`gTx(-}Ml`>$T=z z4CS1LCvE?qoMl}mX?T*A!7TMi^QHgI2N^+9AHWjjFS~1BFmiV~v$X!_Z`Jt!|9|Jr z9h{5|44t>SV>w>rF*7i9UT!`j0`_RPD@W^r(tDk;JSbk00l5g-OB!%5DRhU}sUUgj zJOcwm^G~LdBDi-zcgb`^ykjY2SGo+ZcX*-R;cs*M|NlQRUTV?(|NsBXfPer0cek&3 z`~Sb;C2bcwj_w#c0qGDso^BsI5yivZE_M=%7x~wp`2Lvj)XV(;#H%g&_y7NksK5XJ zzh3zw7(|^zP79r`Z(a)i`~M$Z?83kQ|Bt(ZFZOvo7s_~<`X8k5W!vBX|9iKA5-v*m zeX*30fuZqOP$oCGHHZUMIiLtlVyRAv45{r~^Yr@`H!9Nir$ zAY*1^-2MN*^-|}F5~fbB=-9*EEGmb)WmFD#o2VS_woy4e0R~?4!dPHBVn;ax1H;({ znE5-_Lbxz~P+;dnev@tI$%q3|^72bk8E_txQj%Ix!l0L!Q<9liTvAjDzU{CWArN1bT9A{NoSK`O zSHhr|oSzG3fU*ZM7_`p>)b0m0`9SSP5C+w?pn4aiA5_DDFz6hQZ_qPCKOgmgg4BY{1GP6n7?g8BW`NqUAR1I}%RZ9>YKsjK{Tij z06@uIcVxpXp!p6XGfQ^CSA50SI?2|Gi^Y(EwFn}<8e-~5^WFGA7 z6Ht5X6E_0`2!r|xAUP0*IRSR22`I;b#6kUDP}qamAPiCm!=SJOiGi>l4+Fz85Ce)q zYM{&kr*QTE3%DS6vo+*^VgtlhU|?s^V31~z!s!2}@G~)hFeop98m1usHOMeA!0--k z28IeANIwiD4>IwO91{Z!gU($6VNm#kq7j5eKzBbtF{tkk!XR-F28|CqIm^fZ!!B$L z3?K}W1L44@C7`S3F~SyPJ}CbMJuOLrxeZK%?($`ZoD~FeJID;=w)@RBvd=Y7F~oGU zyjEN4|CHH3L~#eGI0c=J2=WW4oCO_i11e8IdO_g;8j}Ex4S@0!$RVJ73rbTUH-N@2 zK<0zo0xB;+^5P%@ia|R$LH9y~xUh5tDlX{ZE99Y`GHMi6FTabT!OU^Ho9QgGpAZD45N@Mbu{B%sjX@<5rX#RnYkApe5g z1o9)u7?3|fegL@#WH+c!4l)e@Uo3bVvT~`@C$VQ=l~eZEc;1Vs zn4W!qqgCr`8U16Y7i2fsYMg~=={h;%_ z7-X3kE--@36JP+HZS@1m{{>(RL4g30|M(wNCj_)JFf3#P-5t%%zz|zF*_A>1$1(Dd}>8%aw+8M<@k8em98-H zyc7ngKyGSoVoqjy9_-#-kO?WN;5&E|OH$)Ya*AOpQ}aM~IL8;KCYKhaf?WW*+_@yD z7-VQkW^#OHURpi_Xdo^>87!TWnpBz&mV_uzEJ`l}OCXyb4>}|c#dGmR`3yx67l2iR zZAdLCEdcYtp^%apUz}P5wh!c9@O{^rdFk;`HMz<8rFkV_<;Yes#K(jD0~$b#PfSTE zVu&w_2fGn+*>FyZE_mDzG~{OlzeCml&O+QPYYZ1NfwBUEJi{DAT)}M~HU>5Z76w)Z zCI%)35F0W^2w|}?FoVTdz-ri_Dj+myFD_&R(P+~{K2X^SDsz*d=>kN7#t#KDGkIZh zurvdb1C2lmLghg92q^!9$~$B=EDTHx!boaBc^;$&q!yI&K<0qlErO&5R1SdDfYid& zfZW@9KA98b4v-kAECHzjsRi*nrB^`dHBfp3l->fRcR=YqQ2GFr zej?Arzy>-;4@9#uFkFylVqoWCV7LOJB^VfPfM|XOhC3jdoq^#2h-PD8_`excWBp$Y zaudjX{}+Qwa?nT;!^;Pt&C!cNwNwU3`sD>MALO$Pkl@P$U_PkU$p8^AH-Pz|n8^SQ zU%g!L|NsBc@XqsL!JWrmG*4q>XgnM)&cx9C#--CmMWeeJRL=G0sAzPCsOa?isL1z* zsHhxwQ2|8}!*LfCP&13A(?vz3*F{Akw0CvQo4@}!Jy0Utyu$=kNtUp7x?E&&>UQ9H{qjW{KO@77 zL_tP|)&rdfOBH)(ADI3Be^5|x7SoI0KNuK}v#5Z&mM?TW7#W(62)usU?ZDFcsIwX5 ztnTI`AX_;*JvolEsDMJa(@~()M}_6Miwej8|NNkk;sMnV?U#3a2KN=)FSi~j74K$I z>18q+cXPw+|Nnbu|Cs&%e?S<>0aZv2Skn%50Jy(>_{E_q zj0~)cM8Tod+pu8u|No#s_CV56)y~L}HUR<8HXKG7p8)lFp#q?4h@tbr3r{NshR)+J z9{vCSzwxk}C=)|>v%%m0|D$?US~L#@K|-^)WC};Gj|xlY)8;210s=zA4Bx&u_=P#hoSv-Fh2vq4{m;= z(jB9sbKFG*l!h64eN-g6gISI{gHi-T7DELxQXu*Qji!jPwTf&?c6LwAgd z$bX~%8%+NG|Nno31!zd8;m)_e|FixFfR2vr`EUHIpM3bUqF5JRa8D*x300e{k~~ole&qtcyTHFuqSZU9UhwnSUF5 z%K`qDAE1${7Ya5~{B2U8)5*8FGul}3Pd#X(!$0*<%SHZ{GfWH&EAI2R9ARQ$=yhk> z2P)4yYahJkho+0hN1&4#OQiX?2{a#L>^$ClfU)714*%4{4ZlF{ZHV!0aP!)5NrZR0X#0<86j!d_0G!` zfB*mA0V?UcOP{=a401WBr`dV$<#iAnG(HKEI0fQ>x}PAjFsO(9T)?~%I}c1nw8%n zYdtH$=j~y0@BSBAQm|hZPwdHXjE~SuwC&eeoYQhsD6c!ccwv#ea}pp!rFV zIVx8wzJca;VH1gr%~1lCxP4pE<*44PqKU`Wo*2TeIK6eN~F%q>neHe+C5D98hI8Ip6-a!QLc7>uCi zrIZwdB@&YhGC_>o+zJrIkX8Y4STWSS#l@+hpkOG5C}+rk7|&3W3s%mMnP>){Rxe0` zxF^%t!i*u)1VosE2r~=3FBnyQPiRD#1B#ymc93(FL33iDA-oK`>hGXI zQ>d9BB@7H#Ux3dL1*rkeA%NoDLJ*Rc{s=G?EUQ2L-tWwBC3H8)UsPC>?_b92poG ze*gcU4{{hNO=pQ!e*g9Ve?DkV73yY!6lfkDrbyrn`}Ylp*}p$H%lqFg3_D=qyWP1_lQ7^QS>-KyCujAbj9y);G`?HE7L;Ln|W8L2{#bGz3ONU^D~< zA_S1jD3JZ=e2^FjBa4H|JCGO%2Y!dN4?yfnc?JeCQ0w4A#rFxl!rvJLD!-Q$CWrme ztNuP?;r?$Gwb#DMm_q886blFq(r2Sz{oO>r`a6q$^>-2d>hCi82sx0vihlKX9V9W3 zc_48R4$-gv9;09VJw?Czy9<&UAN}g@HAsArT0*!)zxsQQe)abj{p#;ih}7Fdq&h-& z6O!ivg^>WLj)$xn#HQXsKKmOe_(An2hz8Y}JVKSM{o8b_H01JOVkrU^Br*xDtM*a)=5e&h{rvFKnF|j6cwH!ZO+K4LfDOPbifIx2Zwy z0kugEaAki3(G9!|3<69H44^ssj=x#oK;e;4C;Ppi9`)V`H8DuMfaF2A{Q+n-705IM z2IV0Kr2GO}|Avqyo+aha%rJqe3?9~?HVMOrtZy6MW_@G0urM6mB$=x({)5_RAa{Y% z#s(f}y9JaE3zEa0SXX}!XfF)|-H`&)3sM83Z&*X}?}_%(FpG}TFoTZLFpxM$M`@S< zlnvs8utY~`m_kQs*oF4eup8|Vbs%vN4(KQii|8l~OXw&KbLc1y(}3#r=qL><=qL?) z&|Vt$0c3xBY1j`my&(M{+|W@PRsq!q;)C=}K;nbMaN!Oj)#1`lw0K8pm`Oo$n7DFE z7^tlb>pNY6h9k(F4_7L_$ulr8Am5X6r!YB8rYJegCO0_@6i1+yBS>v^hH2}Q!QswO zkQ}z*_13VOgwindb}FdtzQL**;~aI6ogfS|FXD0qXqg*G2)vFF!~od|qS3KP55zqQ zd$YdhytMsZQ3#3GFR)G?0|Nty4bxx2D8$eKS_}#`2$qfpiUv6Yl(s=M%#92TmER-m zs=x1Hss!J;0&*KH-Fra$Od$0zyg;Y=`wE@v?;CU=c>yN=hN<%V7bZxa2Z@2q1JOs2 z#6WyXF$;6$_dg_>xdY9ul)3?z{sTJI-%S`GVZg#5$neLy8eA8+AcfJM2JeM)7C}jE2By2#kinXb6mkz-S1J zhQMeDjE2By2#kinXb6mkz-S1JhQKHo4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c z4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C z(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R z7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7 zfzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVC7fzc2c4S~@R7!85Z z5Eu=C(GVC7fzc2c4S~@R7!85Z5Eu=C(GVB~qaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71* zAut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@? z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8Umvs zFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF z0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*U^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU z1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0q zLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$( zGz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!n zMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(Gz3ON zU^E0qLtr!nMnhmU1V%$(Gz3ONU^E0qLtr!nMnhmU1V%$(6pV(zXb6mkz-S1JhQMeD zjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mk zz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By z2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz-S1JhQMeDjE2By2#kinXb6mkz;F$L zn58fNgD^wfum1@TWWIy^*|++|e-O<8<%8&iRWJU34a*OcbZ7q#;{W;o|36E3eptn- z7yp;_v3%dL>IIn3$iTn=!ZrW?{|Dhy&%q|a37ch5v!Not|Nn>B1?3}A3S3aLKw?qd zEMT{R+yUaVGB7Z(fEZBxA8Jm^KZtoZ!t%pFQu+)G3?R3G*f7i*o*%a60;)S;a-;NU z2#kinz=we57J=^v-pG6h#7r$p%}Y+T1&0=>qz364#iJoG z8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*OqaiRF0;3@?8UmvsFd71*Aut*O zBP|5}9Dect(d!rg#dq+32eDyuB_Q_q?fl;lbd-jHu+Nm-Fos)O!x#h@7(jC9;iR9D zpPQ`0tpu?zMVMw;{Or->hBrHU;Gy-t^CeV zQ1~sul!1Ynfq}t@fq?-w|8$3sfq|!`3OskupuoluAql}CXMyJML1GLJYz!)fYzzsd zYz!bi$P5k!1_oh}A_jH_hSsX@AiJ)$KLjO0Zi%YZO4n-`-IPHoM_M#W#?@K>qPBs{D>D|KQk*{|BTX`f?0^ z*(V%(@t?t<`nwGS$iI~g5)2FsXO6%4&&I&O@C7s#_5rd6feqvd0gxI7h9?%);4lLD z4Pt}R$xqqp)qD6BiO8oq(T1%yHV2ibf0IAq>3Be&sO zMmnZE9|HpeNH0j;4~uGWxC$Jp`p#fb4Hjp(`rCJYP=89@*~nJ_3Yurp{d$TG-)<-v-f1T1ZV)0F@ud<@js7+@F_HwOL;3}BN4 z7(muC9MEHfV-7|J1`r0xgXUU6ScH**0fto=7#KhpBo4v>PfJpkG_f+ku@D2p5+TUC z6p(!2(~=aZ(@-do`2q|K3_(vzQebWa(HA%w7(f`L7Zeg8S_GWN7#Q6BLK#@1Wlhz; z2mDjF3gOui;VfwNrEWGTdR-YHegT=gpo>${k>OGSNX(0Yfx(x7fk9%=qdylWJKWh& z$?)k&&-Q2L%MYBgF|dE`b>3o?eJM-CrOlIyp5?amxO-`?LUAYq0|P54VL}Ck7#J8n zLfIe+#E%9!6vSa*U;y#goP6;gghA_xH0D=+cW7k%o)IAn&U2u-bFlIUGT%3xgQR)b zdLqtwmESX(8NS!EF))DAUC6bf%D+n?`4FV%$v23ch$`dv8}n?xGYANP%bFi~{NEd% z%YgYH^Ens<7&b3rhu8;Iql8o*F@W+W2t(z_*AL0pr#Fj#U$R*oZa>H^LCe{{&k$P@ z{)&Nt;Q#{z1G4>~_{v|+{+&Z1?JGzglu0euv401ti{@Zp0O{ZGT;@B-A3W*|3?M(% zfx}mTAsS3GFc@ut*vSY=!43=z77h#y3>*v$ApM|Bk;llupuoVuFde!^s)2!l0puQ# z_9F}o487;r!EOfW=Ufa5D*>>*AiLL`fAQb{2>bVroUHF4w`s3r0k8K0t$%3OSo=HT z!i)bW+gZS24pPr(#qwR}+>8Gg&b;{FX~hDr!>!u#!cxw>_40z{tIMQeTS{@0-1B?JVYMk zHW2^K`4|5`I3n~v;gb6fDuO$Ea>GEh&lyNr12X%Ai|luc19D*Zg3?zc8-xv#>pAn{ z|C&>a!_oDF#6dw0QUg*i0QDb8KS*o=)E{r;%f7<=0J0ZkKPXJjAlVO6AAqFaL5V@& z0ZhMs8(hByNFf6Q14w_vSx8w63U`q3gtL&k0#w(6^n+?$P*Px=%>KP1VoA6t0|Ns{ zzl%Eacb?Lv;T~sSfRz4+=?AF+l^LKkR?iHov%u2-L3~g;-6OUnyyNVP{~-M^HppIN z{ja+q>tjG>f#h~XED3*bj2#@V;CN{#bg4>Td%Vfc7kIl~o z^RI=ZhCMjFI2@!lvoi%O#&BkFINO|Duy{jbN?6A!i2k3!sbLIJOTs~MDsu{=2V_2o z-Er>4|J4mCVOthK%mwKOnQ2*_7Y33C>GAG?$UU#h1KacBB2f5*T9mGCRm@yb`ehZ>OI5G}l zAIL0F9=p6P6K)@<9_rqf83vMrEvN*kfu(a$7=z5S+y)6-khtLP%rLMTuq33u1Gz!q z(u@BvGbV&B31^tF?JG$AlJhVA!~6!~gUkcdkYWo|bb-ssipVA5p!@*g7T#2F;i0VK93@=^bPiD6C)@q?h3_B;e)LIg=)v3!0M6K7o#iqxkLQBK~dIsi8G7CFJ6uTvjwg# z4hNNep!)ql?NV_4UIR+QmtTO(%!a=*-w%KcHr)IcROdP{F)&!xLE;}2HXu7d{!e3r z!~uv660-sk3=H7<-4iMYGC$_>i~nkGUi{y9J_Q_SF!iAFx#gh@xQqjts~mWlwBD>K6c9xV^$QG9?eJSK$pL|A536h|7KlVGtXJL2+N^oCQ`3 zE-x4u7^W@B4f|OJagX?$7ylEAOT!|ry!dY_oe~CWD|1|Z@gF1(!VIsrg7t#j0O}8b z-1_S zZBAr;9}>^SJ?uWy15*m7ufF*IM5q#MKFBFt z%wcj~m;z_j_di!&{I{^E2I~iprM!9ZU-r$5|Df;$#}NYqgU_26|HI$B_|Ne6#ed>n@cS44 z^WVStU-$mS|MvGU{?B;-;{T@iFaG;}d+~q5w-^6+e|z!&)wdV_zkPf0pYQvN|1sZR z{7?V>;(x>U7yoB|fAN3I_ZR=qeSh))`S%z9Z~b`j|NV~_|BZgW`0xDl#sBD^FaEdw zeDQzg&lmrf{Cx5M@Xr_jPyKxH|JlzM|3CkH@t^zGi~owhUi^3Z_2Pf&uNVJ&e!ciV z|JRHE>wdlXzwOtH|3`nl_{eJPk<@byKhkn2KfA05- z|F?d>`2Xeii~r_-Ui|m|^Wy*7KQI1Y|MTL%#NQYHt^U6FAN=>l|G9r({NM2R#s4FJ zU;MxP_r?DQe_#B6_xHvB-+y2H=lJ*Hzxuxy|HJ;h_@DLf#sB7iFa9t8_u~KMe=q+3 z{rBR(#Qzun9sj@hAN2pl|D^vf{@4G1@qf~PNO}Xc&o^*aepdu1ipuYxqVE6i*ZaZc zv;YHxAOiyfsPhPF|CkgcgVQ%i4=7E5h8WmE`UEP$?OPC&lYxN&lzzAw7#LnKGcfQ# zXW72G#X*W07#JiO7#OmzzxXfDz`$_$|BL_p3=9m_*CB3$DuGcBhMV6yY(CEJ zCT3I_pmcp^rkRBqOm37O4S~@R7!85Z5Eu=C(GVC7fl)9T0;3@?8UmvsFd71*Aut*O zqaiRF0;3@?8Ukd50Ol$`{gTw;l49_JKi$lH2uDv(Ur!Gzl$*|woRONG&7hmcP?(%w zZp5Hpl3M_kgs9goEX_>L)-^UXGd0vN(SxXpaB+_h3-JrGHDvI0^b2qd@vud*JR`9v zRX;Z|&k7-i%F8b((Jw}*%E?bo%+asNFG@!iMJ!oFsDz7=ZXQE$ut&V3yQ^PFe1NBm zt)aPrF$2gO!LGr`q@-ztH%AAXhif2-}LZA#$NL9_c>4PV+v=t(B$k%sGkE*^1^fHB#=AI$2FC}x28DS#yV_bA>X}-= zr2>Nd-8_9<0)bUYG7z+ZfMRB7~ zo-u=yb9_LMzdJ-6?3rYSzz|PAXNU+wrG92!a!zSVD#YXQND-Holw_J>Vwz^2nrLZa zU|^7xXkd|OW|3xMnQV}1WN5(<;2Pu;@9PBenXRsFW?pegVopwcQettcf)XN;7Ni#C zm?|+86y;Y`#-~;!rxuiC=I0gLY9U9lufI#EkE?B7eqJg=U`V`skYj*{r*m*{WN?V9 zZ#*~vU0rMq8R7$7eM93t9Q|B;Tx|^)LW5m{Y;%iC7~F&W-Q42+{Nsb&gTSc+l;%JV z0|z-cE9fQX=cQ$)Gx!9@JNx_i2L;;}726tErDWO~TUeV~8yj2Y~WDmT;Cz|h*j z)Y{nG+QiVRxD=wo(9#TQkf~L1I#kRMDr9DroCpkvUliPDvt?vYd=WgiKDA2{I=G znUjm8t|SM^gpvwmP8Bqi!R|3flBvopKp2N49)%E1K@vvxN=^}y1hUmR$hILnBdN*= zVQdnT?h-T(lClycWhtpi2>nF`xd=`ca)6g3b5fBx#mJl@WKJTo2NIK05k^<#BZXaZ zK_(IpIUtb(BRLVtommCx5W@_Ot+e#A3R01|>6vLrl1aJH$N(!XNP>D0!b?Zt!8{L^ zD@li@0x+)vMPCJ~N)-D_GSiT)FUUi7T5%Z~4;m3*J91H!79>LxKSVCS49QQqDBjOS z^?t4qiqdRkUU@2tKk`xhpIZRU5)d0rkTvEOpm59bp^*VrT3CYQw!BhgedW2xyu@PU zpeaHQ{G!}4WFymZpjjGhL1G!S6a@3qa!`55Hl*huIVA;|Q<02pcSU&$lEO+9Hz%Wn zN@^~$zWj7#+w#+q<0vr^>ShyDD=odmQiug$PFfC%T&@W;ZGk0oGofyQ@u1#=aI;aA z78oO$np=QuVSYL^ZGrU_A!{p7gt{6ml@CkV5MDuPF_M|Z1yC=6B`b;xpuRUTwPFBQ zZl1pG(5gEFeR~NJ4Npj`2vVIQw~9a&KD14go1apelUfXEx`l>##0UF3d)tDWsKvz@ zx`vrSQAK_}*#V)&5&DVgsd*)OhNgxV;MR_hYnZE#ts#TIzkj@&e~>exMV6kIpPR}6 zYdt_3LP56RidVlhFSEkR0c?Sur?aarh_7#GZfvdtW`PJREV2x~kj9lRxOL?YYAL#T zy2rbC1_j&dr6s7 zoYeTt+{EwW(>ETHLTxKDb0IMWjfQw%M`sUDKUdp=WQKrn7v%mAbc+=h3m77N z{arlWJY9o=Z5=XmA+1PP7tav?AltIcTzGRD+|q_Lpl$WTGxJjN%Zv358GIc5+-;p1 zf`gnP83xgGg?Wm>+r<@<>`IG^AkALX#x2_k0Jn7A+@0KQ4Na{L7=k@~!hCE^!CjwV zSH}?B;?%?v0|pO&Usps>g99Yg(cRS+5;YL75*5>sUT}qlS-hEvZgGBENp5Z_q~BXy zSzMBus|%502nddM^zn&@=I_)rh7i}_5KzvB6holA4C`4V_mmkN!@bdhII%pNAs{lu z!ymoBoQa(MKv}1tvLquv&q&Wqzc{lbRkt89IUAfFef-_Q{VPy6!Z|EBJ}B73wzxQh zAuz>lPCF@TdN zG=;>2I)#odEmA z&wv5iI|pYTaL@*Y`h|G4<0IjRLjneA&x%&?vP>zDY*5aHFI)e zNn%cZdNBjMhO#X$$}CAuN=(iM+u$4;6a*S;ftJm-5pK?|4DKP`@rV*Ny(C*VGgmh` zKM$0)bc-`VWiKSKJ^kT5Vg=na1@MrDg03#O`cObv6yWF^?;Y;wgVJF4dc9|6nGsA85{5gS!nC&7aRi0?oN)uNX3jksL(Wp zW?oxJ?o`lqVsHj~KHkGI*aK9>Fhn?phIse~d4@zn+@TkdSXz={=4|2QmjsF)|A3HS p+vNP*g2WPALp?(V|Im, + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +/* + * How to add or update the tests: + * Contributor: + * 1. add empty files for new tables, if any, under tests/data/acpi + * 2. list any changed files in tests/qtest/bios-tables-test-allowed-diff.h + * 3. commit the above *before* making changes that affect the tables + * + * Contributor or ACPI Maintainer (steps 4-7 need to be redone to resolve conflicts + * in binary commit created in step 6): + * + * After 1-3 above tests will pass but ignore differences with the expected files. + * You will also notice that tests/qtest/bios-tables-test-allowed-diff.h lists + * a bunch of files. This is your hint that you need to do the below: + * 4. Run + * make check V=1 + * this will produce a bunch of warnings about differences + * beween actual and expected ACPI tables. If you have IASL installed, + * they will also be disassembled so you can look at the disassembled + * output. If not - disassemble them yourself in any way you like. + * Look at the differences - make sure they make sense and match what the + * changes you are merging are supposed to do. + * Save the changes, preferably in form of ASL diff for the commit log in + * step 6. + * + * 5. From build directory, run: + * $(SRC_PATH)/tests/data/acpi/rebuild-expected-aml.sh + * 6. Now commit any changes to the expected binary, include diff from step 4 + * in commit log. + * 7. Before sending patches to the list (Contributor) + * or before doing a pull request (Maintainer), make sure + * tests/qtest/bios-tables-test-allowed-diff.h is empty - this will ensure + * following changes to ACPI tables will be noticed. + * + * The resulting patchset/pull request then looks like this: + * - patch 1: list changed files in tests/qtest/bios-tables-test-allowed-diff.h. + * - patches 2 - n: real changes, may contain multiple patches. + * - patch n + 1: update golden master binaries and empty + * tests/qtest/bios-tables-test-allowed-diff.h + */ + +#include "qemu/osdep.h" +#include +#include "qemu-common.h" +#include "hw/firmware/smbios.h" +#include "qemu/bitmap.h" +#include "acpi-utils.h" +#include "boot-sector.h" +#include "tpm-emu.h" +#include "hw/acpi/tpm.h" + + +#define MACHINE_PC "pc" +#define MACHINE_Q35 "q35" + +#define ACPI_REBUILD_EXPECTED_AML "TEST_ACPI_REBUILD_AML" + +typedef struct { + bool tcg_only; + const char *machine; + const char *variant; + const char *uefi_fl1; + const char *uefi_fl2; + const char *cd; + const uint64_t ram_start; + const uint64_t scan_len; + uint64_t rsdp_addr; + uint8_t rsdp_table[36 /* ACPI 2.0+ RSDP size */]; + GArray *tables; + uint32_t smbios_ep_addr; + struct smbios_21_entry_point smbios_ep_table; + uint16_t smbios_cpu_max_speed; + uint16_t smbios_cpu_curr_speed; + uint8_t *required_struct_types; + int required_struct_types_len; + QTestState *qts; +} test_data; + +static char disk[] = "tests/acpi-test-disk-XXXXXX"; +static const char *data_dir = "tests/data/acpi"; +#ifdef CONFIG_IASL +static const char *iasl = CONFIG_IASL; +#else +static const char *iasl; +#endif + +static bool compare_signature(const AcpiSdtTable *sdt, const char *signature) +{ + return !memcmp(sdt->aml, signature, 4); +} + +static void cleanup_table_descriptor(AcpiSdtTable *table) +{ + g_free(table->aml); + if (table->aml_file && + !table->tmp_files_retain && + g_strstr_len(table->aml_file, -1, "aml-")) { + unlink(table->aml_file); + } + g_free(table->aml_file); + g_free(table->asl); + if (table->asl_file && + !table->tmp_files_retain) { + unlink(table->asl_file); + } + g_free(table->asl_file); +} + +static void free_test_data(test_data *data) +{ + int i; + + for (i = 0; i < data->tables->len; ++i) { + cleanup_table_descriptor(&g_array_index(data->tables, AcpiSdtTable, i)); + } + + g_array_free(data->tables, true); +} + +static void test_acpi_rsdp_table(test_data *data) +{ + uint8_t *rsdp_table = data->rsdp_table; + + acpi_fetch_rsdp_table(data->qts, data->rsdp_addr, rsdp_table); + + switch (rsdp_table[15 /* Revision offset */]) { + case 0: /* ACPI 1.0 RSDP */ + /* With rev 1, checksum is only for the first 20 bytes */ + g_assert(!acpi_calc_checksum(rsdp_table, 20)); + break; + case 2: /* ACPI 2.0+ RSDP */ + /* With revision 2, we have 2 checksums */ + g_assert(!acpi_calc_checksum(rsdp_table, 20)); + g_assert(!acpi_calc_checksum(rsdp_table, 36)); + break; + default: + g_assert_not_reached(); + } +} + +static void test_acpi_rxsdt_table(test_data *data) +{ + const char *sig = "RSDT"; + AcpiSdtTable rsdt = {}; + int entry_size = 4; + int addr_off = 16 /* RsdtAddress */; + uint8_t *ent; + + if (data->rsdp_table[15 /* Revision offset */] != 0) { + addr_off = 24 /* XsdtAddress */; + entry_size = 8; + sig = "XSDT"; + } + /* read [RX]SDT table */ + acpi_fetch_table(data->qts, &rsdt.aml, &rsdt.aml_len, + &data->rsdp_table[addr_off], entry_size, sig, true); + + /* Load all tables and add to test list directly RSDT referenced tables */ + ACPI_FOREACH_RSDT_ENTRY(rsdt.aml, rsdt.aml_len, ent, entry_size) { + AcpiSdtTable ssdt_table = {}; + + acpi_fetch_table(data->qts, &ssdt_table.aml, &ssdt_table.aml_len, ent, + entry_size, NULL, true); + /* Add table to ASL test tables list */ + g_array_append_val(data->tables, ssdt_table); + } + cleanup_table_descriptor(&rsdt); +} + +static void test_acpi_fadt_table(test_data *data) +{ + /* FADT table is 1st */ + AcpiSdtTable table = g_array_index(data->tables, typeof(table), 0); + uint8_t *fadt_aml = table.aml; + uint32_t fadt_len = table.aml_len; + uint32_t val; + int dsdt_offset = 40 /* DSDT */; + int dsdt_entry_size = 4; + + g_assert(compare_signature(&table, "FACP")); + + /* Since DSDT/FACS isn't in RSDT, add them to ASL test list manually */ + memcpy(&val, fadt_aml + 112 /* Flags */, 4); + val = le32_to_cpu(val); + if (!(val & 1UL << 20 /* HW_REDUCED_ACPI */)) { + acpi_fetch_table(data->qts, &table.aml, &table.aml_len, + fadt_aml + 36 /* FIRMWARE_CTRL */, 4, "FACS", false); + g_array_append_val(data->tables, table); + } + + memcpy(&val, fadt_aml + dsdt_offset, 4); + val = le32_to_cpu(val); + if (!val) { + dsdt_offset = 140 /* X_DSDT */; + dsdt_entry_size = 8; + } + acpi_fetch_table(data->qts, &table.aml, &table.aml_len, + fadt_aml + dsdt_offset, dsdt_entry_size, "DSDT", true); + g_array_append_val(data->tables, table); + + memset(fadt_aml + 36, 0, 4); /* sanitize FIRMWARE_CTRL ptr */ + memset(fadt_aml + 40, 0, 4); /* sanitize DSDT ptr */ + if (fadt_aml[8 /* FADT Major Version */] >= 3) { + memset(fadt_aml + 132, 0, 8); /* sanitize X_FIRMWARE_CTRL ptr */ + memset(fadt_aml + 140, 0, 8); /* sanitize X_DSDT ptr */ + } + + /* update checksum */ + fadt_aml[9 /* Checksum */] = 0; + fadt_aml[9 /* Checksum */] -= acpi_calc_checksum(fadt_aml, fadt_len); +} + +static void dump_aml_files(test_data *data, bool rebuild) +{ + AcpiSdtTable *sdt; + GError *error = NULL; + gchar *aml_file = NULL; + gint fd; + ssize_t ret; + int i; + + for (i = 0; i < data->tables->len; ++i) { + const char *ext = data->variant ? data->variant : ""; + sdt = &g_array_index(data->tables, AcpiSdtTable, i); + g_assert(sdt->aml); + + if (rebuild) { + aml_file = g_strdup_printf("%s/%s/%.4s%s", data_dir, data->machine, + sdt->aml, ext); + fd = g_open(aml_file, O_WRONLY|O_TRUNC|O_CREAT, + S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP|S_IROTH); + if (fd < 0) { + perror(aml_file); + } + g_assert(fd >= 0); + } else { + fd = g_file_open_tmp("aml-XXXXXX", &sdt->aml_file, &error); + g_assert_no_error(error); + } + + ret = qemu_write_full(fd, sdt->aml, sdt->aml_len); + g_assert(ret == sdt->aml_len); + + close(fd); + + g_free(aml_file); + } +} + +static bool load_asl(GArray *sdts, AcpiSdtTable *sdt) +{ + AcpiSdtTable *temp; + GError *error = NULL; + GString *command_line = g_string_new(iasl); + gint fd; + gchar *out, *out_err; + gboolean ret; + int i; + + fd = g_file_open_tmp("asl-XXXXXX.dsl", &sdt->asl_file, &error); + g_assert_no_error(error); + close(fd); + + /* build command line */ + g_string_append_printf(command_line, " -p %s ", sdt->asl_file); + if (compare_signature(sdt, "DSDT") || + compare_signature(sdt, "SSDT")) { + for (i = 0; i < sdts->len; ++i) { + temp = &g_array_index(sdts, AcpiSdtTable, i); + if (compare_signature(temp, "DSDT") || + compare_signature(temp, "SSDT")) { + g_string_append_printf(command_line, "-e %s ", temp->aml_file); + } + } + } + g_string_append_printf(command_line, "-d %s", sdt->aml_file); + + /* pass 'out' and 'out_err' in order to be redirected */ + ret = g_spawn_command_line_sync(command_line->str, &out, &out_err, NULL, &error); + g_assert_no_error(error); + if (ret) { + ret = g_file_get_contents(sdt->asl_file, &sdt->asl, + &sdt->asl_len, &error); + g_assert(ret); + g_assert_no_error(error); + ret = (sdt->asl_len > 0); + } + + g_free(out); + g_free(out_err); + g_string_free(command_line, true); + + return !ret; +} + +#define COMMENT_END "*/" +#define DEF_BLOCK "DefinitionBlock (" +#define BLOCK_NAME_END "," + +static GString *normalize_asl(gchar *asl_code) +{ + GString *asl = g_string_new(asl_code); + gchar *comment, *block_name; + + /* strip comments (different generation days) */ + comment = g_strstr_len(asl->str, asl->len, COMMENT_END); + if (comment) { + comment += strlen(COMMENT_END); + while (*comment == '\n') { + comment++; + } + asl = g_string_erase(asl, 0, comment - asl->str); + } + + /* strip def block name (it has file path in it) */ + if (g_str_has_prefix(asl->str, DEF_BLOCK)) { + block_name = g_strstr_len(asl->str, asl->len, BLOCK_NAME_END); + g_assert(block_name); + asl = g_string_erase(asl, 0, + block_name + sizeof(BLOCK_NAME_END) - asl->str); + } + + return asl; +} + +static GArray *load_expected_aml(test_data *data) +{ + int i; + AcpiSdtTable *sdt; + GError *error = NULL; + gboolean ret; + gsize aml_len; + + GArray *exp_tables = g_array_new(false, true, sizeof(AcpiSdtTable)); + if (getenv("V")) { + fputc('\n', stderr); + } + for (i = 0; i < data->tables->len; ++i) { + AcpiSdtTable exp_sdt; + gchar *aml_file = NULL; + const char *ext = data->variant ? data->variant : ""; + + sdt = &g_array_index(data->tables, AcpiSdtTable, i); + + memset(&exp_sdt, 0, sizeof(exp_sdt)); + +try_again: + aml_file = g_strdup_printf("%s/%s/%.4s%s", data_dir, data->machine, + sdt->aml, ext); + if (getenv("V")) { + fprintf(stderr, "Looking for expected file '%s'\n", aml_file); + } + if (g_file_test(aml_file, G_FILE_TEST_EXISTS)) { + exp_sdt.aml_file = aml_file; + } else if (*ext != '\0') { + /* try fallback to generic (extension less) expected file */ + ext = ""; + g_free(aml_file); + goto try_again; + } + g_assert(exp_sdt.aml_file); + if (getenv("V")) { + fprintf(stderr, "Using expected file '%s'\n", aml_file); + } + ret = g_file_get_contents(aml_file, (gchar **)&exp_sdt.aml, + &aml_len, &error); + exp_sdt.aml_len = aml_len; + g_assert(ret); + g_assert_no_error(error); + g_assert(exp_sdt.aml); + if (!exp_sdt.aml_len) { + fprintf(stderr, "Warning! zero length expected file '%s'\n", + aml_file); + } + + g_array_append_val(exp_tables, exp_sdt); + } + + return exp_tables; +} + +static bool test_acpi_find_diff_allowed(AcpiSdtTable *sdt) +{ + const gchar *allowed_diff_file[] = { +#include "bios-tables-test-allowed-diff.h" + NULL + }; + const gchar **f; + + for (f = allowed_diff_file; *f; ++f) { + if (!g_strcmp0(sdt->aml_file, *f)) { + return true; + } + } + return false; +} + +/* test the list of tables in @data->tables against reference tables */ +static void test_acpi_asl(test_data *data) +{ + int i; + AcpiSdtTable *sdt, *exp_sdt; + test_data exp_data; + gboolean exp_err, err, all_tables_match = true; + + memset(&exp_data, 0, sizeof(exp_data)); + exp_data.tables = load_expected_aml(data); + dump_aml_files(data, false); + for (i = 0; i < data->tables->len; ++i) { + GString *asl, *exp_asl; + + sdt = &g_array_index(data->tables, AcpiSdtTable, i); + exp_sdt = &g_array_index(exp_data.tables, AcpiSdtTable, i); + + if (sdt->aml_len == exp_sdt->aml_len && + !memcmp(sdt->aml, exp_sdt->aml, sdt->aml_len)) { + /* Identical table binaries: no need to disassemble. */ + continue; + } + + fprintf(stderr, + "acpi-test: Warning! %.4s binary file mismatch. " + "Actual [aml:%s], Expected [aml:%s].\n" + "See source file tests/qtest/bios-tables-test.c " + "for instructions on how to update expected files.\n", + exp_sdt->aml, sdt->aml_file, exp_sdt->aml_file); + + all_tables_match = all_tables_match && + test_acpi_find_diff_allowed(exp_sdt); + + /* + * don't try to decompile if IASL isn't present, in this case user + * will just 'get binary file mismatch' warnings and test failure + */ + if (!iasl) { + continue; + } + + err = load_asl(data->tables, sdt); + asl = normalize_asl(sdt->asl); + + exp_err = load_asl(exp_data.tables, exp_sdt); + exp_asl = normalize_asl(exp_sdt->asl); + + /* TODO: check for warnings */ + g_assert(!err || exp_err); + + if (g_strcmp0(asl->str, exp_asl->str)) { + sdt->tmp_files_retain = true; + if (exp_err) { + fprintf(stderr, + "Warning! iasl couldn't parse the expected aml\n"); + } else { + exp_sdt->tmp_files_retain = true; + fprintf(stderr, + "acpi-test: Warning! %.4s mismatch. " + "Actual [asl:%s, aml:%s], Expected [asl:%s, aml:%s].\n", + exp_sdt->aml, sdt->asl_file, sdt->aml_file, + exp_sdt->asl_file, exp_sdt->aml_file); + fflush(stderr); + if (getenv("V")) { + const char *diff_env = getenv("DIFF"); + const char *diff_cmd = diff_env ? diff_env : "diff -U 16"; + char *diff = g_strdup_printf("%s %s %s", diff_cmd, + exp_sdt->asl_file, sdt->asl_file); + int out = dup(STDOUT_FILENO); + int ret G_GNUC_UNUSED; + + dup2(STDERR_FILENO, STDOUT_FILENO); + ret = system(diff) ; + dup2(out, STDOUT_FILENO); + close(out); + g_free(diff); + } + } + } + g_string_free(asl, true); + g_string_free(exp_asl, true); + } + if (!iasl && !all_tables_match) { + fprintf(stderr, "to see ASL diff between mismatched files install IASL," + " rebuild QEMU from scratch and re-run tests with V=1" + " environment variable set"); + } + g_assert(all_tables_match); + + free_test_data(&exp_data); +} + +static bool smbios_ep_table_ok(test_data *data) +{ + struct smbios_21_entry_point *ep_table = &data->smbios_ep_table; + uint32_t addr = data->smbios_ep_addr; + + qtest_memread(data->qts, addr, ep_table, sizeof(*ep_table)); + if (memcmp(ep_table->anchor_string, "_SM_", 4)) { + return false; + } + if (memcmp(ep_table->intermediate_anchor_string, "_DMI_", 5)) { + return false; + } + if (ep_table->structure_table_length == 0) { + return false; + } + if (ep_table->number_of_structures == 0) { + return false; + } + if (acpi_calc_checksum((uint8_t *)ep_table, sizeof *ep_table) || + acpi_calc_checksum((uint8_t *)ep_table + 0x10, + sizeof *ep_table - 0x10)) { + return false; + } + return true; +} + +static void test_smbios_entry_point(test_data *data) +{ + uint32_t off; + + /* find smbios entry point structure */ + for (off = 0xf0000; off < 0x100000; off += 0x10) { + uint8_t sig[] = "_SM_"; + int i; + + for (i = 0; i < sizeof sig - 1; ++i) { + sig[i] = qtest_readb(data->qts, off + i); + } + + if (!memcmp(sig, "_SM_", sizeof sig)) { + /* signature match, but is this a valid entry point? */ + data->smbios_ep_addr = off; + if (smbios_ep_table_ok(data)) { + break; + } + } + } + + g_assert_cmphex(off, <, 0x100000); +} + +static inline bool smbios_single_instance(uint8_t type) +{ + switch (type) { + case 0: + case 1: + case 2: + case 3: + case 16: + case 32: + case 127: + return true; + default: + return false; + } +} + +static bool smbios_cpu_test(test_data *data, uint32_t addr) +{ + uint16_t expect_speed[2]; + uint16_t real; + int offset[2]; + int i; + + /* Check CPU speed for backward compatibility */ + offset[0] = offsetof(struct smbios_type_4, max_speed); + offset[1] = offsetof(struct smbios_type_4, current_speed); + expect_speed[0] = data->smbios_cpu_max_speed ? : 2000; + expect_speed[1] = data->smbios_cpu_curr_speed ? : 2000; + + for (i = 0; i < 2; i++) { + real = qtest_readw(data->qts, addr + offset[i]); + if (real != expect_speed[i]) { + fprintf(stderr, "Unexpected SMBIOS CPU speed: real %u expect %u\n", + real, expect_speed[i]); + return false; + } + } + + return true; +} + +static void test_smbios_structs(test_data *data) +{ + DECLARE_BITMAP(struct_bitmap, SMBIOS_MAX_TYPE+1) = { 0 }; + struct smbios_21_entry_point *ep_table = &data->smbios_ep_table; + uint32_t addr = le32_to_cpu(ep_table->structure_table_address); + int i, len, max_len = 0; + uint8_t type, prv, crt; + + /* walk the smbios tables */ + for (i = 0; i < le16_to_cpu(ep_table->number_of_structures); i++) { + + /* grab type and formatted area length from struct header */ + type = qtest_readb(data->qts, addr); + g_assert_cmpuint(type, <=, SMBIOS_MAX_TYPE); + len = qtest_readb(data->qts, addr + 1); + + /* single-instance structs must not have been encountered before */ + if (smbios_single_instance(type)) { + g_assert(!test_bit(type, struct_bitmap)); + } + set_bit(type, struct_bitmap); + + if (type == 4) { + g_assert(smbios_cpu_test(data, addr)); + } + + /* seek to end of unformatted string area of this struct ("\0\0") */ + prv = crt = 1; + while (prv || crt) { + prv = crt; + crt = qtest_readb(data->qts, addr + len); + len++; + } + + /* keep track of max. struct size */ + if (max_len < len) { + max_len = len; + g_assert_cmpuint(max_len, <=, ep_table->max_structure_size); + } + + /* start of next structure */ + addr += len; + } + + /* total table length and max struct size must match entry point values */ + g_assert_cmpuint(le16_to_cpu(ep_table->structure_table_length), ==, + addr - le32_to_cpu(ep_table->structure_table_address)); + g_assert_cmpuint(le16_to_cpu(ep_table->max_structure_size), ==, max_len); + + /* required struct types must all be present */ + for (i = 0; i < data->required_struct_types_len; i++) { + g_assert(test_bit(data->required_struct_types[i], struct_bitmap)); + } +} + +static void test_acpi_one(const char *params, test_data *data) +{ + char *args; + bool use_uefi = data->uefi_fl1 && data->uefi_fl2; + + if (use_uefi) { + /* + * TODO: convert '-drive if=pflash' to new syntax (see e33763be7cd3) + * when arm/virt boad starts to support it. + */ + args = g_strdup_printf("-machine %s %s -accel tcg -nodefaults -nographic " + "-drive if=pflash,format=raw,file=%s,readonly " + "-drive if=pflash,format=raw,file=%s,snapshot=on -cdrom %s %s", + data->machine, data->tcg_only ? "" : "-accel kvm", + data->uefi_fl1, data->uefi_fl2, data->cd, params ? params : ""); + + } else { + /* Disable kernel irqchip to be able to override apic irq0. */ + args = g_strdup_printf("-machine %s,kernel-irqchip=off %s -accel tcg " + "-net none -display none %s " + "-drive id=hd0,if=none,file=%s,format=raw " + "-device ide-hd,drive=hd0 ", + data->machine, data->tcg_only ? "" : "-accel kvm", + params ? params : "", disk); + } + + data->qts = qtest_init(args); + + if (use_uefi) { + g_assert(data->scan_len); + data->rsdp_addr = acpi_find_rsdp_address_uefi(data->qts, + data->ram_start, data->scan_len); + } else { + boot_sector_test(data->qts); + data->rsdp_addr = acpi_find_rsdp_address(data->qts); + g_assert_cmphex(data->rsdp_addr, <, 0x100000); + } + + data->tables = g_array_new(false, true, sizeof(AcpiSdtTable)); + test_acpi_rsdp_table(data); + test_acpi_rxsdt_table(data); + test_acpi_fadt_table(data); + + if (getenv(ACPI_REBUILD_EXPECTED_AML)) { + dump_aml_files(data, true); + } else { + test_acpi_asl(data); + } + + /* + * TODO: make SMBIOS tests work with UEFI firmware, + * Bug on uefi-test-tools to provide entry point: + * https://bugs.launchpad.net/qemu/+bug/1821884 + */ + if (!use_uefi) { + test_smbios_entry_point(data); + test_smbios_structs(data); + } + + qtest_quit(data->qts); + g_free(args); +} + +static uint8_t base_required_struct_types[] = { + 0, 1, 3, 4, 16, 17, 19, 32, 127 +}; + +static void test_acpi_piix4_tcg(void) +{ + test_data data; + + /* Supplying -machine accel argument overrides the default (qtest). + * This is to make guest actually run. + */ + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_PC; + data.required_struct_types = base_required_struct_types; + data.required_struct_types_len = ARRAY_SIZE(base_required_struct_types); + test_acpi_one(NULL, &data); + free_test_data(&data); +} + +static void test_acpi_piix4_tcg_bridge(void) +{ + test_data data; + + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_PC; + data.variant = ".bridge"; + data.required_struct_types = base_required_struct_types; + data.required_struct_types_len = ARRAY_SIZE(base_required_struct_types); + test_acpi_one("-device pci-bridge,chassis_nr=1", &data); + free_test_data(&data); +} + +<<<<<<< HEAD +static void test_acpi_piix4_bridge_hotplug(void) +======= +static void test_acpi_piix4_root_hotplug(void) +>>>>>>> tests/acpi: add a new unit test to test hotplug off/on feature on the root pci bus +{ + test_data data; + + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_PC; +<<<<<<< HEAD + data.variant = ".hpbridge"; + data.required_struct_types = base_required_struct_types; + data.required_struct_types_len = ARRAY_SIZE(base_required_struct_types); + test_acpi_one("-global PIIX4_PM.acpi-pci-hotplug-with-bridge-support=off " + "-device pci-bridge,chassis_nr=1", &data); +======= + data.variant = ".roothp"; + data.required_struct_types = base_required_struct_types; + data.required_struct_types_len = ARRAY_SIZE(base_required_struct_types); + test_acpi_one("-global PIIX4_PM.acpi-root-pci-hotplug=off", &data); +>>>>>>> tests/acpi: add a new unit test to test hotplug off/on feature on the root pci bus + free_test_data(&data); +} + +static void test_acpi_q35_tcg(void) +{ + test_data data; + + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_Q35; + data.required_struct_types = base_required_struct_types; + data.required_struct_types_len = ARRAY_SIZE(base_required_struct_types); + test_acpi_one(NULL, &data); + free_test_data(&data); + + data.smbios_cpu_max_speed = 3000; + data.smbios_cpu_curr_speed = 2600; + test_acpi_one("-smbios type=4,max-speed=3000,current-speed=2600", &data); + free_test_data(&data); +} + +static void test_acpi_q35_tcg_bridge(void) +{ + test_data data; + + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_Q35; + data.variant = ".bridge"; + data.required_struct_types = base_required_struct_types; + data.required_struct_types_len = ARRAY_SIZE(base_required_struct_types); + test_acpi_one("-device pci-bridge,chassis_nr=1", + &data); + free_test_data(&data); +} + +static void test_acpi_q35_tcg_mmio64(void) +{ + test_data data = { + .machine = MACHINE_Q35, + .variant = ".mmio64", + .required_struct_types = base_required_struct_types, + .required_struct_types_len = ARRAY_SIZE(base_required_struct_types) + }; + + test_acpi_one("-m 128M,slots=1,maxmem=2G " + "-object memory-backend-ram,id=ram0,size=128M " + "-numa node,memdev=ram0 " + "-device pci-testdev,membar=2G", + &data); + free_test_data(&data); +} + +static void test_acpi_piix4_tcg_cphp(void) +{ + test_data data; + + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_PC; + data.variant = ".cphp"; + test_acpi_one("-smp 2,cores=3,sockets=2,maxcpus=6" + " -object memory-backend-ram,id=ram0,size=64M" + " -object memory-backend-ram,id=ram1,size=64M" + " -numa node,memdev=ram0 -numa node,memdev=ram1" + " -numa dist,src=0,dst=1,val=21", + &data); + free_test_data(&data); +} + +static void test_acpi_q35_tcg_cphp(void) +{ + test_data data; + + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_Q35; + data.variant = ".cphp"; + test_acpi_one(" -smp 2,cores=3,sockets=2,maxcpus=6" + " -object memory-backend-ram,id=ram0,size=64M" + " -object memory-backend-ram,id=ram1,size=64M" + " -numa node,memdev=ram0 -numa node,memdev=ram1" + " -numa dist,src=0,dst=1,val=21", + &data); + free_test_data(&data); +} + +static uint8_t ipmi_required_struct_types[] = { + 0, 1, 3, 4, 16, 17, 19, 32, 38, 127 +}; + +static void test_acpi_q35_tcg_ipmi(void) +{ + test_data data; + + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_Q35; + data.variant = ".ipmibt"; + data.required_struct_types = ipmi_required_struct_types; + data.required_struct_types_len = ARRAY_SIZE(ipmi_required_struct_types); + test_acpi_one("-device ipmi-bmc-sim,id=bmc0" + " -device isa-ipmi-bt,bmc=bmc0", + &data); + free_test_data(&data); +} + +static void test_acpi_piix4_tcg_ipmi(void) +{ + test_data data; + + /* Supplying -machine accel argument overrides the default (qtest). + * This is to make guest actually run. + */ + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_PC; + data.variant = ".ipmikcs"; + data.required_struct_types = ipmi_required_struct_types; + data.required_struct_types_len = ARRAY_SIZE(ipmi_required_struct_types); + test_acpi_one("-device ipmi-bmc-sim,id=bmc0" + " -device isa-ipmi-kcs,irq=0,bmc=bmc0", + &data); + free_test_data(&data); +} + +static void test_acpi_q35_tcg_memhp(void) +{ + test_data data; + + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_Q35; + data.variant = ".memhp"; + test_acpi_one(" -m 128,slots=3,maxmem=1G" + " -object memory-backend-ram,id=ram0,size=64M" + " -object memory-backend-ram,id=ram1,size=64M" + " -numa node,memdev=ram0 -numa node,memdev=ram1" + " -numa dist,src=0,dst=1,val=21", + &data); + free_test_data(&data); +} + +static void test_acpi_piix4_tcg_memhp(void) +{ + test_data data; + + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_PC; + data.variant = ".memhp"; + test_acpi_one(" -m 128,slots=3,maxmem=1G" + " -object memory-backend-ram,id=ram0,size=64M" + " -object memory-backend-ram,id=ram1,size=64M" + " -numa node,memdev=ram0 -numa node,memdev=ram1" + " -numa dist,src=0,dst=1,val=21", + &data); + free_test_data(&data); +} + +static void test_acpi_q35_tcg_numamem(void) +{ + test_data data; + + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_Q35; + data.variant = ".numamem"; + test_acpi_one(" -object memory-backend-ram,id=ram0,size=128M" + " -numa node -numa node,memdev=ram0", &data); + free_test_data(&data); +} + +static void test_acpi_piix4_tcg_numamem(void) +{ + test_data data; + + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_PC; + data.variant = ".numamem"; + test_acpi_one(" -object memory-backend-ram,id=ram0,size=128M" + " -numa node -numa node,memdev=ram0", &data); + free_test_data(&data); +} + +uint64_t tpm_tis_base_addr; + +static void test_acpi_tcg_tpm(const char *machine, const char *tpm_if, + uint64_t base) +{ +#ifdef CONFIG_TPM + gchar *tmp_dir_name = g_strdup_printf("qemu-test_acpi_%s_tcg_%s.XXXXXX", + machine, tpm_if); + char *tmp_path = g_dir_make_tmp(tmp_dir_name, NULL); + TestState test; + test_data data; + GThread *thread; + char *args, *variant = g_strdup_printf(".%s", tpm_if); + + tpm_tis_base_addr = base; + + module_call_init(MODULE_INIT_QOM); + + test.addr = g_new0(SocketAddress, 1); + test.addr->type = SOCKET_ADDRESS_TYPE_UNIX; + test.addr->u.q_unix.path = g_build_filename(tmp_path, "sock", NULL); + g_mutex_init(&test.data_mutex); + g_cond_init(&test.data_cond); + test.data_cond_signal = false; + + thread = g_thread_new(NULL, tpm_emu_ctrl_thread, &test); + tpm_emu_test_wait_cond(&test); + + memset(&data, 0, sizeof(data)); + data.machine = machine; + data.variant = variant; + + args = g_strdup_printf( + " -chardev socket,id=chr,path=%s" + " -tpmdev emulator,id=dev,chardev=chr" + " -device tpm-%s,tpmdev=dev", + test.addr->u.q_unix.path, tpm_if); + + test_acpi_one(args, &data); + + g_thread_join(thread); + g_unlink(test.addr->u.q_unix.path); + qapi_free_SocketAddress(test.addr); + g_rmdir(tmp_path); + g_free(variant); + g_free(tmp_path); + g_free(tmp_dir_name); + g_free(args); + free_test_data(&data); +#else + g_test_skip("TPM disabled"); +#endif +} + +static void test_acpi_q35_tcg_tpm_tis(void) +{ + test_acpi_tcg_tpm("q35", "tis", 0xFED40000); +} + +static void test_acpi_tcg_dimm_pxm(const char *machine) +{ + test_data data; + + memset(&data, 0, sizeof(data)); + data.machine = machine; + data.variant = ".dimmpxm"; + test_acpi_one(" -machine nvdimm=on,nvdimm-persistence=cpu" + " -smp 4,sockets=4" + " -m 128M,slots=3,maxmem=1G" + " -object memory-backend-ram,id=ram0,size=32M" + " -object memory-backend-ram,id=ram1,size=32M" + " -object memory-backend-ram,id=ram2,size=32M" + " -object memory-backend-ram,id=ram3,size=32M" + " -numa node,memdev=ram0,nodeid=0" + " -numa node,memdev=ram1,nodeid=1" + " -numa node,memdev=ram2,nodeid=2" + " -numa node,memdev=ram3,nodeid=3" + " -numa cpu,node-id=0,socket-id=0" + " -numa cpu,node-id=1,socket-id=1" + " -numa cpu,node-id=2,socket-id=2" + " -numa cpu,node-id=3,socket-id=3" + " -object memory-backend-ram,id=ram4,size=128M" + " -object memory-backend-ram,id=nvm0,size=128M" + " -device pc-dimm,id=dimm0,memdev=ram4,node=1" + " -device nvdimm,id=dimm1,memdev=nvm0,node=2", + &data); + free_test_data(&data); +} + +static void test_acpi_q35_tcg_dimm_pxm(void) +{ + test_acpi_tcg_dimm_pxm(MACHINE_Q35); +} + +static void test_acpi_piix4_tcg_dimm_pxm(void) +{ + test_acpi_tcg_dimm_pxm(MACHINE_PC); +} + +static void test_acpi_virt_tcg_memhp(void) +{ + test_data data = { + .machine = "virt", + .tcg_only = true, + .uefi_fl1 = "pc-bios/edk2-aarch64-code.fd", + .uefi_fl2 = "pc-bios/edk2-arm-vars.fd", + .cd = "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2", + .ram_start = 0x40000000ULL, + .scan_len = 256ULL * 1024 * 1024, + }; + + data.variant = ".memhp"; + test_acpi_one(" -machine nvdimm=on" + " -cpu cortex-a57" + " -m 256M,slots=3,maxmem=1G" + " -object memory-backend-ram,id=ram0,size=128M" + " -object memory-backend-ram,id=ram1,size=128M" + " -numa node,memdev=ram0 -numa node,memdev=ram1" + " -numa dist,src=0,dst=1,val=21" + " -object memory-backend-ram,id=ram2,size=128M" + " -object memory-backend-ram,id=nvm0,size=128M" + " -device pc-dimm,id=dimm0,memdev=ram2,node=0" + " -device nvdimm,id=dimm1,memdev=nvm0,node=1", + &data); + + free_test_data(&data); + +} + +static void test_acpi_virt_tcg_numamem(void) +{ + test_data data = { + .machine = "virt", + .tcg_only = true, + .uefi_fl1 = "pc-bios/edk2-aarch64-code.fd", + .uefi_fl2 = "pc-bios/edk2-arm-vars.fd", + .cd = "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2", + .ram_start = 0x40000000ULL, + .scan_len = 128ULL * 1024 * 1024, + }; + + data.variant = ".numamem"; + test_acpi_one(" -cpu cortex-a57" + " -object memory-backend-ram,id=ram0,size=128M" + " -numa node,memdev=ram0", + &data); + + free_test_data(&data); + +} + +static void test_acpi_tcg_acpi_hmat(const char *machine) +{ + test_data data; + + memset(&data, 0, sizeof(data)); + data.machine = machine; + data.variant = ".acpihmat"; + test_acpi_one(" -machine hmat=on" + " -smp 2,sockets=2" + " -m 128M,slots=2,maxmem=1G" + " -object memory-backend-ram,size=64M,id=m0" + " -object memory-backend-ram,size=64M,id=m1" + " -numa node,nodeid=0,memdev=m0" + " -numa node,nodeid=1,memdev=m1,initiator=0" + " -numa cpu,node-id=0,socket-id=0" + " -numa cpu,node-id=0,socket-id=1" + " -numa hmat-lb,initiator=0,target=0,hierarchy=memory," + "data-type=access-latency,latency=1" + " -numa hmat-lb,initiator=0,target=0,hierarchy=memory," + "data-type=access-bandwidth,bandwidth=65534M" + " -numa hmat-lb,initiator=0,target=1,hierarchy=memory," + "data-type=access-latency,latency=65534" + " -numa hmat-lb,initiator=0,target=1,hierarchy=memory," + "data-type=access-bandwidth,bandwidth=32767M" + " -numa hmat-cache,node-id=0,size=10K,level=1," + "associativity=direct,policy=write-back,line=8" + " -numa hmat-cache,node-id=1,size=10K,level=1," + "associativity=direct,policy=write-back,line=8", + &data); + free_test_data(&data); +} + +static void test_acpi_q35_tcg_acpi_hmat(void) +{ + test_acpi_tcg_acpi_hmat(MACHINE_Q35); +} + +static void test_acpi_piix4_tcg_acpi_hmat(void) +{ + test_acpi_tcg_acpi_hmat(MACHINE_PC); +} + +static void test_acpi_virt_tcg(void) +{ + test_data data = { + .machine = "virt", + .tcg_only = true, + .uefi_fl1 = "pc-bios/edk2-aarch64-code.fd", + .uefi_fl2 = "pc-bios/edk2-arm-vars.fd", + .cd = "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2", + .ram_start = 0x40000000ULL, + .scan_len = 128ULL * 1024 * 1024, + }; + + test_acpi_one("-cpu cortex-a57", &data); + free_test_data(&data); + + data.smbios_cpu_max_speed = 2900; + data.smbios_cpu_curr_speed = 2700; + test_acpi_one("-cpu cortex-a57 " + "-smbios type=4,max-speed=2900,current-speed=2700", &data); + free_test_data(&data); +} + +int main(int argc, char *argv[]) +{ + const char *arch = qtest_get_arch(); + int ret; + + g_test_init(&argc, &argv, NULL); + + if (strcmp(arch, "i386") == 0 || strcmp(arch, "x86_64") == 0) { + ret = boot_sector_init(disk); + if (ret) { + return ret; + } + + qtest_add_func("acpi/q35/tpm-tis", test_acpi_q35_tcg_tpm_tis); + qtest_add_func("acpi/piix4", test_acpi_piix4_tcg); + qtest_add_func("acpi/piix4/bridge", test_acpi_piix4_tcg_bridge); +<<<<<<< HEAD + qtest_add_func("acpi/piix4/brhotplug", test_acpi_piix4_bridge_hotplug); +======= + qtest_add_func("acpi/piix4/hotplug", test_acpi_piix4_root_hotplug); +>>>>>>> tests/acpi: add a new unit test to test hotplug off/on feature on the root pci bus + qtest_add_func("acpi/q35", test_acpi_q35_tcg); + qtest_add_func("acpi/q35/bridge", test_acpi_q35_tcg_bridge); + qtest_add_func("acpi/q35/mmio64", test_acpi_q35_tcg_mmio64); + qtest_add_func("acpi/piix4/ipmi", test_acpi_piix4_tcg_ipmi); + qtest_add_func("acpi/q35/ipmi", test_acpi_q35_tcg_ipmi); + qtest_add_func("acpi/piix4/cpuhp", test_acpi_piix4_tcg_cphp); + qtest_add_func("acpi/q35/cpuhp", test_acpi_q35_tcg_cphp); + qtest_add_func("acpi/piix4/memhp", test_acpi_piix4_tcg_memhp); + qtest_add_func("acpi/q35/memhp", test_acpi_q35_tcg_memhp); + qtest_add_func("acpi/piix4/numamem", test_acpi_piix4_tcg_numamem); + qtest_add_func("acpi/q35/numamem", test_acpi_q35_tcg_numamem); + qtest_add_func("acpi/piix4/dimmpxm", test_acpi_piix4_tcg_dimm_pxm); + qtest_add_func("acpi/q35/dimmpxm", test_acpi_q35_tcg_dimm_pxm); + qtest_add_func("acpi/piix4/acpihmat", test_acpi_piix4_tcg_acpi_hmat); + qtest_add_func("acpi/q35/acpihmat", test_acpi_q35_tcg_acpi_hmat); + } else if (strcmp(arch, "aarch64") == 0) { + qtest_add_func("acpi/virt", test_acpi_virt_tcg); + qtest_add_func("acpi/virt/numamem", test_acpi_virt_tcg_numamem); + qtest_add_func("acpi/virt/memhp", test_acpi_virt_tcg_memhp); + } + ret = g_test_run(); + boot_sector_cleanup(disk); + return ret; +} diff --git a/tests/qtest/bios-tables-test.c.rej b/tests/qtest/bios-tables-test.c.rej new file mode 100644 index 0000000000..aacd6ae220 --- /dev/null +++ b/tests/qtest/bios-tables-test.c.rej @@ -0,0 +1,22 @@ +--- tests/qtest/bios-tables-test.c ++++ tests/qtest/bios-tables-test.c +@@ -927,12 +927,17 @@ static void test_acpi_virt_tcg_memhp(void) + }; + 20 + data.variant =3D ".memhp"; +- test_acpi_one(" -cpu cortex-a57" ++ test_acpi_one(" -machine nvdimm=3Don" ++ " -cpu cortex-a57" + " -m 256M,slots=3D3,maxmem=3D1G" + " -object memory-backend-ram,id=3Dram0,size=3D128M" + " -object memory-backend-ram,id=3Dram1,size=3D128M" + " -numa node,memdev=3Dram0 -numa node,memdev=3Dram1" +- " -numa dist,src=3D0,dst=3D1,val=3D21", ++ " -numa dist,src=3D0,dst=3D1,val=3D21" ++ " -object memory-backend-ram,id=3Dram2,size=3D128M" ++ " -object memory-backend-ram,id=3Dnvm0,size=3D128M" ++ " -device pc-dimm,id=3Ddimm0,memdev=3Dram2,node=3D0" ++ " -device nvdimm,id=3Ddimm1,memdev=3Dnvm0,node=3D1", + &data); + 20 + free_test_data(&data); diff --git a/tests/test-qapi-event.c b/tests/test-qapi-event.c new file mode 100644 index 0000000000..bdeb9095d4 --- /dev/null +++ b/tests/test-qapi-event.c @@ -0,0 +1,198 @@ +/* AUTOMATICALLY GENERATED, DO NOT MODIFY */ + +/* + * schema-defined QAPI event functions + * + * Copyright (c) 2014 Wenchao Xia + * + * Authors: + * Wenchao Xia + * + * This work is licensed under the terms of the GNU LGPL, version 2.1 or later. + * See the COPYING.LIB file in the top-level directory. + * + */ + +#include "qemu/osdep.h" +#include "qemu-common.h" +#include "test-qapi-event.h" +#include "test-qapi-visit.h" +#include "qapi/qmp-output-visitor.h" +#include "qapi/qmp-event.h" + + +void qapi_event_send_event_a(Error **errp) +{ + QDict *qmp; + Error *err = NULL; + QMPEventFuncEmit emit; + + emit = qmp_event_get_func_emit(); + if (!emit) { + return; + } + + qmp = qmp_event_build_dict("EVENT_A"); + + emit(TEST_QAPI_EVENT_EVENT_A, qmp, &err); + + error_propagate(errp, err); + QDECREF(qmp); +} + +void qapi_event_send_event_b(Error **errp) +{ + QDict *qmp; + Error *err = NULL; + QMPEventFuncEmit emit; + + emit = qmp_event_get_func_emit(); + if (!emit) { + return; + } + + qmp = qmp_event_build_dict("EVENT_B"); + + emit(TEST_QAPI_EVENT_EVENT_B, qmp, &err); + + error_propagate(errp, err); + QDECREF(qmp); +} + +void qapi_event_send_event_c(bool has_a, int64_t a, bool has_b, UserDefOne *b, const char *c, Error **errp) +{ + QDict *qmp; + Error *err = NULL; + QMPEventFuncEmit emit; + QmpOutputVisitor *qov; + Visitor *v; + q_obj_EVENT_C_arg param = { + has_a, a, has_b, b, (char *)c + }; + + emit = qmp_event_get_func_emit(); + if (!emit) { + return; + } + + qmp = qmp_event_build_dict("EVENT_C"); + + qov = qmp_output_visitor_new(); + v = qmp_output_get_visitor(qov); + + visit_start_struct(v, "EVENT_C", NULL, 0, &err); + if (err) { + goto out; + } + visit_type_q_obj_EVENT_C_arg_members(v, ¶m, &err); + if (!err) { + visit_check_struct(v, &err); + } + visit_end_struct(v); + if (err) { + goto out; + } + + qdict_put_obj(qmp, "data", qmp_output_get_qobject(qov)); + emit(TEST_QAPI_EVENT_EVENT_C, qmp, &err); + +out: + qmp_output_visitor_cleanup(qov); + error_propagate(errp, err); + QDECREF(qmp); +} + +void qapi_event_send_event_d(EventStructOne *a, const char *b, bool has_c, const char *c, bool has_enum3, EnumOne enum3, Error **errp) +{ + QDict *qmp; + Error *err = NULL; + QMPEventFuncEmit emit; + QmpOutputVisitor *qov; + Visitor *v; + q_obj_EVENT_D_arg param = { + a, (char *)b, has_c, (char *)c, has_enum3, enum3 + }; + + emit = qmp_event_get_func_emit(); + if (!emit) { + return; + } + + qmp = qmp_event_build_dict("EVENT_D"); + + qov = qmp_output_visitor_new(); + v = qmp_output_get_visitor(qov); + + visit_start_struct(v, "EVENT_D", NULL, 0, &err); + if (err) { + goto out; + } + visit_type_q_obj_EVENT_D_arg_members(v, ¶m, &err); + if (!err) { + visit_check_struct(v, &err); + } + visit_end_struct(v); + if (err) { + goto out; + } + + qdict_put_obj(qmp, "data", qmp_output_get_qobject(qov)); + emit(TEST_QAPI_EVENT_EVENT_D, qmp, &err); + +out: + qmp_output_visitor_cleanup(qov); + error_propagate(errp, err); + QDECREF(qmp); +} + +void qapi_event_send___org_qemu_x_event(__org_qemu_x_Enum __org_qemu_x_member1, const char *__org_qemu_x_member2, bool has_q_wchar_t, int64_t q_wchar_t, Error **errp) +{ + QDict *qmp; + Error *err = NULL; + QMPEventFuncEmit emit; + QmpOutputVisitor *qov; + Visitor *v; + __org_qemu_x_Struct param = { + __org_qemu_x_member1, (char *)__org_qemu_x_member2, has_q_wchar_t, q_wchar_t + }; + + emit = qmp_event_get_func_emit(); + if (!emit) { + return; + } + + qmp = qmp_event_build_dict("__ORG.QEMU_X-EVENT"); + + qov = qmp_output_visitor_new(); + v = qmp_output_get_visitor(qov); + + visit_start_struct(v, "__ORG.QEMU_X-EVENT", NULL, 0, &err); + if (err) { + goto out; + } + visit_type___org_qemu_x_Struct_members(v, ¶m, &err); + if (!err) { + visit_check_struct(v, &err); + } + visit_end_struct(v); + if (err) { + goto out; + } + + qdict_put_obj(qmp, "data", qmp_output_get_qobject(qov)); + emit(TEST_QAPI_EVENT___ORG_QEMU_X_EVENT, qmp, &err); + +out: + qmp_output_visitor_cleanup(qov); + error_propagate(errp, err); + QDECREF(qmp); +} + +const char *const test_QAPIEvent_lookup[] = { + [TEST_QAPI_EVENT_EVENT_A] = "EVENT_A", + [TEST_QAPI_EVENT_EVENT_B] = "EVENT_B", + [TEST_QAPI_EVENT_EVENT_C] = "EVENT_C", + [TEST_QAPI_EVENT_EVENT_D] = "EVENT_D", + [TEST_QAPI_EVENT___ORG_QEMU_X_EVENT] = "__ORG.QEMU_X-EVENT", + [TEST_QAPI_EVENT__MAX] = NULL, +}; diff --git a/tests/test-qmp-introspect.c b/tests/test-qmp-introspect.c new file mode 100644 index 0000000000..edae06c64e --- /dev/null +++ b/tests/test-qmp-introspect.c @@ -0,0 +1,58 @@ +/* AUTOMATICALLY GENERATED, DO NOT MODIFY */ + +/* + * QAPI/QMP schema introspection + * + * Copyright (C) 2015 Red Hat, Inc. + * + * This work is licensed under the terms of the GNU LGPL, version 2.1 or later. + * See the COPYING.LIB file in the top-level directory. + * + */ + +#include "qemu/osdep.h" +#include "test-qmp-introspect.h" + +const char test_qmp_schema_json[] = "[" + "{\"arg-type\": \"0\", \"meta-type\": \"event\", \"name\": \"EVENT_A\"}, " + "{\"arg-type\": \"0\", \"meta-type\": \"event\", \"name\": \"EVENT_B\"}, " + "{\"arg-type\": \"1\", \"meta-type\": \"event\", \"name\": \"EVENT_C\"}, " + "{\"arg-type\": \"2\", \"meta-type\": \"event\", \"name\": \"EVENT_D\"}, " + "{\"arg-type\": \"3\", \"meta-type\": \"event\", \"name\": \"__ORG.QEMU_X-EVENT\"}, " + "{\"arg-type\": \"4\", \"meta-type\": \"command\", \"name\": \"__org.qemu_x-command\", \"ret-type\": \"5\"}, " + "{\"arg-type\": \"6\", \"meta-type\": \"command\", \"name\": \"guest-get-time\", \"ret-type\": \"int\"}, " + "{\"arg-type\": \"7\", \"meta-type\": \"command\", \"name\": \"guest-sync\", \"ret-type\": \"any\"}, " + "{\"arg-type\": \"0\", \"meta-type\": \"command\", \"name\": \"user_def_cmd\", \"ret-type\": \"0\"}, " + "{\"arg-type\": \"8\", \"meta-type\": \"command\", \"name\": \"user_def_cmd0\", \"ret-type\": \"8\"}, " + "{\"arg-type\": \"9\", \"meta-type\": \"command\", \"name\": \"user_def_cmd1\", \"ret-type\": \"0\"}, " + "{\"arg-type\": \"10\", \"meta-type\": \"command\", \"name\": \"user_def_cmd2\", \"ret-type\": \"11\"}, " + "{\"members\": [], \"meta-type\": \"object\", \"name\": \"0\"}, " + "{\"members\": [{\"default\": null, \"name\": \"a\", \"type\": \"int\"}, {\"default\": null, \"name\": \"b\", \"type\": \"12\"}, {\"name\": \"c\", \"type\": \"str\"}], \"meta-type\": \"object\", \"name\": \"1\"}, " + "{\"members\": [{\"name\": \"a\", \"type\": \"13\"}, {\"name\": \"b\", \"type\": \"str\"}, {\"default\": null, \"name\": \"c\", \"type\": \"str\"}, {\"default\": null, \"name\": \"enum3\", \"type\": \"14\"}], \"meta-type\": \"object\", \"name\": \"2\"}, " + "{\"members\": [{\"name\": \"__org.qemu_x-member1\", \"type\": \"15\"}, {\"name\": \"__org.qemu_x-member2\", \"type\": \"str\"}, {\"default\": null, \"name\": \"wchar-t\", \"type\": \"int\"}], \"meta-type\": \"object\", \"name\": \"3\"}, " + "{\"members\": [{\"name\": \"a\", \"type\": \"[15]\"}, {\"name\": \"b\", \"type\": \"[3]\"}, {\"name\": \"c\", \"type\": \"16\"}, {\"name\": \"d\", \"type\": \"17\"}], \"meta-type\": \"object\", \"name\": \"4\"}, " + "{\"members\": [{\"name\": \"type\", \"type\": \"18\"}], \"meta-type\": \"object\", \"name\": \"5\", \"tag\": \"type\", \"variants\": [{\"case\": \"__org.qemu_x-branch\", \"type\": \"19\"}]}, " + "{\"members\": [{\"name\": \"a\", \"type\": \"int\"}, {\"default\": null, \"name\": \"b\", \"type\": \"int\"}], \"meta-type\": \"object\", \"name\": \"6\"}, " + "{\"json-type\": \"int\", \"meta-type\": \"builtin\", \"name\": \"int\"}, " + "{\"members\": [{\"name\": \"arg\", \"type\": \"any\"}], \"meta-type\": \"object\", \"name\": \"7\"}, " + "{\"json-type\": \"value\", \"meta-type\": \"builtin\", \"name\": \"any\"}, " + "{\"members\": [], \"meta-type\": \"object\", \"name\": \"8\"}, " + "{\"members\": [{\"name\": \"ud1a\", \"type\": \"12\"}], \"meta-type\": \"object\", \"name\": \"9\"}, " + "{\"members\": [{\"name\": \"ud1a\", \"type\": \"12\"}, {\"default\": null, \"name\": \"ud1b\", \"type\": \"12\"}], \"meta-type\": \"object\", \"name\": \"10\"}, " + "{\"members\": [{\"name\": \"string0\", \"type\": \"str\"}, {\"name\": \"dict1\", \"type\": \"20\"}], \"meta-type\": \"object\", \"name\": \"11\"}, " + "{\"members\": [{\"name\": \"integer\", \"type\": \"int\"}, {\"name\": \"string\", \"type\": \"str\"}, {\"default\": null, \"name\": \"enum1\", \"type\": \"14\"}], \"meta-type\": \"object\", \"name\": \"12\"}, " + "{\"json-type\": \"string\", \"meta-type\": \"builtin\", \"name\": \"str\"}, " + "{\"members\": [{\"name\": \"struct1\", \"type\": \"12\"}, {\"name\": \"string\", \"type\": \"str\"}, {\"default\": null, \"name\": \"enum2\", \"type\": \"14\"}], \"meta-type\": \"object\", \"name\": \"13\"}, " + "{\"meta-type\": \"enum\", \"name\": \"14\", \"values\": [\"value1\", \"value2\", \"value3\"]}, " + "{\"meta-type\": \"enum\", \"name\": \"15\", \"values\": [\"__org.qemu_x-value\"]}, " + "{\"element-type\": \"15\", \"meta-type\": \"array\", \"name\": \"[15]\"}, " + "{\"element-type\": \"3\", \"meta-type\": \"array\", \"name\": \"[3]\"}, " + "{\"members\": [{\"name\": \"__org.qemu_x-member1\", \"type\": \"15\"}], \"meta-type\": \"object\", \"name\": \"16\", \"tag\": \"__org.qemu_x-member1\", \"variants\": [{\"case\": \"__org.qemu_x-value\", \"type\": \"21\"}]}, " + "{\"members\": [{\"type\": \"str\"}, {\"type\": \"22\"}], \"meta-type\": \"alternate\", \"name\": \"17\"}, " + "{\"meta-type\": \"enum\", \"name\": \"18\", \"values\": [\"__org.qemu_x-branch\"]}, " + "{\"members\": [{\"name\": \"data\", \"type\": \"str\"}], \"meta-type\": \"object\", \"name\": \"19\"}, " + "{\"members\": [{\"name\": \"string1\", \"type\": \"str\"}, {\"name\": \"dict2\", \"type\": \"23\"}, {\"default\": null, \"name\": \"dict3\", \"type\": \"23\"}], \"meta-type\": \"object\", \"name\": \"20\"}, " + "{\"members\": [{\"name\": \"array\", \"type\": \"[5]\"}], \"meta-type\": \"object\", \"name\": \"21\"}, " + "{\"members\": [{\"name\": \"__org.qemu_x-member1\", \"type\": \"15\"}], \"meta-type\": \"object\", \"name\": \"22\"}, " + "{\"members\": [{\"name\": \"userdef\", \"type\": \"12\"}, {\"name\": \"string\", \"type\": \"str\"}], \"meta-type\": \"object\", \"name\": \"23\"}, " + "{\"element-type\": \"5\", \"meta-type\": \"array\", \"name\": \"[5]\"}]"; diff --git a/tests/test-qmp-marshal.c b/tests/test-qmp-marshal.c new file mode 100644 index 0000000000..54e3952d35 --- /dev/null +++ b/tests/test-qmp-marshal.c @@ -0,0 +1,383 @@ +/* AUTOMATICALLY GENERATED, DO NOT MODIFY */ + +/* + * schema-defined QMP->QAPI command dispatch + * + * Copyright IBM, Corp. 2011 + * + * Authors: + * Anthony Liguori + * + * This work is licensed under the terms of the GNU LGPL, version 2.1 or later. + * See the COPYING.LIB file in the top-level directory. + * + */ + +#include "qemu/osdep.h" +#include "qemu-common.h" +#include "qemu/module.h" +#include "qapi/qmp/types.h" +#include "qapi/qmp/dispatch.h" +#include "qapi/visitor.h" +#include "qapi/qmp-output-visitor.h" +#include "qapi/qmp-input-visitor.h" +#include "qapi/dealloc-visitor.h" +#include "test-qapi-types.h" +#include "test-qapi-visit.h" +#include "test-qmp-commands.h" + + +static void qmp_marshal_output___org_qemu_x_Union1(__org_qemu_x_Union1 *ret_in, QObject **ret_out, Error **errp) +{ + Error *err = NULL; + QmpOutputVisitor *qov = qmp_output_visitor_new(); + QapiDeallocVisitor *qdv; + Visitor *v; + + v = qmp_output_get_visitor(qov); + visit_type___org_qemu_x_Union1(v, "unused", &ret_in, &err); + if (err) { + goto out; + } + *ret_out = qmp_output_get_qobject(qov); + +out: + error_propagate(errp, err); + qmp_output_visitor_cleanup(qov); + qdv = qapi_dealloc_visitor_new(); + v = qapi_dealloc_get_visitor(qdv); + visit_type___org_qemu_x_Union1(v, "unused", &ret_in, NULL); + qapi_dealloc_visitor_cleanup(qdv); +} + +static void qmp_marshal___org_qemu_x_command(QDict *args, QObject **ret, Error **errp) +{ + Error *err = NULL; + __org_qemu_x_Union1 *retval; + QmpInputVisitor *qiv = qmp_input_visitor_new(QOBJECT(args), true); + QapiDeallocVisitor *qdv; + Visitor *v; + q_obj___org_qemu_x_command_arg arg = {0}; + + v = qmp_input_get_visitor(qiv); + visit_start_struct(v, NULL, NULL, 0, &err); + if (err) { + goto out; + } + visit_type_q_obj___org_qemu_x_command_arg_members(v, &arg, &err); + if (!err) { + visit_check_struct(v, &err); + } + visit_end_struct(v); + if (err) { + goto out; + } + + retval = qmp___org_qemu_x_command(arg.a, arg.b, arg.c, arg.d, &err); + if (err) { + goto out; + } + + qmp_marshal_output___org_qemu_x_Union1(retval, ret, &err); + +out: + error_propagate(errp, err); + qmp_input_visitor_cleanup(qiv); + qdv = qapi_dealloc_visitor_new(); + v = qapi_dealloc_get_visitor(qdv); + visit_start_struct(v, NULL, NULL, 0, NULL); + visit_type_q_obj___org_qemu_x_command_arg_members(v, &arg, NULL); + visit_end_struct(v); + qapi_dealloc_visitor_cleanup(qdv); +} + +static void qmp_marshal_output_int(int64_t ret_in, QObject **ret_out, Error **errp) +{ + Error *err = NULL; + QmpOutputVisitor *qov = qmp_output_visitor_new(); + QapiDeallocVisitor *qdv; + Visitor *v; + + v = qmp_output_get_visitor(qov); + visit_type_int(v, "unused", &ret_in, &err); + if (err) { + goto out; + } + *ret_out = qmp_output_get_qobject(qov); + +out: + error_propagate(errp, err); + qmp_output_visitor_cleanup(qov); + qdv = qapi_dealloc_visitor_new(); + v = qapi_dealloc_get_visitor(qdv); + visit_type_int(v, "unused", &ret_in, NULL); + qapi_dealloc_visitor_cleanup(qdv); +} + +static void qmp_marshal_guest_get_time(QDict *args, QObject **ret, Error **errp) +{ + Error *err = NULL; + int64_t retval; + QmpInputVisitor *qiv = qmp_input_visitor_new(QOBJECT(args), true); + QapiDeallocVisitor *qdv; + Visitor *v; + q_obj_guest_get_time_arg arg = {0}; + + v = qmp_input_get_visitor(qiv); + visit_start_struct(v, NULL, NULL, 0, &err); + if (err) { + goto out; + } + visit_type_q_obj_guest_get_time_arg_members(v, &arg, &err); + if (!err) { + visit_check_struct(v, &err); + } + visit_end_struct(v); + if (err) { + goto out; + } + + retval = qmp_guest_get_time(arg.a, arg.has_b, arg.b, &err); + if (err) { + goto out; + } + + qmp_marshal_output_int(retval, ret, &err); + +out: + error_propagate(errp, err); + qmp_input_visitor_cleanup(qiv); + qdv = qapi_dealloc_visitor_new(); + v = qapi_dealloc_get_visitor(qdv); + visit_start_struct(v, NULL, NULL, 0, NULL); + visit_type_q_obj_guest_get_time_arg_members(v, &arg, NULL); + visit_end_struct(v); + qapi_dealloc_visitor_cleanup(qdv); +} + +static void qmp_marshal_output_any(QObject *ret_in, QObject **ret_out, Error **errp) +{ + Error *err = NULL; + QmpOutputVisitor *qov = qmp_output_visitor_new(); + QapiDeallocVisitor *qdv; + Visitor *v; + + v = qmp_output_get_visitor(qov); + visit_type_any(v, "unused", &ret_in, &err); + if (err) { + goto out; + } + *ret_out = qmp_output_get_qobject(qov); + +out: + error_propagate(errp, err); + qmp_output_visitor_cleanup(qov); + qdv = qapi_dealloc_visitor_new(); + v = qapi_dealloc_get_visitor(qdv); + visit_type_any(v, "unused", &ret_in, NULL); + qapi_dealloc_visitor_cleanup(qdv); +} + +static void qmp_marshal_guest_sync(QDict *args, QObject **ret, Error **errp) +{ + Error *err = NULL; + QObject *retval; + QmpInputVisitor *qiv = qmp_input_visitor_new(QOBJECT(args), true); + QapiDeallocVisitor *qdv; + Visitor *v; + q_obj_guest_sync_arg arg = {0}; + + v = qmp_input_get_visitor(qiv); + visit_start_struct(v, NULL, NULL, 0, &err); + if (err) { + goto out; + } + visit_type_q_obj_guest_sync_arg_members(v, &arg, &err); + if (!err) { + visit_check_struct(v, &err); + } + visit_end_struct(v); + if (err) { + goto out; + } + + retval = qmp_guest_sync(arg.arg, &err); + if (err) { + goto out; + } + + qmp_marshal_output_any(retval, ret, &err); + +out: + error_propagate(errp, err); + qmp_input_visitor_cleanup(qiv); + qdv = qapi_dealloc_visitor_new(); + v = qapi_dealloc_get_visitor(qdv); + visit_start_struct(v, NULL, NULL, 0, NULL); + visit_type_q_obj_guest_sync_arg_members(v, &arg, NULL); + visit_end_struct(v); + qapi_dealloc_visitor_cleanup(qdv); +} + +static void qmp_marshal_user_def_cmd(QDict *args, QObject **ret, Error **errp) +{ + Error *err = NULL; + + (void)args; + + qmp_user_def_cmd(&err); + error_propagate(errp, err); +} + +static void qmp_marshal_output_Empty2(Empty2 *ret_in, QObject **ret_out, Error **errp) +{ + Error *err = NULL; + QmpOutputVisitor *qov = qmp_output_visitor_new(); + QapiDeallocVisitor *qdv; + Visitor *v; + + v = qmp_output_get_visitor(qov); + visit_type_Empty2(v, "unused", &ret_in, &err); + if (err) { + goto out; + } + *ret_out = qmp_output_get_qobject(qov); + +out: + error_propagate(errp, err); + qmp_output_visitor_cleanup(qov); + qdv = qapi_dealloc_visitor_new(); + v = qapi_dealloc_get_visitor(qdv); + visit_type_Empty2(v, "unused", &ret_in, NULL); + qapi_dealloc_visitor_cleanup(qdv); +} + +static void qmp_marshal_user_def_cmd0(QDict *args, QObject **ret, Error **errp) +{ + Error *err = NULL; + Empty2 *retval; + + (void)args; + + retval = qmp_user_def_cmd0(&err); + if (err) { + goto out; + } + + qmp_marshal_output_Empty2(retval, ret, &err); + +out: + error_propagate(errp, err); +} + +static void qmp_marshal_user_def_cmd1(QDict *args, QObject **ret, Error **errp) +{ + Error *err = NULL; + QmpInputVisitor *qiv = qmp_input_visitor_new(QOBJECT(args), true); + QapiDeallocVisitor *qdv; + Visitor *v; + q_obj_user_def_cmd1_arg arg = {0}; + + v = qmp_input_get_visitor(qiv); + visit_start_struct(v, NULL, NULL, 0, &err); + if (err) { + goto out; + } + visit_type_q_obj_user_def_cmd1_arg_members(v, &arg, &err); + if (!err) { + visit_check_struct(v, &err); + } + visit_end_struct(v); + if (err) { + goto out; + } + + qmp_user_def_cmd1(arg.ud1a, &err); + +out: + error_propagate(errp, err); + qmp_input_visitor_cleanup(qiv); + qdv = qapi_dealloc_visitor_new(); + v = qapi_dealloc_get_visitor(qdv); + visit_start_struct(v, NULL, NULL, 0, NULL); + visit_type_q_obj_user_def_cmd1_arg_members(v, &arg, NULL); + visit_end_struct(v); + qapi_dealloc_visitor_cleanup(qdv); +} + +static void qmp_marshal_output_UserDefTwo(UserDefTwo *ret_in, QObject **ret_out, Error **errp) +{ + Error *err = NULL; + QmpOutputVisitor *qov = qmp_output_visitor_new(); + QapiDeallocVisitor *qdv; + Visitor *v; + + v = qmp_output_get_visitor(qov); + visit_type_UserDefTwo(v, "unused", &ret_in, &err); + if (err) { + goto out; + } + *ret_out = qmp_output_get_qobject(qov); + +out: + error_propagate(errp, err); + qmp_output_visitor_cleanup(qov); + qdv = qapi_dealloc_visitor_new(); + v = qapi_dealloc_get_visitor(qdv); + visit_type_UserDefTwo(v, "unused", &ret_in, NULL); + qapi_dealloc_visitor_cleanup(qdv); +} + +static void qmp_marshal_user_def_cmd2(QDict *args, QObject **ret, Error **errp) +{ + Error *err = NULL; + UserDefTwo *retval; + QmpInputVisitor *qiv = qmp_input_visitor_new(QOBJECT(args), true); + QapiDeallocVisitor *qdv; + Visitor *v; + q_obj_user_def_cmd2_arg arg = {0}; + + v = qmp_input_get_visitor(qiv); + visit_start_struct(v, NULL, NULL, 0, &err); + if (err) { + goto out; + } + visit_type_q_obj_user_def_cmd2_arg_members(v, &arg, &err); + if (!err) { + visit_check_struct(v, &err); + } + visit_end_struct(v); + if (err) { + goto out; + } + + retval = qmp_user_def_cmd2(arg.ud1a, arg.has_ud1b, arg.ud1b, &err); + if (err) { + goto out; + } + + qmp_marshal_output_UserDefTwo(retval, ret, &err); + +out: + error_propagate(errp, err); + qmp_input_visitor_cleanup(qiv); + qdv = qapi_dealloc_visitor_new(); + v = qapi_dealloc_get_visitor(qdv); + visit_start_struct(v, NULL, NULL, 0, NULL); + visit_type_q_obj_user_def_cmd2_arg_members(v, &arg, NULL); + visit_end_struct(v); + qapi_dealloc_visitor_cleanup(qdv); +} + +static void qmp_init_marshal(void) +{ + qmp_register_command("__org.qemu_x-command", qmp_marshal___org_qemu_x_command, QCO_NO_OPTIONS); + qmp_register_command("guest-get-time", qmp_marshal_guest_get_time, QCO_NO_OPTIONS); + qmp_register_command("guest-sync", qmp_marshal_guest_sync, QCO_NO_OPTIONS); + qmp_register_command("user_def_cmd", qmp_marshal_user_def_cmd, QCO_NO_OPTIONS); + qmp_register_command("user_def_cmd0", qmp_marshal_user_def_cmd0, QCO_NO_OPTIONS); + qmp_register_command("user_def_cmd1", qmp_marshal_user_def_cmd1, QCO_NO_OPTIONS); + qmp_register_command("user_def_cmd2", qmp_marshal_user_def_cmd2, QCO_NO_OPTIONS); +} + +qapi_init(qmp_init_marshal); diff --git a/tests/vhost-user-bridge b/tests/vhost-user-bridge new file mode 100755 index 0000000000000000000000000000000000000000..36d1ece0dc8a198846c3a8bf277c1f7d093736f5 GIT binary patch literal 83120 zcmb<-^>JflWMqH=W(H;k5YI}Cfx(1U|;}YkT?hjJS|Dd zabaM9;WZ2l3?K}W1L44@B`F|xp<|Hw0t^fcK~GCkkllAch=BowL3%-c)6dCF($7iJ z&B@FwtFGvjh~Fhw?yOH zqnRgx#*ao*--5+(zR&K*J71f#TE;O@9TN`eHOb z3!3_FG9LNUm{0%+l`4|{-GLzCvGKx|YQ*@2=3_vA=0YkiJh;MvKYEf!>W^qYsQHZZ|PJUi$ zNMce>DnopHdTxGRd~r!)QAvC}L%dg6d=ONfb53G$acVI{J9f>Pd6^{)@oAZPnP7`^ zGLsOt=42*Sf$TQ~NfnjAnWd$fDR53+YDq~>Du`Cjt6T3D=UC_A0%tQP?VZnmRp?85FejfRFsz=pOc@QSdy8a z2bM@H%Fks;&dD!MWhhR~ODV}`NK8&nEhqumoD9-$#t`r6A75OOl9?A@TAZ4~P@JEf zom#>WA74@Lf`mYFK_yr$K0di35tKp_b26(yCgx-& zB}0>2Zek`Ryb_bML5d;%j89ETEJHsbpo~ z1gn6kg2;kMkUS_ivM_Lg^>Z*VVn9&i15{6g${&HuOkM^CR)*Wqa*C0GgTalF0n`Km z8N(n5mgi!4$^;RcI&m5s0|O_+dnjK7EYHF43(6M;^Vu0#m?7%L!F)CbJ}4hz9}Cz% zkQ<8SGdV%6DG8{2i6n^6#GnFd2rxj}MjW6rCYON$L?=M$1}NPEr8}T>50st&rKdpY z8Blr-lwJU(mq6(iP zV3E(jz|P3PU<0C=7#JKtG&2K(3y5Z6VDJFZtPBi3AexPVApk_PGcbgJXbuL32oTN5 zzz_qXxfmD{Kr}Z4LkfuIVPMDr(Yy={IUt&kfuR6I^D{7%fM@{*h6)fZ$iPqoqJF2IR=I`AX=V*VFQR(U|`q+q7@k!c7SLl28KN#TA6|20Ekv&U^oJz)fpI0 zfM^W{hBF{qi-F++h}L0XxB{Ye85nMWXgvmoJ0M!0f#Cs&Heg@~Zhph@LYs?$q4DtZ zBnF1=<_ioA46O%BSYMu zya9;c0Oo_FGAuy+0x(|(BoAt;y-Wb}K}s_`K=J`#KB(Nu2mtXNzjO3JME<(fIHG|K=kCtp`dIx|`21FfjZ#=xv^V^8f!Vku1i5 z7eRmj|3A*60&0W4NCPQ-!xR2O_diUJQa}Jg*Ort2{|CGP`46VUFbXzRA@E@Vkv2+CHS zu1^dP^fsHG`v1SP)#d;H|J}_;7#J8jTR|zkv(*OVm^Uo{w}Pa?!e4;WWAhP#<{$t0 zTbvjf7@B_+@we<|05MAWTZF(OIs7d*L0&cM-VE|`Z}aw3|Nr;yzIN*W|9~vU|7I^v z|NZ~JxB0}S|NsA+Wto8j!t)PE}^f^4@wFz>VEzI zZ+M^+tg89s|4-{8{%-~8_^BbPdi^rWhu5q|A6q$R*V1t|G(gbgqHPQkZ5Nss21XH0gau6 zckcxmlg03VD@bAZi~B!8mJ7gCf+YD{UNbT<^zIG$4+^>Nsi4r>396DmujbzlHY@FT zD@c-wA?@G^jNAYoRSc4Mu=cSOu1_{h8hAakXDmmT? zY8W{1GBb2Lus~v{`2b_Ui^T6BpC~l{_+L_Q_^tIoDeLR$&BquaL1A6MQs3G9h9~UB zt{;)zJk`tih1TLAvUUdEV{~zM-<|6`-2x|># z0;yKrZ=m6kN_t0a1Zr|2OXejUs>j_W%EvZW)!sAPlOvVEBbNBLhR@ zq2(a0U2g;!7tSP#g7931_E^3Jb`z zOT8&7BGIvjd$*{8QbB0v)8H53|NsAQJS+@yQ;N!)hTR|o8A?^Un?cQ})&nJcz0IKd zxRXWYh0WLh|6iE@|NsA3Ge{L9)U?iT(E8&AXi&EC(D87P&tyQAI7jQrQqGs)bX}sx z&^-y%6l=Xy@)qVp7M1^(PQC=?hY3*7EusRg?b9ZNhIbwf3+}xBV)H+c8}q{%7@FUx zWLX7v`l!gfsQU^^k^-#1qO!BQ^Hg3u25iLU~aj)MuCArc*@-k3JeUIA0&Ule3>@EQbeU_e{UH>^I^v3 z0~(gEOZ&QGRCs!uPh0_~T9ae{|7R31f-0ou6=y(=u+?Ax|L-kPgS7{OUs(MG1^l;A zkmophn|qKn#v*Gh`uhKW+Jx}1&TGLh*uZ)Yg)%TS{`$|%z)(xa7tq^W0CTArvP&m`g0IuO^TX>qX%l*z z4bI|l@50YW?mY%|Z)o^VZUzR1u;3SmeuLax7XoV6o&nVjEhkSC53n@!M2y)?$YSVqQE>?fdl3hAqCo2b{=ReE3=G{aDgnn^ zRC+)`0V|P(dfhH65#4*5&s_fhpYi_x=e^DIj{X1t zzeFVigh9F$A-bXMY)D|I8nZ%LLXuMFzs}9s6JPTio-D2x&mckZ@*v1xH7Y5+&05F*|L-nQ z$!LDV0_xJd`0@@EDS9VB*7Jmcg6|PXgk^tsjfzO~5rNJv$3G}CFudFXj!KU!pghA8 z(A(^C4ic$b-hp%qyqp4-2Svqk7nKyyK;>~46;PL-A&Vi431n{9yZ`@>yQma^hFErh z2vD;kL?x#A(Vym1teqh$F|YZM%3l|igyuIa%?Ee_Lc?C{gV@q~fWK4w-~azF?t%Cg zEG0L4o1IR8_@D;o8dA?WB$Gc zJG=E8f2#^714A<;r7`lia&R&*bl0e`^t!BN=ruXs-F8M1)X)51BGvqcC*Z}^_y7NQ zPXmedy0g4k4rwNKx2WWRat}yb$XbTZmg^t|p#iSU@iG%zr9P6zcen;$W9UTFToD0!gy!N2AMJe}<}$_xxI^M3#T zk4S6EpkPL%9Z(?;?%oFUHj6^zCG<5oUS67_Xw+b1U}&yUNdT3Qpp?ho`kfUVV>#U+ zDg~V`DgxauDk+^IDk9w>DjA^WPH*$`WB>nmhNytbSdsrFDk31Ce18SX{Qn^3C#Xo4 z0f|0*1+o*wmH1zxA`za&n8p0RL`5Ns;e{DEVS>6E{4HCcNxnNoh3B}7N&+ZLceaB% z;N31N9G%lao$^j_Cmo#IUkZRyg$p=WvVgq`YK{f;HgAVk4_UAN|L>j-5(EuiUE*(X z1dlu%J@)^<;mOV%6^`B#m7K=oQ$Q`Ovz;y~61~k6&i()2>7pXj+q?n7Qs`~I0AZ>0 zHh+MyG4&3Vv@!9;_1u(|06)@>;IM& z;6nB&uLCTv@aIi4GSpV|>|Nmty|IMJL%zp_AL52TiJpao$ z{+Fm|WHG+z2CEVIUncOsM8zhH@kJF(k<9-xP(T}GF}_H9`Tu`6TelxacNj~j`;Trn zp3d+;o&4QlBAq@e3e87&I^9{i-2}S*WIDrnI^8+C-6T5wMLOLDK;6V{9~F`RTULUc z4T>^m7Zr_wEQS|NVCRG5td$Mar*6J*?En84tG|GUmq2A*H#pW>50q#$zv1}59W<^I z@FE)QJWvy(RRlB|;iAHFya5!upiBzU1saM0^*Y7CxpUX6|NjxgGoZp9tOb^@k2ip_ z2uSns22c(Gv0ldg03|>lNS%}dHs=N=D`JXK!TQF!HDz! z|Nq~j0vi2=QXn~5uw2b~kSPlPOH?XA7$m_0mRJDM1RC=FzeNQ^f#hC12ibB2s%eV~ zsNMM=LV=`DK8NP}9)lgSz|GdSJBkbpoj+a_ zeg6Nyy9aDZ_Y@USf4Q^m2}CL!)TC{Dpvb_`-J${-Z|&*3Sa&j=5X_b;o4Dk+BYxlM+9I!bb;5!x=QFU*Z6&4vq!%Hm87sHjD8^{FDFxdncEy z{{O$%ou%_9sB`}5#VJU$yW2&j2HKi06>5Id0Pce}dw^PjH{SpM|Kc$Z14C~a1GxV$ z4tC&WH&C^&^R2;LnSp_&yGF&KJ4eNZzr}}YhDH|^(99-d zbBKxv1E{F>QDFhqH=Cs0M7_0V?1BmuU1h2ZFi>pysdJ6Hw;h0S%vbyQnDq z-vCnbBH=MeRG|5Y4!BPR_D?x`H;;D_B|Nr;4XM=om1k&00`Vcfm3o0C8 z#i4a8s3hWVxy#JJkO2y=uq=k&7D%z|qGA)!9iw9Kf)DEBe?0sxi$JwwjEcnZ7H|y! z3fJa09KBP(C4T3PAn^Eezz&d6Sqz#V0=hx{`ws#CH-koyyJJ)wUMzS73O{fS-7=qr zfr0TuC#Y%Zq9V~f160a)Zva&R-5nrjcE+e!bk6`4@|`6rHJvdk8r?HMl|^TaN=5e! zP&v%My^x82djrT9X_m+MTVhy16E4SHR6rBb4BtQVZ$D&ssnbQphJU+@BTMJOP8SuE zZWk2^{_PE*iU6#j(?vyxfBUh{bDb_K4xn}}sFekZ@!lEjC;tEMj8Spvov|3g^5~th z55n^4opBSw3h15j1;PsHoxyeztRtd#h6IEa(>tT!B3LY;cZL>3ETwmbD}-1)~N9Cx4&m(VBl{C zjT3{DT#kxNugN4(qPEQ7=zQOuqawlYR>1*E;mj>xA>(piLF01FEnh*ScEVG>g2wE+ zb5v9`Pe|SZHJY2>uylr~2y}<2m>7NwXM7a|YBz)9U+w|8f>G%f==NZVhz<+yeBJG$ zqQUt4Mayrn$4r`!2x!)*$ndv-7H5JS^v!{Xk-udT$dTI%_?q8<+BN~*H7W+3zhAt6 z07?KnpuGHlD<}^Cm#Bd1qVW6w|MPDLC&=a_JfJpeNEYJ@M~EmWvY?_7S&T2V?}N?w zU!vmhzeFV_i}8gdT*Lr0+LFcif*mem0UBz_Vtn!S9=Hhc==^Z-0Sn{N&Kwn$`2VFW z|4SJ_rFld7-i}A%;uqsfW!R3F6N=X*u zi`ifio^EhTa$o{E9%Nh#SXkhjD-RQYO9!Zc1@*%MSh_*E9~3(hpiW9RxSielwnUw^ z2Q)r=X+n1dsO0A9=IAa_;jp~V-~1Ugsd)%Ic>1dJ;fpt*u1tvd2Y=HqWXU71 zAEr&%3n~TEI@hR71FZn?0rh9!@N~zh==3%VTm;pX+2F7dc)0*Hb?2fY(|Vvz8I;*o zdYg}c6hJ1$!2_BNP^G0Hr6DRh-6bj--7zXA-8Cu|-8m{X2Olwaeqg-Ne2Aqpf~7k~ zrKB^0qw|8{CB`3uubSU*WHDrMbYAR^QPJo;)Oq7Y&`(fsHiM!wt+^SLZ5h)*1zqz2 z#m^yDXUu1Y83F`PZg9?S_BLd$T82MYDfcpDycp!yd z7byGu4tOyM9OAGtTjf7^2KL38yP#+lc)9V{|Nk%6gL;oODhl20pgEh)-~SDI+oxRo z|36CyG;5=H7ctUq3Q8|7Dhj;~HJ}EkqkY_t%RAf5uL)#E7Dj}dk|3J5sKzEc(X9;-lRHfTV zqBBOtpwmUgqT7iBRDg9J=HKqb2MR1F{_RdYhL^s7?rlE{_BQ|al0X(v781Dw3f*I! zE-F6FM+ACfz+cgoY++I94pCuYZut%=O};})lkbqyDy0A6|jsO4iGcfSCg944&MMa_c4GSovaRh)$qR!VZHs1zC6c0#DCyVig3z!S) z-}8V76y8;@g4m-~$$B7ZsWA0MKYLPd8`?nFZni0eFtmf#xXaxHcqTv2=5E zo2Y=Y)gRD`5LmW)^kV9BP?ZhJS0*a_P0XN$88FGCuOIf7F?8CffQK5pYgAM^f4?Zb z19GiEw~R{bZT^-9aB1hFVg(-kwCOHU(fM8iu5AnsK4OOE5Dsuo@L&Pwki&x4n%{7A z-U8>5kD#R0`LB1|e^4adc%cF6U^Ig(_TQZ@DjLm4cmg2RIVh&JZh)%VO+~QBisE{3ckj zwT()N#rNa<3=9mV7a+a^$biHZnR>l%pG*DFAcj}jGy-ZqU(|NnP> z4tODS8;1*7IjEV@PK>Bac+stt3|Nkr%P*yF2xB^t2ce1FwO#1i#{|?Y# z*6Yn69lgynkaB4|B$r+TFY)oc{r~@q70}|iw}BNjx!U;zX?z=;e~&)`<=`~CXgq9!)N(JQ1~QUfx-t= zn=ABgmH-V`M_&geMUj91|7#vQ_>ZaeTZyXSf5doxiHgqu5*3}$|5J8@)HEMwY(64j z`MvaU^AR3!boZ7qe1^}wLM#k^VFkAAnR{{IKBgH#3!-vn?iZcI}+8&UfS8N4V586PGp9f}wR=+bqEKW;_&nwLZImD2`CqG>Q zBo&{ZmR6h!az{>13Kv2cHxbA#7~2I9OTj9)RL0SymW=K%%YM) z1(2Rp&<+TQMuS2* z1Z{RuD9Kky2PGDT{5+7O!1_S(0}4DihL`~2<|G!E#Do1E4-RUm;czKXNI_+gq!OV* z2y;p?L{czCQj3$LRa0X1K%M~EfY1(#C$JPaeiamu?E*!Lu3ctI1(G1hSr9R(AacNg z{SOMWOxQLL4NV2mri|1SJucKe6UY+I8KrsI#a0RoiW*?&WX9@2T%)F7q{*O~qQDT8 zSgw#%nwFLdNt_I-21XSM(9I|snkc(BG&B*(1hhfINdad`%^&K znu`In)g=d%Dijn{i>*|PxfqI4bMs4}*%~4OQ4iTn0^NI(Q;=T-iu zf+T$W-Q%4cgRzRcxgeVkQXLlL>E|Br7wU^$!qLSA#X$%y=vILI3o#5`2BF8>)7cxl zJD!KFBdB0NDy(N6=z%21O-k>8OyGU!stf zUz(SqkeR0dtp=1BTtR!EtQ6c5Gjmc?Kt%{B?Ukh}fHx88fzzpiYKlT}Mt*5dib7JV zLQZONu|i2kBBa`22+mK=1}T7OOHlxoOA0BO#RZ8a$r-6d3gsYLj|z_Zem3|C=El(VFs98CHeUZNtx*ixv9mVRIgA3uS-*O z6hH-|6;e%WrJ!1>qfnlanUe~Z%TLpQ)P@C#l{xu|DVm_trm7UQG?u{@11Kmcgn_Dc z1yHpPw-6i_pt2lPs$uA1U~ntVO9t(6Q&26|&;-X%W^O@FYHn&?NotBhWon5Y7ejDr zUJ59GCnY9lgQ5pq!YQEF?+oC=9xNAMkWpC-sYa1o0H8uQH#IlEs4^bnb&!BT1-xhi zaY2qRE=WvH1#5>iFSDLR|tBf?S97VAD2{_7bQFqGK^q=Htx-^O z1=Lj0QE(~BFDL+&HhK`f&~g)0#vmD?hoO#3j{?BJz<`|olHq9q9E72Mo)O>zI<*AU zJ^#Li6OH&FIKqW|OUJ5AHfSMU85cSczr3$4f;Nmm2B)%ZABqLTKS~o`_ z2UMI{f!i1$fg*(>umHGq5zEEEz^PlR08$MqlS=b4D-=@la})ER&e2myNli;E%>nfn zin$m#LFVNrC*~-C%uqZ{z>}k=y?N zKey%o|JmFA|6j7<|NnjK|NmE6|NlSl+W-G&tb@=M>;C^YTlfFJ*!utfGq?Z$4{BJ& z7vvY0#6y~mps9AS7-$1?d{JUiL40aOYBB>@EIqX(9$YMdI$lWPpdG!CZVR|$0oDL2 zH%gO=;z4;Gl&(`57}5(8<4f}6%MxL7(9$LzloMcL2(v)N7{n3=28O~iG`%2oAhXj_ z;A+5bgo!657Nq zpuI<1PW}I%!NtH3a{B-O5FQ2wm&^bEgEo_Gx%~gX1tSB)lgt1AgU%8;a^?U31&j;~ zU#|TBe}a*Lq2=oT|0+xj3?|q9|8HPoU~qZ-|Nj(r28Jh(|NsBO&cM*}^#6a*uELVn z|No!iVqh?N|Ns97ZUzS15C8wq;bCBK{P6$(1|9~6kPrX=AK_tO*z)23e*shFtppKOJOj~W9N~8P@fk3+V=>y9JC@JHo6o|L&&Hk4fdMp81=^@5bNT;& zP#MkO$j1S)N5Gv=#G6mTkx#~*59EJPBNMa%Pv!Fe|D8}f+d=+o1NpC+C5%tTnNPus zPb2}X$%#+FgHOPj>o6aW<1s!C$K!k~9^9UMGOm0Ij(jSPd>S5nI!=5B9(wcmY-hh8v6w3~Me!;u_>XXjr+y!zz&P z0W(uN-xFpxz8B1{d~cW?`93gvfCMx6o-jM22}VN|c=3H@##gFd^ zvkTt~W=Fm^%uakCn9=zl1M|_;fW#88#F7_x0@P-ZX&x}=xbwYWc7_@c(wfTmgc&5} zf+QA<#12C;1m+}=cR+@M`2Ktkm_wmz+>!Lf@;za8Lh?!|-vj1EB&Wl|CxMIa39~o1 zH`Is#BqQ>np%ljVfH@p0k8DK<-xFppz8B2MVlX`sd=Ho-u;{6QnhElH5L6!Kl}f$` z%pOqrB)$jCX;5|s-vefUB&UPC9RiA44`|pSJAesYr9a;nW*5F6%#P4F25ADtF(|-6 zf#AgVh1rSk2eS)Y{sA+S3!2G(AnS6WZUE^7xxtO^4YN1j2WD@+2h71xzrf@?u$b!1 z_k`J*?*%im8fP?{(bXjJJzRx`9aW}01G9Mhe3e=3Mp9pU{m7`4JeozraovMgb9Ew0_92Ed`P-PPSYSg$b3*5 z2c>6ZF>GoAAZZzt?_80Rz7O96W>}67=ljC!hLRc{F#CYDK{dGZePDLw4#E_2=0Yk& zKm~^*-w$RFcr-u?3|DSYMgdt4N|Ru-_#QC3W10pQ0;zN2MrQIoVFn3eXa)&7af1RI z#A0BGVPIf*!^Xg{;`aalb5YA%M?QgO7C*iTj7fY`7+v{hFgo(hVRYwP!05p@fzg9+ z3ZpaM3`TdpIgCzx3m9YhCNKtY@d-F0mGX|<;3F6qeApQnUfllwe+FnS7*Q7@*G~>i zja+;#-h3X8d_L}c0bblpj(jeTd>$@*K2CfAWqb~4d_InR0UmrVPJA9td_GPM+8LCllR(J^ z+;#vpp!fuQ_(VMTB%HwQsX%ULE-=G`Pr#K=#F0 ze>-Th2U{8ow0@E_SFA9!)KNMW}{wO%|H7NQa@j;3_K#KaI zI{f%PDAYq0gCtX+irt~|aeN;XqWHcjxbXc@aDzL%|7bLW3g6 z$#GnKUlc%Aft=ya*P!SM+O!3V2M=xr2AjwK|8p`jFd((Jkn_GrD4&lDI6nvTxw!Co zxP$Y22A=~{EI6+_f#m|QItF~M-x_WPh9CR>{|BAR#o)rj$lxx(%2dkW#?M?@z$U=X zR9Yjz##CA%z|2%y!Ys(hb&!XV!SS%;F~{SMN1b_CSlqc8K&!+UzHl=z%zXU+KWKY2 zDA|D8qZ~X844p_~p!T*54+BHT`Ambz$7#M1J7#LKpeLd5^{0Nfn)@&7#I|-7#J+A7#ISr7#Py57#M1;7#OBm zF)*yNVqiF8#lUdaih<#~6$68yH3NgTH3NgIH3LJuH3P#2CkBQqP7Dkc)(i|2tr-~B zS~D;lvWA?W4(e`!a1{fD-wmawLTS*cc_8_gv? z&U1gm$iM)am^EN#U;y%;&5`ExiJ7=Hc#pDzbe zNF)ZGHxE-<#>2qS#>2ocjfa6@84m-)HXa6sV>}ED*LWBhp7Ag+eB)tYVB=+A5aVTF zP~&A_Fym!laN}iQ2;*g7NaJN-DC1>dXyavIn8wS%u#A_1VH+<4!!ce4hHJbG49|EO z7{2i`FtG74Fo^LnFsSh{FqrW%Fu3tCFof|jFr@J@FqH8zFtqV8FihiPU|7b-z_5*v zf#Db*1H&~w28L&R3=H4+7#P_285qPstEm|v=T^hqK1z>KW@9 zDi|3Uni?7zm@8-mrKTu&B$hzLb&WI`KqsYw##JCUWic>p5NBZcDZ{{^z|X({T7Ln% zGYb~7H@#shSs1m285nrpa5FG~7UO;Z-G&EM#l*pWnxBDziG}?th+PF!22rWMp7q;Ybl- zVBq@$VsmiJ=VV~u`wL?8a2#S}VBq@)VheCA7iD1J`wwD^@a1wdFz_)jf;bX1p5q$SR90M>XhVLneV+iIX@Vx=hpe!iGs51yuuro05i!y?aYZqhzrBP9RSr!Hc zAvVycEu)YP=t4gxAtTUmBa2WGXb6`>$Q3lQD^LXLq$fs27bKo1lmEDY=) zL776(JRPKH3uq`9G=9#&!0|$afkDs;A|N$PEG*AJHgT}DfQtvFN>&C2 zQP6?yV6O-@upDM#U=WT4jbsZ?2OR|^90bb2!XhjT49vnyK-pcmmYIQpRd^R@V3$E` zFR1JQ1%t2zA1eccFdrKO1Ea7ysHhSK-8;%G?9UAH)NdA$CRb2s3%d$2FmQ?p$9BBd!49s&t!c341 z>c}(7SGR#lbgEYMtWnf@_1_`j6Yzz#{&p~m>!VxaSz`*IFD%2r@7*zXgelaNJ{NU|{|P3P%YBHWpAsv$L@=Fz_&c`wX&X0XG8! z^AC_x1`f~+0rOvwQWlPAkemO3*c^OMI6!xoF@n_dFmQp3Ts8&<2~cukkOT)ivjL+F z8v}!IqzEYNehGs{`q@|{SwX?U#=sy2Dn!{>)Y%vqM07y>Wg?)|X%6DsfcTr4Kzw%) z-v`8(VgvERLHrmt1_t((YzzznVsDqQF)(m^W?*0tdk+cCE36C*Vju2sf~pM}Mg|74 zkMf+Lg6bYS1B2L?C{RJqz{ZjeG6$rWy_bQ3K}PJ)Z;&}FL1Xg&Am%jiFffSy2b;sE zDaODc#=tlaR2=io0U653=m;{2FB@bV6Iccmmg_;rf{c;^O?|Mjuz?n;aX%I|GBve;yE15X2M` z1u+#t%%{8{Ca8Xpk>vm}9YLZB0w5-+h>}SFo6yM40CKH9s9po72$1{OSnNT3aEh?x z0LlA<_}~=b3FgOx_}~-)I>4EYB_G5Gr-)3jd_9N{j@e2uzaPX0M@c7`KOe*gN6Abu ze?5o~j*^vN{(cZ293?x!{PQ3_I7&`}`S(G5aFE{w^WTH`;2?j=!2rp+oSe|Co6W$I z&BDMSDGl1^!s5cgz#t|ENV8{_p=VxGO5kAbpz|bMQ7BsacR10zNx z3{vSJ^(-87xfmFvGQdR_M+qkbgH$Gn&BIa6%fKL&1yUox!19oVfk9dh+#cM)&A=d| z1#&2h9Vi8BgWSk+Q<#B4Mh6t3?B_tYHp)6EfvU5Gj0_C2PPahSp=?fS9)qk4C`>pw zwzD!Y$hsZjVqoCmC=z5~ko5qu`54$QfyxnC?_iK-up%Fj1cPj5N(F=aT%n+ z52S>JfeR#*#0@K7*+ExCa>xd?aWjDQFvy00>|=n~9R^~vFtE>NVqjpAjoc2mBMM{) zNPPu^Y&3`swIc?kgoS|%Wd1R@9c(P1hBq4v$b)PwAe-2CfU09T;lCggC-X2c$ccbz zNCw%w(p&~PQ4pJjfxViMfk8t~E{KPLfdi~a9wfm44huO&5SxV~h?RjsP8}Ry9HxQ{ z404(vwg5+l7z2ZxHi#|3!OO_NAg2#vD=@HsVP#<8kq_MrG87bE@)4jU#lZ1cfPq0i z4#Z~U@L*$LkdKG>>p43EgM0#r&BDRY$G{+;2x7Bw>;g59lR#_^4p$Zi2Ki(Vn~Q;k zi89Z0LfZqO!01x5$Z#4yJvW(EdEN04a@9D9Wr7#N*Ejdd0db1?=6MrV+c z76vYm(eAtq42qyC^glBL3&;pY7ZzRy2KFc(&=mOM>%0sM9B)8QT>>%efhYq5<5Cct zg+qs(fq`)uD4B9_Xz?&GFfIqBULFq6^%aaOKx{saD>29(BSIR0}nFfgtKnXkgY0&)c7x*%Q#2C<0(3=H5po^dBP9|ME% z15p1^con$KCk1MP2`lh|ng?PgpjHwn(isoW0x4tyP3jBp76cV*`D~zKZ3U>gBHSwo zD%?Ob->kxx0t^gn!kwH94D7-`Ks_|!GkgpToWh{{s=0)ZF)=W33;XgjFz^U3WM^RD z6?O!5E`+DBGBEH9pWtL*5D+fnU|Fcp=6DGJ)~g zTRsK`b^#s+1_8zw@gTD_xfvK3UxF-TfLQ(t#O7dN0V!g9ZN<;Ppv1w*_+>Re1A}s@ znF#~qcaQ>^BOnj_xB)7^K;;tSPf&i9F$L8mzd+V1=j5j|F#ZPF!Jr@^!oXm`$oQ5S z)HtsIrJ8r3c!FeC#!nE}gHzUL5SxR;7UYvZS)kxoNlPhaVEhZxD#EB52C@L$HZ);m z-~uHXVF836LH02I2RT*kFgGYIb1>!#Ffgd67bG$;axsD&&cFw@hX>5zP%kV?WMJe2 za|HOnfiD2&NbtP?C1N2kM}a{AWE`U~qnrQ(gT^Xm1_lRZMo~sA5m2dR_;tCUgJ+yru>JR_(jqM)q#6O_9Yz;Xu4nx{ee zR1s{7iL&MdP_j}2%h@P1aDf5^WH-1bWM|+4<#><{P(B+AsH_tJ`IAwZ5!CV0Rup1j zU;-^GVqoqPWMI(Y5e4xl+-ei0Elf626D|8 zrZa*J42BVm3=EG185lqs7}!`61wlW>BJFw1%scVMeHwVFtN?K`#napvkg;Ri?sK%CaC-%CbOI z9tN4I0#VrySE+)eQU$8=C@6^aAu4ymRq7+D)Q74p;b&lAG>54C09R>_q|zL$5*$(> z1t1L!JiUwz40^Jl4ro0XQ+z6j2~O1UkVMVK zvY(NGK?J14cY^$OALMxgRWLY#JY*!oXM#8a@N1Xiyno;twjv z!oWJ;!gYorbb_VKz%_jssHQhdPGVpT1J(0TAPW3Ji|-uU*cljf1cezG z*c|_gfqS!{u^17MY1+R97#LXnK+a<}5r@SEn6GmfbT~UW_;kQ=;RiCE!8{z4ZQrmk zri(K$7=TX7V0^;@8l5nh3@Ve}uz*T(W21~z2F5QeAT^+b3>tp%`?d=0V+ z936F_=+LTT1KG6u#5T}B25OK|(M1=RjDElOr!YzOJI1ZS2hAg1*>aRvrR zhM5IU;nw%j1dL5n85n1S>;ky~)M~Y<2UUJ{tRVfM$pO%z7>sjLB^VfN!LGMs1+hV0 zT-#Pq69d8rrDwaO(liD}J64eIKvx>r7cek7u!52qXi&!Ck~jl{oCgDg!#i;X23-*2 zCzQd!1`ZL&Ku{iYSCC*}0G*t{IA?(b1A|jB1EV|0#MPhyUQ-DM21}4uM+pW7SJ3`G z=UQO~h5!i$2GD^TjC1rP85mspgc%q>Yhztz2{SOfW?*1&T_()HAk4_X;I;vjkC?wW zGcdS=yzmBO%sycT23yeDQx7Id1_sdex1Jyqm?lPef(&5$%>0!}bv|6u3uG9QK@O^t z3=DxFw=gg`KNV(RFpy+m03FG}IHy>Wfx(MUgn_}63Dnd71tRBregh@5Um$Y68>lJ8 z%Dlswfx#gTW{h)|2m?ccBm)EJybi`WYEldgE>$873|)*23@)uA3=HQP85q1PBq57% zcStfYxK0EOr7|%vI5bN#FvNh|;*%@Lz|bnmzyMlc%UE#_6fU)(_5w)N21y2nbdV~K z1Ck63nxLh>APd|fNnEMN)pza6RwjXB6 z0}umb2_p*wgA2%hQ5L9=KpH@MT^S?6J~9R=0Qtz9g@M7LUkdIcy=+k84umuTtfgV4 zPaskgAP~|709E541t1N^pb9butcd|qg`1xPHG)bR8FxuDFc|oOirZ3f1qx}bl`?`F zKoK0{zjbi)-w=oOJ#w>`9X(2oEqpG8W;5tngA&#phzaxHCd@%HVGh^?qq3qz z2F7{JATk&j(HeA;uBwddnx(Y!ZwkMFV2M5ek zuqJSTSIaRlfDD2JIEV)ha0vz;kdb;3AeV81vlQcbxE-8G`H&Nw4=uoUaI=8p7id~1hfrX9pgusIIk!4V7a@QEXs&0y{VYMX3hWOSE@ zD-ERIo#sCNczqTc}f6 zKpBB)B8xq^Yd0P2s(2O#h9GeFZUzge6URL9M~y`RsHZU#tUK62nt@@F6azyAsI;EV z!lB5(;1Vg#z#z-Yz~JI5&A{Ns%D@l;l66a!W?*2RxS`&y5X`tz<5ml1+^KQxlxASa zXJue;ohr@1Fbl+3D9yldl$C+OZH+Vo11occ3j;$isHGS!&A^sTL>U-1voSD)O%!EdaA^}|V7Ld;v|fgR zp#!W5R9)RuV_*PHaWT$kyaBQeRA*VSGcdS-O86jl1_lR4b!Z9iU?k1JFdfvC0BHhM z-wxdBkTylQm^uSPwghM&O8_f#l_{v9zz__o)AoUO%YeE{b6EE1GBCJ^N;5E|u`@7) zaY{2Vgn+i&xG92z$-#wzArw@DfpqYLyb;2Z2#OL=6*h%~fx+RdGy}sski)^sE=q%D zq!<_&!&o|C%GQ9CJ(q^obYNv59%#0fF@j}1OxY2TvOg%wKs>OrNS13bWp_Zz1Z7~R zfjZfiGN9!J3=E8IEHX+A3}Fj|7#LjE2r)2x;b35h1i2or!idEMrY1_lRzm>~?_ zA7mI9iWnFemMAeWxavzYFhp@OFa(2if@DD3d>CU{B9#~zz`7@bbTi9Bod8y*Aq$EV z1_s7>mIj!zl^|udFlAtO1js@*4lyP|+;I@3BubWnf!PxjIiXkN7#Nad85o>EA>GBI ztIWXQ@==a~;U*^oL)cR}1_lq9tm|Jn28LWN1_oD7c?O0CE~sop+; z22f|g119VC2-J6DE^&qiHB6k*5@PgCkkNaPj0O#$9Fb*UFar6ph2nL5_hTK#qX{bl@Ii1IsNH1_qb8 zatsWUxj~s#j)5TrB;&eLj)5Vbhk?O$s~iJEIS&Ja+d(-{fzsm)je;mS1_scffsA}C z-5@hSQ81NTc!v`H(@vI(YaElAlTm@bX~P3=9WA;Z?`-S(Smo#Zr!e;V2ISLzphetWA-C+ z4ouk{kg{eJWjo~=7(kom7@1fm!<2miDLWyLTw+wHF))Azofv;G?}91g;bUNM=v9MS z>fk944Tng1NH|_a!C}1uG*}pd4TTvPUV(BbsFz;CVy4c(5atBR1Af8` z44(X;lAMWw!7U1${y~SpmF<275sU2G^4^3=FX###I>x2GFV?*M~9; z46T9;3~p~^K>0)hRPlmxc)TJ5g9pgeGUm-7Q$c||Ly&>Np%Uf}a6SR?z=2TCd<&** z14vmvOqs(fMFxgYPX-2uNVvO0L5=%oiVO^sKzX8or9qQ{!Noy_f#HN814EdJ3K%mwl^C|GMj%ATSq1Mxt!UW`7> zhA?GQLCU_NCqw} zP-bA*01A;jmU|%Mri(E!92H|=2cad|W?<+B#die@yAA_`OP(wPgQ7SCLl~&i^nl5_R>?9jl!68u z+GH6RPD(Q{cukUp#u!KqXx5N%5wp7%G}7-#GcY*tsvwtHARf3~vY0s!rtAwynUV@L zRKO7n;(?VdVV(+8#sl(`If^n6542mEaVhg2m@*ZRvS1WtARcJ5GvhMm$1r6!AZ0ly z%0N7@Y0H_pw4q)I0V(T1Q3m44gG!$j%!V*!IUr@rVamXTg|I3E!w*n&tY?mZDQf{K zQ&&X}5D*Vs)^A|0hbfx_Qf8-$93UVbSlLGAWiVx1K*~ZDFanE z;QBv$uL=VLXu#~DHn`MfDraDbz6TZiiVzF`2^EWA3;?NNUhA;(CodA<{wUA|CsE}n~aCMPoVCaUWkxo_6aybSD#;MHNAkCl*2I|^6 z%!hdb+|&c{z)h@akivT#sD-!@ri6hZ6x2{UuFAmR42p#+7D-S${GcoY!#P<7hOn(5 zhrncA&&o0|B*`%_xZVUMT{&oCJ*~>XpaJSs?qmJ}b4Z6A1B1gum@Qz3fOues?1wmH z0Z0j`jQ|cw28PgnK?VjcHE2^RjU`(b)PxoUHK7F=7d!DRgo66EB685t$VDvDdZ3P)JOe|NJOhJ^vOEJrfjk3)2TX;lwLAj@s4?Q8 zB*(z81XOq!$uTf&@MK^J2etm-U7|eDXfFeUgS0vW!){Ou+`mZ-v_yergE|8P=wM35 zIh^{i-tBU5{}kT4U5?tjT?y{pPLpR~hyjm{tpck)AkV-MTbjqfxS9pDK8tzczq(k^ zQXIxLETCa|=7~S*z$L|BbRmwp9d=RbJzjKLW+a}=P#zyLZwlW|U<0Rw}Jh$sWYH&BQxh%zvMI?J9q zplRKS46YWU3=ByM3=D2AqM!t_!kK}=`;GyvQ(t*1TANm%PX_f!4fOfS0_;F@e^+Sb)|VG0KA{-YjN=CgBtydUZg9 zWJ*k+0XYkO&={Nw6KEX`czmeY5VWd`fx%)TNJ0xNVNnShCDMklr-1559WWa-im3;l zD7P>LjeqGgfhJ|Ftqd6$EI>DCGO93v)*&%ir+`F~K_k1aOrRkh3r~;>+`!5$KIe=Vq9z2@FcoiOW=fTsHknlPWNse70FPw*r z6VC??HC+U20*^*r0y7!>4M9=8pXq}p0|V&LRmM5R7O?!fAM7=Fe%%jtI(#(hAULXg z6&V;}j6ow>hrsc5LXm+X793}XnLs8nPrMUvpOI3;z<7kI#e#vMK#74N2D~`pDA@EX zN(>BfV0Rt^^BDw;z_ENB%!>iX&INE_gL>oO8r4UOfdMpv$9R@$l@YXlR#RqRaLCkx zrZI4d0OEm5?Q={QVan`4%Br=XY1tig$@g<3SY%y*1bQfwI0FNywE^x^-C|NOW?*p9 z05yU@!vV753=EkdhLAV|LoLX-O|1`G^MAV!=41H(C028Ixjde>e91_m}Y1_sxe1`G_fAjVPy28J~t#zq4M24&Fr z*_c_n;`?kDG)=*kb%KQlYzli z#*l%bK$C&N?V$mvMDzibh+f)|El5*M7#O^CK}pvgG-FU{&cNVmZ^*##45ZQ9kbyx} zi-Ey4+>n96R*Qil7&H~90m|*5xdK-v1ycqF7tjP;G^iB_ntkil0(JFR7#LhZQ*>*! z7#NVIh^7#O%s85msEL>L$zX@Rc#aM5F608KE)gLE@bWC3-S!Go3IIt&Z}AZt9C zLP6Gm1}kGhO)$`4Wq~#WLl|hl(qWSh1A{v#n!ri*y$*Cx%ZRB4qzP1N_GyF0!*r2T zG@~wbz{8knF-#e#73ctJ`GDIZVADW6F;K2HVLAm->|x5-bU>LBMOmgU)Tb6qX)tASAZ67k z%DQwJ7(gpk7%iE4Vam)v%I2ad1M$F?S}|>bDf0s?(>f5D(n8wq??UDVqjT_6DvDGyvVL4{eY*GDU)vfd-)0ff|{h z0qA2O_4D-^7z#mYAo`3B0|ThFkZ%rdkg!aA5y!^huv#B72+a@-GHejr;x=EZ=TqagE2K;|vrXJEJqigbr&eg=jYUJMKlYhVUDnDa9*dUumewD6@VKI3-lNm>_F|i0&sibfF1)w47e><1a8Yc1o6S`xngj8j#r<7 zAqL#0D*?CZ6!aMwg23&%QgFMDdE$=v7;t;89NeDs0jUQ!-73MYhH?-e+Cg&<`*hEPX4WnggO1fBi|syjhjut9aL2TX;ls1*al zD^uubI7k#c@aV`G1JVcbf}$A%gF~1Rw8#TT8Hl$5~+qkdk{a zcQG(Tfl3|_{{hI#=Zr4bEg2YQf~wKemJAG!K#cvC3=CrC3=AP4C9aPx85k_g85kTm zjTsnXy%`w7ryC=+M3=;~F+VZ@wL}dqAuUk`hG-2VNL7+&2d_#TI*g%}0C;tZc>pM* ztYKn&W(O+>*MQ3ta9?o^xGaJ61J{Ae4M;z5J-Ez(^aD45%M0u4cChyTCP;f9+U42- z;W7CC2KDcrFfA}7dd>ve zGsZMAz#g!F8t{1B18)1A}*v z324&>1H&161_rNFb_@&*-ccryHDizM85mq|*fB6@TQD#%L|d9LFo25tzxI%b01b)+ zfd)mw8%-cl1R4h{15LF$Trg%}$na)hh+bj>iC=vOuqIY!D@)J{y_F`=2-I5w>U(Yn zkMA(HI5036=ztcHZU-;*GXmEQJHe8m%49cq*vAMopY_uw-Du3R**x9rvI}rMmfS{{(}uQm;_2W4B)kh2IoL*MhLqHR9!Ja*l$5> zW-!|Vyb^;Iyy_9OXqpWo`WY0Z9AHrk(82~rDEl-h62(|STLP@@9T^ym;^WI07$sOi z8-tDF<11in24jef0+I}b&A^a!6I4$}fDMP8y1+Q6(4B!HARQD^5E-V43<0eWE@)pH z(?k|X*hPT@z&^jAgn=;{Y=)x+14D9tX$b>kJ*&F_v~2=n2!OobzzW($3|{lr0BZDr zO5hn53=9sb0?-B|xWO4Jz`$StQs2TV<;1`MR=)6@YM6R(2@lc@Zaz1%dco8` zfvNukQeQ3rE#blHK|Co?VcNu61yk<;YBYh|6Jg1~-~if<1YT7LRu8fbG&;)I#<~io zz5=Fx0!aNaxO+hD%sfG8!B)h25u_eexNQI_YZip%Fpx435A2L$)*mosCqT;Pq9_CL zzyks$tn$v#{Q3Z-Y!^&fFsPgWB}LGNHO4a53Ks?j7cU0}h98y;3?U#v*DwbL1}Q5B z2G=A91_sb}cefk|1_tKRCv~pn4h#&DRtyZmn?xBH+JzVx5va_NL3@ug+ z3@(R685pKpF)%o65@KK|_67|)+!F=uhGJl-0I7e>avY@oohSptF)IcJ571OTXnND@ zmnZ{+7b~c{2U&~)n%@L>VxF_S1L*(-&MT0?slw2}akwJLz|iCknoSg9VCVxeE(tL( z%mguB3NbJ&1u;PD1vY?+0FZg0Ayrcsa1j6jw}Pq$54+9=2{AAPgYtTzFayH`kQb|2?cEp{Ty8rsFff7IHRl}|7{o!0 z!ww7#dLYJj2L=Wo5M#9i14EuQ149T%qw8}A28L#91_rm!;4nW^=la)yfng!&U|vo~ z28J^rDN#pIbX=)(-vQc)?h0z#I5IG>fEqbQjtmScpjN*(XsZKg#e+IX9<+$u1tjm| z$iPqrk_T75dqo%+z^O`~)z1~0T)J%-7#yyPK*JZDrmuq{50nRlSnEK_K&_(1pauvi z59|i1e<_NbXMV%f^RTXiss9gCFK!E(W)p*|cUUgWz_1$>Nf)7vXmt?=22juGo+~(# zSW1`Fu|+Tjv6LRDV`GTUgv$Ph$g-Cnsbf=K;09K(qK=Khp;QE#4kn2}qCXnsOHiz9 zyMYY^$2z#SaQG?;=`1-&ia{6*48fq1ALRWDplGaN6?F%-U>!hH8R85Ka0v@mmkx0T zhG=k;MVx^F)Dj8-X>pq@4vL&Jb#8OPj3;%jE5sQXR@yQ!xNZ_>U^s5ez~CJ#3aQo( zyD>1h9uj9@xCIK7G*ReMXzzAW$oTYQko;wF28JIX`Dt+Z)uNEqSKr(i7`z^Ua)^UH zC^LbYF&9N4DH)tL??BQfg9B&_{6$a};1pzF_z3C@x`P9Qm6@Xf#0X+#W@!Ldtx)+m zn7jZ?o(ClF0NOwgUJHLr6k2a`fflRS;AJWKR&d`U-}MfGiAR0Zr6|Kt(`q4FXqdp->T!qf?qd z8!=aa#xqm;L>U-(SAv=GLJSPNtH4Y>Q3eJDOVGmp)RjC84D)#y7*rWRth6{T1_lsT z{Kt}(!o$D-!n}UWY2|_p3?Qr|&y*g^!oUE+%FgLOL>U-BSVbaz8508o2s4GJ&tYa@ z0AZ%kbW=VC1`uWuPu;-Cz_5%FWD|&$9?Z_b0KyWdGQ8$_U|im9OU{koTnwq3xfvK% za)WFEu`*cZF>x`ZZs%oSSj!6%1hLZW#26Srm_LOv!*rf8$u~=LF{IkDFfbfrXJAmX z1+mgW2QPuJnoox4JYleb@sN9EK{qK|aWQ1b%##XEEdk$jU6xr?Qm6ouNG&c-EwZU;yJn#`L{x3=ANwZj=dHq6Na~mxLJ@Kv?2)hU`3P@66{>^!PgC^vx7G3axySTYGmlm(;@zXX)cCTBPIq04JJ@1fmo@aJvpGm9@vaQtW3~` zCJ@e$pC=oTUt9va)43!cdb4$YohUAw7|ifdPai7NZ$^Y17bBymFh~)%B7>)} zJ~smcj~WBWOkOnx1_nM}h)z~dVUSLKF$foQ;}?|43Q{Y`!U(b$W}lD-12dlt=v*H# z1GEL+9Big23)o$r!dBeYtRPFpkOa6v0^(pDpp$Mu&S7AXgqsXjFD1;t%x5FXz#uJ- zWI0hrbxDxP@~mJdD1d{86{G+pstB@1pOt|@Nt}@zE~<<$ zgMmQ>!LeXvU{FO^2I8uL%>xBB*n#R$#n1rL0Ly~R1#={8)AmD9-|?uoi3~lhG64eO`r@nFhhcY!JV5iR2<}D z4{k<~p$rV3V8s#)3|=5L3=G~736L5eSw=(QAjVMf2<}L5;P@g7FfjOmxFAzt^8Qdq zv#O)IIDi!r;UI5HFfar{JpknfK|>kJ4F;JCwH2JkLO^b2U43Wsn85p8KT$rg04AC%6Ab-XnIY69&Ar>i8Bp4Xt5VD{W zARc6gp)lBv1dtRcB{E4cFeD;8-_8h4O-ZO}2IP7NiD{6Ok<0~6xu8Z)3dkf-7WNdj zmjo3Dsd@|`MjjtHUvTGvu6aNaVr5`RM-kv=V8}3I0J$U+A%8-4TSX7Y6zyNLp z>6R9!7U?DxWu~O3>Lr8rR}`0|Wab;`WiT)?Fcjw}XQ!4x*rj=y#U&{ac5z8jW?s56 zlmk`-(@~O=lA5NM!NAPG05T~Lq??6-p`@}PwHTrv#$;t+D9OxCg$Nd>=AWF}=onQ;4A7#K>yf=qA&SQ!`!6ALnRVMepToE{Gnf!dItoDFKyL3qhf z2^I#1%sjme26hI9QVuaj2~KVq`6WnpEWTf2*enfU`FlM*8fBlBAZ4v<0DYCo|sGJj*Az{14bRRL1{jlBuX zW>N(y`^G*G%(DTjg2-@yl-*zlTe|}6kelpjEKJPH!R)*294ASVxCpSapL-#h-elj=9RUea9_-Rt(k?1`3~3xOW5_mY>=JH!6x6V z07c1i_NKKrI3g!%`5OaA#B~-X=6jVOuPkB%rL22k_jIsvq}>cF zOW*D3&BDa|xe}Dxdf7m>dkz>JLZ=d?~FUBS&+wZEy(IbU6pdF6QaA9M_n;YeC6>LoLTO z7DncMOdOz)IaCV@nL|tynA7Gl&t_Z0{IoWLIg8^O$7SYU4A-tQtL@^@zsfw5@fwE^ zhfxbG2Q%+1Z-QiE=F=P;HlWlitnaFj4}a-=brr!jMS zF-v%{Ffq4RgB^aC1?29<)gW_TurR4GW}Ex7urjw+gN$fm<=Dmivv!vo3mfzA8c@u3 zGS6dSWBy(P%4?m>3Sc%UgLgA?d}8io+Qq!5E^T2-s!zJ7_reVSlF5ek>zIo`1Y7+sneWtsqHq$67Yi%%yK0arFg7TuPi0{;XJlbzeq9Z+Ybpze z&?y}sohToUMJ!Cr(`rCUE;2LqFoJ?%eGRC*y3Wj$#CVQ*Lfr}G4~$;S6Y9J;lsViv z3}-WUFkfR~V(zX6XOXwe9H0c<0}i^c%)3A`HK1tw!_3j-!y#u|%5k>1`I$HK#CmYf z`%nYcHi?Kb)ZzVpazsXA2M^;Fi)%B#e9+B3G)dCP`>eVVlK1cXtpo( zvGw$wJduTo`7JnfC$oT3=3B5wXR&|+U~@Idh!fxd*ij9VH3oU>10#n5^BN{lKwYi% zVqVQ;!=xeXndxDd!NSVCrWzc@#vCOqjLfT9o}BUaWX|LC-84x^{Ou6H=|15jbE&zu4d z=PO`O?q=cm1a?by39}NDG9&ZCx(MdkOdKT~3j1CC=R@86w`vzOAGEVxgNpqG6*ge4 zCs>+5G>1HhOy_t$v9xhc$696!jx`+l8<|)c7#SH@nLulAnBQz5+{4=e)LO0TT;EJ7|uJ`34swladfKFUOkw%tdJ& z>sXkWo60yqaW$U{r0-!V$jFskOjV4`F-+==Oa{EnTucUxpRLoOj{Z{`0rf~97n2XT zer7&gw+rNOj&u9O^vbF60Oj`+-BJAXch{cdZ07FOmt}wUpq%6k#v5aFE^At{wC(Lil)-X@z1jS)XImmgFxj538`|Ecxe`JVY z?yu)K!J*%up3ULipPt>GSXMO2qmn~(-71c(6){n}Q}wer7NxIFXJKOARR)S?d5#Gj zg?|?sawIP1P-^eI&7o(rX2KH=ALe(Q91+Y7Wf9CB;0pgdIMge)NqZ@%rj%iEzQeKEMSQD3{Edf zEXZI;$t*4?0_g$ik1t_JE-uZD&reG$PAx%bOe|r5j&+tLX67*D2~ zr^n}{mZjz}6ldnerzPfQ=2SA2ro=-U{_zEgB^hAl>7X&ec#tc=3c-wcPyhJh#In@* z)VvgiFc1IWkoeGG*P!@d*O2(IAWuK{cqhkTS9mD+h6FIg$ETI%C4>BwnwL_N&k*eI z>>VHE7|xJhkQiT*A77RT>6IW2%`)U97MH}A7N@4fXXd4(R)Fj`gSaF<9^CfL%!`kY z&rQuuE~t!8&d6qnFH6i}06DI_D6=FrJ}I#{6%iB_My7BVx%xRf1|Xy|^Ad{+ATbGw za8L}!=j116LxhS_3&CMfTv7x!+|AR+l>yBK#i=D=7ZjGkd;@X@IE=uqfTo<1cu;2m z?hF@a=KzM}#GD*Z`eBGq&PdG6LvmF?1w(vtX;FM~eokp_9yB6B;lU6eUr>~pSCR&{ z6BJ{hXo*kBVJI#sD#_15juUs(I6;ana1wR)_lb9l_YGtyN=;0ugu5)%B>>`ikjp?R zyELUB9+dJy3(+Ad3gnRZ)ST2@hA@z)LW@(2f*>IUiCnPfAkpmN3o#57N)XK;Pebw# zEUN^BV#zArVZOee!NHz>?x6UJk55DLc35drkxObB1F{QKQj1H#ag>`_l$}}x4YHKf z;$((gP}qVJeOgXpdNHWGQ~*g!xrr6vL=SOddTI$Y34-Dc;zS%d*v~)2(K*C3%oUU; z!43nPYG%TaSDG6S8OknZ$W6`7FRF|OWm1Otct~e1J`I!^p*_s_5{A;uyb_D}5_sr) zy89xh&f?Lc9YCaZsj5cqTp`bOL64d_a(E zNJwP7Td1FNh^N0_d^{x9f?Wdx9G$&gLl~T)>C&wL16#0n$R_;?0T=!0@`5hS?dL1mPgNqh+;I~OPC7o^5#rZB`i z<>%)>99@uDRGbRVDe(pQMJ4E|8If*X9YaEcT!TS{3pi5a!4a8S0`8A96la1maU!IE z0~-WOYn}n%q79q~(^6oa_`KAT_>7dI_%cIq=?L0l0ZzWbAwjN=zKDF8nxDszoKc#W z9SnsSF?m$@zIDMfo{!i#!9u%n;ez7o3!XQqw_3r=>vCw5NYOsO*R@ z02Pnmsxvd+*a#XzAlpD8lUtk)4pd0YfYKm1H5eN)#24hlQcX^39w=Fqq-5qn5&|go zLdpw7`b8?hKp_UHZk!!`d>C9ZiwhDrxC<5 zWwWPFwAtOE~H7~s+1MUl7#|Y$14~l0WfA@Gd7jW4QPHmtB0ap)dM?jpAlV6+~ z4?4CNEty~`GfMM7HJA}{d=#bT=9i^1#K#wwCZ@!fFys}1(|R$ufG#L0iZ5Zv%r67E zmZ7*b57I^gm4@KjH?NqXAh9whKQRTAmMT&*(=$tu4Npu-0VSZ4qLk7ChQy-uWQO?s zoD@)L2x_sxvSd(jSO7@24DLB+e_v4Z2~_cBfYTMYtq4!k@g)o;Rq?r*d8H+(#pU4o zFFrW~I<&|D&uJDQyNi+;a`N-i6~F}O{-F5y6a$9%_!L8i`1o8zXMk!`P(2C`g_M+{ z)Z$`>Vh{%$(0QrlNTE?sS^{o}#OLOxAT@moit>OesJ7_S{nJu3~4FF@kyY0CL~p$!p+y! zH$KGC$;TCvJyY^aL0vR>(u35y3`MD+Hf&}dsNa?cNhr{68#q8fEmu@;qS*qeDji*1 zf)M^KNK8*fFKQv`T>ZcfLS!>g_AG++w7?A`7xy4XUr;7b%qhr#Rwb~e4ye_K-C%D| zXK#2A2RnyAI~pM8L;BqCiVjp9mp~eVh}KtW9%f31^r+!&VaSXUBrL&29lWs$D)T@k zH#FR!7J$<~xB(BV=s^u~L$i2LUm`duClORsfeLDn0Jw<>iq!a0P!~PkGdM8^RJWrA zHmJS=cY?ujlaiSV_p+x;0H{R*E?rVm%i!6hT2^%Ve3%WjZn z4RYWjrALsx!5+SDE)1Z2l#1w1GQ`J&=G@{-z-=E;A6ZDfY{ z_`Iab64d?yqU^MrGkpul+?1! z#XPEd>;T;NS;kCmf|8SRUkb zP$El9fw&zdKwzUdpjK!+xXl6fM0^=|>%>o35biZ=|4`7U1cspqrMLuM3)GPA<^}cPc@v>A-@? z`MJ6Ic?!B|#U+W!*}5R#r6!l;7lBmg=cOaJwaOF0$q76hkeHmDS^!F1pi#Zdd@~bB z+~wuxLDLPWCzD#j5bW$5?;Pan;_4UT>F5&-E^$)9ZTsYcN<=pFEl!6R0181!O%G`_ zLBbInxS(7D8#DpcWS~3(GCs)D-6JFz+>8KM7@*;^QZtkI#G-VDQfNI7i+9fe&j5yk z#FUiGymaK)PssrdqQTMvsE>_kH}(8@0;0l6JiQkA6UffEVV zgyb3o&9z8@R)okkkhU@;Q=pdBB`Kih8aPmkO7lRCOlaBT=?^Jc;z8X`usp(OP$iBO z8?cfH6yywGxinBq9MqBo`vu&tjE_%CNzH)_;uV3LTA(Euuy6ns0icRA-Z99Xp$J@G z6oZPWw4D6%%)GRG$ZCONhGbCxg8?#RT98p$4AEaw7GIp23{jJo0`4s{KpKvq0Eei_ z%ma^g#Fs!47bMYw+S*8MmBbQoa}4D0_`He|Ppwq}rz!n97DA2j%Ad3R#gCs#1 zboO{HL;;8b9R|+CFfjro1;QZdHVFm>Hin?dEP<0*Kx~j2HU`MC;vh93Tp+=~0Fq;3 zFqjXb_koQJekZ}e06LYNkpXmfDM%q$6-btsp_qX~LvCUOo04*m<9v|H-x8oxTu_8T zLLdWp8H($XRD(@ofE+X4Bnb-s01&km%nS!nJ0)Q;0b(5kO9X(Zmv9M8LxMntYzM0i z15qHYpx_Fc4`P81A!lR=0#P7CkV3gul7RuFm5~8#0?2+O*@cn}44@;+*%+8jY#12e zK@Tz$Ft2tS!YpF|i9s}h{Romq@*_wVB*ezR9E0qZHYo-MkS^rN`Xa@^06K@4nW5wf zGl-!MI^UR~P0>lyyn3=KC3=CD$Af-VdGeO6&Gcp8$D3D5KhN2R99D)u|b_6R8fa%Vb zW?%pX7b8Q^b{PhS>tH*B&}Eq!N^IuC0NKYhAH)L10t-XQ z52pDb7ASeJFqHgZnh#=u0tsRY%%h+b13JT+je+?DayIw_T0gH2j!T$Q22dh84he-D z4D&&(6A<1LhWQ}YB?#{Y!+a3yCWQBfVLpiU0K)sgFdxKv1mS&Qm=9us4q64dm|;GM z^#vk#hhaX5^%cTLD8%m=aDA-p>b^Fb^R2=4*Id=SeE!h6CnAH)J3xy`}=O3N@; zflLF5vN14&jv#<%O3?AzAisf{5g^)B7L=F6KosamZDxkD`uQLR=tOO#)C~$skXAMZ z=7Y$N1{ncT&c?ue3|Snc9dtS<8^fo+$bkhCD~1Oxh*bjN-C>vyVwFO84;bcySmhAj z6NdR9Rx5<}f?+<01v+FDk~~1Hc8J^qhWQ{?CxrKeVLpg81Hya3FdxL458)w2Ea+_S zso-FMw+IVl85lqckwO3@1UlZEje$AL3@MsHVxSYg*%+9k%#p-F$55`tunQ*2#=u-) zi=-NKEcYF_Y7pxlgm;HwK8ST6!h66lAH;eH;XPrP4`RK8@LnL2>MdCY2GAMJ=#dXP zq!DylH6%lTSfGQsA)yFMI3P73QFIrA#G>WES>y)8d=M)J!n?yTAH>Rm@E$PC2eI-X zyeACvL98+e?*+qr5Nj!fcY|R*h_wvDd%`du#M%SlyVLpfjI&_kSq2vJ~d?Mr+7(jPNurY*9W(l7Ry2>2v z{dhSB2GB9#j0~Y5>p>cks#B0G=&W({P`w1z#m2yFhnxaHM~DA}_y<({$T2W5%Y*%M zhhaX5#RcJkiZpo!1|A6S3B!C4O9a9L6>0Je49*Z9s92C^U~qx(o-oV@v0@;+7Yy^$ z)fpJ_AU?mrFdxJ!hVbq%%m=YbAv{ptQfFYOf$(lH%m=X=A-p??F#06NzyLY|pN%1W zGD|2TjQ+?mFn~_?W@HG9Qe$A4ss=7UKz4)7K*}&6g`fk@(Sr+g%sJ=~Q8or z015+m;QvyVu?U_4;bcySYi;~6NdR9 z7U9TF2vj$4D&&(LJ02; z!+a2{2*P{7FdxJ!f$*L%%m=ZWA-oq1^Fge32=5KUd=LwC4F;&m#4sPk>Vn99VVDnM zO@i=#Fw6(Bra^dj80Ldmvmm?&4D&&(*%00nhWQ}YTnO(4!+a2HK7{v%VLphp7{dF& zFdxKP3gLZWm=9vDh46kb%m=ZKL3lS9=7Y|AcZ7u04Tkw3mJft?hhaX5u80LdmpflGYp$}puK;&*P%m=YjA-p>b^Fb_7-h-qYSZc6UWMJ5(2u_qBCx8rK zWPqnnXGI1E&>`_m42WhuNX%am+&lywNdz`%l_CQJ$S;fx@b)`M8R+16HU?&4Al45E?+(L!5bHmL_kdwOh{dP`PN+{9=7U)L5Z()h`5;z0 zgol*#z~{v)ft+kGA0#_V3FP5W5Cu9qotdGuem;nir3@Aadx?R80m(^E80I56=>>|D z-k>E{0MD zQCGIClfnGfQ#qKH+@2l3TW#A@b)_>L%I z1@l3CXB4rL`5?X@ide;b5I+D#tY$ulAEb;He;|Qy6u}n8`5=Kv6u}P0`5=Kr6u}d<2Z@1hbzoy)-h2D-L^je%JP*|Sh@}nTyv5x zCk*pJtT+ho1;cz0D+R&>g_0@*Ln?#^3MJ5G1rQ!6lvEiQN+G-#4D&&(1_%$SLPbhb zPZ;JSrKt}nY3d6~ngTVURTvmRDG4+Xg_5Q|prolUC~4{iN}76ulBPbOq^U0`Y3c_` zn)-v1rWzQL(^Ly1a+-R=FdvkIX`i z`h$|D8W@q&R0|_=ntFngre2_=sW&KT>H|ue`ht?CUZA9@Hz;Z914^3uf|90Qprolc zC~4{gN}BqDlBQlT%m<||XqtM%FdxK9hoqYi4D&%OP)dS?5{L!5;R7-(2WxGys4y^` zQUNu<;DgN|A<#uHYz&|Bk^6ZdG0@E}Yz)j@$ZbfF80ab&HU{Qd$l@R|(A_O;49qRa z#V$w;bXf}<1M>=GagZ43b`~}U<}=9RATiM8ENl$SACSf6RT&sS_ph)qd}>2>CrAu* z;R+iA^I>H7fW$yItgtaK-$E7#iGeOy0aZW9;-J8q1_{g?4D&&(=@8x>hWQ}Y3<&Q5 z!+a2H7KHbNVLphp0>XR2FdxKP3E|ygm=9vDg76+N%m=a7KzL6W=7U(fA-oq1^Fgdb z5FSzy0J?)^hbkz#;JpRV9b+JcNIiRy5a=2f^bRga40IC<8v}DXvQI(xt=xdy1!CQV z@a{0o2eEEJcn=ungIISUyeACvL9AC0-V28LAl7RL?+(L!5bF(u_kdwOi1iM_d%`du z#QF>2yKw=hfcY;{95Z)bz`5=}Zg!h19K8WQ2;XPrP4`P9C zcYzdZFk8$(hwiI^rj?neAU9T63AR2TF3Q`vnbg2pxSY;SU7IbwAlF=X;&;=}P49pXdM|42fqMQWl z3II`{^ZpqbLP6AFO|VrVAo{c>C@w)O06?r4P#Ks{KxVAe0Qnm-oepAy)SyqN^J_9N zWNU)dL52YHG#MB`ro)B=VP?blF!MpTs(>y~K^hl?387m76GxuI1YM(&iexR!Sdh3Q zSbSm#oAL}dWO2|fE1<#&IjH)e&Shel7y?r}Ta$qSbfF3x!>9Ae1(v)P1B0#>DB1!* zmt-VDm>>#tp9K@cL>3SYx}t)SArwT#>48I=1w^Onfi#AKD9{n@Ak`qc7a|OzKxc1* zgh9u%gAR2Ev0+YvSe3({l+QTNhq;55p%kPX<`%d-%t26j zn4{qGFqc8)VXlMA!<+~gKz8R6El|3ecqe{7h_w+CN+1ekDl@~xhIkMIWF`v(NEL_$ z@;g`x!~mHNkpi(mK>?ORwgVImEDQyEjxoT30>T4@M2Z$DHG)E74?Oxiv=|sbu3=;d z09jrS4t02b4Ao*_$OP;9^bH-6loeq@py?o(LqTF7OCf#% zu|T1~$PfUcK>AU<1&XAXS_};A3|tHXWehU&L7aDx&;wB)wLpofgaJhV*8)vtPuvm* zV(@4qX#(A90J@q4ZVJpXAmc$QxfmuglrboAsR+o-hbcxDLst(HnKeEHWXwJ zgX{pg8g4m=19CefLjZ^ZIh~0Cix)r!!8M`VfXj8az<~w2%t3h$JfcBYu83)avRVL$ z0wr{2hKWbwkrLUFcu=we`3Woo3N2_FI}#7G8)OVrZv(R4hImi{1)X{iiBu$$8sd>m zYQQiFo>gEjfeXOQfD6FPfeWC!3KS18V?b<}2_QC1Gl&h-r=!ilU<3}7U=S4wzUHOi z&S3@+O9ga01_L-4?>K`vP=9wI`?~`<%sRk6J*p2%c2IpF4m1!u;9dt=TLrc@5JZ8@ zW`|hxz!~JsJNlq_3WT}R3UuuWSb4C6HUrpgEDQxtFkJZr*_A)yU;)9*F!4tmEF{1j zkR2e0K`nja4B|jt`6CY5S{H3_emVhnI>;>`_kvRhhyl7ogqdODn>Y~Tx()*a2Z+N~ z&LA@%#Dj*}8)VnKL3YiXIFM_gmLt*`=*FG35I=(`kWEn6UI7QuK5!5PgD8;W;c_s? z`)M;UOb6=^15xwA%m5GtbuX48ult+;QIexs+d7` zK8O!;oFF9bZa7b2f=PjdL2edDl>#S^17|iRWfqVyG+0`YgQW#I zSX$s|piY~Cp$QV8APS_Lks%OtnUFlV`Urz1Hl*+a=>aJOm5Lzxf(|%geTf4xKw23Y zfacs))B}y4O3=AO0GBSjN zGT8~RbKw0MkoQ13Sr|aZ@#!%zIO~Bc{wHy4p!=IZUWCZO5-UsxsAvMI2dMzD(d8K# zf^QV9TL{A5^OBg`( zJbiGEIRVcMpqrdPxd+tJM>b@+9s|RAaDyDN*c5b=6DVsT&CG%BXaZfw#K!Qc0XdF9 z%|=izU}N|+3t1d=R*MHmpj6@7T&42(91-ikK!)&xR@Ey*m4hTe zf}sYWTV_5p2EimI9*IY)R_zTK7@Q4It7{M+WF`+o5g){EkYOMZkb%4m6Hmn>gh4_e z*YhKUQEdn@U|?tk`!ozhfz&cHOgsY*lw`PkfU6+`gNGqFE@9CN(+w)dLE1r=BQY~f zToDgqfYdWGgoCK9pu2`Z;vfd-Mj}Rra1gc65R_0$7(nznh?)uUAO^1yL;^&|gD%`* zm^dLG#HfTyfao5W1c)&QDgmNF_gXT8bbuIJp%NhaI7|nKaRw>@qIrzLrObqQ5JS@# zVmXM`gGqoGkr2*`cn~82stQDdu3Q598^i#GA*dIG97v$6tJoNreBL9{Q#ITPYRj1Z^<$T`_iHi!nf2pkqL=ez;s18_8k zfee2EVS>yCDMf1Quo^Nj$U*pqn@uCNdO2JDDIpNEx_FToI2}C4yu?iGhuQ zS=WcNu^#pN2Ff7Q{n#fq-=N8)Axs#6YI;L0cFw^&q3y zU{Mbe1GyAkJiH95bXqJmoR{6Pe{ZgdSalw1iH@) zeHAI_Vkl6q0Ve$Z@yiHQpoD@bkUnOHi5uc!8o?Y`IDvFR zRV+YOfv8JNj2IZ~z{UlDD5&BU$ck6M%QcWL#F)v8>|=1BeCE!^}`z2X8S7m@qJa1d$Sp zgb4#fstKqTn+RW24!W`oB*wx})^r5sPX^HaEA9dyj|RLFU|{$LVTuVdFsKQFMco7$ z7{VY-(3MaijMSP2X$9R}1zO03?70L128I*?kONBKR!tOOU|1~x4u}XRq>>IKJ`1e2 zjA5Ao1H&pX8=((memO+n7vvHWB%TXaTgCvQ^TF&A1`u5cVY7hfA_$uUM3+I>JTOOr z%mvvGDt(dN1QKrqt1V;b5ny1L0A?fH1o8*yzAVt3DzZM1_*SsmGKPZ!3=BuXY=k~g z@PV$(Vq;*=Kn^dE80d~HHU{Q$WO0xf=!z^h2Ifv=anMCs$04x-qRt9}(kJ-x8ko=S z3NkQ!gs1>fc|xEDPU(?4nEZ37JgDggQcxiTif(wf`;-s^!$q*3LdN+ZhLSKyJ`8jr z5$H}Tq~t$eh=Bogp%zj?1_`Ye0;Ss0XLa*Itc_sf13(l=Eeiuk0_GObJzF62*%`pM zCb7&1aaZJ7I#gA`A=@ML>ZQ0HU6Oneg&= zn=k{z1&E;_D?v9zsK26MM{j^T`hhS5!#jvl5S1kYmS0l`x;P1R(-k8_0EoH? z(TDIXzX$_^4A|BH5Cytro0*~X8r)oN5e5d38b*cy5Ct_CVXv(S149&8e-Ma@7Xigv z!J=afAXbJ5XcQP6EsNlT@SvNppvEAa0lLi!bPW|71M?B&2m(1DbPX391M^YjBnQ#RZ6d3}Lf?=qC_12Z(+FVZ*a8C`ft5z(vYBWV2!63o;uN&Y-K?Ks7Ij zW)}n7!vdl?AZ!j0%>!Y>%?3r}K~a#|JPy3f4D&(vN`d^s#sJ~N;vb|=LKGfKEc2B` z85j(}kyO9}FQn~785sOQmoG8|fDAeVVZzJ+$$;!a%2gntAh4=1(5+l(vJ*rZ7|?|z z7#N;OFfe?OU|{$Gx^4t&c&j7>Lx&^-18navRG8s_Bm=_*Nd^YcCSA}bVwgB+7p;gC z0|RJBs~YGMHmF2_6azzp6axcjpD1YmD^!?akrV^Naw!IegHj9(XQUVyE=w^mJd|Q! zfbG6)kYQl>Aj7}_TAK&jcL~!MEzQ6H+9V0v>Ucngf#HD+OqPM6M}~m`v|SRk2@oU) zlL2kq`=rLe@B_4=LLDZ`0N$h*0k!L!ECT~*njT~)XiYw7g9=O~$St5PZoff$M?rTI zLM1e085oRY85m$Yyr9Aipj}TnvJ4EceN8ZN&`zXNvJ4EcJwz~Z(EguSatsWhT^`8x zM#(WSfcF1@cE_Yb_tk)Q$-wl1^nkW%z&4A3R;z=|fXV-mV_*R7k^yZO0qu$b?KuH$ z8-dA#b})eU5PJ%meQUh8^ z2V1v^EPh#;fdO3{q?Q4+o=}B>0ki}Pre0W;fk9H0fdRG*2__C&qSLR+zyMo>0}}@= zXt}7$zyMpa0uu)!$KVf2GFQDOeJVMcA*{v18DpebR9WN z95j3gx+4}eTnHLQgo%T$_XZ71fyRzN!y+(o&^6sz1`G^E1`G_gh71gjh71g#el4tn z3>w$~jZk1y54x=zG&TVmZGg#x#6Z_`gTz215HN9&7--~Sg8>7>W&;L>7^pqCIh-82h_iKWz4|v0dyrY=o)dT22j)7Q-FcNUx0xD zbQx{500RT4$qbc-i-DTIpk^yf9MrS~HMBsjBhY=KFmceWs?&rR7(i`1P!kR&4r;s^ z2{SO*3NtW(+H5d!(3PWQ!VKU>6R2HqSA>D#fd~Tws16004O919n1O*wgnj71DplTDO7bXunj0DsX0}ZZ&hS5Q%q9ePPL9e(nw0 z^z!mcQuQ32JatPF)1kcdyiz^TdDAJnnJElGV?MS^osJqhl1&)X2hozCFZ8a zgHCvX^B_9n6N`!xD;dB#VC<~qA_hH>R%9ih-Gd4a}bd zoxfxTUFO5Uz`(-^7G_`uUD3n9z_16-hcKRS!Q>$f8)yrUnSmQDkpSmI7@+h7l3-@w z1yKwxreKPJnSl??h=B9?!TcN-FvY;k0ND^G;R@pmf*B6EV2Xj60d&1H1A_~kFASFO zfb&Jb`~)~(6wJQ@=Y#JbX3)t83o|e?fbLgiU|@iDaF`h&jXnuDUlO7aN-~3Q)P-`u z@gt4kfcZ#`FEAgeaRlaru8&4&VP=p=aKQ4QtCA5y%nXVQ(5M6pvM_x74+>$Je;FA> z7(gy;fOw06iGh~^RQ()4;)5IzG5{nG>Q;gL2QrtDL6RYj0TG^z48jb(po4gz z!2(i0lYxN&7XFM3LJT`V20<~%J!cpgz(**hGl2R8ybKQ+7#Kk36e&XauNW8@K<5r! zh4Q~JFfe>^2F=HS`g{Bge2feX29gY5cZ2LxU}Rv}fh2Fm2ss$26RO{bkpX-F&Ppgh znvsEFffNIS058P;Y(@qK(8aW%rHYIUq6{^R3=AdC4B(h$WZ-A$2ASu~zyL}qApR_n z{VtF@c|rV@AoGkF7&sXr=51qSU~q7OUgXWd&v1c}fg!?$0h|&+>R*8Z5=owgiGe}F zg#nzhK=N`-3=B7%8Nl%b;#)8=F!UhtgP0f?KyBQ)Q2!({F))A@md=3MU%?wilVz~JKyngWA_=T0UD22lP3UEvA}&*MxC44^5(?aUDMH<=h1 zjyNOS|Cxz_0d&(YsN`T|kYM=9#J~W$ixi0|Tg?2;*xqLv|Fy_@1A`z7 zWbhWGK!}N#K^>G3KpX~;X$%aOEDQ{w@&zO$z#zfk0FsB6rwR-b4BjjZ3^Ar4zk$*$ zKSLBq9;6tmKZk{Z!N3%fKSAae>I*?8QHIB8@?X*T?5qs%`b>y{kAW9jw}Pw$)lQnM3=9Qg5dVSP zZ;vJ)fyOUF<2R%6r=syUu`)2g+Gs)yybL?hIcPtDH{WW44f~?0E#Dw zYEXPJFic@%V3-4~Z$SE2f%HQafWmV>8vi_!`ve#y8E&J=zeeN#Wn*ACV8Xx<3r=6W z47}`6!@+z826;5TIT}9*jh~9fuSergMB^_-<8MRagIYHykochRe1gOW`TsjR1A~Go zsO$!X7cT=lwCx7+1xQ{Jjc48o+_i_%3_wfu40pDu@Is~)0B(*5MBsV@eCqFN>m;sAWe0)lNe0olPQesYg zN=bfEaeQKF1w(RvZb43JNotConW?EM=nQsDMe(3+0i=;1pPE-vRLKD87NnHs=2n7E z=LB~Wz&!9(0w_wc9cvCgClmd44X_~SfMTS(YcOvI(K9qRF}6h9)}vRDSX82C2s%9; z<0cW1S|dy3^H@O#EtjPti-1nU2iuHvtUQ#DblVQ}(jYxUb2AGwkdMK42!Xhk=Ez)A z3p2>Mnc(9+lam;*+;5_1Xl`x<(uLK%rl3>NvB{VjgAT{XDq{q45>^>ABOER;GqZ#^ z6mh^O*w>(=ctNMAf-WDxW}=BD)Pu02Ws9IUO=0(_si7&v8qlGr;L}XOwxAr&jYFr2 zDfEC-$SJ6h!{H%^&!gQArRQU8&YZHV1!Bo zhWJ!amz)7az+3^kHVbsS3Fxfs6b8sKKBF9RrxD~*4`f-$ zjabMc;G~5t5FejXoFAW&n3s~13cXnjSsIc$kwrj(k;xE`cEJpaig=80NveP!dW+@) zP(B3RU;w$e3t@WEF^AcPFSw}@mEA&bPv=VT@&gF>sQBp!4sK8hqH&S6)W6s0Dn zAf!PSgKq$aTv36L07WeLU}^aM69_pI25=gK-%5ax0hNCtzRu9}2^vev&q0y(DvJkQ zL;$fDi-)A|%aXDu$e5kE*s9e1{6M82H>}WC6&*)W{<7o*};RDXFjuI>gr*RAYyL zuR8%1rn$xGD9Rxz4CHfAEeyS}1X)FTY6+-hO#K zcVl8;U;vHZfiPrr3ZfAt2V#MybwEu#kUG$~9teZlWgs~ahIKbU!{jh^pz%HsRsku1 zVwgJ6(Al^D|MNlSfyMzr*nt7GmI0y=qz;7r7(l0^K-!U@@j(!7UTb7Ej%0F6t6a0FBxXlx8*9!Ome z1H@mT?f|I21Hz!N2iXO}Aax+R9Z4N%920~OfE)&rWMBY~NP^T(LQ)4BUjbni&_Sn2 z>OjmHNa{f2o*)bwYXZrEFvu(rJrAl5WEH4C3&KK>;ZTq?=t_4my$nemXq*&;*MMap z1kAiGNa{f2ryx876d({~aP#&tfEHwe#+D)D01mN`xQ8l(t2@O28FKfRgYpJcn88Dv nk>LUt18Dl1A(H_TH=yzgG(&-Go`e}A!v# + * + * This work is licensed under the terms of the GNU GPL, version 2 or + * later. See the COPYING file in the top-level directory. + */ + +/* + * TODO: + * - main should get parameters from the command line. + * - implement all request handlers. Still not implemented: + * vubr_get_queue_num_exec() + * vubr_send_rarp_exec() + * - test for broken requests and virtqueue. + * - implement features defined by Virtio 1.0 spec. + * - support mergeable buffers and indirect descriptors. + * - implement clean shutdown. + * - implement non-blocking writes to UDP backend. + * - implement polling strategy. + * - implement clean starting/stopping of vq processing + * - implement clean starting/stopping of used and buffers + * dirty page logging. + */ + +#define _FILE_OFFSET_BITS 64 + +#include "qemu/osdep.h" +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "qemu/atomic.h" +#include "standard-headers/linux/virtio_net.h" +#include "standard-headers/linux/virtio_ring.h" + +#define VHOST_USER_BRIDGE_DEBUG 1 + +#define DPRINT(...) \ + do { \ + if (VHOST_USER_BRIDGE_DEBUG) { \ + printf(__VA_ARGS__); \ + } \ + } while (0) + +typedef void (*CallbackFunc)(int sock, void *ctx); + +typedef struct Event { + void *ctx; + CallbackFunc callback; +} Event; + +typedef struct Dispatcher { + int max_sock; + fd_set fdset; + Event events[FD_SETSIZE]; +} Dispatcher; + +static void +vubr_die(const char *s) +{ + perror(s); + exit(1); +} + +static int +dispatcher_init(Dispatcher *dispr) +{ + FD_ZERO(&dispr->fdset); + dispr->max_sock = -1; + return 0; +} + +static int +dispatcher_add(Dispatcher *dispr, int sock, void *ctx, CallbackFunc cb) +{ + if (sock >= FD_SETSIZE) { + fprintf(stderr, + "Error: Failed to add new event. sock %d should be less than %d\n", + sock, FD_SETSIZE); + return -1; + } + + dispr->events[sock].ctx = ctx; + dispr->events[sock].callback = cb; + + FD_SET(sock, &dispr->fdset); + if (sock > dispr->max_sock) { + dispr->max_sock = sock; + } + DPRINT("Added sock %d for watching. max_sock: %d\n", + sock, dispr->max_sock); + return 0; +} + +/* dispatcher_remove() is not currently in use but may be useful + * in the future. */ +static int +dispatcher_remove(Dispatcher *dispr, int sock) +{ + if (sock >= FD_SETSIZE) { + fprintf(stderr, + "Error: Failed to remove event. sock %d should be less than %d\n", + sock, FD_SETSIZE); + return -1; + } + + FD_CLR(sock, &dispr->fdset); + DPRINT("Sock %d removed from dispatcher watch.\n", sock); + return 0; +} + +/* timeout in us */ +static int +dispatcher_wait(Dispatcher *dispr, uint32_t timeout) +{ + struct timeval tv; + tv.tv_sec = timeout / 1000000; + tv.tv_usec = timeout % 1000000; + + fd_set fdset = dispr->fdset; + + /* wait until some of sockets become readable. */ + int rc = select(dispr->max_sock + 1, &fdset, 0, 0, &tv); + + if (rc == -1) { + vubr_die("select"); + } + + /* Timeout */ + if (rc == 0) { + return 0; + } + + /* Now call callback for every ready socket. */ + + int sock; + for (sock = 0; sock < dispr->max_sock + 1; sock++) { + /* The callback on a socket can remove other sockets from the + * dispatcher, thus we have to check that the socket is + * still not removed from dispatcher's list + */ + if (FD_ISSET(sock, &fdset) && FD_ISSET(sock, &dispr->fdset)) { + Event *e = &dispr->events[sock]; + e->callback(sock, e->ctx); + } + } + + return 0; +} + +typedef struct VubrVirtq { + int call_fd; + int kick_fd; + uint32_t size; + uint16_t last_avail_index; + uint16_t last_used_index; + struct vring_desc *desc; + struct vring_avail *avail; + struct vring_used *used; + uint64_t log_guest_addr; + int enable; +} VubrVirtq; + +/* Based on qemu/hw/virtio/vhost-user.c */ + +#define VHOST_MEMORY_MAX_NREGIONS 8 +#define VHOST_USER_F_PROTOCOL_FEATURES 30 +/* v1.0 compliant. */ +#define VIRTIO_F_VERSION_1 32 + +#define VHOST_LOG_PAGE 4096 + +enum VhostUserProtocolFeature { + VHOST_USER_PROTOCOL_F_MQ = 0, + VHOST_USER_PROTOCOL_F_LOG_SHMFD = 1, + VHOST_USER_PROTOCOL_F_RARP = 2, + + VHOST_USER_PROTOCOL_F_MAX +}; + +#define VHOST_USER_PROTOCOL_FEATURE_MASK ((1 << VHOST_USER_PROTOCOL_F_MAX) - 1) + +typedef enum VhostUserRequest { + VHOST_USER_NONE = 0, + VHOST_USER_GET_FEATURES = 1, + VHOST_USER_SET_FEATURES = 2, + VHOST_USER_SET_OWNER = 3, + VHOST_USER_RESET_OWNER = 4, + VHOST_USER_SET_MEM_TABLE = 5, + VHOST_USER_SET_LOG_BASE = 6, + VHOST_USER_SET_LOG_FD = 7, + VHOST_USER_SET_VRING_NUM = 8, + VHOST_USER_SET_VRING_ADDR = 9, + VHOST_USER_SET_VRING_BASE = 10, + VHOST_USER_GET_VRING_BASE = 11, + VHOST_USER_SET_VRING_KICK = 12, + VHOST_USER_SET_VRING_CALL = 13, + VHOST_USER_SET_VRING_ERR = 14, + VHOST_USER_GET_PROTOCOL_FEATURES = 15, + VHOST_USER_SET_PROTOCOL_FEATURES = 16, + VHOST_USER_GET_QUEUE_NUM = 17, + VHOST_USER_SET_VRING_ENABLE = 18, + VHOST_USER_SEND_RARP = 19, + VHOST_USER_MAX +} VhostUserRequest; + +typedef struct VhostUserMemoryRegion { + uint64_t guest_phys_addr; + uint64_t memory_size; + uint64_t userspace_addr; + uint64_t mmap_offset; +} VhostUserMemoryRegion; + +typedef struct VhostUserMemory { + uint32_t nregions; + uint32_t padding; + VhostUserMemoryRegion regions[VHOST_MEMORY_MAX_NREGIONS]; +} VhostUserMemory; + +typedef struct VhostUserLog { + uint64_t mmap_size; + uint64_t mmap_offset; +} VhostUserLog; + +typedef struct VhostUserMsg { + VhostUserRequest request; + +#define VHOST_USER_VERSION_MASK (0x3) +#define VHOST_USER_REPLY_MASK (0x1<<2) + uint32_t flags; + uint32_t size; /* the following payload size */ + union { +#define VHOST_USER_VRING_IDX_MASK (0xff) +#define VHOST_USER_VRING_NOFD_MASK (0x1<<8) + uint64_t u64; + struct vhost_vring_state state; + struct vhost_vring_addr addr; + VhostUserMemory memory; + VhostUserLog log; + } payload; + int fds[VHOST_MEMORY_MAX_NREGIONS]; + int fd_num; +} QEMU_PACKED VhostUserMsg; + +#define VHOST_USER_HDR_SIZE offsetof(VhostUserMsg, payload.u64) + +/* The version of the protocol we support */ +#define VHOST_USER_VERSION (0x1) + +#define MAX_NR_VIRTQUEUE (8) + +typedef struct VubrDevRegion { + /* Guest Physical address. */ + uint64_t gpa; + /* Memory region size. */ + uint64_t size; + /* QEMU virtual address (userspace). */ + uint64_t qva; + /* Starting offset in our mmaped space. */ + uint64_t mmap_offset; + /* Start address of mmaped space. */ + uint64_t mmap_addr; +} VubrDevRegion; + +typedef struct VubrDev { + int sock; + Dispatcher dispatcher; + uint32_t nregions; + VubrDevRegion regions[VHOST_MEMORY_MAX_NREGIONS]; + VubrVirtq vq[MAX_NR_VIRTQUEUE]; + int log_call_fd; + uint64_t log_size; + uint8_t *log_table; + int backend_udp_sock; + struct sockaddr_in backend_udp_dest; + int ready; + uint64_t features; + int hdrlen; +} VubrDev; + +static const char *vubr_request_str[] = { + [VHOST_USER_NONE] = "VHOST_USER_NONE", + [VHOST_USER_GET_FEATURES] = "VHOST_USER_GET_FEATURES", + [VHOST_USER_SET_FEATURES] = "VHOST_USER_SET_FEATURES", + [VHOST_USER_SET_OWNER] = "VHOST_USER_SET_OWNER", + [VHOST_USER_RESET_OWNER] = "VHOST_USER_RESET_OWNER", + [VHOST_USER_SET_MEM_TABLE] = "VHOST_USER_SET_MEM_TABLE", + [VHOST_USER_SET_LOG_BASE] = "VHOST_USER_SET_LOG_BASE", + [VHOST_USER_SET_LOG_FD] = "VHOST_USER_SET_LOG_FD", + [VHOST_USER_SET_VRING_NUM] = "VHOST_USER_SET_VRING_NUM", + [VHOST_USER_SET_VRING_ADDR] = "VHOST_USER_SET_VRING_ADDR", + [VHOST_USER_SET_VRING_BASE] = "VHOST_USER_SET_VRING_BASE", + [VHOST_USER_GET_VRING_BASE] = "VHOST_USER_GET_VRING_BASE", + [VHOST_USER_SET_VRING_KICK] = "VHOST_USER_SET_VRING_KICK", + [VHOST_USER_SET_VRING_CALL] = "VHOST_USER_SET_VRING_CALL", + [VHOST_USER_SET_VRING_ERR] = "VHOST_USER_SET_VRING_ERR", + [VHOST_USER_GET_PROTOCOL_FEATURES] = "VHOST_USER_GET_PROTOCOL_FEATURES", + [VHOST_USER_SET_PROTOCOL_FEATURES] = "VHOST_USER_SET_PROTOCOL_FEATURES", + [VHOST_USER_GET_QUEUE_NUM] = "VHOST_USER_GET_QUEUE_NUM", + [VHOST_USER_SET_VRING_ENABLE] = "VHOST_USER_SET_VRING_ENABLE", + [VHOST_USER_SEND_RARP] = "VHOST_USER_SEND_RARP", + [VHOST_USER_MAX] = "VHOST_USER_MAX", +}; + +static void +print_buffer(uint8_t *buf, size_t len) +{ + int i; + printf("Raw buffer:\n"); + for (i = 0; i < len; i++) { + if (i % 16 == 0) { + printf("\n"); + } + if (i % 4 == 0) { + printf(" "); + } + printf("%02x ", buf[i]); + } + printf("\n............................................................\n"); +} + +/* Translate guest physical address to our virtual address. */ +static uint64_t +gpa_to_va(VubrDev *dev, uint64_t guest_addr) +{ + int i; + + /* Find matching memory region. */ + for (i = 0; i < dev->nregions; i++) { + VubrDevRegion *r = &dev->regions[i]; + + if ((guest_addr >= r->gpa) && (guest_addr < (r->gpa + r->size))) { + return guest_addr - r->gpa + r->mmap_addr + r->mmap_offset; + } + } + + assert(!"address not found in regions"); + return 0; +} + +/* Translate qemu virtual address to our virtual address. */ +static uint64_t +qva_to_va(VubrDev *dev, uint64_t qemu_addr) +{ + int i; + + /* Find matching memory region. */ + for (i = 0; i < dev->nregions; i++) { + VubrDevRegion *r = &dev->regions[i]; + + if ((qemu_addr >= r->qva) && (qemu_addr < (r->qva + r->size))) { + return qemu_addr - r->qva + r->mmap_addr + r->mmap_offset; + } + } + + assert(!"address not found in regions"); + return 0; +} + +static void +vubr_message_read(int conn_fd, VhostUserMsg *vmsg) +{ + char control[CMSG_SPACE(VHOST_MEMORY_MAX_NREGIONS * sizeof(int))] = { }; + struct iovec iov = { + .iov_base = (char *)vmsg, + .iov_len = VHOST_USER_HDR_SIZE, + }; + struct msghdr msg = { + .msg_iov = &iov, + .msg_iovlen = 1, + .msg_control = control, + .msg_controllen = sizeof(control), + }; + size_t fd_size; + struct cmsghdr *cmsg; + int rc; + + rc = recvmsg(conn_fd, &msg, 0); + + if (rc == 0) { + vubr_die("recvmsg"); + fprintf(stderr, "Peer disconnected.\n"); + exit(1); + } + if (rc < 0) { + vubr_die("recvmsg"); + } + + vmsg->fd_num = 0; + for (cmsg = CMSG_FIRSTHDR(&msg); + cmsg != NULL; + cmsg = CMSG_NXTHDR(&msg, cmsg)) + { + if (cmsg->cmsg_level == SOL_SOCKET && cmsg->cmsg_type == SCM_RIGHTS) { + fd_size = cmsg->cmsg_len - CMSG_LEN(0); + vmsg->fd_num = fd_size / sizeof(int); + memcpy(vmsg->fds, CMSG_DATA(cmsg), fd_size); + break; + } + } + + if (vmsg->size > sizeof(vmsg->payload)) { + fprintf(stderr, + "Error: too big message request: %d, size: vmsg->size: %u, " + "while sizeof(vmsg->payload) = %zu\n", + vmsg->request, vmsg->size, sizeof(vmsg->payload)); + exit(1); + } + + if (vmsg->size) { + rc = read(conn_fd, &vmsg->payload, vmsg->size); + if (rc == 0) { + vubr_die("recvmsg"); + fprintf(stderr, "Peer disconnected.\n"); + exit(1); + } + if (rc < 0) { + vubr_die("recvmsg"); + } + + assert(rc == vmsg->size); + } +} + +static void +vubr_message_write(int conn_fd, VhostUserMsg *vmsg) +{ + int rc; + + do { + rc = write(conn_fd, vmsg, VHOST_USER_HDR_SIZE + vmsg->size); + } while (rc < 0 && errno == EINTR); + + if (rc < 0) { + vubr_die("write"); + } +} + +static void +vubr_backend_udp_sendbuf(VubrDev *dev, uint8_t *buf, size_t len) +{ + int slen = sizeof(struct sockaddr_in); + + if (sendto(dev->backend_udp_sock, buf, len, 0, + (struct sockaddr *) &dev->backend_udp_dest, slen) == -1) { + vubr_die("sendto()"); + } +} + +static int +vubr_backend_udp_recvbuf(VubrDev *dev, uint8_t *buf, size_t buflen) +{ + int slen = sizeof(struct sockaddr_in); + int rc; + + rc = recvfrom(dev->backend_udp_sock, buf, buflen, 0, + (struct sockaddr *) &dev->backend_udp_dest, + (socklen_t *)&slen); + if (rc == -1) { + vubr_die("recvfrom()"); + } + + return rc; +} + +static void +vubr_consume_raw_packet(VubrDev *dev, uint8_t *buf, uint32_t len) +{ + int hdrlen = dev->hdrlen; + DPRINT(" hdrlen = %d\n", dev->hdrlen); + + if (VHOST_USER_BRIDGE_DEBUG) { + print_buffer(buf, len); + } + vubr_backend_udp_sendbuf(dev, buf + hdrlen, len - hdrlen); +} + +/* Kick the log_call_fd if required. */ +static void +vubr_log_kick(VubrDev *dev) +{ + if (dev->log_call_fd != -1) { + DPRINT("Kicking the QEMU's log...\n"); + eventfd_write(dev->log_call_fd, 1); + } +} + +/* Kick the guest if necessary. */ +static void +vubr_virtqueue_kick(VubrVirtq *vq) +{ + if (!(vq->avail->flags & VRING_AVAIL_F_NO_INTERRUPT)) { + DPRINT("Kicking the guest...\n"); + eventfd_write(vq->call_fd, 1); + } +} + +static void +vubr_log_page(uint8_t *log_table, uint64_t page) +{ + DPRINT("Logged dirty guest page: %"PRId64"\n", page); + atomic_or(&log_table[page / 8], 1 << (page % 8)); +} + +static void +vubr_log_write(VubrDev *dev, uint64_t address, uint64_t length) +{ + uint64_t page; + + if (!(dev->features & (1ULL << VHOST_F_LOG_ALL)) || + !dev->log_table || !length) { + return; + } + + assert(dev->log_size > ((address + length - 1) / VHOST_LOG_PAGE / 8)); + + page = address / VHOST_LOG_PAGE; + while (page * VHOST_LOG_PAGE < address + length) { + vubr_log_page(dev->log_table, page); + page += VHOST_LOG_PAGE; + } + vubr_log_kick(dev); +} + +static void +vubr_post_buffer(VubrDev *dev, VubrVirtq *vq, uint8_t *buf, int32_t len) +{ + struct vring_desc *desc = vq->desc; + struct vring_avail *avail = vq->avail; + struct vring_used *used = vq->used; + uint64_t log_guest_addr = vq->log_guest_addr; + int32_t remaining_len = len; + + unsigned int size = vq->size; + + uint16_t avail_index = atomic_mb_read(&avail->idx); + + /* We check the available descriptors before posting the + * buffer, so here we assume that enough available + * descriptors. */ + assert(vq->last_avail_index != avail_index); + uint16_t a_index = vq->last_avail_index % size; + uint16_t u_index = vq->last_used_index % size; + uint16_t d_index = avail->ring[a_index]; + + int i = d_index; + uint32_t written_len = 0; + + do { + DPRINT("Post packet to guest on vq:\n"); + DPRINT(" size = %d\n", vq->size); + DPRINT(" last_avail_index = %d\n", vq->last_avail_index); + DPRINT(" last_used_index = %d\n", vq->last_used_index); + DPRINT(" a_index = %d\n", a_index); + DPRINT(" u_index = %d\n", u_index); + DPRINT(" d_index = %d\n", d_index); + DPRINT(" desc[%d].addr = 0x%016"PRIx64"\n", i, desc[i].addr); + DPRINT(" desc[%d].len = %d\n", i, desc[i].len); + DPRINT(" desc[%d].flags = %d\n", i, desc[i].flags); + DPRINT(" avail->idx = %d\n", avail_index); + DPRINT(" used->idx = %d\n", used->idx); + + if (!(desc[i].flags & VRING_DESC_F_WRITE)) { + /* FIXME: we should find writable descriptor. */ + fprintf(stderr, "Error: descriptor is not writable. Exiting.\n"); + exit(1); + } + + void *chunk_start = (void *)(uintptr_t)gpa_to_va(dev, desc[i].addr); + uint32_t chunk_len = desc[i].len; + uint32_t chunk_write_len = MIN(remaining_len, chunk_len); + + memcpy(chunk_start, buf + written_len, chunk_write_len); + vubr_log_write(dev, desc[i].addr, chunk_write_len); + remaining_len -= chunk_write_len; + written_len += chunk_write_len; + + if ((remaining_len == 0) || !(desc[i].flags & VRING_DESC_F_NEXT)) { + break; + } + + i = desc[i].next; + } while (1); + + if (remaining_len > 0) { + fprintf(stderr, + "Too long packet for RX, remaining_len = %d, Dropping...\n", + remaining_len); + return; + } + + /* Add descriptor to the used ring. */ + used->ring[u_index].id = d_index; + used->ring[u_index].len = len; + vubr_log_write(dev, + log_guest_addr + offsetof(struct vring_used, ring[u_index]), + sizeof(used->ring[u_index])); + + vq->last_avail_index++; + vq->last_used_index++; + + atomic_mb_set(&used->idx, vq->last_used_index); + vubr_log_write(dev, + log_guest_addr + offsetof(struct vring_used, idx), + sizeof(used->idx)); + + /* Kick the guest if necessary. */ + vubr_virtqueue_kick(vq); +} + +static int +vubr_process_desc(VubrDev *dev, VubrVirtq *vq) +{ + struct vring_desc *desc = vq->desc; + struct vring_avail *avail = vq->avail; + struct vring_used *used = vq->used; + uint64_t log_guest_addr = vq->log_guest_addr; + + unsigned int size = vq->size; + + uint16_t a_index = vq->last_avail_index % size; + uint16_t u_index = vq->last_used_index % size; + uint16_t d_index = avail->ring[a_index]; + + uint32_t i, len = 0; + size_t buf_size = 4096; + uint8_t buf[4096]; + + DPRINT("Chunks: "); + i = d_index; + do { + void *chunk_start = (void *)(uintptr_t)gpa_to_va(dev, desc[i].addr); + uint32_t chunk_len = desc[i].len; + + assert(!(desc[i].flags & VRING_DESC_F_WRITE)); + + if (len + chunk_len < buf_size) { + memcpy(buf + len, chunk_start, chunk_len); + DPRINT("%d ", chunk_len); + } else { + fprintf(stderr, "Error: too long packet. Dropping...\n"); + break; + } + + len += chunk_len; + + if (!(desc[i].flags & VRING_DESC_F_NEXT)) { + break; + } + + i = desc[i].next; + } while (1); + DPRINT("\n"); + + if (!len) { + return -1; + } + + /* Add descriptor to the used ring. */ + used->ring[u_index].id = d_index; + used->ring[u_index].len = len; + vubr_log_write(dev, + log_guest_addr + offsetof(struct vring_used, ring[u_index]), + sizeof(used->ring[u_index])); + + vubr_consume_raw_packet(dev, buf, len); + + return 0; +} + +static void +vubr_process_avail(VubrDev *dev, VubrVirtq *vq) +{ + struct vring_avail *avail = vq->avail; + struct vring_used *used = vq->used; + uint64_t log_guest_addr = vq->log_guest_addr; + + while (vq->last_avail_index != atomic_mb_read(&avail->idx)) { + vubr_process_desc(dev, vq); + vq->last_avail_index++; + vq->last_used_index++; + } + + atomic_mb_set(&used->idx, vq->last_used_index); + vubr_log_write(dev, + log_guest_addr + offsetof(struct vring_used, idx), + sizeof(used->idx)); +} + +static void +vubr_backend_recv_cb(int sock, void *ctx) +{ + VubrDev *dev = (VubrDev *) ctx; + VubrVirtq *rx_vq = &dev->vq[0]; + uint8_t buf[4096]; + struct virtio_net_hdr_v1 *hdr = (struct virtio_net_hdr_v1 *)buf; + int hdrlen = dev->hdrlen; + int buflen = sizeof(buf); + int len; + + if (!dev->ready) { + return; + } + + DPRINT("\n\n *** IN UDP RECEIVE CALLBACK ***\n\n"); + DPRINT(" hdrlen = %d\n", hdrlen); + + uint16_t avail_index = atomic_mb_read(&rx_vq->avail->idx); + + /* If there is no available descriptors, just do nothing. + * The buffer will be handled by next arrived UDP packet, + * or next kick on receive virtq. */ + if (rx_vq->last_avail_index == avail_index) { + DPRINT("Got UDP packet, but no available descriptors on RX virtq.\n"); + return; + } + + memset(buf, 0, hdrlen); + /* TODO: support mergeable buffers. */ + if (hdrlen == 12) + hdr->num_buffers = 1; + len = vubr_backend_udp_recvbuf(dev, buf + hdrlen, buflen - hdrlen); + + vubr_post_buffer(dev, rx_vq, buf, len + hdrlen); +} + +static void +vubr_kick_cb(int sock, void *ctx) +{ + VubrDev *dev = (VubrDev *) ctx; + eventfd_t kick_data; + ssize_t rc; + + rc = eventfd_read(sock, &kick_data); + if (rc == -1) { + vubr_die("eventfd_read()"); + } else { + DPRINT("Got kick_data: %016"PRIx64"\n", kick_data); + vubr_process_avail(dev, &dev->vq[1]); + } +} + +static int +vubr_none_exec(VubrDev *dev, VhostUserMsg *vmsg) +{ + DPRINT("Function %s() not implemented yet.\n", __func__); + return 0; +} + +static int +vubr_get_features_exec(VubrDev *dev, VhostUserMsg *vmsg) +{ + vmsg->payload.u64 = + ((1ULL << VIRTIO_NET_F_MRG_RXBUF) | + (1ULL << VHOST_F_LOG_ALL) | + (1ULL << VIRTIO_NET_F_GUEST_ANNOUNCE) | + (1ULL << VHOST_USER_F_PROTOCOL_FEATURES)); + + vmsg->size = sizeof(vmsg->payload.u64); + + DPRINT("Sending back to guest u64: 0x%016"PRIx64"\n", vmsg->payload.u64); + + /* Reply */ + return 1; +} + +static int +vubr_set_features_exec(VubrDev *dev, VhostUserMsg *vmsg) +{ + DPRINT("u64: 0x%016"PRIx64"\n", vmsg->payload.u64); + + dev->features = vmsg->payload.u64; + if ((dev->features & (1ULL << VIRTIO_F_VERSION_1)) || + (dev->features & (1ULL << VIRTIO_NET_F_MRG_RXBUF))) { + dev->hdrlen = 12; + } else { + dev->hdrlen = 10; + } + + return 0; +} + +static int +vubr_set_owner_exec(VubrDev *dev, VhostUserMsg *vmsg) +{ + return 0; +} + +static void +vubr_close_log(VubrDev *dev) +{ + if (dev->log_table) { + if (munmap(dev->log_table, dev->log_size) != 0) { + vubr_die("munmap()"); + } + + dev->log_table = 0; + } + if (dev->log_call_fd != -1) { + close(dev->log_call_fd); + dev->log_call_fd = -1; + } +} + +static int +vubr_reset_device_exec(VubrDev *dev, VhostUserMsg *vmsg) +{ + vubr_close_log(dev); + dev->ready = 0; + dev->features = 0; + return 0; +} + +static int +vubr_set_mem_table_exec(VubrDev *dev, VhostUserMsg *vmsg) +{ + int i; + VhostUserMemory *memory = &vmsg->payload.memory; + dev->nregions = memory->nregions; + + DPRINT("Nregions: %d\n", memory->nregions); + for (i = 0; i < dev->nregions; i++) { + void *mmap_addr; + VhostUserMemoryRegion *msg_region = &memory->regions[i]; + VubrDevRegion *dev_region = &dev->regions[i]; + + DPRINT("Region %d\n", i); + DPRINT(" guest_phys_addr: 0x%016"PRIx64"\n", + msg_region->guest_phys_addr); + DPRINT(" memory_size: 0x%016"PRIx64"\n", + msg_region->memory_size); + DPRINT(" userspace_addr 0x%016"PRIx64"\n", + msg_region->userspace_addr); + DPRINT(" mmap_offset 0x%016"PRIx64"\n", + msg_region->mmap_offset); + + dev_region->gpa = msg_region->guest_phys_addr; + dev_region->size = msg_region->memory_size; + dev_region->qva = msg_region->userspace_addr; + dev_region->mmap_offset = msg_region->mmap_offset; + + /* We don't use offset argument of mmap() since the + * mapped address has to be page aligned, and we use huge + * pages. */ + mmap_addr = mmap(0, dev_region->size + dev_region->mmap_offset, + PROT_READ | PROT_WRITE, MAP_SHARED, + vmsg->fds[i], 0); + + if (mmap_addr == MAP_FAILED) { + vubr_die("mmap"); + } + dev_region->mmap_addr = (uint64_t)(uintptr_t)mmap_addr; + DPRINT(" mmap_addr: 0x%016"PRIx64"\n", dev_region->mmap_addr); + + close(vmsg->fds[i]); + } + + return 0; +} + +static int +vubr_set_log_base_exec(VubrDev *dev, VhostUserMsg *vmsg) +{ + int fd; + uint64_t log_mmap_size, log_mmap_offset; + void *rc; + + assert(vmsg->fd_num == 1); + fd = vmsg->fds[0]; + + assert(vmsg->size == sizeof(vmsg->payload.log)); + log_mmap_offset = vmsg->payload.log.mmap_offset; + log_mmap_size = vmsg->payload.log.mmap_size; + DPRINT("Log mmap_offset: %"PRId64"\n", log_mmap_offset); + DPRINT("Log mmap_size: %"PRId64"\n", log_mmap_size); + + rc = mmap(0, log_mmap_size, PROT_READ | PROT_WRITE, MAP_SHARED, fd, + log_mmap_offset); + if (rc == MAP_FAILED) { + vubr_die("mmap"); + } + dev->log_table = rc; + dev->log_size = log_mmap_size; + + vmsg->size = sizeof(vmsg->payload.u64); + /* Reply */ + return 1; +} + +static int +vubr_set_log_fd_exec(VubrDev *dev, VhostUserMsg *vmsg) +{ + assert(vmsg->fd_num == 1); + dev->log_call_fd = vmsg->fds[0]; + DPRINT("Got log_call_fd: %d\n", vmsg->fds[0]); + return 0; +} + +static int +vubr_set_vring_num_exec(VubrDev *dev, VhostUserMsg *vmsg) +{ + unsigned int index = vmsg->payload.state.index; + unsigned int num = vmsg->payload.state.num; + + DPRINT("State.index: %d\n", index); + DPRINT("State.num: %d\n", num); + dev->vq[index].size = num; + return 0; +} + +static int +vubr_set_vring_addr_exec(VubrDev *dev, VhostUserMsg *vmsg) +{ + struct vhost_vring_addr *vra = &vmsg->payload.addr; + unsigned int index = vra->index; + VubrVirtq *vq = &dev->vq[index]; + + DPRINT("vhost_vring_addr:\n"); + DPRINT(" index: %d\n", vra->index); + DPRINT(" flags: %d\n", vra->flags); + DPRINT(" desc_user_addr: 0x%016llx\n", vra->desc_user_addr); + DPRINT(" used_user_addr: 0x%016llx\n", vra->used_user_addr); + DPRINT(" avail_user_addr: 0x%016llx\n", vra->avail_user_addr); + DPRINT(" log_guest_addr: 0x%016llx\n", vra->log_guest_addr); + + vq->desc = (struct vring_desc *)(uintptr_t)qva_to_va(dev, vra->desc_user_addr); + vq->used = (struct vring_used *)(uintptr_t)qva_to_va(dev, vra->used_user_addr); + vq->avail = (struct vring_avail *)(uintptr_t)qva_to_va(dev, vra->avail_user_addr); + vq->log_guest_addr = vra->log_guest_addr; + + DPRINT("Setting virtq addresses:\n"); + DPRINT(" vring_desc at %p\n", vq->desc); + DPRINT(" vring_used at %p\n", vq->used); + DPRINT(" vring_avail at %p\n", vq->avail); + + vq->last_used_index = vq->used->idx; + return 0; +} + +static int +vubr_set_vring_base_exec(VubrDev *dev, VhostUserMsg *vmsg) +{ + unsigned int index = vmsg->payload.state.index; + unsigned int num = vmsg->payload.state.num; + + DPRINT("State.index: %d\n", index); + DPRINT("State.num: %d\n", num); + dev->vq[index].last_avail_index = num; + + return 0; +} + +static int +vubr_get_vring_base_exec(VubrDev *dev, VhostUserMsg *vmsg) +{ + unsigned int index = vmsg->payload.state.index; + + DPRINT("State.index: %d\n", index); + vmsg->payload.state.num = dev->vq[index].last_avail_index; + vmsg->size = sizeof(vmsg->payload.state); + /* FIXME: this is a work-around for a bug in QEMU enabling + * too early vrings. When protocol features are enabled, + * we have to respect * VHOST_USER_SET_VRING_ENABLE request. */ + dev->ready = 0; + + if (dev->vq[index].call_fd != -1) { + close(dev->vq[index].call_fd); + dispatcher_remove(&dev->dispatcher, dev->vq[index].call_fd); + dev->vq[index].call_fd = -1; + } + if (dev->vq[index].kick_fd != -1) { + close(dev->vq[index].kick_fd); + dispatcher_remove(&dev->dispatcher, dev->vq[index].kick_fd); + dev->vq[index].kick_fd = -1; + } + + /* Reply */ + return 1; +} + +static int +vubr_set_vring_kick_exec(VubrDev *dev, VhostUserMsg *vmsg) +{ + uint64_t u64_arg = vmsg->payload.u64; + int index = u64_arg & VHOST_USER_VRING_IDX_MASK; + + DPRINT("u64: 0x%016"PRIx64"\n", vmsg->payload.u64); + + assert((u64_arg & VHOST_USER_VRING_NOFD_MASK) == 0); + assert(vmsg->fd_num == 1); + + if (dev->vq[index].kick_fd != -1) { + close(dev->vq[index].kick_fd); + dispatcher_remove(&dev->dispatcher, dev->vq[index].kick_fd); + } + dev->vq[index].kick_fd = vmsg->fds[0]; + DPRINT("Got kick_fd: %d for vq: %d\n", vmsg->fds[0], index); + + if (index % 2 == 1) { + /* TX queue. */ + dispatcher_add(&dev->dispatcher, dev->vq[index].kick_fd, + dev, vubr_kick_cb); + + DPRINT("Waiting for kicks on fd: %d for vq: %d\n", + dev->vq[index].kick_fd, index); + } + /* We temporarily use this hack to determine that both TX and RX + * queues are set up and ready for processing. + * FIXME: we need to rely in VHOST_USER_SET_VRING_ENABLE and + * actual kicks. */ + if (dev->vq[0].kick_fd != -1 && + dev->vq[1].kick_fd != -1) { + dev->ready = 1; + DPRINT("vhost-user-bridge is ready for processing queues.\n"); + } + return 0; + +} + +static int +vubr_set_vring_call_exec(VubrDev *dev, VhostUserMsg *vmsg) +{ + uint64_t u64_arg = vmsg->payload.u64; + int index = u64_arg & VHOST_USER_VRING_IDX_MASK; + + DPRINT("u64: 0x%016"PRIx64"\n", vmsg->payload.u64); + assert((u64_arg & VHOST_USER_VRING_NOFD_MASK) == 0); + assert(vmsg->fd_num == 1); + + if (dev->vq[index].call_fd != -1) { + close(dev->vq[index].call_fd); + dispatcher_remove(&dev->dispatcher, dev->vq[index].call_fd); + } + dev->vq[index].call_fd = vmsg->fds[0]; + DPRINT("Got call_fd: %d for vq: %d\n", vmsg->fds[0], index); + + return 0; +} + +static int +vubr_set_vring_err_exec(VubrDev *dev, VhostUserMsg *vmsg) +{ + DPRINT("u64: 0x%016"PRIx64"\n", vmsg->payload.u64); + return 0; +} + +static int +vubr_get_protocol_features_exec(VubrDev *dev, VhostUserMsg *vmsg) +{ + vmsg->payload.u64 = 1ULL << VHOST_USER_PROTOCOL_F_LOG_SHMFD; + DPRINT("u64: 0x%016"PRIx64"\n", vmsg->payload.u64); + vmsg->size = sizeof(vmsg->payload.u64); + + /* Reply */ + return 1; +} + +static int +vubr_set_protocol_features_exec(VubrDev *dev, VhostUserMsg *vmsg) +{ + /* FIXME: unimplented */ + DPRINT("u64: 0x%016"PRIx64"\n", vmsg->payload.u64); + return 0; +} + +static int +vubr_get_queue_num_exec(VubrDev *dev, VhostUserMsg *vmsg) +{ + DPRINT("Function %s() not implemented yet.\n", __func__); + return 0; +} + +static int +vubr_set_vring_enable_exec(VubrDev *dev, VhostUserMsg *vmsg) +{ + unsigned int index = vmsg->payload.state.index; + unsigned int enable = vmsg->payload.state.num; + + DPRINT("State.index: %d\n", index); + DPRINT("State.enable: %d\n", enable); + dev->vq[index].enable = enable; + return 0; +} + +static int +vubr_send_rarp_exec(VubrDev *dev, VhostUserMsg *vmsg) +{ + DPRINT("Function %s() not implemented yet.\n", __func__); + return 0; +} + +static int +vubr_execute_request(VubrDev *dev, VhostUserMsg *vmsg) +{ + /* Print out generic part of the request. */ + DPRINT( + "================== Vhost user message from QEMU ==================\n"); + DPRINT("Request: %s (%d)\n", vubr_request_str[vmsg->request], + vmsg->request); + DPRINT("Flags: 0x%x\n", vmsg->flags); + DPRINT("Size: %d\n", vmsg->size); + + if (vmsg->fd_num) { + int i; + DPRINT("Fds:"); + for (i = 0; i < vmsg->fd_num; i++) { + DPRINT(" %d", vmsg->fds[i]); + } + DPRINT("\n"); + } + + switch (vmsg->request) { + case VHOST_USER_NONE: + return vubr_none_exec(dev, vmsg); + case VHOST_USER_GET_FEATURES: + return vubr_get_features_exec(dev, vmsg); + case VHOST_USER_SET_FEATURES: + return vubr_set_features_exec(dev, vmsg); + case VHOST_USER_SET_OWNER: + return vubr_set_owner_exec(dev, vmsg); + case VHOST_USER_RESET_OWNER: + return vubr_reset_device_exec(dev, vmsg); + case VHOST_USER_SET_MEM_TABLE: + return vubr_set_mem_table_exec(dev, vmsg); + case VHOST_USER_SET_LOG_BASE: + return vubr_set_log_base_exec(dev, vmsg); + case VHOST_USER_SET_LOG_FD: + return vubr_set_log_fd_exec(dev, vmsg); + case VHOST_USER_SET_VRING_NUM: + return vubr_set_vring_num_exec(dev, vmsg); + case VHOST_USER_SET_VRING_ADDR: + return vubr_set_vring_addr_exec(dev, vmsg); + case VHOST_USER_SET_VRING_BASE: + return vubr_set_vring_base_exec(dev, vmsg); + case VHOST_USER_GET_VRING_BASE: + return vubr_get_vring_base_exec(dev, vmsg); + case VHOST_USER_SET_VRING_KICK: + return vubr_set_vring_kick_exec(dev, vmsg); + case VHOST_USER_SET_VRING_CALL: + return vubr_set_vring_call_exec(dev, vmsg); + case VHOST_USER_SET_VRING_ERR: + return vubr_set_vring_err_exec(dev, vmsg); + case VHOST_USER_GET_PROTOCOL_FEATURES: + return vubr_get_protocol_features_exec(dev, vmsg); + case VHOST_USER_SET_PROTOCOL_FEATURES: + return vubr_set_protocol_features_exec(dev, vmsg); + case VHOST_USER_GET_QUEUE_NUM: + return vubr_get_queue_num_exec(dev, vmsg); + case VHOST_USER_SET_VRING_ENABLE: + return vubr_set_vring_enable_exec(dev, vmsg); + case VHOST_USER_SEND_RARP: + return vubr_send_rarp_exec(dev, vmsg); + + case VHOST_USER_MAX: + assert(vmsg->request != VHOST_USER_MAX); + } + return 0; +} + +static void +vubr_receive_cb(int sock, void *ctx) +{ + VubrDev *dev = (VubrDev *) ctx; + VhostUserMsg vmsg; + int reply_requested; + + vubr_message_read(sock, &vmsg); + reply_requested = vubr_execute_request(dev, &vmsg); + if (reply_requested) { + /* Set the version in the flags when sending the reply */ + vmsg.flags &= ~VHOST_USER_VERSION_MASK; + vmsg.flags |= VHOST_USER_VERSION; + vmsg.flags |= VHOST_USER_REPLY_MASK; + vubr_message_write(sock, &vmsg); + } +} + +static void +vubr_accept_cb(int sock, void *ctx) +{ + VubrDev *dev = (VubrDev *)ctx; + int conn_fd; + struct sockaddr_un un; + socklen_t len = sizeof(un); + + conn_fd = accept(sock, (struct sockaddr *) &un, &len); + if (conn_fd == -1) { + vubr_die("accept()"); + } + DPRINT("Got connection from remote peer on sock %d\n", conn_fd); + dispatcher_add(&dev->dispatcher, conn_fd, ctx, vubr_receive_cb); +} + +static VubrDev * +vubr_new(const char *path, bool client) +{ + VubrDev *dev = (VubrDev *) calloc(1, sizeof(VubrDev)); + dev->nregions = 0; + int i; + struct sockaddr_un un; + CallbackFunc cb; + size_t len; + + for (i = 0; i < MAX_NR_VIRTQUEUE; i++) { + dev->vq[i] = (VubrVirtq) { + .call_fd = -1, .kick_fd = -1, + .size = 0, + .last_avail_index = 0, .last_used_index = 0, + .desc = 0, .avail = 0, .used = 0, + .enable = 0, + }; + } + + /* Init log */ + dev->log_call_fd = -1; + dev->log_size = 0; + dev->log_table = 0; + dev->ready = 0; + dev->features = 0; + + /* Get a UNIX socket. */ + dev->sock = socket(AF_UNIX, SOCK_STREAM, 0); + if (dev->sock == -1) { + vubr_die("socket"); + } + + un.sun_family = AF_UNIX; + strcpy(un.sun_path, path); + len = sizeof(un.sun_family) + strlen(path); + + if (!client) { + unlink(path); + + if (bind(dev->sock, (struct sockaddr *) &un, len) == -1) { + vubr_die("bind"); + } + + if (listen(dev->sock, 1) == -1) { + vubr_die("listen"); + } + cb = vubr_accept_cb; + } else { + if (connect(dev->sock, (struct sockaddr *)&un, len) == -1) { + vubr_die("connect"); + } + cb = vubr_receive_cb; + } + + dispatcher_init(&dev->dispatcher); + dispatcher_add(&dev->dispatcher, dev->sock, (void *)dev, cb); + + DPRINT("Waiting for connections on UNIX socket %s ...\n", path); + return dev; +} + +static void +vubr_set_host(struct sockaddr_in *saddr, const char *host) +{ + if (isdigit(host[0])) { + if (!inet_aton(host, &saddr->sin_addr)) { + fprintf(stderr, "inet_aton() failed.\n"); + exit(1); + } + } else { + struct hostent *he = gethostbyname(host); + + if (!he) { + fprintf(stderr, "gethostbyname() failed.\n"); + exit(1); + } + saddr->sin_addr = *(struct in_addr *)he->h_addr; + } +} + +static void +vubr_backend_udp_setup(VubrDev *dev, + const char *local_host, + const char *local_port, + const char *remote_host, + const char *remote_port) +{ + int sock; + const char *r; + + int lport, rport; + + lport = strtol(local_port, (char **)&r, 0); + if (r == local_port) { + fprintf(stderr, "lport parsing failed.\n"); + exit(1); + } + + rport = strtol(remote_port, (char **)&r, 0); + if (r == remote_port) { + fprintf(stderr, "rport parsing failed.\n"); + exit(1); + } + + struct sockaddr_in si_local = { + .sin_family = AF_INET, + .sin_port = htons(lport), + }; + + vubr_set_host(&si_local, local_host); + + /* setup destination for sends */ + dev->backend_udp_dest = (struct sockaddr_in) { + .sin_family = AF_INET, + .sin_port = htons(rport), + }; + vubr_set_host(&dev->backend_udp_dest, remote_host); + + sock = socket(AF_INET, SOCK_DGRAM, IPPROTO_UDP); + if (sock == -1) { + vubr_die("socket"); + } + + if (bind(sock, (struct sockaddr *)&si_local, sizeof(si_local)) == -1) { + vubr_die("bind"); + } + + dev->backend_udp_sock = sock; + dispatcher_add(&dev->dispatcher, sock, dev, vubr_backend_recv_cb); + DPRINT("Waiting for data from udp backend on %s:%d...\n", + local_host, lport); +} + +static void +vubr_run(VubrDev *dev) +{ + while (1) { + /* timeout 200ms */ + dispatcher_wait(&dev->dispatcher, 200000); + /* Here one can try polling strategy. */ + } +} + +static int +vubr_parse_host_port(const char **host, const char **port, const char *buf) +{ + char *p = strchr(buf, ':'); + + if (!p) { + return -1; + } + *p = '\0'; + *host = strdup(buf); + *port = strdup(p + 1); + return 0; +} + +#define DEFAULT_UD_SOCKET "/tmp/vubr.sock" +#define DEFAULT_LHOST "127.0.0.1" +#define DEFAULT_LPORT "4444" +#define DEFAULT_RHOST "127.0.0.1" +#define DEFAULT_RPORT "5555" + +static const char *ud_socket_path = DEFAULT_UD_SOCKET; +static const char *lhost = DEFAULT_LHOST; +static const char *lport = DEFAULT_LPORT; +static const char *rhost = DEFAULT_RHOST; +static const char *rport = DEFAULT_RPORT; + +int +main(int argc, char *argv[]) +{ + VubrDev *dev; + int opt; + bool client = false; + + while ((opt = getopt(argc, argv, "l:r:u:c")) != -1) { + + switch (opt) { + case 'l': + if (vubr_parse_host_port(&lhost, &lport, optarg) < 0) { + goto out; + } + break; + case 'r': + if (vubr_parse_host_port(&rhost, &rport, optarg) < 0) { + goto out; + } + break; + case 'u': + ud_socket_path = strdup(optarg); + break; + case 'c': + client = true; + break; + default: + goto out; + } + } + + DPRINT("ud socket: %s (%s)\n", ud_socket_path, + client ? "client" : "server"); + DPRINT("local: %s:%s\n", lhost, lport); + DPRINT("remote: %s:%s\n", rhost, rport); + + dev = vubr_new(ud_socket_path, client); + if (!dev) { + return 1; + } + + vubr_backend_udp_setup(dev, lhost, lport, rhost, rport); + vubr_run(dev); + return 0; + +out: + fprintf(stderr, "Usage: %s ", argv[0]); + fprintf(stderr, "[-u ud_socket_path] [-l lhost:lport] [-r rhost:rport]\n"); + fprintf(stderr, "\t-u path to unix doman socket. default: %s\n", + DEFAULT_UD_SOCKET); + fprintf(stderr, "\t-l local host and port. default: %s:%s\n", + DEFAULT_LHOST, DEFAULT_LPORT); + fprintf(stderr, "\t-r remote host and port. default: %s:%s\n", + DEFAULT_RHOST, DEFAULT_RPORT); + + return 1; +} diff --git a/tests/vhost-user-test.c.orig b/tests/vhost-user-test.c.orig new file mode 100644 index 0000000000..b491e6fcb6 --- /dev/null +++ b/tests/vhost-user-test.c.orig @@ -0,0 +1,364 @@ +/* + * QTest testcase for the vhost-user + * + * Copyright (c) 2014 Virtual Open Systems Sarl. + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + * + */ + +#include + +#include "libqtest.h" +#include "qemu/option.h" +#include "sysemu/char.h" +#include "sysemu/sysemu.h" + +#include +#include +#include +#include + +/* GLIB version compatibility flags */ +#if !GLIB_CHECK_VERSION(2, 26, 0) +#define G_TIME_SPAN_SECOND (G_GINT64_CONSTANT(1000000)) +#endif + +#if GLIB_CHECK_VERSION(2, 28, 0) +#define HAVE_MONOTONIC_TIME +#endif + +#define QEMU_CMD_ACCEL " -machine accel=tcg" +#define QEMU_CMD_MEM " -m 512 -object memory-backend-file,id=mem,size=512M,"\ + "mem-path=%s,share=on -numa node,memdev=mem" +#define QEMU_CMD_CHR " -chardev socket,id=chr0,path=%s" +#define QEMU_CMD_NETDEV " -netdev vhost-user,id=net0,chardev=chr0,vhostforce" +#define QEMU_CMD_NET " -device virtio-net-pci,netdev=net0 " +#define QEMU_CMD_ROM " -option-rom ../pc-bios/pxe-virtio.rom" + +#define QEMU_CMD QEMU_CMD_ACCEL QEMU_CMD_MEM QEMU_CMD_CHR \ + QEMU_CMD_NETDEV QEMU_CMD_NET QEMU_CMD_ROM + +#define HUGETLBFS_MAGIC 0x958458f6 + +/*********** FROM hw/virtio/vhost-user.c *************************************/ + +#define VHOST_MEMORY_MAX_NREGIONS 8 + +#define VHOST_USER_F_PROTOCOL_FEATURES 30 + +typedef enum VhostUserRequest { + VHOST_USER_NONE = 0, + VHOST_USER_GET_FEATURES = 1, + VHOST_USER_SET_FEATURES = 2, + VHOST_USER_SET_OWNER = 3, + VHOST_USER_RESET_DEVICE = 4, + VHOST_USER_SET_MEM_TABLE = 5, + VHOST_USER_SET_LOG_BASE = 6, + VHOST_USER_SET_LOG_FD = 7, + VHOST_USER_SET_VRING_NUM = 8, + VHOST_USER_SET_VRING_ADDR = 9, + VHOST_USER_SET_VRING_BASE = 10, + VHOST_USER_GET_VRING_BASE = 11, + VHOST_USER_SET_VRING_KICK = 12, + VHOST_USER_SET_VRING_CALL = 13, + VHOST_USER_SET_VRING_ERR = 14, + VHOST_USER_GET_PROTOCOL_FEATURES = 15, + VHOST_USER_SET_PROTOCOL_FEATURES = 16, + VHOST_USER_MAX +} VhostUserRequest; + +typedef struct VhostUserMemoryRegion { + uint64_t guest_phys_addr; + uint64_t memory_size; + uint64_t userspace_addr; + uint64_t mmap_offset; +} VhostUserMemoryRegion; + +typedef struct VhostUserMemory { + uint32_t nregions; + uint32_t padding; + VhostUserMemoryRegion regions[VHOST_MEMORY_MAX_NREGIONS]; +} VhostUserMemory; + +typedef struct VhostUserMsg { + VhostUserRequest request; + +#define VHOST_USER_VERSION_MASK (0x3) +#define VHOST_USER_REPLY_MASK (0x1<<2) + uint32_t flags; + uint32_t size; /* the following payload size */ + union { + uint64_t u64; + struct vhost_vring_state state; + struct vhost_vring_addr addr; + VhostUserMemory memory; + }; +} QEMU_PACKED VhostUserMsg; + +static VhostUserMsg m __attribute__ ((unused)); +#define VHOST_USER_HDR_SIZE (sizeof(m.request) \ + + sizeof(m.flags) \ + + sizeof(m.size)) + +#define VHOST_USER_PAYLOAD_SIZE (sizeof(m) - VHOST_USER_HDR_SIZE) + +/* The version of the protocol we support */ +#define VHOST_USER_VERSION (0x1) +/*****************************************************************************/ + +int fds_num = 0, fds[VHOST_MEMORY_MAX_NREGIONS]; +static VhostUserMemory memory; +static CompatGMutex data_mutex; +static CompatGCond data_cond; + +#if !GLIB_CHECK_VERSION(2, 32, 0) +static gboolean g_cond_wait_until(CompatGCond cond, CompatGMutex mutex, + gint64 end_time) +{ + gboolean ret = FALSE; + end_time -= g_get_monotonic_time(); + GTimeVal time = { end_time / G_TIME_SPAN_SECOND, + end_time % G_TIME_SPAN_SECOND }; + ret = g_cond_timed_wait(cond, mutex, &time); + return ret; +} +#endif + +static void wait_for_fds(void) +{ + gint64 end_time; + + g_mutex_lock(&data_mutex); + end_time = g_get_monotonic_time() + 5 * G_TIME_SPAN_SECOND; + while (!fds_num) { + if (!g_cond_wait_until(&data_cond, &data_mutex, end_time)) { + /* timeout has passed */ + g_assert(fds_num); + break; + } + } + + /* check for sanity */ + g_assert_cmpint(fds_num, >, 0); + g_assert_cmpint(fds_num, ==, memory.nregions); + + g_mutex_unlock(&data_mutex); +} + +static void read_guest_mem(void) +{ + uint32_t *guest_mem; + int i, j; + size_t size; + + wait_for_fds(); + + /* iterate all regions */ + for (i = 0; i < fds_num; i++) { + + /* We'll check only the region statring at 0x0*/ + if (memory.regions[i].guest_phys_addr != 0x0) { + continue; + } + + g_assert_cmpint(memory.regions[i].memory_size, >, 1024); + + size = memory.regions[i].memory_size + memory.regions[i].mmap_offset; + + guest_mem = mmap(0, size, PROT_READ | PROT_WRITE, + MAP_SHARED, fds[i], 0); + + g_assert(guest_mem != MAP_FAILED); + guest_mem += (memory.regions[i].mmap_offset / sizeof(*guest_mem)); + + for (j = 0; j < 256; j++) { + uint32_t a = readl(memory.regions[i].guest_phys_addr + j*4); + uint32_t b = guest_mem[j]; + + g_assert_cmpint(a, ==, b); + } + + munmap(guest_mem, memory.regions[i].memory_size); + } + + g_mutex_unlock(&data_mutex); +} + +static void *thread_function(void *data) +{ + GMainLoop *loop; + loop = g_main_loop_new(NULL, FALSE); + g_main_loop_run(loop); + return NULL; +} + +static int chr_can_read(void *opaque) +{ + return VHOST_USER_HDR_SIZE; +} + +static void chr_read(void *opaque, const uint8_t *buf, int size) +{ + CharDriverState *chr = opaque; + VhostUserMsg msg; + uint8_t *p = (uint8_t *) &msg; + int fd; + + if (size != VHOST_USER_HDR_SIZE) { + g_test_message("Wrong message size received %d\n", size); + return; + } + + g_mutex_lock(&data_mutex); + memcpy(p, buf, VHOST_USER_HDR_SIZE); + + if (msg.size) { + p += VHOST_USER_HDR_SIZE; + qemu_chr_fe_read_all(chr, p, msg.size); + } + + switch (msg.request) { + case VHOST_USER_GET_FEATURES: + /* send back features to qemu */ + msg.flags |= VHOST_USER_REPLY_MASK; + msg.size = sizeof(m.u64); + msg.u64 = 0x1ULL << VHOST_USER_F_PROTOCOL_FEATURES; + p = (uint8_t *) &msg; + qemu_chr_fe_write_all(chr, p, VHOST_USER_HDR_SIZE + msg.size); + break; + + case VHOST_USER_SET_FEATURES: + g_assert_cmpint(msg.u64 & (0x1ULL << VHOST_USER_F_PROTOCOL_FEATURES), + !=, 0ULL); + break; + + case VHOST_USER_GET_PROTOCOL_FEATURES: + /* send back features to qemu */ + msg.flags |= VHOST_USER_REPLY_MASK; + msg.size = sizeof(m.u64); + msg.u64 = 0; + p = (uint8_t *) &msg; + qemu_chr_fe_write_all(chr, p, VHOST_USER_HDR_SIZE + msg.size); + break; + + case VHOST_USER_GET_VRING_BASE: + /* send back vring base to qemu */ + msg.flags |= VHOST_USER_REPLY_MASK; + msg.size = sizeof(m.state); + msg.state.num = 0; + p = (uint8_t *) &msg; + qemu_chr_fe_write_all(chr, p, VHOST_USER_HDR_SIZE + msg.size); + break; + + case VHOST_USER_SET_MEM_TABLE: + /* received the mem table */ + memcpy(&memory, &msg.memory, sizeof(msg.memory)); + fds_num = qemu_chr_fe_get_msgfds(chr, fds, sizeof(fds) / sizeof(int)); + + /* signal the test that it can continue */ + g_cond_signal(&data_cond); + break; + + case VHOST_USER_SET_VRING_KICK: + case VHOST_USER_SET_VRING_CALL: + /* consume the fd */ + qemu_chr_fe_get_msgfds(chr, &fd, 1); + /* + * This is a non-blocking eventfd. + * The receive function forces it to be blocking, + * so revert it back to non-blocking. + */ + qemu_set_nonblock(fd); + break; + default: + break; + } + g_mutex_unlock(&data_mutex); +} + +static const char *init_hugepagefs(void) +{ + const char *path; + struct statfs fs; + int ret; + + path = getenv("QTEST_HUGETLBFS_PATH"); + if (!path) { + path = "/hugetlbfs"; + } + + if (access(path, R_OK | W_OK | X_OK)) { + g_test_message("access on path (%s): %s\n", path, strerror(errno)); + return NULL; + } + + do { + ret = statfs(path, &fs); + } while (ret != 0 && errno == EINTR); + + if (ret != 0) { + g_test_message("statfs on path (%s): %s\n", path, strerror(errno)); + return NULL; + } + + if (fs.f_type != HUGETLBFS_MAGIC) { + g_test_message("Warning: path not on HugeTLBFS: %s\n", path); + return NULL; + } + + return path; +} + +int main(int argc, char **argv) +{ + QTestState *s = NULL; + CharDriverState *chr = NULL; + const char *hugefs = 0; + char *socket_path = 0; + char *qemu_cmd = 0; + char *chr_path = 0; + int ret; + + g_test_init(&argc, &argv, NULL); + + module_call_init(MODULE_INIT_QOM); + + hugefs = init_hugepagefs(); + if (!hugefs) { + return 0; + } + + socket_path = g_strdup_printf("/tmp/vhost-%d.sock", getpid()); + + /* create char dev and add read handlers */ + qemu_add_opts(&qemu_chardev_opts); + chr_path = g_strdup_printf("unix:%s,server,nowait", socket_path); + chr = qemu_chr_new("chr0", chr_path, NULL); + g_free(chr_path); + qemu_chr_add_handlers(chr, chr_can_read, chr_read, NULL, chr); + + /* run the main loop thread so the chardev may operate */ + g_mutex_init(&data_mutex); + g_cond_init(&data_cond); + g_thread_new(NULL, thread_function, NULL); + + qemu_cmd = g_strdup_printf(QEMU_CMD, hugefs, socket_path); + s = qtest_start(qemu_cmd); + g_free(qemu_cmd); + + qtest_add_func("/vhost-user/read-guest-mem", read_guest_mem); + + ret = g_test_run(); + + if (s) { + qtest_quit(s); + } + + /* cleanup */ + unlink(socket_path); + g_free(socket_path); + + return ret; +}