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target/loongarch: Fix page size set issue with CSR_STLBPS

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When modify register CSR_STLBPS, the page size should come from
input parameter rather than old value.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
This commit is contained in:
Bibo Mao 2025-09-03 11:17:56 +08:00
parent 349f3ec027
commit 27a26b48bf
2 changed files with 4 additions and 2 deletions
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1
target/loongarch/cpu-csr.h
View file

@ -106,6 +106,7 @@ FIELD(CSR_PWCH, DIR4_WIDTH, 18, 6)
#define LOONGARCH_CSR_STLBPS 0x1e /* Stlb page size */
FIELD(CSR_STLBPS, PS, 0, 5)
FIELD(CSR_STLBPS, RESERVE, 5, 27)
#define LOONGARCH_CSR_RVACFG 0x1f /* Reduced virtual address config */
FIELD(CSR_RVACFG, RBITS, 0, 4)

5
target/loongarch/tcg/csr_helper.c
View file

@ -26,13 +26,14 @@ target_ulong helper_csrwr_stlbps(CPULoongArchState *env, target_ulong val)
* The real hardware only supports the min tlb_ps is 12
* tlb_ps=0 may cause undefined-behavior.
*/
uint8_t tlb_ps = FIELD_EX64(env->CSR_STLBPS, CSR_STLBPS, PS);
uint8_t tlb_ps = FIELD_EX64(val, CSR_STLBPS, PS);
if (!check_ps(env, tlb_ps)) {
qemu_log_mask(LOG_GUEST_ERROR,
"Attempted set ps %d\n", tlb_ps);
} else {
/* Only update PS field, reserved bit keeps zero */
env->CSR_STLBPS = FIELD_DP64(old_v, CSR_STLBPS, PS, tlb_ps);
val = FIELD_DP64(val, CSR_STLBPS, RESERVE, 0);
env->CSR_STLBPS = val;
}
return old_v;