From 2badeffc2e442df9395978aad6626f18cc33e98e Mon Sep 17 00:00:00 2001
From: fridtjof <fridtjof@das-labor.org>
Date: Fri, 22 Aug 2025 01:14:40 +0200
Subject: [PATCH] translate: wip lpr/spr (noop still lol)

---
 target/cr16c/translate.c | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/target/cr16c/translate.c b/target/cr16c/translate.c
index d065c46aad..804f56b57e 100644
--- a/target/cr16c/translate.c
+++ b/target/cr16c/translate.c
@@ -1558,6 +1558,39 @@ static bool trans_STORM(DisasContext *ctx, arg_STORM *a) {
     return true;
 }
 
+enum {
+    CR16C_PRD_DBS = 0,
+    CR16C_PRD_DSR = 1,
+    CR16C_PRD_DCR = 2,
+    CR16C_PRD_CAR0 = 4,
+    CR16C_PRD_CAR1 = 6,
+    CR16C_PRD_CFG = 8,
+    CR16C_PRD_PSR = 9,
+    CR16C_PRD_INTBASE = 10,
+    CR16C_PRD_ISP = 12,
+    CR16C_PRD_USP = 14,
+};
+
+enum {
+    CR16C_PR_DBS = 0,
+    CR16C_PR_DSR = 1,
+    CR16C_PR_DCRL = 2,
+    CR16C_PR_DCRH = 3,
+    CR16C_PR_CAR0L = 4,
+    CR16C_PR_CAR0H = 5,
+    CR16C_PR_CAR1L = 6,
+    CR16C_PR_CAR1H = 7,
+    CR16C_PR_CFG = 8,
+    CR16C_PR_PSR = 9,
+    CR16C_PR_INTBASEL = 10,
+    CR16C_PR_INTBASEH = 11,
+    CR16C_PR_ISPL = 12,
+    CR16C_PR_ISPH = 13,
+    CR16C_PR_USPL = 14,
+    CR16C_PR_USPH = 15,
+};
+
+// src -> proc register
 static bool trans_LPR(DisasContext *ctx, arg_LPR* a) {
     gen_helper_raise_unimplemented_instruction();
     return true;
@@ -1568,6 +1601,7 @@ static bool trans_LPRD(DisasContext *ctx, arg_LPRD* a) {
     return true;
 }
 
+// proc register -> src
 static bool trans_SPR(DisasContext *ctx, arg_SPR* a) {
     gen_helper_raise_unimplemented_instruction();
     return true;