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Miscellaneous patches for 2021-05-12

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Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2021-05-12' into staging

Miscellaneous patches for 2021-05-12

# gpg: Signature made Wed 12 May 2021 17:22:15 BST
# gpg:                using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653
# gpg:                issuer "armbru@redhat.com"
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full]
# gpg:                 aka "Markus Armbruster <armbru@pond.sub.org>" [full]
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867  4E5F 3870 B400 EB91 8653

* remotes/armbru/tags/pull-misc-2021-05-12:
  Drop the deprecated unicore32 target
  Drop the deprecated lm32 target
  block: Drop the sheepdog block driver
  Remove the deprecated moxie target
  monitor/qmp: fix race on CHR_EVENT_CLOSED without OOB

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2021-05-13 20:13:24 +01:00
commit 2d3fc4e2b0
208 changed files with 78 additions and 22410 deletions
Download patch file Download diff file Expand all files Collapse all files

4
include/disas/dis-asm.h
View file

@ -249,8 +249,6 @@ enum bfd_architecture
#define bfd_mach_nios2 0
#define bfd_mach_nios2r1 1
#define bfd_mach_nios2r2 2
bfd_arch_lm32, /* Lattice Mico32 */
#define bfd_mach_lm32 1
bfd_arch_rx, /* Renesas RX */
#define bfd_mach_rx 0x75
#define bfd_mach_rx_v2 0x76
@ -443,7 +441,6 @@ int print_insn_m32r (bfd_vma, disassemble_info*);
int print_insn_m88k (bfd_vma, disassemble_info*);
int print_insn_mn10200 (bfd_vma, disassemble_info*);
int print_insn_mn10300 (bfd_vma, disassemble_info*);
int print_insn_moxie (bfd_vma, disassemble_info*);
int print_insn_ns32k (bfd_vma, disassemble_info*);
int print_insn_big_powerpc (bfd_vma, disassemble_info*);
int print_insn_little_powerpc (bfd_vma, disassemble_info*);
@ -458,7 +455,6 @@ int print_insn_crisv32 (bfd_vma, disassemble_info*);
int print_insn_crisv10 (bfd_vma, disassemble_info*);
int print_insn_microblaze (bfd_vma, disassemble_info*);
int print_insn_ia64 (bfd_vma, disassemble_info*);
int print_insn_lm32 (bfd_vma, disassemble_info*);
int print_insn_big_nios2 (bfd_vma, disassemble_info*);
int print_insn_little_nios2 (bfd_vma, disassemble_info*);
int print_insn_xtensa (bfd_vma, disassemble_info*);

6
include/elf.h
View file

@ -174,9 +174,8 @@ typedef struct mips_elf_abiflags_v0 {
#define EM_OPENRISC 92 /* OpenCores OpenRISC */
#define EM_UNICORE32 110 /* UniCore32 */
#define EM_HEXAGON 164 /* Qualcomm Hexagon */
#define EM_RX 173 /* Renesas RX family */
#define EM_RISCV 243 /* RISC-V */
@ -206,9 +205,6 @@ typedef struct mips_elf_abiflags_v0 {
#define EM_AARCH64 183
#define EM_MOXIE 223 /* Moxie processor family */
#define EM_MOXIE_OLD 0xFEED
#define EF_AVR_MACH 0x7F /* Mask for AVR e_flags to get core type */
/* This is the info that is needed to parse the dynamic section of the file */

5
include/exec/poison.h
View file

@ -12,7 +12,6 @@
#pragma GCC poison TARGET_CRIS
#pragma GCC poison TARGET_HEXAGON
#pragma GCC poison TARGET_HPPA
#pragma GCC poison TARGET_LM32
#pragma GCC poison TARGET_M68K
#pragma GCC poison TARGET_MICROBLAZE
#pragma GCC poison TARGET_MIPS
@ -20,7 +19,6 @@
#pragma GCC poison TARGET_ABI_MIPSO32
#pragma GCC poison TARGET_MIPS64
#pragma GCC poison TARGET_ABI_MIPSN64
#pragma GCC poison TARGET_MOXIE
#pragma GCC poison TARGET_NIOS2
#pragma GCC poison TARGET_OPENRISC
#pragma GCC poison TARGET_PPC
@ -32,7 +30,6 @@
#pragma GCC poison TARGET_SPARC
#pragma GCC poison TARGET_SPARC64
#pragma GCC poison TARGET_TRICORE
#pragma GCC poison TARGET_UNICORE32
#pragma GCC poison TARGET_XTENSA
#pragma GCC poison TARGET_ALIGNED_ONLY
@ -74,12 +71,10 @@
#pragma GCC poison CONFIG_HPPA_DIS
#pragma GCC poison CONFIG_I386_DIS
#pragma GCC poison CONFIG_HEXAGON_DIS
#pragma GCC poison CONFIG_LM32_DIS
#pragma GCC poison CONFIG_M68K_DIS
#pragma GCC poison CONFIG_MICROBLAZE_DIS
#pragma GCC poison CONFIG_MIPS_DIS
#pragma GCC poison CONFIG_NANOMIPS_DIS
#pragma GCC poison CONFIG_MOXIE_DIS
#pragma GCC poison CONFIG_NIOS2_DIS
#pragma GCC poison CONFIG_PPC_DIS
#pragma GCC poison CONFIG_RISCV_DIS

13
include/hw/char/lm32_juart.h
View file

@ -1,13 +0,0 @@
#ifndef QEMU_HW_CHAR_LM32_JUART_H
#define QEMU_HW_CHAR_LM32_JUART_H
#include "hw/qdev-core.h"
#define TYPE_LM32_JUART "lm32-juart"
uint32_t lm32_juart_get_jtx(DeviceState *d);
uint32_t lm32_juart_get_jrx(DeviceState *d);
void lm32_juart_set_jtx(DeviceState *d, uint32_t jtx);
void lm32_juart_set_jrx(DeviceState *d, uint32_t jrx);
#endif /* QEMU_HW_CHAR_LM32_JUART_H */

42
include/hw/display/milkymist_tmu2.h
View file

@ -1,42 +0,0 @@
/*
* QEMU model of the Milkymist texture mapping unit.
*
* Copyright (c) 2010 Michael Walle <michael@walle.cc>
* Copyright (c) 2010 Sebastien Bourdeauducq
* <sebastien.bourdeauducq@lekernel.net>
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*
*
* Specification available at:
* http://milkymist.walle.cc/socdoc/tmu2.pdf
*
*/
#ifndef HW_DISPLAY_MILKYMIST_TMU2_H
#define HW_DISPLAY_MILKYMIST_TMU2_H
#include "exec/hwaddr.h"
#include "hw/qdev-core.h"
#if defined(CONFIG_X11) && defined(CONFIG_OPENGL)
DeviceState *milkymist_tmu2_create(hwaddr base, qemu_irq irq);
#else
static inline DeviceState *milkymist_tmu2_create(hwaddr base, qemu_irq irq)
{
return NULL;
}
#endif
#endif /* HW_DISPLAY_MILKYMIST_TMU2_H */

8
include/hw/elf_ops.h
View file

@ -368,14 +368,6 @@ static int glue(load_elf, SZ)(const char *name, int fd,
}
}
break;
case EM_MOXIE:
if (ehdr.e_machine != EM_MOXIE) {
if (ehdr.e_machine != EM_MOXIE_OLD) {
ret = ELF_LOAD_WRONG_ARCH;
goto fail;
}
}
break;
case EM_MIPS:
case EM_NANOMIPS:
if ((ehdr.e_machine != EM_MIPS) &&

10
include/hw/lm32/lm32_pic.h
View file

@ -1,10 +0,0 @@
#ifndef QEMU_HW_LM32_PIC_H
#define QEMU_HW_LM32_PIC_H
uint32_t lm32_pic_get_ip(DeviceState *d);
uint32_t lm32_pic_get_im(DeviceState *d);
void lm32_pic_set_ip(DeviceState *d, uint32_t ip);
void lm32_pic_set_im(DeviceState *d, uint32_t im);
#endif /* QEMU_HW_LM32_PIC_H */

40
include/hw/unicore32/puv3.h
View file

@ -1,40 +0,0 @@
/*
* Misc PKUnity SoC declarations
*
* Copyright (C) 2010-2012 Guan Xuetao
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation, or any later version.
* See the COPYING file in the top-level directory.
*/
#ifndef QEMU_HW_PUV3_H
#define QEMU_HW_PUV3_H
#define PUV3_REGS_OFFSET (0x1000) /* 4K is reasonable */
/* Hardware interrupts */
#define PUV3_IRQS_NR (32)
#define PUV3_IRQS_GPIOLOW0 (0)
#define PUV3_IRQS_GPIOLOW1 (1)
#define PUV3_IRQS_GPIOLOW2 (2)
#define PUV3_IRQS_GPIOLOW3 (3)
#define PUV3_IRQS_GPIOLOW4 (4)
#define PUV3_IRQS_GPIOLOW5 (5)
#define PUV3_IRQS_GPIOLOW6 (6)
#define PUV3_IRQS_GPIOLOW7 (7)
#define PUV3_IRQS_GPIOHIGH (8)
#define PUV3_IRQS_PS2_KBD (22)
#define PUV3_IRQS_PS2_AUX (23)
#define PUV3_IRQS_OST0 (26)
/* All puv3_*.c use DPRINTF for debug. */
#ifdef DEBUG_PUV3
#define DPRINTF(fmt, ...) printf("%s: " fmt , __func__, ## __VA_ARGS__)
#else
#define DPRINTF(fmt, ...) do {} while (0)
#endif
#endif /* QEMU_HW_PUV3_H */

3
include/sysemu/arch_init.h
View file

@ -9,7 +9,6 @@ enum {
QEMU_ARCH_CRIS = (1 << 2),
QEMU_ARCH_I386 = (1 << 3),
QEMU_ARCH_M68K = (1 << 4),
QEMU_ARCH_LM32 = (1 << 5),
QEMU_ARCH_MICROBLAZE = (1 << 6),
QEMU_ARCH_MIPS = (1 << 7),
QEMU_ARCH_PPC = (1 << 8),
@ -18,8 +17,6 @@ enum {
QEMU_ARCH_SPARC = (1 << 11),
QEMU_ARCH_XTENSA = (1 << 12),
QEMU_ARCH_OPENRISC = (1 << 13),
QEMU_ARCH_UNICORE32 = (1 << 14),
QEMU_ARCH_MOXIE = (1 << 15),
QEMU_ARCH_TRICORE = (1 << 16),
QEMU_ARCH_NIOS2 = (1 << 17),
QEMU_ARCH_HPPA = (1 << 18),