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hw/net/cadence_gem: Add pcs-enabled property

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The Linux kernel checks the PCS disabled bit in the R_DESCONF register
to determine if SGMII is supported. If the bit is set, SGMII support is
disabled. Since the Microchip Icicle devicetree file configures SGMII
interface mode, enabling the Ethernet interfaces fails when booting
the Linux kernel.

Add pcs-enabled property to to let the driver know if PCS should be
enabled. Set the flag to false by default (indicating that PCS is disabled)
to match the exiting code.

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20251004200049.871646-4-linux@roeck-us.net>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Guenter Roeck 2025-10-04 13:00:48 -07:00 • committed by Alistair Francis
parent a79a4b9c2e
commit 35a5e87920
2 changed files with 7 additions and 1 deletions
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7
hw/net/cadence_gem.c
View file

@ -1477,7 +1477,10 @@ static void gem_reset(DeviceState *d)
s->regs[R_TXPARTIALSF] = 0x000003ff;
s->regs[R_RXPARTIALSF] = 0x000003ff;
s->regs[R_MODID] = s->revision;
s->regs[R_DESCONF] = 0x02D00111;
s->regs[R_DESCONF] = 0x02D00110;
if (!s->pcs_enabled) {
s->regs[R_DESCONF] |= 0x00000001;
}
s->regs[R_DESCONF2] = 0x2ab10000 | s->jumbo_max_len;
s->regs[R_DESCONF5] = 0x002f2045;
s->regs[R_DESCONF6] = R_DESCONF6_DMA_ADDR_64B_MASK;
@ -1821,6 +1824,8 @@ static const Property gem_properties[] = {
num_type2_screeners, 4),
DEFINE_PROP_UINT16("jumbo-max-len", CadenceGEMState,
jumbo_max_len, 10240),
DEFINE_PROP_BOOL("pcs-enabled", CadenceGEMState,
pcs_enabled, false),
DEFINE_PROP_BOOL("phy-connected", CadenceGEMState, phy_connected, true),
DEFINE_PROP_LINK("phy-consumer", CadenceGEMState, phy_consumer,
TYPE_CADENCE_GEM, CadenceGEMState *),

1
include/hw/net/cadence_gem.h
View file

@ -62,6 +62,7 @@ struct CadenceGEMState {
uint8_t num_type2_screeners;
uint32_t revision;
uint16_t jumbo_max_len;
bool pcs_enabled;
/* GEM registers backing store */
uint32_t regs[CADENCE_GEM_MAXREG];