diff --git a/target/cr16c/meson.build b/target/cr16c/meson.build index f5a4a5d2e6..14f110acb8 100644 --- a/target/cr16c/meson.build +++ b/target/cr16c/meson.build @@ -7,6 +7,7 @@ cr16c_ss.add(gen) cr16c_ss.add(files( 'cpu.c', 'helper.c', + 'monitor.c', 'translate.c', 'disas.c', )) diff --git a/target/cr16c/monitor.c b/target/cr16c/monitor.c new file mode 100644 index 0000000000..701de0774f --- /dev/null +++ b/target/cr16c/monitor.c @@ -0,0 +1,64 @@ +/* + * QEMU monitor + * + * Copyright (c) 2026 fridtjof + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "qemu/osdep.h" +#include "cpu.h" +#include "monitor/monitor.h" +#include "monitor/hmp-target.h" + +const MonitorDef monitor_defs[] = { +#define GENERIC_REG(idx) { cr16c_cpu_r_names[(idx)], offsetof(CPUCR16CState, r[(idx)]) } + GENERIC_REG(0), + GENERIC_REG(1), + GENERIC_REG(2), + GENERIC_REG(3), + GENERIC_REG(4), + GENERIC_REG(5), + GENERIC_REG(6), + GENERIC_REG(7), + GENERIC_REG(8), + GENERIC_REG(9), + GENERIC_REG(10), + GENERIC_REG(11), + GENERIC_REG(12), + GENERIC_REG(13), + GENERIC_REG(14), + GENERIC_REG(15), +#undef GENERIC_REG + + { "intbase", offsetof(CPUCR16CState, intbase), }, + { "isp", offsetof(CPUCR16CState, isp), }, + { "usp", offsetof(CPUCR16CState, usp), }, + + // TODO PSR, CFG + // TODO debug registers + + { "pc", offsetof(CPUCR16CState, pc), }, + { NULL }, +}; + +const MonitorDef *target_monitor_defs(void) +{ + return monitor_defs; +}