pop ss, mov ss, x and sti disable irqs for the next instruction - began dispatch optimization by adding new x86 cpu 'hidden' flags
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@372 c046a42c-6fe2-441c-8c8c-71466251a162
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d05e66d217
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8 changed files with 109 additions and 58 deletions
26
cpu-exec.c
26
cpu-exec.c
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@ -186,7 +186,8 @@ int cpu_exec(CPUState *env1)
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#if defined(TARGET_I386)
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/* if hardware interrupt pending, we execute it */
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if ((interrupt_request & CPU_INTERRUPT_HARD) &&
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(env->eflags & IF_MASK)) {
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(env->eflags & IF_MASK) &&
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!(env->hflags & HF_INHIBIT_IRQ_MASK)) {
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int intno;
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intno = cpu_x86_get_pic_interrupt(env);
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if (loglevel) {
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@ -233,21 +234,20 @@ int cpu_exec(CPUState *env1)
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#endif
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}
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#endif
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/* we compute the CPU state. We assume it will not
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change during the whole generated block. */
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/* we record a subset of the CPU state. It will
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always be the same before a given translated block
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is executed. */
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#if defined(TARGET_I386)
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flags = (env->segs[R_CS].flags & DESC_B_MASK)
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>> (DESC_B_SHIFT - GEN_FLAG_CODE32_SHIFT);
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>> (DESC_B_SHIFT - HF_CS32_SHIFT);
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flags |= (env->segs[R_SS].flags & DESC_B_MASK)
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>> (DESC_B_SHIFT - GEN_FLAG_SS32_SHIFT);
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>> (DESC_B_SHIFT - HF_SS32_SHIFT);
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flags |= (((unsigned long)env->segs[R_DS].base |
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(unsigned long)env->segs[R_ES].base |
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(unsigned long)env->segs[R_SS].base) != 0) <<
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GEN_FLAG_ADDSEG_SHIFT;
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flags |= env->cpl << GEN_FLAG_CPL_SHIFT;
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flags |= env->soft_mmu << GEN_FLAG_SOFT_MMU_SHIFT;
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flags |= (env->eflags & VM_MASK) >> (17 - GEN_FLAG_VM_SHIFT);
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flags |= (env->eflags & (IOPL_MASK | TF_MASK));
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HF_ADDSEG_SHIFT;
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flags |= env->hflags;
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flags |= (env->eflags & (IOPL_MASK | TF_MASK | VM_MASK));
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cs_base = env->segs[R_CS].base;
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pc = cs_base + env->eip;
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#elif defined(TARGET_ARM)
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@ -337,8 +337,8 @@ int cpu_exec(CPUState *env1)
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/* reset soft MMU for next block (it can currently
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only be set by a memory fault) */
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#if defined(TARGET_I386) && !defined(CONFIG_SOFTMMU)
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if (env->soft_mmu) {
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env->soft_mmu = 0;
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if (env->hflags & HF_SOFTMMU_MASK) {
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env->hflags &= ~HF_SOFTMMU_MASK;
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/* do not allow linking to another block */
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T0 = 0;
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}
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@ -499,7 +499,7 @@ static inline int handle_cpu_signal(unsigned long pc, unsigned long address,
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raise_exception_err(EXCP0E_PAGE, env->error_code);
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} else {
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/* activate soft MMU for this block */
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env->soft_mmu = 1;
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env->hflags |= HF_SOFTMMU_MASK;
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sigprocmask(SIG_SETMASK, old_set, NULL);
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cpu_loop_exit();
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}
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