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target/arm: Move writeback of CP_ANY fields

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Move the writeback of cp, crm, opc1, opc2 to define_one_arm_cp_reg,
which means we don't have to pass all those parameters down
to subroutines.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2025-09-16 07:22:30 -07:00 • committed by Peter Maydell
parent afe6ed3cfb
commit 415e21ac85
1 changed files with 26 additions and 26 deletions
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52
target/arm/helper.c
View file

@ -7390,7 +7390,6 @@ static ARMCPRegInfo *alloc_cpreg(const ARMCPRegInfo *in, const char *suffix)
*/
static void add_cpreg_to_hashtable(ARMCPU *cpu, ARMCPRegInfo *r,
CPState state, CPSecureState secstate,
int cp, int crm, int opc1, int opc2,
uint32_t key)
{
CPUARMState *env = &cpu->env;
@ -7457,12 +7456,8 @@ static void add_cpreg_to_hashtable(ARMCPU *cpu, ARMCPRegInfo *r,
/*
* Update fields to match the instantiation, overwiting wildcards
* such as CP_ANY, ARM_CP_STATE_BOTH, or ARM_CP_SECSTATE_BOTH.
* such as ARM_CP_STATE_BOTH or ARM_CP_SECSTATE_BOTH.
*/
r->cp = cp;
r->crm = crm;
r->opc1 = opc1;
r->opc2 = opc2;
r->state = state;
r->secure = secstate;
@ -7478,8 +7473,7 @@ static void add_cpreg_to_hashtable(ARMCPU *cpu, ARMCPRegInfo *r,
g_hash_table_insert(cpu->cp_regs, (gpointer)(uintptr_t)key, r);
}
static void add_cpreg_to_hashtable_aa32(ARMCPU *cpu, ARMCPRegInfo *r,
int cp, int crm, int opc1, int opc2)
static void add_cpreg_to_hashtable_aa32(ARMCPU *cpu, ARMCPRegInfo *r)
{
/*
* Under AArch32 CP registers can be common
@ -7487,7 +7481,8 @@ static void add_cpreg_to_hashtable_aa32(ARMCPU *cpu, ARMCPRegInfo *r,
*/
ARMCPRegInfo *r_s;
bool is64 = r->type & ARM_CP_64BIT;
uint32_t key = ENCODE_CP_REG(cp, is64, 0, r->crn, crm, opc1, opc2);
uint32_t key = ENCODE_CP_REG(r->cp, is64, 0, r->crn,
r->crm, r->opc1, r->opc2);
assert(!(r->type & ARM_CP_ADD_TLBI_NXS)); /* aa64 only */
@ -7496,27 +7491,26 @@ static void add_cpreg_to_hashtable_aa32(ARMCPU *cpu, ARMCPRegInfo *r,
key |= CP_REG_AA32_NS_MASK;
/* fall through */
case ARM_CP_SECSTATE_S:
add_cpreg_to_hashtable(cpu, r, ARM_CP_STATE_AA32, r->secure,
cp, crm, opc1, opc2, key);
add_cpreg_to_hashtable(cpu, r, ARM_CP_STATE_AA32, r->secure, key);
break;
case ARM_CP_SECSTATE_BOTH:
r_s = alloc_cpreg(r, "_S");
add_cpreg_to_hashtable(cpu, r_s, ARM_CP_STATE_AA32, ARM_CP_SECSTATE_S,
cp, crm, opc1, opc2, key);
add_cpreg_to_hashtable(cpu, r_s, ARM_CP_STATE_AA32,
ARM_CP_SECSTATE_S, key);
key |= CP_REG_AA32_NS_MASK;
add_cpreg_to_hashtable(cpu, r, ARM_CP_STATE_AA32, ARM_CP_SECSTATE_NS,
cp, crm, opc1, opc2, key);
add_cpreg_to_hashtable(cpu, r, ARM_CP_STATE_AA32,
ARM_CP_SECSTATE_NS, key);
break;
default:
g_assert_not_reached();
}
}
static void add_cpreg_to_hashtable_aa64(ARMCPU *cpu, ARMCPRegInfo *r,
int crm, int opc1, int opc2)
static void add_cpreg_to_hashtable_aa64(ARMCPU *cpu, ARMCPRegInfo *r)
{
uint32_t key = ENCODE_AA64_CP_REG(r->opc0, opc1, r->crn, crm, opc2);
uint32_t key = ENCODE_AA64_CP_REG(r->opc0, r->opc1,
r->crn, r->crm, r->opc2);
if ((r->type & ARM_CP_ADD_TLBI_NXS) &&
cpu_isar_feature(aa64_xs, cpu)) {
@ -7542,12 +7536,11 @@ static void add_cpreg_to_hashtable_aa64(ARMCPU *cpu, ARMCPRegInfo *r,
}
add_cpreg_to_hashtable(cpu, nxs_ri, ARM_CP_STATE_AA64,
ARM_CP_SECSTATE_NS, 0, crm, opc1, opc2,
nxs_key);
ARM_CP_SECSTATE_NS, nxs_key);
}
add_cpreg_to_hashtable(cpu, r, ARM_CP_STATE_AA64, ARM_CP_SECSTATE_NS,
0, crm, opc1, opc2, key);
add_cpreg_to_hashtable(cpu, r, ARM_CP_STATE_AA64,
ARM_CP_SECSTATE_NS, key);
}
void define_one_arm_cp_reg(ARMCPU *cpu, const ARMCPRegInfo *r)
@ -7767,17 +7760,24 @@ void define_one_arm_cp_reg(ARMCPU *cpu, const ARMCPRegInfo *r)
r2->type |= ARM_CP_ALIAS | ARM_CP_NO_GDB;
}
/* Overwrite CP_ANY with the instantiation. */
r2->crm = crm;
r2->opc1 = opc1;
r2->opc2 = opc2;
switch (r->state) {
case ARM_CP_STATE_AA32:
add_cpreg_to_hashtable_aa32(cpu, r2, cp, crm, opc1, opc2);
add_cpreg_to_hashtable_aa32(cpu, r2);
break;
case ARM_CP_STATE_AA64:
add_cpreg_to_hashtable_aa64(cpu, r2, crm, opc1, opc2);
add_cpreg_to_hashtable_aa64(cpu, r2);
break;
case ARM_CP_STATE_BOTH:
r3 = alloc_cpreg(r2, NULL);
add_cpreg_to_hashtable_aa32(cpu, r2, cp, crm, opc1, opc2);
add_cpreg_to_hashtable_aa64(cpu, r3, crm, opc1, opc2);
r2->cp = cp;
add_cpreg_to_hashtable_aa32(cpu, r2);
r3->cp = 0;
add_cpreg_to_hashtable_aa64(cpu, r3);
break;
default:
g_assert_not_reached();