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Merge tag 'pull-loongarch-20250711' of https://github.com/bibo-mao/qemu into staging

loongarch queue

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# gpg: Signature made Fri 11 Jul 2025 02:47:32 EDT
# gpg:                using EDDSA key 0D8642A3A2659F80B0B3D1A41F7B0C1251ACE7D1
# gpg: Good signature from "bibo mao <maobibo@loongson.cn>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 7044 3A00 19C0 E97A 31C7  13C4 8E86 8FB7 A176 9D4C
#      Subkey fingerprint: 0D86 42A3 A265 9F80 B0B3  D1A4 1F7B 0C12 51AC E7D1

* tag 'pull-loongarch-20250711' of https://github.com/bibo-mao/qemu:
  target/loongarch: Remove unnecessary page size validity checking
  target/loongarch: Fix CSR STLBPS register write emulation
  target/loongarch: Correct spelling in helper_csrwr_pwcl()
  hw/intc/loongarch_extioi: Move unrealize function to common code

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
Stefan Hajnoczi 2025-07-13 01:44:30 -04:00
commit 43ec52b4c8
6 changed files with 26 additions and 29 deletions
Download patch file Download diff file Expand all files Collapse all files

9
hw/intc/loongarch_extioi.c
View file

@ -377,13 +377,6 @@ static void loongarch_extioi_realize(DeviceState *dev, Error **errp)
}
}
static void loongarch_extioi_unrealize(DeviceState *dev)
{
LoongArchExtIOICommonState *s = LOONGARCH_EXTIOI_COMMON(dev);
g_free(s->cpu);
}
static void loongarch_extioi_reset_hold(Object *obj, ResetType type)
{
LoongArchExtIOIClass *lec = LOONGARCH_EXTIOI_GET_CLASS(obj);
@ -436,8 +429,6 @@ static void loongarch_extioi_class_init(ObjectClass *klass, const void *data)
device_class_set_parent_realize(dc, loongarch_extioi_realize,
&lec->parent_realize);
device_class_set_parent_unrealize(dc, loongarch_extioi_unrealize,
&lec->parent_unrealize);
resettable_class_set_parent_phases(rc, NULL, loongarch_extioi_reset_hold,
NULL, &lec->parent_phases);
lecc->pre_save = vmstate_extioi_pre_save;

9
hw/intc/loongarch_extioi_common.c
View file

@ -108,6 +108,13 @@ static void loongarch_extioi_common_realize(DeviceState *dev, Error **errp)
}
}
static void loongarch_extioi_common_unrealize(DeviceState *dev)
{
LoongArchExtIOICommonState *s = LOONGARCH_EXTIOI_COMMON(dev);
g_free(s->cpu);
}
static void loongarch_extioi_common_reset_hold(Object *obj, ResetType type)
{
LoongArchExtIOICommonClass *lecc = LOONGARCH_EXTIOI_COMMON_GET_CLASS(obj);
@ -221,6 +228,8 @@ static void loongarch_extioi_common_class_init(ObjectClass *klass,
device_class_set_parent_realize(dc, loongarch_extioi_common_realize,
&lecc->parent_realize);
device_class_set_parent_unrealize(dc, loongarch_extioi_common_unrealize,
&lecc->parent_unrealize);
resettable_class_set_parent_phases(rc, NULL,
loongarch_extioi_common_reset_hold,
NULL, &lecc->parent_phases);

1
include/hw/intc/loongarch_extioi.h
View file

@ -22,7 +22,6 @@ struct LoongArchExtIOIClass {
LoongArchExtIOICommonClass parent_class;
DeviceRealize parent_realize;
DeviceUnrealize parent_unrealize;
ResettablePhases parent_phases;
};

1
include/hw/intc/loongarch_extioi_common.h
View file

@ -94,6 +94,7 @@ struct LoongArchExtIOICommonClass {
SysBusDeviceClass parent_class;
DeviceRealize parent_realize;
DeviceUnrealize parent_unrealize;
ResettablePhases parent_phases;
int (*pre_save)(void *s);
int (*post_load)(void *s, int version_id);

8
target/loongarch/tcg/csr_helper.c
View file

@ -29,7 +29,11 @@ target_ulong helper_csrwr_stlbps(CPULoongArchState *env, target_ulong val)
if (!check_ps(env, tlb_ps)) {
qemu_log_mask(LOG_GUEST_ERROR,
"Attempted set ps %d\n", tlb_ps);
} else {
/* Only update PS field, reserved bit keeps zero */
env->CSR_STLBPS = FIELD_DP64(old_v, CSR_STLBPS, PS, tlb_ps);
}
return old_v;
}
@ -131,8 +135,8 @@ target_ulong helper_csrwr_pwcl(CPULoongArchState *env, target_ulong val)
}
if (!check_ps(env, ptbase)) {
qemu_log_mask(LOG_GUEST_ERROR,
"Attrmpted set ptbase 2^%d\n", ptbase);
"Attempted set ptbase 2^%d\n", ptbase);
}
env->CSR_PWCL =val;
env->CSR_PWCL = val;
return old_v;
}

27
target/loongarch/tcg/tlb_helper.c
View file

@ -173,12 +173,6 @@ static void fill_tlb_entry(CPULoongArchState *env, int index)
lo1 = env->CSR_TLBELO1;
}
/*check csr_ps */
if (!check_ps(env, csr_ps)) {
qemu_log_mask(LOG_GUEST_ERROR, "csr_ps %d is illegal\n", csr_ps);
return;
}
/* Only MTLB has the ps fields */
if (index >= LOONGARCH_STLB) {
tlb->tlb_misc = FIELD_DP64(tlb->tlb_misc, TLB_MISC, PS, csr_ps);
@ -340,23 +334,16 @@ void helper_tlbfill(CPULoongArchState *env)
if (FIELD_EX64(env->CSR_TLBRERA, CSR_TLBRERA, ISTLBR)) {
entryhi = env->CSR_TLBREHI;
/* Validity of pagesize is checked in helper_ldpte() */
pagesize = FIELD_EX64(env->CSR_TLBREHI, CSR_TLBREHI, PS);
} else {
entryhi = env->CSR_TLBEHI;
/* Validity of pagesize is checked in helper_tlbrd() */
pagesize = FIELD_EX64(env->CSR_TLBIDX, CSR_TLBIDX, PS);
}
if (!check_ps(env, pagesize)) {
qemu_log_mask(LOG_GUEST_ERROR, "pagesize %d is illegal\n", pagesize);
return;
}
/* Validity of stlb_ps is checked in helper_csrwr_stlbps() */
stlb_ps = FIELD_EX64(env->CSR_STLBPS, CSR_STLBPS, PS);
if (!check_ps(env, stlb_ps)) {
qemu_log_mask(LOG_GUEST_ERROR, "stlb_ps %d is illegal\n", stlb_ps);
return;
}
if (pagesize == stlb_ps) {
/* Only write into STLB bits [47:13] */
address = entryhi & ~MAKE_64BIT_MASK(0, R_CSR_TLBEHI_64_VPPN_SHIFT);
@ -611,10 +598,11 @@ void helper_ldpte(CPULoongArchState *env, target_ulong base, target_ulong odd,
uint32_t mem_idx)
{
CPUState *cs = env_cpu(env);
target_ulong phys, tmp0, ptindex, ptoffset0, ptoffset1, ps, badv;
target_ulong phys, tmp0, ptindex, ptoffset0, ptoffset1, badv;
uint64_t ptbase = FIELD_EX64(env->CSR_PWCL, CSR_PWCL, PTBASE);
uint64_t ptwidth = FIELD_EX64(env->CSR_PWCL, CSR_PWCL, PTWIDTH);
uint64_t dir_base, dir_width;
uint8_t ps;
/*
* The parameter "base" has only two types,
@ -651,6 +639,11 @@ void helper_ldpte(CPULoongArchState *env, target_ulong base, target_ulong odd,
if (odd) {
tmp0 += MAKE_64BIT_MASK(ps, 1);
}
if (!check_ps(env, ps)) {
qemu_log_mask(LOG_GUEST_ERROR, "Illegal huge pagesize %d\n", ps);
return;
}
} else {
badv = env->CSR_TLBRBADV;