xilinx_axienet: pump events as appropriate
When the conditions blocking receiving are cleared, check for buffered rx packets. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
This commit is contained in:
parent
bd4a47330e
commit
4dbb9ed326
1 changed files with 2 additions and 0 deletions
|
|
@ -516,6 +516,8 @@ static void enet_write(void *opaque, hwaddr addr,
|
|||
s->rcw[addr & 1] = value;
|
||||
if ((addr & 1) && value & RCW1_RST) {
|
||||
axienet_rx_reset(s);
|
||||
} else {
|
||||
qemu_flush_queued_packets(qemu_get_queue(s->nic));
|
||||
}
|
||||
break;
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue