target/arm: Implement SME2 MOVT
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250704142112.1018902-21-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -39,6 +39,11 @@ MOVA 11000000 esz:2 00001 0 v:1 .. pg:3 0 za_imm:4 zr:5 \
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MOVA 11000000 11 00001 1 v:1 .. pg:3 0 za_imm:4 zr:5 \
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&mova to_vec=1 rs=%mova_rs esz=4
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### SME Move into/from ZT0
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MOVT_rzt 1100 0000 0100 1100 0 off:3 00 11111 rt:5
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MOVT_ztr 1100 0000 0100 1110 0 off:3 00 11111 rt:5
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### SME Memory
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&ldst esz rs pg rn rm za_imm v:bool st:bool
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@ -210,6 +210,19 @@ static bool trans_MOVA(DisasContext *s, arg_MOVA *a)
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return true;
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}
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static bool do_movt(DisasContext *s, arg_MOVT_rzt *a,
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void (*func)(TCGv_i64, TCGv_ptr, tcg_target_long))
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{
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if (sme2_zt0_enabled_check(s)) {
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func(cpu_reg(s, a->rt), tcg_env,
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offsetof(CPUARMState, za_state.zt0) + a->off * 8);
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}
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return true;
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}
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TRANS_FEAT(MOVT_rzt, aa64_sme2, do_movt, a, tcg_gen_ld_i64)
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TRANS_FEAT(MOVT_ztr, aa64_sme2, do_movt, a, tcg_gen_st_i64)
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static bool trans_LDST1(DisasContext *s, arg_LDST1 *a)
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{
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typedef void GenLdSt1(TCGv_env, TCGv_ptr, TCGv_ptr, TCGv, TCGv_i32);
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