target/hppa: Have hppa_form_gva*() return vaddr type

Return a 'vaddr' type for "guest virtual address".

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20251009101040.18378-3-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2025-10-08 15:30:56 +02:00
parent e9f173cd51
commit 4fe2763a90
3 changed files with 7 additions and 7 deletions

View file

@ -320,8 +320,8 @@ void hppa_translate_code(CPUState *cs, TranslationBlock *tb,
#define CPU_RESOLVING_TYPE TYPE_HPPA_CPU
static inline target_ulong hppa_form_gva_mask(uint64_t gva_offset_mask,
uint64_t spc, target_ulong off)
static inline vaddr hppa_form_gva_mask(uint64_t gva_offset_mask,
uint64_t spc, target_ulong off)
{
#ifdef CONFIG_USER_ONLY
return off & gva_offset_mask;
@ -330,8 +330,8 @@ static inline target_ulong hppa_form_gva_mask(uint64_t gva_offset_mask,
#endif
}
static inline target_ulong hppa_form_gva(CPUHPPAState *env, uint64_t spc,
target_ulong off)
static inline vaddr hppa_form_gva(CPUHPPAState *env, uint64_t spc,
target_ulong off)
{
return hppa_form_gva_mask(env->gva_offset_mask, spc, off);
}

View file

@ -148,8 +148,8 @@ void hppa_cpu_dump_state(CPUState *cs, FILE *f, int flags)
m = UINT32_MAX;
}
qemu_fprintf(f, "IA_F %08" PRIx64 ":%0*" PRIx64 " (" TARGET_FMT_lx ")\n"
"IA_B %08" PRIx64 ":%0*" PRIx64 " (" TARGET_FMT_lx ")\n",
qemu_fprintf(f, "IA_F %08" PRIx64 ":%0*" PRIx64 " (0x%" VADDR_PRIx ")\n"
"IA_B %08" PRIx64 ":%0*" PRIx64 " (0x%" VADDR_PRIx ")\n",
env->iasq_f >> 32, w, m & env->iaoq_f,
hppa_form_gva_mask(env->gva_offset_mask, env->iasq_f,
env->iaoq_f),

View file

@ -803,7 +803,7 @@ void HELPER(diag_btlb)(CPUHPPAState *env)
uint64_t HELPER(b_gate_priv)(CPUHPPAState *env, uint64_t iaoq_f)
{
uint64_t gva = hppa_form_gva(env, env->iasq_f, iaoq_f);
vaddr gva = hppa_form_gva(env, env->iasq_f, iaoq_f);
HPPATLBEntry *ent = hppa_find_tlb(env, gva);
if (ent == NULL) {