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target/rx: update PC correctly in wait instruction

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`cpu_pc` at this point does not necessary point to the current
instruction (i.e., the wait instruction being translated), so it's
incorrect to calculate the new value of `cpu_pc` based on this. It must
be updated with `ctx->base.pc_next`, which contains the correct address
of the next instruction.

This change fixes the wait instruction skipping the subsequent branch
when used in an idle loop like this:

    0:  wait
        bra.b 0b
        brk   // should be unreachable

Signed-off-by: Tomoaki Kawada <i@yvt.jp>
Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220417060224.2131788-1-i@yvt.jp>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Tomoaki Kawada 2022-04-17 15:02:25 +09:00 • committed by Richard Henderson
parent 335cd06597
commit 724eaecec6
1 changed files with 1 additions and 1 deletions
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2
target/rx/translate.c
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@ -2285,7 +2285,7 @@ static bool trans_INT(DisasContext *ctx, arg_INT *a)
static bool trans_WAIT(DisasContext *ctx, arg_WAIT *a)
{
if (is_privileged(ctx, 1)) {
tcg_gen_addi_i32(cpu_pc, cpu_pc, 2);
tcg_gen_movi_i32(cpu_pc, ctx->base.pc_next);
gen_helper_wait(cpu_env);
}
return true;