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target/arm: Introduce get_phys_addr_for_at

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Rename get_phys_addr_with_space_nogpc for its only
caller, do_ats_write.  Drop the MemOp memop argument
as it doesn't make sense in the new context.  Replace
the access_type parameter with prot_check.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250830054128.448363-8-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2025-08-30 15:40:11 +10:00 • committed by Peter Maydell
parent 7e13076441
commit 8818b2d913
3 changed files with 23 additions and 27 deletions
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18
target/arm/internals.h
View file

@ -1602,25 +1602,21 @@ bool get_phys_addr(CPUARMState *env, vaddr address,
__attribute__((nonnull));
/**
* get_phys_addr_with_space_nogpc: get the physical address for a virtual
* address
* get_phys_addr_for_at:
* @env: CPUARMState
* @address: virtual address to get physical address for
* @access_type: 0 for read, 1 for write, 2 for execute
* @memop: memory operation feeding this access, or 0 for none
* @prot_check: PAGE_{READ,WRITE,EXEC}, or 0
* @mmu_idx: MMU index indicating required translation regime
* @space: security space for the access
* @result: set on translation success.
* @fi: set to fault info if the translation fails
*
* Similar to get_phys_addr, but use the given security space and don't perform
* a Granule Protection Check on the resulting address.
* Similar to get_phys_addr, but for use by AccessType_AT, i.e.
* system instructions for address translation.
*/
bool get_phys_addr_with_space_nogpc(CPUARMState *env, vaddr address,
MMUAccessType access_type, MemOp memop,
ARMMMUIdx mmu_idx, ARMSecuritySpace space,
GetPhysAddrResult *result,
ARMMMUFaultInfo *fi)
bool get_phys_addr_for_at(CPUARMState *env, vaddr address, unsigned prot_check,
ARMMMUIdx mmu_idx, ARMSecuritySpace space,
GetPhysAddrResult *result, ARMMMUFaultInfo *fi)
__attribute__((nonnull));
bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address,

21
target/arm/ptw.c
View file

@ -3545,18 +3545,25 @@ static bool get_phys_addr_gpc(CPUARMState *env, S1Translate *ptw,
return false;
}
bool get_phys_addr_with_space_nogpc(CPUARMState *env, vaddr address,
MMUAccessType access_type, MemOp memop,
ARMMMUIdx mmu_idx, ARMSecuritySpace space,
GetPhysAddrResult *result,
ARMMMUFaultInfo *fi)
bool get_phys_addr_for_at(CPUARMState *env, vaddr address,
unsigned prot_check, ARMMMUIdx mmu_idx,
ARMSecuritySpace space, GetPhysAddrResult *result,
ARMMMUFaultInfo *fi)
{
S1Translate ptw = {
.in_mmu_idx = mmu_idx,
.in_space = space,
.in_prot_check = prot_check,
};
return get_phys_addr_nogpc(env, &ptw, address, access_type,
memop, result, fi);
/*
* I_MXTJT: Granule protection checks are not performed on the final
* address of a successful translation. This is a translation not a
* memory reference, so MMU_DATA_LOAD is arbitrary (the exact protection
* check is handled or bypassed by .in_prot_check) and "memop = MO_8"
* bypasses any alignment check.
*/
return get_phys_addr_nogpc(env, &ptw, address,
MMU_DATA_LOAD, MO_8, result, fi);
}
static ARMSecuritySpace

11
target/arm/tcg/cpregs-at.c
View file

@ -27,19 +27,12 @@ static uint64_t do_ats_write(CPUARMState *env, uint64_t value,
MMUAccessType access_type, ARMMMUIdx mmu_idx,
ARMSecuritySpace ss)
{
bool ret;
uint64_t par64;
bool format64 = false;
ARMMMUFaultInfo fi = {};
GetPhysAddrResult res = {};
/*
* I_MXTJT: Granule protection checks are not performed on the final
* address of a successful translation. This is a translation not a
* memory reference, so "memop = none = 0".
*/
ret = get_phys_addr_with_space_nogpc(env, value, access_type, 0,
mmu_idx, ss, &res, &fi);
bool ret = get_phys_addr_for_at(env, value, 1 << access_type,
mmu_idx, ss, &res, &fi);
/*
* ATS operations only do S1 or S1+S2 translations, so we never