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target/loongarch: Add enum type TLBRet definition

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There is mixed usage between enum variable TLBRET_xxx and int type,
here add enum type TLBRet definition and replace int type variable
with enum type TLBRet in some functions.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Bibo Mao 2025-07-29 10:44:51 +08:00
parent a3d4bc4845
commit 912f75eaed
4 changed files with 40 additions and 36 deletions
Download patch file Download diff file Expand all files Collapse all files

27
target/loongarch/cpu-mmu.h
View file

@ -8,21 +8,22 @@
#ifndef LOONGARCH_CPU_MMU_H
#define LOONGARCH_CPU_MMU_H
enum {
TLBRET_MATCH = 0,
TLBRET_BADADDR = 1,
TLBRET_NOMATCH = 2,
TLBRET_INVALID = 3,
TLBRET_DIRTY = 4,
TLBRET_RI = 5,
TLBRET_XI = 6,
TLBRET_PE = 7,
};
typedef enum TLBRet {
TLBRET_MATCH,
TLBRET_BADADDR,
TLBRET_NOMATCH,
TLBRET_INVALID,
TLBRET_DIRTY,
TLBRET_RI,
TLBRET_XI,
TLBRET_PE,
} TLBRet;
bool check_ps(CPULoongArchState *ent, uint8_t ps);
int get_physical_address(CPULoongArchState *env, hwaddr *physical,
int *prot, target_ulong address,
MMUAccessType access_type, int mmu_idx, int is_debug);
TLBRet get_physical_address(CPULoongArchState *env, hwaddr *physical,
int *prot, target_ulong address,
MMUAccessType access_type, int mmu_idx,
int is_debug);
void get_dir_base_width(CPULoongArchState *env, uint64_t *dir_base,
uint64_t *dir_width, target_ulong level);
hwaddr loongarch_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);

26
target/loongarch/cpu_helper.c
View file

@ -44,8 +44,9 @@ void get_dir_base_width(CPULoongArchState *env, uint64_t *dir_base,
}
}
static int loongarch_page_table_walker(CPULoongArchState *env, hwaddr *physical,
int *prot, target_ulong address)
static TLBRet loongarch_page_table_walker(CPULoongArchState *env,
hwaddr *physical,
int *prot, target_ulong address)
{
CPUState *cs = env_cpu(env);
target_ulong index, phys;
@ -116,15 +117,15 @@ static int loongarch_page_table_walker(CPULoongArchState *env, hwaddr *physical,
/* mask other attribute bits */
*physical = base & TARGET_PAGE_MASK;
return 0;
return TLBRET_MATCH;
}
static int loongarch_map_address(CPULoongArchState *env, hwaddr *physical,
int *prot, target_ulong address,
MMUAccessType access_type, int mmu_idx,
int is_debug)
static TLBRet loongarch_map_address(CPULoongArchState *env, hwaddr *physical,
int *prot, target_ulong address,
MMUAccessType access_type, int mmu_idx,
int is_debug)
{
int ret;
TLBRet ret;
if (tcg_enabled()) {
ret = loongarch_get_addr_from_tlb(env, physical, prot, address,
@ -158,9 +159,10 @@ static hwaddr dmw_va2pa(CPULoongArchState *env, target_ulong va,
}
}
int get_physical_address(CPULoongArchState *env, hwaddr *physical,
int *prot, target_ulong address,
MMUAccessType access_type, int mmu_idx, int is_debug)
TLBRet get_physical_address(CPULoongArchState *env, hwaddr *physical,
int *prot, target_ulong address,
MMUAccessType access_type, int mmu_idx,
int is_debug)
{
int user_mode = mmu_idx == MMU_USER_IDX;
int kernel_mode = mmu_idx == MMU_KERNEL_IDX;
@ -214,7 +216,7 @@ hwaddr loongarch_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
int prot;
if (get_physical_address(env, &phys_addr, &prot, addr, MMU_DATA_LOAD,
cpu_mmu_index(cs, false), 1) != 0) {
cpu_mmu_index(cs, false), 1) != TLBRET_MATCH) {
return -1;
}
return phys_addr;

7
target/loongarch/tcg/tcg_loongarch.h
View file

@ -7,6 +7,7 @@
#ifndef TARGET_LOONGARCH_TCG_LOONGARCH_H
#define TARGET_LOONGARCH_TCG_LOONGARCH_H
#include "cpu.h"
#include "cpu-mmu.h"
void loongarch_csr_translate_init(void);
@ -14,8 +15,8 @@ bool loongarch_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr);
int loongarch_get_addr_from_tlb(CPULoongArchState *env, hwaddr *physical,
int *prot, target_ulong address,
MMUAccessType access_type, int mmu_idx);
TLBRet loongarch_get_addr_from_tlb(CPULoongArchState *env, hwaddr *physical,
int *prot, target_ulong address,
MMUAccessType access_type, int mmu_idx);
#endif /* TARGET_LOONGARCH_TCG_LOONGARCH_H */

16
target/loongarch/tcg/tlb_helper.c
View file

@ -30,7 +30,7 @@ bool check_ps(CPULoongArchState *env, uint8_t tlb_ps)
}
static void raise_mmu_exception(CPULoongArchState *env, target_ulong address,
MMUAccessType access_type, int tlb_error)
MMUAccessType access_type, TLBRet tlb_error)
{
CPUState *cs = env_cpu(env);
@ -517,7 +517,7 @@ bool loongarch_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
CPULoongArchState *env = cpu_env(cs);
hwaddr physical;
int prot;
int ret;
TLBRet ret;
/* Data access */
ret = get_physical_address(env, &physical, &prot, address,
@ -648,9 +648,9 @@ void helper_ldpte(CPULoongArchState *env, target_ulong base, target_ulong odd,
env->CSR_TLBREHI = FIELD_DP64(env->CSR_TLBREHI, CSR_TLBREHI, PS, ps);
}
static int loongarch_map_tlb_entry(CPULoongArchState *env, hwaddr *physical,
int *prot, target_ulong address,
int access_type, int index, int mmu_idx)
static TLBRet loongarch_map_tlb_entry(CPULoongArchState *env, hwaddr *physical,
int *prot, target_ulong address,
int access_type, int index, int mmu_idx)
{
LoongArchTLB *tlb = &env->tlb[index];
uint64_t plv = mmu_idx;
@ -713,9 +713,9 @@ static int loongarch_map_tlb_entry(CPULoongArchState *env, hwaddr *physical,
return TLBRET_MATCH;
}
int loongarch_get_addr_from_tlb(CPULoongArchState *env, hwaddr *physical,
int *prot, target_ulong address,
MMUAccessType access_type, int mmu_idx)
TLBRet loongarch_get_addr_from_tlb(CPULoongArchState *env, hwaddr *physical,
int *prot, target_ulong address,
MMUAccessType access_type, int mmu_idx)
{
int index, match;