target/arm: Fix handling of setting SVE registers from gdb
The code to handle setting SVE registers via the gdbstub is broken: * it sets each pair of elements in the zregs[].d[] array in the wrong order for the most common (little endian) case: the least significant 64-bit value comes first * it makes no attempt to handle target_endian() * it does a simple copy out of the (target endian) gdbstub buffer into the (host endan) zregs data structure, which is wrong on big endian hosts Fix all these problems: * use ldq_p() to read from the gdbstub buffer * check target_big_endian() to see if we need to handle the 128-bit values the opposite way around Cc: qemu-stable@nongnu.org Signed-off-by: Vacha Bhavsar <vacha.bhavsar@oss.qualcomm.com> Message-id: 20250722173736.2332529-3-vacha.bhavsar@oss.qualcomm.com [PMM: adjusted commit message, fixed spacing] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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1 changed files with 12 additions and 5 deletions
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@ -206,10 +206,17 @@ int aarch64_gdb_set_sve_reg(CPUState *cs, uint8_t *buf, int reg)
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case 0 ... 31:
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{
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int vq, len = 0;
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uint64_t *p = (uint64_t *) buf;
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for (vq = 0; vq < cpu->sve_max_vq; vq++) {
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env->vfp.zregs[reg].d[vq * 2 + 1] = *p++;
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env->vfp.zregs[reg].d[vq * 2] = *p++;
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if (target_big_endian()) {
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env->vfp.zregs[reg].d[vq * 2 + 1] = ldq_p(buf);
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buf += 8;
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env->vfp.zregs[reg].d[vq * 2] = ldq_p(buf);
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} else{
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env->vfp.zregs[reg].d[vq * 2] = ldq_p(buf);
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buf += 8;
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env->vfp.zregs[reg].d[vq * 2 + 1] = ldq_p(buf);
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}
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buf += 8;
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len += 16;
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}
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return len;
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@ -224,9 +231,9 @@ int aarch64_gdb_set_sve_reg(CPUState *cs, uint8_t *buf, int reg)
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{
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int preg = reg - 34;
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int vq, len = 0;
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uint64_t *p = (uint64_t *) buf;
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for (vq = 0; vq < cpu->sve_max_vq; vq = vq + 4) {
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env->vfp.pregs[preg].p[vq / 4] = *p++;
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env->vfp.pregs[preg].p[vq / 4] = ldq_p(buf);
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buf += 8;
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len += 8;
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}
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return len;
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