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target/arm: Implement SVE2p1 WHILE (predicate pair)

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Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250704142112.1018902-79-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2025-07-04 08:20:41 -06:00 • committed by Peter Maydell
parent b61f453053
commit a3dde8e382
4 changed files with 61 additions and 4 deletions
Download patch file Download diff file Expand all files Collapse all files

3
target/arm/tcg/helper-sve.h
View file

@ -941,6 +941,9 @@ DEF_HELPER_FLAGS_3(sve_cntp, TCG_CALL_NO_RWG, i64, ptr, ptr, i32)
DEF_HELPER_FLAGS_3(sve_whilel, TCG_CALL_NO_RWG, i32, ptr, i32, i32)
DEF_HELPER_FLAGS_3(sve_whileg, TCG_CALL_NO_RWG, i32, ptr, i32, i32)
DEF_HELPER_FLAGS_3(sve_while2l, TCG_CALL_NO_RWG, i32, ptr, i32, i32)
DEF_HELPER_FLAGS_3(sve_while2g, TCG_CALL_NO_RWG, i32, ptr, i32, i32)
DEF_HELPER_FLAGS_4(sve_subri_b, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32)
DEF_HELPER_FLAGS_4(sve_subri_h, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32)
DEF_HELPER_FLAGS_4(sve_subri_s, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32)

8
target/arm/tcg/sve.decode
View file

@ -796,6 +796,14 @@ WHILE_gt 00100101 esz:2 1 rm:5 000 sf:1 u:1 0 rn:5 eq:1 rd:4 &while
# SVE2 pointer conflict compare
WHILE_ptr 00100101 esz:2 1 rm:5 001 100 rn:5 rw:1 rd:4
# SVE2.1 predicate pair
%pd_pair 1:3 !function=times_2
@while_pair ........ esz:2 . rm:5 .... u:1 . rn:5 . ... eq:1 \
&while rd=%pd_pair sf=1
WHILE_lt_pair 00100101 .. 1 ..... 0101 . 1 ..... 1 ... . @while_pair
WHILE_gt_pair 00100101 .. 1 ..... 0101 . 0 ..... 1 ... . @while_pair
### SVE Integer Wide Immediate - Unpredicated Group
# SVE broadcast floating-point immediate (unpredicated)

40
target/arm/tcg/sve_helper.c
View file

@ -4139,6 +4139,26 @@ uint32_t HELPER(sve_whilel)(void *vd, uint32_t count, uint32_t pred_desc)
return pred_count_test(oprbits, count, false);
}
uint32_t HELPER(sve_while2l)(void *vd, uint32_t count, uint32_t pred_desc)
{
uint32_t oprsz = FIELD_EX32(pred_desc, PREDDESC, OPRSZ);
uint32_t esz = FIELD_EX32(pred_desc, PREDDESC, ESZ);
uint32_t oprbits = oprsz * 8;
uint64_t esz_mask = pred_esz_masks[esz];
ARMPredicateReg *d = vd;
count <<= esz;
memset(d, 0, 2 * sizeof(*d));
if (count <= oprbits) {
do_whilel(&d[0], esz_mask, count, oprbits);
} else {
do_whilel(&d[0], esz_mask, oprbits, oprbits);
do_whilel(&d[1], esz_mask, count - oprbits, oprbits);
}
return pred_count_test(2 * oprbits, count, false);
}
/* D must be cleared on entry. */
static void do_whileg(ARMPredicateReg *d, uint64_t esz_mask,
uint32_t count, uint32_t oprbits)
@ -4172,6 +4192,26 @@ uint32_t HELPER(sve_whileg)(void *vd, uint32_t count, uint32_t pred_desc)
return pred_count_test(oprbits, count, true);
}
uint32_t HELPER(sve_while2g)(void *vd, uint32_t count, uint32_t pred_desc)
{
uint32_t oprsz = FIELD_EX32(pred_desc, PREDDESC, OPRSZ);
uint32_t esz = FIELD_EX32(pred_desc, PREDDESC, ESZ);
uint32_t oprbits = oprsz * 8;
uint64_t esz_mask = pred_esz_masks[esz];
ARMPredicateReg *d = vd;
count <<= esz;
memset(d, 0, 2 * sizeof(*d));
if (count <= oprbits) {
do_whileg(&d[1], esz_mask, count, oprbits);
} else {
do_whilel(&d[1], esz_mask, oprbits, oprbits);
do_whileg(&d[0], esz_mask, count - oprbits, oprbits);
}
return pred_count_test(2 * oprbits, count, true);
}
/* Recursive reduction on a function;
* C.f. the ARM ARM function ReducePredicated.
*

14
target/arm/tcg/translate-sve.c
View file

@ -3109,7 +3109,8 @@ static bool trans_CTERM(DisasContext *s, arg_CTERM *a)
}
typedef void gen_while_fn(TCGv_i32, TCGv_ptr, TCGv_i32, TCGv_i32);
static bool do_WHILE(DisasContext *s, arg_while *a, bool lt, gen_while_fn *fn)
static bool do_WHILE(DisasContext *s, arg_while *a,
bool lt, int scale, gen_while_fn *fn)
{
TCGv_i64 op0, op1, t0, t1, tmax;
TCGv_i32 t2;
@ -3164,7 +3165,7 @@ static bool do_WHILE(DisasContext *s, arg_while *a, bool lt, gen_while_fn *fn)
}
}
tmax = tcg_constant_i64(vsz >> a->esz);
tmax = tcg_constant_i64((vsz << scale) >> a->esz);
if (eq) {
/* Equality means one more iteration. */
tcg_gen_addi_i64(t0, t0, 1);
@ -3205,8 +3206,13 @@ static bool do_WHILE(DisasContext *s, arg_while *a, bool lt, gen_while_fn *fn)
return true;
}
TRANS_FEAT(WHILE_lt, aa64_sve, do_WHILE, a, true, gen_helper_sve_whilel)
TRANS_FEAT(WHILE_gt, aa64_sve2, do_WHILE, a, false, gen_helper_sve_whileg)
TRANS_FEAT(WHILE_lt, aa64_sve, do_WHILE, a, true, 0, gen_helper_sve_whilel)
TRANS_FEAT(WHILE_gt, aa64_sve2, do_WHILE, a, false, 0, gen_helper_sve_whileg)
TRANS_FEAT(WHILE_lt_pair, aa64_sme2_or_sve2p1, do_WHILE,
a, true, 1, gen_helper_sve_while2l)
TRANS_FEAT(WHILE_gt_pair, aa64_sme2_or_sve2p1, do_WHILE,
a, false, 1, gen_helper_sve_while2g)
static bool trans_WHILE_ptr(DisasContext *s, arg_WHILE_ptr *a)
{