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CR16: Make ra and sp usable

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This commit is contained in:
Jonas Bewig 2025-08-14 11:00:59 +02:00
parent 3fc0f53606
commit a7f71a31c2
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GPG key ID: 8D99867797A4886F
4 changed files with 9 additions and 11 deletions
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7
target/cr16c/cpu.c
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@ -79,8 +79,6 @@ static void cr16c_cpu_dump_state(CPUState *cs, FILE *f, int flags)
CPUCR16CState* env = cpu_env(cs);
qemu_fprintf(f, "-- Special purpose registers --\n");
qemu_fprintf(f, "PC: " TARGET_FMT_lx "\n", env->pc);
qemu_fprintf(f, "RA: " TARGET_FMT_lx "\n", env->ra);
qemu_fprintf(f, "SP: " TARGET_FMT_lx "\n", env->sp);
qemu_fprintf(f, "-- General purpose registers --\n");
for(int i = 0; i < 10; i++) {
@ -89,10 +87,13 @@ static void cr16c_cpu_dump_state(CPUState *cs, FILE *f, int flags)
for(int i = 10; i < CR16C_FIRST_32B_REG; i++) {
qemu_fprintf(f, "R%d: %04x\n", i, env->r[i]);
}
for(int i = CR16C_FIRST_32B_REG; i < CR16C_REG_COUNT; i++) {
for(int i = CR16C_FIRST_32B_REG; i < CR16C_REG_COUNT - 2; i++) {
qemu_fprintf(f, "R%d: %08x\n", i, env->r[i]);
}
qemu_fprintf(f, "RA: " TARGET_FMT_lx "\n", env->r[CR16C_REGNO_RA]);
qemu_fprintf(f, "SP: " TARGET_FMT_lx "\n", env->r[CR16C_REGNO_SP]);
qemu_fprintf(f, "-- Flags --\n");
qemu_fprintf(f, "N: %2d\n", env->f_n);
qemu_fprintf(f, "Z: %2d\n", env->f_z);

9
target/cr16c/cpu.h
View file

@ -5,22 +5,23 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
#define CR16C_REG_COUNT 14
#define CR16C_REG_COUNT 16
#define CR16C_FIRST_32B_REG 12
#define CR16C_REGNO_RA 14
#define CR16C_REGNO_SP 15
#define CPU_RESOLVING_TYPE TYPE_CR16C_CPU
// TODO: Interrupt mask?
// TODO: Instruction mask?
static const char cr16c_cpu_r_names[CR16C_REG_COUNT][8] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r13"
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r13", "ra", "sp"
};
typedef struct CPUArchState {
uint32_t pc;
uint32_t ra;
uint32_t sp;
uint32_t r[CR16C_REG_COUNT]; /* General purpose registers: 12x16-bit + 2x32-bit */

2
target/cr16c/machine.c
View file

@ -6,8 +6,6 @@ const VMStateDescription vms_cr16c_cpu = {
.version_id = 1,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
VMSTATE_UINT32(env.sp, CR16CCPU),
VMSTATE_UINT32(env.ra, CR16CCPU),
VMSTATE_UINT32(env.pc, CR16CCPU),
VMSTATE_UINT32_ARRAY(env.r, CR16CCPU, CR16C_REG_COUNT),
VMSTATE_UINT32(env.f_n, CR16CCPU),

2
target/cr16c/translate.c
View file

@ -45,7 +45,6 @@ typedef struct DisasContext {
/* Registers */
static TCGv pc;
static TCGv sp;
static TCGv f_n;
static TCGv f_z;
static TCGv f_f;
@ -1398,7 +1397,6 @@ void cr16c_translate_init(void) {
r[i] = tcg_global_mem_new_i32(tcg_env, offsetof(CPUCR16CState, r[i]), cr16c_cpu_r_names[i]);
}
pc = tcg_global_mem_new_i32(tcg_env, offsetof(CPUCR16CState, pc), "pc");
sp = tcg_global_mem_new_i32(tcg_env, offsetof(CPUCR16CState, sp), "sp");
f_n = tcg_global_mem_new_i32(tcg_env, offsetof(CPUCR16CState, f_n), "f_n");
f_z = tcg_global_mem_new_i32(tcg_env, offsetof(CPUCR16CState, f_z), "f_z");
f_f = tcg_global_mem_new_i32(tcg_env, offsetof(CPUCR16CState, f_f), "f_f");