Fix race conditions in new user-only vma tracking.
Add tcg backend paired register allocation. Cleanup tcg backend function call abi. -----BEGIN PGP SIGNATURE----- iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmO3kZEdHHJpY2hhcmQu aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/JpwgAj9kwpiWehGWrpQp9 rbEL+Fsx+SDhnoLVpF6nmSB1nkDqdgkdnhyRaLX9wM69bnocsGppZ5sd57J/cH3m WiODVVbWP80WHonx5EN4htQv99TZWqVmXVl11DwOfsRUmINl4GG4kvHOOABd8hdc 39eRgGBBMyMShc6MUJiToyjEAcZPcGAiHkSW9YDGbvzhlloNWh46eLP1bdW3UJWK UiEwPpXqg+L0V8nuuQnSFoPr5FIJmmoTeiGCRHXtvgOT7J8/6eKUESpfcKkHq1ye dwcJQATuZip3+hyCCVveiZ86TQ81RMp9en1qw+HVzfed1Ial3Tk+tqiDqZJFm25b GMpa5g== =OjPl -----END PGP SIGNATURE----- Merge tag 'pull-tcg-20230105' of https://gitlab.com/rth7680/qemu into staging Fix race conditions in new user-only vma tracking. Add tcg backend paired register allocation. Cleanup tcg backend function call abi. # gpg: Signature made Fri 06 Jan 2023 03:12:17 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20230105' of https://gitlab.com/rth7680/qemu: (47 commits) tests/tcg/multiarch: add vma-pthread.c accel/tcg: Handle false negative lookup in page_check_range accel/tcg: Use g_free_rcu for user-exec interval trees accel/tcg: Fix tb_invalidate_phys_page_unwind tcg: Add TCGHelperInfo argument to tcg_out_call tcg/aarch64: Merge tcg_out_callr into tcg_out_call tcg: Move ffi_cif pointer into TCGHelperInfo tcg: Factor init_ffi_layouts() out of tcg_context_init() tcg: Convert typecode_to_ffi from array to function tcg: Reorg function calls tcg: Use output_pref wrapper function tcg: Vary the allocation size for TCGOp tcg: Pass number of arguments to tcg_emit_op() / tcg_op_insert_*() accel/tcg/plugin: Use copy_op in append_{udata,mem}_cb accel/tcg/plugin: Avoid duplicate copy in copy_call accel/tcg/plugin: Don't search for the function pointer index tcg: Use TCG_CALL_ARG_EVEN for TCI special case tcg: Replace TCG_TARGET_EXTEND_ARGS with TCG_TARGET_CALL_ARG_I32 tcg: Replace TCG_TARGET_CALL_ALIGN_ARGS with TCG_TARGET_CALL_ARG_I64 tcg: Introduce TCGCallReturnKind and TCGCallArgumentKind ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
commit
aaa90fede5
50 changed files with 2635 additions and 1763 deletions
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@ -133,6 +133,6 @@
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#define DEF_HELPER_7(name, ret, t1, t2, t3, t4, t5, t6, t7) \
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DEF_HELPER_FLAGS_7(name, 0, ret, t1, t2, t3, t4, t5, t6, t7)
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/* MAX_OPC_PARAM_IARGS must be set to n if last entry is DEF_HELPER_FLAGS_n. */
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/* MAX_CALL_IARGS must be set to n if last entry is DEF_HELPER_FLAGS_n. */
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#endif /* EXEC_HELPER_HEAD_H */
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@ -343,6 +343,35 @@ void qemu_mutex_lock_iothread_impl(const char *file, int line);
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*/
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void qemu_mutex_unlock_iothread(void);
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/**
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* QEMU_IOTHREAD_LOCK_GUARD
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*
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* Wrap a block of code in a conditional qemu_mutex_{lock,unlock}_iothread.
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*/
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typedef struct IOThreadLockAuto IOThreadLockAuto;
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static inline IOThreadLockAuto *qemu_iothread_auto_lock(const char *file,
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int line)
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{
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if (qemu_mutex_iothread_locked()) {
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return NULL;
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}
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qemu_mutex_lock_iothread_impl(file, line);
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/* Anything non-NULL causes the cleanup function to be called */
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return (IOThreadLockAuto *)(uintptr_t)1;
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}
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static inline void qemu_iothread_auto_unlock(IOThreadLockAuto *l)
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{
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qemu_mutex_unlock_iothread();
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}
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G_DEFINE_AUTOPTR_CLEANUP_FUNC(IOThreadLockAuto, qemu_iothread_auto_unlock)
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#define QEMU_IOTHREAD_LOCK_GUARD() \
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g_autoptr(IOThreadLockAuto) _iothread_lock_auto __attribute__((unused)) \
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= qemu_iothread_auto_lock(__FILE__, __LINE__)
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/*
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* qemu_cond_wait_iothread: Wait on condition for the main loop mutex
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*
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@ -667,35 +667,12 @@ static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
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tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2);
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}
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#else /* TCG_TARGET_REG_BITS == 32 */
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static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
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tcg_target_long offset)
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{
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tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset);
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}
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void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
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void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
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void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
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static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
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tcg_target_long offset)
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{
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tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset);
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}
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static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
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tcg_target_long offset)
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{
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tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
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}
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static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
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{
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tcg_gen_add2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
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TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
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}
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static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
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{
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tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
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TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
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}
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void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
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void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
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void tcg_gen_discard_i64(TCGv_i64 arg);
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void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg);
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@ -841,7 +818,7 @@ static inline void tcg_gen_plugin_cb_start(unsigned from, unsigned type,
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static inline void tcg_gen_plugin_cb_end(void)
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{
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tcg_emit_op(INDEX_op_plugin_cb_end);
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tcg_emit_op(INDEX_op_plugin_cb_end, 0);
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}
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#if TARGET_LONG_BITS == 32
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@ -38,19 +38,7 @@
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/* XXX: make safe guess about sizes */
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#define MAX_OP_PER_INSTR 266
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#if HOST_LONG_BITS == 32
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#define MAX_OPC_PARAM_PER_ARG 2
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#else
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#define MAX_OPC_PARAM_PER_ARG 1
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#endif
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#define MAX_OPC_PARAM_IARGS 7
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#define MAX_OPC_PARAM_OARGS 1
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#define MAX_OPC_PARAM_ARGS (MAX_OPC_PARAM_IARGS + MAX_OPC_PARAM_OARGS)
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/* A Call op needs up to 4 + 2N parameters on 32-bit archs,
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* and up to 4 + N parameters on 64-bit archs
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* (N = number of input arguments + output arguments). */
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#define MAX_OPC_PARAM (4 + (MAX_OPC_PARAM_PER_ARG * MAX_OPC_PARAM_ARGS))
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#define MAX_CALL_IARGS 7
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#define CPU_TEMP_BUF_NLONGS 128
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#define TCG_STATIC_FRAME_SIZE (CPU_TEMP_BUF_NLONGS * sizeof(long))
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@ -294,7 +282,8 @@ typedef enum TCGType {
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TCG_TYPE_V128,
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TCG_TYPE_V256,
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TCG_TYPE_COUNT, /* number of different types */
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/* Number of different types (integer not enum) */
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#define TCG_TYPE_COUNT (TCG_TYPE_V256 + 1)
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/* An alias for the size of the host register. */
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#if TCG_TARGET_REG_BITS == 32
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@ -318,6 +307,22 @@ typedef enum TCGType {
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#endif
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} TCGType;
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/**
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* tcg_type_size
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* @t: type
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*
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* Return the size of the type in bytes.
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*/
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static inline int tcg_type_size(TCGType t)
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{
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unsigned i = t;
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if (i >= TCG_TYPE_V64) {
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tcg_debug_assert(i < TCG_TYPE_COUNT);
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i -= TCG_TYPE_V64 - 1;
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}
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return 4 << i;
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}
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/**
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* get_alignment_bits
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* @memop: MemOp value
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@ -408,9 +413,6 @@ typedef TCGv_ptr TCGv_env;
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#define TCG_CALL_NO_RWG_SE (TCG_CALL_NO_RWG | TCG_CALL_NO_SE)
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#define TCG_CALL_NO_WG_SE (TCG_CALL_NO_WG | TCG_CALL_NO_SE)
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/* Used to align parameters. See the comment before tcgv_i32_temp. */
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#define TCG_CALL_DUMMY_ARG ((TCGArg)0)
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/*
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* Flags for the bswap opcodes.
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* If IZ, the input is zero-extended, otherwise unknown.
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@ -456,6 +458,7 @@ typedef struct TCGTemp {
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unsigned int mem_coherent:1;
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unsigned int mem_allocated:1;
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unsigned int temp_allocated:1;
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unsigned int temp_subindex:1;
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int64_t val;
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struct TCGTemp *mem_base;
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@ -475,34 +478,34 @@ typedef struct TCGTempSet {
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unsigned long l[BITS_TO_LONGS(TCG_MAX_TEMPS)];
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} TCGTempSet;
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/* While we limit helpers to 6 arguments, for 32-bit hosts, with padding,
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this imples a max of 6*2 (64-bit in) + 2 (64-bit out) = 14 operands.
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There are never more than 2 outputs, which means that we can store all
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dead + sync data within 16 bits. */
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#define DEAD_ARG 4
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#define SYNC_ARG 1
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typedef uint16_t TCGLifeData;
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/*
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* With 1 128-bit output, a 32-bit host requires 4 output parameters,
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* which leaves a maximum of 28 other slots. Which is enough for 7
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* 128-bit operands.
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*/
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#define DEAD_ARG (1 << 4)
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#define SYNC_ARG (1 << 0)
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typedef uint32_t TCGLifeData;
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/* The layout here is designed to avoid a bitfield crossing of
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a 32-bit boundary, which would cause GCC to add extra padding. */
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typedef struct TCGOp {
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TCGOpcode opc : 8; /* 8 */
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TCGOpcode opc : 8;
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unsigned nargs : 8;
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/* Parameters for this opcode. See below. */
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unsigned param1 : 4; /* 12 */
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unsigned param2 : 4; /* 16 */
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unsigned param1 : 8;
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unsigned param2 : 8;
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/* Lifetime data of the operands. */
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unsigned life : 16; /* 32 */
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TCGLifeData life;
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/* Next and previous opcodes. */
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QTAILQ_ENTRY(TCGOp) link;
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/* Arguments for the opcode. */
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TCGArg args[MAX_OPC_PARAM];
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/* Register preferences for the output(s). */
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TCGRegSet output_pref[2];
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/* Arguments for the opcode. */
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TCGArg args[];
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} TCGOp;
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#define TCGOP_CALLI(X) (X)->param1
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@ -514,6 +517,11 @@ typedef struct TCGOp {
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/* Make sure operands fit in the bitfields above. */
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QEMU_BUILD_BUG_ON(NB_OPS > (1 << 8));
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static inline TCGRegSet output_pref(const TCGOp *op, unsigned i)
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{
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return i < ARRAY_SIZE(op->output_pref) ? op->output_pref[i] : 0;
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}
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typedef struct TCGProfile {
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int64_t cpu_exec_time;
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int64_t tb_count1;
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@ -737,18 +745,6 @@ static inline TCGv_vec temp_tcgv_vec(TCGTemp *t)
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return (TCGv_vec)temp_tcgv_i32(t);
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}
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#if TCG_TARGET_REG_BITS == 32
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static inline TCGv_i32 TCGV_LOW(TCGv_i64 t)
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{
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return temp_tcgv_i32(tcgv_i64_temp(t));
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}
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static inline TCGv_i32 TCGV_HIGH(TCGv_i64 t)
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{
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return temp_tcgv_i32(tcgv_i64_temp(t) + 1);
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}
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#endif
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static inline TCGArg tcg_get_insn_param(TCGOp *op, int arg)
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{
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return op->args[arg];
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@ -951,6 +947,8 @@ typedef struct TCGArgConstraint {
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unsigned ct : 16;
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unsigned alias_index : 4;
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unsigned sort_index : 4;
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unsigned pair_index : 4;
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unsigned pair : 2; /* 0: none, 1: first, 2: second, 3: second alias */
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bool oalias : 1;
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bool ialias : 1;
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bool newreg : 1;
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@ -1006,10 +1004,12 @@ bool tcg_op_supported(TCGOpcode op);
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void tcg_gen_callN(void *func, TCGTemp *ret, int nargs, TCGTemp **args);
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TCGOp *tcg_emit_op(TCGOpcode opc);
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TCGOp *tcg_emit_op(TCGOpcode opc, unsigned nargs);
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void tcg_op_remove(TCGContext *s, TCGOp *op);
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TCGOp *tcg_op_insert_before(TCGContext *s, TCGOp *op, TCGOpcode opc);
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TCGOp *tcg_op_insert_after(TCGContext *s, TCGOp *op, TCGOpcode opc);
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TCGOp *tcg_op_insert_before(TCGContext *s, TCGOp *op,
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TCGOpcode opc, unsigned nargs);
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TCGOp *tcg_op_insert_after(TCGContext *s, TCGOp *op,
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TCGOpcode opc, unsigned nargs);
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/**
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* tcg_remove_ops_after:
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