target-arm queue:
* target/alpha: Don't corrupt error_code with unknown softfloat flags * target/arm: Implement FEAT_AFP and FEAT_RPRES -----BEGIN PGP SIGNATURE----- iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmereaQZHHBldGVyLm1h eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3gyLEACglOM4E0j1hRl/JZlWD384 nZL01Hayp9xwSNn28hkXaajCxkErTWLuCZax1g1fBvt/Yqn+E3oFan8gIybMEVgK 9ei6/m45fuICSQQhifvYTtYhAMd5uclr0anjRp9gN7FH6aaNPan/ZQYcKYxFq6cp RDTF5qiHIgTeXAlU+WiioxravL3A/D+jcQMYLEI5L+Vt5nYNM589PSNFWNLQ6W9e Gtmvp0uzrRSZgWxR3nOvhsn1NS/xXK90Zil+GPBo4jf82QVumqKYMsAcireOlxfk zTlHXH3PuonGj/ZPLxmiVKYhLb1RglQ9kIs/FHVel18QTz4dJ3DaJp8QXCNHbrKz 3aUwSiIh5Y/s3Q/X2Qy3jUHQ5tSjayhIhGFbn6zPdZ+2JZbIEu1Czeparddu/Zlq OR0CMVo2Lj/C6OakEU1/YRTKBKiNBaN1eVHi7gjzTDBdbMMC7ZlNuimpFAbthmSC szHzkgX8LXHzJqe4vip27yOMFBRPxvst/CXcEoPnjsLEQhLlKjOeFiHuEI+DUvaI 24AJ5b0FDdSOEcaFkxFD6gxW8E77MiNtBncfxDxTMKHs/4yFGiDihSPnOCANn3Kk zpQIwl0KJAPTA6Cldck9lY7MsKgGPTUNhEThadZlInbp4Uc6T1bvNDtB9b7osDfy FeposcM1+GBeuSde0yD6oQ== =P3wv -----END PGP SIGNATURE----- Merge tag 'pull-target-arm-20250211' of https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * target/alpha: Don't corrupt error_code with unknown softfloat flags * target/arm: Implement FEAT_AFP and FEAT_RPRES # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmereaQZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3gyLEACglOM4E0j1hRl/JZlWD384 # nZL01Hayp9xwSNn28hkXaajCxkErTWLuCZax1g1fBvt/Yqn+E3oFan8gIybMEVgK # 9ei6/m45fuICSQQhifvYTtYhAMd5uclr0anjRp9gN7FH6aaNPan/ZQYcKYxFq6cp # RDTF5qiHIgTeXAlU+WiioxravL3A/D+jcQMYLEI5L+Vt5nYNM589PSNFWNLQ6W9e # Gtmvp0uzrRSZgWxR3nOvhsn1NS/xXK90Zil+GPBo4jf82QVumqKYMsAcireOlxfk # zTlHXH3PuonGj/ZPLxmiVKYhLb1RglQ9kIs/FHVel18QTz4dJ3DaJp8QXCNHbrKz # 3aUwSiIh5Y/s3Q/X2Qy3jUHQ5tSjayhIhGFbn6zPdZ+2JZbIEu1Czeparddu/Zlq # OR0CMVo2Lj/C6OakEU1/YRTKBKiNBaN1eVHi7gjzTDBdbMMC7ZlNuimpFAbthmSC # szHzkgX8LXHzJqe4vip27yOMFBRPxvst/CXcEoPnjsLEQhLlKjOeFiHuEI+DUvaI # 24AJ5b0FDdSOEcaFkxFD6gxW8E77MiNtBncfxDxTMKHs/4yFGiDihSPnOCANn3Kk # zpQIwl0KJAPTA6Cldck9lY7MsKgGPTUNhEThadZlInbp4Uc6T1bvNDtB9b7osDfy # FeposcM1+GBeuSde0yD6oQ== # =P3wv # -----END PGP SIGNATURE----- # gpg: Signature made Tue 11 Feb 2025 11:24:04 EST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20250211' of https://git.linaro.org/people/pmaydell/qemu-arm: (68 commits) target/arm: Sink fp_status and fpcr access into do_fmlal* target/arm: Read fz16 from env->vfp.fpcr target/arm: Simplify DO_VFP_cmp in vfp_helper.c target/arm: Simplify fp_status indexing in mve_helper.c target/arm: Remove fp_status_a32 target/arm: Remove fp_status_a64 target/arm: Remove fp_status_f16_a32 target/arm: Remove fp_status_f16_a64 target/arm: Remove ah_fp_status target/arm: Remove ah_fp_status_f16 target/arm: Remove standard_fp_status target/arm: Remove standard_fp_status_f16 target/arm: Introduce CPUARMState.vfp.fp_status[] target/arm: Enable FEAT_RPRES for -cpu max target/arm: Implement increased precision FRSQRTE target/arm: Implement increased precision FRECPE target/arm: Plumb FEAT_RPRES frecpe and frsqrte through to new helper target/arm: Enable FEAT_AFP for '-cpu max' target/arm: Handle FPCR.AH in SVE FMLSLB, FMLSLT (vectors) target/arm: Handle FPCR.AH in SVE FMLSL (indexed) ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
commit
afbcca0ea4
37 changed files with 2325 additions and 709 deletions
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@ -109,6 +109,12 @@ static inline void set_flush_inputs_to_zero(bool val, float_status *status)
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status->flush_inputs_to_zero = val;
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}
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static inline void set_float_ftz_detection(FloatFTZDetection d,
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float_status *status)
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{
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status->ftz_detection = d;
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}
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static inline void set_default_nan_mode(bool val, float_status *status)
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{
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status->default_nan_mode = val;
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@ -183,4 +189,9 @@ static inline bool get_default_nan_mode(const float_status *status)
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return status->default_nan_mode;
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}
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static inline FloatFTZDetection get_float_ftz_detection(const float_status *status)
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{
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return status->ftz_detection;
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}
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#endif /* SOFTFLOAT_HELPERS_H */
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@ -165,6 +165,13 @@ enum {
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float_flag_invalid_sqrt = 0x0800, /* sqrt(-x) */
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float_flag_invalid_cvti = 0x1000, /* non-nan to integer */
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float_flag_invalid_snan = 0x2000, /* any operand was snan */
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/*
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* An input was denormal and we used it (without flushing it to zero).
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* Not set if we do not actually use the denormal input (e.g.
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* because some other input was a NaN, or because the operation
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* wasn't actually carried out (divide-by-zero; invalid))
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*/
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float_flag_input_denormal_used = 0x4000,
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};
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/*
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@ -297,6 +304,22 @@ typedef enum __attribute__((__packed__)) {
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float_infzeronan_suppress_invalid = (1 << 7),
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} FloatInfZeroNaNRule;
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/*
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* When flush_to_zero is set, should we detect denormal results to
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* be flushed before or after rounding? For most architectures this
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* should be set to match the tininess_before_rounding setting,
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* but a few architectures, e.g. MIPS MSA, detect FTZ before
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* rounding but tininess after rounding.
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*
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* This enum is arranged so that the default if the target doesn't
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* configure it matches the default for tininess_before_rounding
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* (i.e. "after rounding").
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*/
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typedef enum __attribute__((__packed__)) {
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float_ftz_after_rounding = 0,
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float_ftz_before_rounding = 1,
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} FloatFTZDetection;
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/*
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* Floating Point Status. Individual architectures may maintain
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* several versions of float_status for different functions. The
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@ -314,6 +337,8 @@ typedef struct float_status {
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bool tininess_before_rounding;
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/* should denormalised results go to zero and set output_denormal_flushed? */
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bool flush_to_zero;
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/* do we detect and flush denormal results before or after rounding? */
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FloatFTZDetection ftz_detection;
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/* should denormalised inputs go to zero and set input_denormal_flushed? */
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bool flush_inputs_to_zero;
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bool default_nan_mode;
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