target/riscv: Save stimer and vstimer in CPU vmstate

vmstate_riscv_cpu was missing env.stimer and env.vstimer.
Without migrating these QEMUTimer fields, active S/VS-mode
timer events are lost after snapshot or migration.

Add VMSTATE_TIMER_PTR() entries to save and restore them.

Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: TANG Tiancheng <lyndra@linux.alibaba.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20250911-timers-v3-4-60508f640050@linux.alibaba.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
TANG Tiancheng 2025-09-11 17:56:16 +08:00 committed by Alistair Francis
parent 09f89ccc97
commit b0daaa172a

View file

@ -400,6 +400,30 @@ static const VMStateDescription vmstate_ssp = {
}
};
static bool sstc_timer_needed(void *opaque)
{
RISCVCPU *cpu = opaque;
CPURISCVState *env = &cpu->env;
if (!cpu->cfg.ext_sstc) {
return false;
}
return env->stimer != NULL || env->vstimer != NULL;
}
static const VMStateDescription vmstate_sstc = {
.name = "cpu/timer",
.version_id = 1,
.minimum_version_id = 1,
.needed = sstc_timer_needed,
.fields = (const VMStateField[]) {
VMSTATE_TIMER_PTR(env.stimer, RISCVCPU),
VMSTATE_TIMER_PTR(env.vstimer, RISCVCPU),
VMSTATE_END_OF_LIST()
}
};
const VMStateDescription vmstate_riscv_cpu = {
.name = "cpu",
.version_id = 10,
@ -476,6 +500,7 @@ const VMStateDescription vmstate_riscv_cpu = {
&vmstate_elp,
&vmstate_ssp,
&vmstate_ctr,
&vmstate_sstc,
NULL
}
};