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target/arm: Implement SVE2p1 PTRUE (predicate as counter)

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Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250704142112.1018902-81-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2025-07-04 08:20:43 -06:00 • committed by Peter Maydell
parent f9cb0ac8ba
commit b7094bc252
2 changed files with 17 additions and 0 deletions
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1
target/arm/tcg/sve.decode
View file

@ -730,6 +730,7 @@ PTEST 00100101 01 010000 11 pg:4 0 rn:4 0 0000
# SVE predicate initialize
PTRUE 00100101 esz:2 01100 s:1 111000 pat:5 0 rd:4
PTRUE_cnt 00100101 esz:2 1000000111100000010 ... rd=%pnd
# SVE initialize FFR
SETFFR 00100101 0010 1100 1001 0000 0000 0000

16
target/arm/tcg/translate-sve.c
View file

@ -1679,6 +1679,22 @@ static bool do_predset(DisasContext *s, int esz, int rd, int pat, bool setflag)
TRANS_FEAT(PTRUE, aa64_sve, do_predset, a->esz, a->rd, a->pat, a->s)
static bool trans_PTRUE_cnt(DisasContext *s, arg_PTRUE_cnt *a)
{
if (!dc_isar_feature(aa64_sme2_or_sve2p1, s)) {
return false;
}
if (sve_access_check(s)) {
/* Canonical TRUE is 0 count, invert bit, plus element size. */
int val = (1 << 15) | (1 << a->esz);
/* Write val to the first uint64_t; clear all of the rest. */
tcg_gen_gvec_dup_imm(MO_64, pred_full_reg_offset(s, a->rd),
8, size_for_gvec(pred_full_reg_size(s)), val);
}
return true;
}
/* Note pat == 31 is #all, to set all elements. */
TRANS_FEAT_NONSTREAMING(SETFFR, aa64_sve,
do_predset, 0, FFR_PRED_NUM, 31, false)