linux-user/xtensa: Create target_ptrace.h
Remove the target_pt_regs; add target_user_pt_regs to target_ptrace.h, which matches what is actually used. Remove xtensa_reg_t and xtregs_opt_t. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
parent
92e1a92823
commit
b90e368616
2 changed files with 22 additions and 35 deletions
22
linux-user/xtensa/target_ptrace.h
Normal file
22
linux-user/xtensa/target_ptrace.h
Normal file
|
|
@ -0,0 +1,22 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-or-later */
|
||||
|
||||
#ifndef XTENSA_TARGET_PTRACE_H
|
||||
#define XTENSA_TARGET_PTRACE_H
|
||||
|
||||
/* See arch/xtensa/include/uapi/asm/ptrace.h. */
|
||||
struct target_user_pt_regs {
|
||||
uint32_t pc;
|
||||
uint32_t ps;
|
||||
uint32_t lbeg;
|
||||
uint32_t lend;
|
||||
uint32_t lcount;
|
||||
uint32_t sar;
|
||||
uint32_t windowstart;
|
||||
uint32_t windowbase;
|
||||
uint32_t threadptr;
|
||||
uint32_t syscall;
|
||||
uint32_t reserved[6 + 48];
|
||||
uint32_t a[64];
|
||||
};
|
||||
|
||||
#endif /* XTENSA_TARGET_PTRACE_H */
|
||||
|
|
@ -8,41 +8,6 @@
|
|||
|
||||
#define MMAP_SHIFT TARGET_PAGE_BITS
|
||||
|
||||
typedef uint32_t xtensa_reg_t;
|
||||
typedef struct {
|
||||
} xtregs_opt_t; /* TODO */
|
||||
|
||||
struct target_pt_regs {
|
||||
xtensa_reg_t pc; /* 4 */
|
||||
xtensa_reg_t ps; /* 8 */
|
||||
xtensa_reg_t depc; /* 12 */
|
||||
xtensa_reg_t exccause; /* 16 */
|
||||
xtensa_reg_t excvaddr; /* 20 */
|
||||
xtensa_reg_t debugcause; /* 24 */
|
||||
xtensa_reg_t wmask; /* 28 */
|
||||
xtensa_reg_t lbeg; /* 32 */
|
||||
xtensa_reg_t lend; /* 36 */
|
||||
xtensa_reg_t lcount; /* 40 */
|
||||
xtensa_reg_t sar; /* 44 */
|
||||
xtensa_reg_t windowbase; /* 48 */
|
||||
xtensa_reg_t windowstart; /* 52 */
|
||||
xtensa_reg_t syscall; /* 56 */
|
||||
xtensa_reg_t icountlevel; /* 60 */
|
||||
xtensa_reg_t scompare1; /* 64 */
|
||||
xtensa_reg_t threadptr; /* 68 */
|
||||
|
||||
/* Additional configurable registers that are used by the compiler. */
|
||||
xtregs_opt_t xtregs_opt;
|
||||
|
||||
/* Make sure the areg field is 16 bytes aligned. */
|
||||
int align[0] __attribute__ ((aligned(16)));
|
||||
|
||||
/* current register frame.
|
||||
* Note: The ESF for kernel exceptions ends after 16 registers!
|
||||
*/
|
||||
xtensa_reg_t areg[16];
|
||||
};
|
||||
|
||||
#define TARGET_MCL_CURRENT 1
|
||||
#define TARGET_MCL_FUTURE 2
|
||||
#define TARGET_MCL_ONFAULT 4
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue