hw/intc: avoid byte swap fiddling in gicv3 its path
This allows us to keep the MSI data in plain host order all the way from the MemoryRegionOps write method to the final KVM_SIGNAL_MSI ioctl. This fixes a theoretical bug on big-endian hosts because we were using different size byte swaps which would have truncated the data. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20260121105932.135676-5-alex.bennee@linaro.org Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> (cherry picked from commit cf10273aff8198ab1c7e2a00e7e5fe51c80b04e7) Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
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parent
9707eaa47b
commit
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2 changed files with 2 additions and 2 deletions
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@ -81,7 +81,7 @@ static MemTxResult gicv3_its_trans_write(void *opaque, hwaddr offset,
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if (offset == 0x0040 && ((size == 2) || (size == 4))) {
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GICv3ITSState *s = ARM_GICV3_ITS_COMMON(opaque);
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GICv3ITSCommonClass *c = ARM_GICV3_ITS_COMMON_GET_CLASS(s);
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int ret = c->send_msi(s, le64_to_cpu(value), attrs.requester_id);
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int ret = c->send_msi(s, value, attrs.requester_id);
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if (ret <= 0) {
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qemu_log_mask(LOG_GUEST_ERROR,
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@ -58,7 +58,7 @@ static int kvm_its_send_msi(GICv3ITSState *s, uint32_t value, uint16_t devid)
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msi.address_lo = extract64(s->gits_translater_gpa, 0, 32);
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msi.address_hi = extract64(s->gits_translater_gpa, 32, 32);
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msi.data = le32_to_cpu(value);
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msi.data = value;
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msi.flags = KVM_MSI_VALID_DEVID;
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msi.devid = devid;
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memset(msi.pad, 0, sizeof(msi.pad));
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