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Misc HW patches

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Various fixes and cleanups:
 - Set FPCR exception flag bits for HPPA non-trapped exceptions
 - Convert VirtIONet::vlans from pointer to array
   and remove VMSTATE_BUFFER_POINTER_UNSAFE()
 - Remove redundant QOM typedef when OBJECT_DECLARE_SIMPLE_TYPE() is used
 - Have various QDev / SysBus helpers take a const device argument
 - Improve errors when loaders parse images
 - Remove IntelIOMMUState::dma_translation leftover
 - Remove most target_[u]long uses in hw/riscv/
 - Fix DS1225Y MemoryRegion owner
 - Simplification refactors on Raven PCI Host Bridge
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Merge tag 'hw-misc-20251028' of https://github.com/philmd/qemu into staging

Misc HW patches

Various fixes and cleanups:
- Set FPCR exception flag bits for HPPA non-trapped exceptions
- Convert VirtIONet::vlans from pointer to array
  and remove VMSTATE_BUFFER_POINTER_UNSAFE()
- Remove redundant QOM typedef when OBJECT_DECLARE_SIMPLE_TYPE() is used
- Have various QDev / SysBus helpers take a const device argument
- Improve errors when loaders parse images
- Remove IntelIOMMUState::dma_translation leftover
- Remove most target_[u]long uses in hw/riscv/
- Fix DS1225Y MemoryRegion owner
- Simplification refactors on Raven PCI Host Bridge

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# -----END PGP SIGNATURE-----
# gpg: Signature made Tue 28 Oct 2025 08:47:27 AM CET
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* tag 'hw-misc-20251028' of https://github.com/philmd/qemu: (23 commits)
  hw/riscv: Widen OpenSBI dynamic info struct
  hw/riscv: Use generic hwaddr for firmware addresses
  hw/i386/intel_iommu: Remove an unused state field
  nw/nvram/ds1225y: Fix nvram MemoryRegion owner
  hw/ppc: Pass error_fatal to load_image_targphys()
  hw/core/loader: Pass errp to load_image_targphys_as()
  hw/core/loader: add check for zero size in load_image_targphys_as
  hw/core/loader: improve error handling in image loading functions
  hw/core/loader: capture Error from load_image_targphys
  hw/core/loader: Use qemu_open() instead of open() in get_image_size()
  hw/int/loongarch: Include missing 'system/memory.h' header
  hw/uefi: Include missing 'system/memory.h' header
  hw/sysbus: Have various helpers take a const SysBusDevice argument
  hw/qdev: Have qdev_get_gpio_out_connector() take const DeviceState arg
  hw/pci-host/raven: Simplify PCI bus creation
  hw/pci-host/raven: Use DEFINE_TYPES macro
  hw/pci-host/raven: Simplify host bridge type declaration
  hw/pci-host/raven: Simplify PCI facing part
  hw/pci-host/raven: Simplify creating PCI facing part
  migration/vmstate: remove VMSTATE_BUFFER_POINTER_UNSAFE macro
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2025-10-28 11:48:05 +01:00
commit bc831f3739
97 changed files with 321 additions and 434 deletions
Download patch file Download diff file Expand all files Collapse all files

1
backends/cryptodev-lkcf.c
View file

@ -68,7 +68,6 @@ typedef struct CryptoDevBackendLKCFSession {
QCryptoAkCipherOptions akcipher_opts;
} CryptoDevBackendLKCFSession;
typedef struct CryptoDevBackendLKCF CryptoDevBackendLKCF;
typedef struct CryptoDevLKCFTask CryptoDevLKCFTask;
struct CryptoDevLKCFTask {
CryptoDevBackendLKCFSession *sess;

4
hw/alpha/dp264.c
View file

@ -182,7 +182,7 @@ static void clipper_init(MachineState *machine)
long initrd_base;
int64_t initrd_size;
initrd_size = get_image_size(initrd_filename);
initrd_size = get_image_size(initrd_filename, NULL);
if (initrd_size < 0) {
error_report("could not load initial ram disk '%s'",
initrd_filename);
@ -192,7 +192,7 @@ static void clipper_init(MachineState *machine)
/* Put the initrd image as high in memory as possible. */
initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK;
load_image_targphys(initrd_filename, initrd_base,
ram_size - initrd_base);
ram_size - initrd_base, NULL);
address_space_stq(&address_space_memory, param_offset + 0x100,
initrd_base + 0xfffffc0000000000ULL,

2
hw/arm/armv7m.c
View file

@ -611,7 +611,7 @@ void armv7m_load_kernel(ARMCPU *cpu, const char *kernel_filename,
NULL, ELFDATA2LSB, EM_ARM, 1, 0, as);
if (image_size < 0) {
image_size = load_image_targphys_as(kernel_filename, mem_base,
mem_size, as);
mem_size, as, NULL);
}
if (image_size < 0) {
error_report("Could not load kernel '%s'", kernel_filename);

5
hw/arm/boot.c
View file

@ -964,7 +964,8 @@ static void arm_setup_direct_kernel_boot(ARMCPU *cpu,
/* 32-bit ARM */
entry = info->loader_start + KERNEL_LOAD_ADDR;
kernel_size = load_image_targphys_as(info->kernel_filename, entry,
ram_end - KERNEL_LOAD_ADDR, as);
ram_end - KERNEL_LOAD_ADDR, as,
NULL);
is_linux = 1;
if (kernel_size >= 0) {
image_low_addr = entry;
@ -1025,7 +1026,7 @@ static void arm_setup_direct_kernel_boot(ARMCPU *cpu,
info->initrd_start,
ram_end -
info->initrd_start,
as);
as, NULL);
}
if (initrd_size < 0) {
error_report("could not load initrd '%s'",

2
hw/arm/digic_boards.c
View file

@ -97,7 +97,7 @@ static void digic_load_rom(DigicState *s, hwaddr addr,
exit(1);
}
rom_size = load_image_targphys(fn, addr, max_size);
rom_size = load_image_targphys(fn, addr, max_size, NULL);
if (rom_size < 0 || rom_size > max_size) {
error_report("Couldn't load rom image '%s'.", filename);
exit(1);

3
hw/arm/highbank.c
View file

@ -235,7 +235,8 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id)
if (machine->firmware != NULL) {
sysboot_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, machine->firmware);
if (sysboot_filename != NULL) {
if (load_image_targphys(sysboot_filename, 0xfff88000, 0x8000) < 0) {
if (load_image_targphys(sysboot_filename, 0xfff88000, 0x8000,
NULL) < 0) {
error_report("Unable to load %s", machine->firmware);
exit(1);
}

2
hw/arm/raspi.c
View file

@ -230,7 +230,7 @@ static void setup_boot(MachineState *machine, ARMCPU *cpu,
? FIRMWARE_ADDR_2 : FIRMWARE_ADDR_3;
/* load the firmware image (typically kernel.img) */
r = load_image_targphys(machine->firmware, firmware_addr,
ram_size - firmware_addr);
ram_size - firmware_addr, NULL);
if (r < 0) {
error_report("Failed to load firmware from %s", machine->firmware);
exit(1);

2
hw/arm/vexpress.c
View file

@ -578,7 +578,7 @@ static void vexpress_common_init(MachineState *machine)
exit(1);
}
image_size = load_image_targphys(fn, map[VE_NORFLASH0],
VEXPRESS_FLASH_SIZE);
VEXPRESS_FLASH_SIZE, NULL);
g_free(fn);
if (image_size < 0) {
error_report("Could not load ROM image '%s'", machine->firmware);

9
hw/char/ipoctal232.c
View file

@ -93,7 +93,10 @@
#define ISR_RXRDY(CH) (((CH) & 1) ? BIT(5) : BIT(1))
#define ISR_BREAK(CH) (((CH) & 1) ? BIT(6) : BIT(2))
typedef struct IPOctalState IPOctalState;
#define TYPE_IPOCTAL "ipoctal232"
OBJECT_DECLARE_SIMPLE_TYPE(IPOctalState, IPOCTAL)
typedef struct SCC2698Channel SCC2698Channel;
typedef struct SCC2698Block SCC2698Block;
@ -122,10 +125,6 @@ struct IPOctalState {
uint8_t irq_vector;
};
#define TYPE_IPOCTAL "ipoctal232"
OBJECT_DECLARE_SIMPLE_TYPE(IPOctalState, IPOCTAL)
static const VMStateDescription vmstate_scc2698_channel = {
.name = "scc2698_channel",
.version_id = 1,

1
hw/char/xen_console.c
View file

@ -56,7 +56,6 @@ struct XenConsole {
CharBackend chr;
int backlog;
};
typedef struct XenConsole XenConsole;
#define TYPE_XEN_CONSOLE_DEVICE "xen-console"
OBJECT_DECLARE_SIMPLE_TYPE(XenConsole, XEN_CONSOLE_DEVICE)

5
hw/core/generic-loader.c
View file

@ -148,13 +148,14 @@ static void generic_loader_realize(DeviceState *dev, Error **errp)
if (size < 0 || s->force_raw) {
/* Default to the maximum size being the machine's ram size */
size = load_image_targphys_as(s->file, s->addr, current_machine->ram_size, as);
size = load_image_targphys_as(s->file, s->addr,
current_machine->ram_size, as, errp);
} else {
s->addr = entry;
}
if (size < 0) {
error_setg(errp, "Cannot load specified image %s", s->file);
error_prepend(errp, "Cannot load specified image %s: ", s->file);
return;
}
}

3
hw/core/gpio.c
View file

@ -129,7 +129,8 @@ void qdev_connect_gpio_out_named(DeviceState *dev, const char *name, int n,
g_free(propname);
}
qemu_irq qdev_get_gpio_out_connector(DeviceState *dev, const char *name, int n)
qemu_irq qdev_get_gpio_out_connector(const DeviceState *dev,
const char *name, int n)
{
g_autofree char *propname = g_strdup_printf("%s[%d]",
name ? name : "unnamed-gpio-out", n);

4
hw/core/guest-loader.c
View file

@ -101,9 +101,9 @@ static void guest_loader_realize(DeviceState *dev, Error **errp)
/* Default to the maximum size being the machine's ram size */
size = load_image_targphys_as(file, s->addr, current_machine->ram_size,
NULL);
NULL, errp);
if (size < 0) {
error_setg(errp, "Cannot load specified image %s", file);
error_prepend(errp, "Cannot load specified image %s: ", file);
return;
}

42
hw/core/loader.c
View file

@ -48,6 +48,7 @@
#include "qapi/error.h"
#include "qapi/qapi-commands-machine.h"
#include "qapi/type-helpers.h"
#include "qemu/units.h"
#include "trace.h"
#include "hw/hw.h"
#include "disas/disas.h"
@ -70,14 +71,18 @@
static int roms_loaded;
/* return the size or -1 if error */
int64_t get_image_size(const char *filename)
int64_t get_image_size(const char *filename, Error **errp)
{
int fd;
int64_t size;
fd = open(filename, O_RDONLY | O_BINARY);
fd = qemu_open(filename, O_RDONLY | O_BINARY, errp);
if (fd < 0)
return -1;
size = lseek(fd, 0, SEEK_END);
if (size < 0) {
error_setg_errno(errp, errno, "lseek failure: %s", filename);
return -1;
}
close(fd);
return size;
}
@ -118,25 +123,38 @@ ssize_t read_targphys(const char *name,
}
ssize_t load_image_targphys(const char *filename,
hwaddr addr, uint64_t max_sz)
hwaddr addr, uint64_t max_sz, Error **errp)
{
return load_image_targphys_as(filename, addr, max_sz, NULL);
return load_image_targphys_as(filename, addr, max_sz, NULL, errp);
}
/* return the size or -1 if error */
ssize_t load_image_targphys_as(const char *filename,
hwaddr addr, uint64_t max_sz, AddressSpace *as)
hwaddr addr, uint64_t max_sz, AddressSpace *as,
Error **errp)
{
ssize_t size;
size = get_image_size(filename);
if (size < 0 || size > max_sz) {
size = get_image_size(filename, errp);
if (size < 0) {
return -1;
}
if (size > 0) {
if (rom_add_file_fixed_as(filename, addr, -1, as) < 0) {
return -1;
}
if (size == 0) {
error_setg(errp, "empty file: %s", filename);
return -1;
}
if (size > max_sz) {
error_setg(errp, "%s exceeds maximum image size (%s)",
filename, size_to_str(max_sz));
return -1;
}
if (rom_add_file_fixed_as(filename, addr, -1, as) < 0) {
error_setg(errp, "could not load '%s' at %" HWADDR_PRIx,
filename, addr);
return -1;
}
return size;
}
@ -150,7 +168,7 @@ ssize_t load_image_mr(const char *filename, MemoryRegion *mr)
return -1;
}
size = get_image_size(filename);
size = get_image_size(filename, NULL);
if (size < 0 || size > memory_region_size(mr)) {
return -1;

10
hw/core/sysbus.c
View file

@ -80,7 +80,7 @@ static void system_bus_class_init(ObjectClass *klass, const void *data)
}
/* Check whether an IRQ source exists */
bool sysbus_has_irq(SysBusDevice *dev, int n)
bool sysbus_has_irq(const SysBusDevice *dev, int n)
{
char *prop = g_strdup_printf("%s[%d]", SYSBUS_DEVICE_GPIO_IRQ, n);
ObjectProperty *r;
@ -91,12 +91,12 @@ bool sysbus_has_irq(SysBusDevice *dev, int n)
return (r != NULL);
}
bool sysbus_is_irq_connected(SysBusDevice *dev, int n)
bool sysbus_is_irq_connected(const SysBusDevice *dev, int n)
{
return !!sysbus_get_connected_irq(dev, n);
}
qemu_irq sysbus_get_connected_irq(SysBusDevice *dev, int n)
qemu_irq sysbus_get_connected_irq(const SysBusDevice *dev, int n)
{
DeviceState *d = DEVICE(dev);
return qdev_get_gpio_out_connector(d, SYSBUS_DEVICE_GPIO_IRQ, n);
@ -114,7 +114,7 @@ void sysbus_connect_irq(SysBusDevice *dev, int n, qemu_irq irq)
}
/* Check whether an MMIO region exists */
bool sysbus_has_mmio(SysBusDevice *dev, unsigned int n)
bool sysbus_has_mmio(const SysBusDevice *dev, unsigned int n)
{
return (n < dev->num_mmio);
}
@ -190,7 +190,7 @@ void sysbus_init_mmio(SysBusDevice *dev, MemoryRegion *memory)
dev->mmio[n].memory = memory;
}
MemoryRegion *sysbus_mmio_get_region(SysBusDevice *dev, int n)
MemoryRegion *sysbus_mmio_get_region(const SysBusDevice *dev, int n)
{
assert(n >= 0 && n < QDEV_MAX_MMIO);
return dev->mmio[n].memory;

6
hw/dma/pl330.c
View file

@ -111,7 +111,8 @@ typedef enum {
pl330_chan_fault = 15,
} PL330ChanState;
typedef struct PL330State PL330State;
#define TYPE_PL330 "pl330"
OBJECT_DECLARE_SIMPLE_TYPE(PL330State, PL330)
typedef struct PL330Chan {
uint32_t src;
@ -274,9 +275,6 @@ struct PL330State {
AddressSpace *mem_as;
};
#define TYPE_PL330 "pl330"
OBJECT_DECLARE_SIMPLE_TYPE(PL330State, PL330)
static const VMStateDescription vmstate_pl330 = {
.name = "pl330",
.version_id = 2,

5
hw/hppa/machine.c
View file

@ -493,7 +493,7 @@ static void machine_HP_common_init_tail(MachineState *machine, PCIBus *pci_bus,
ram_addr_t initrd_base;
int64_t initrd_size;
initrd_size = get_image_size(initrd_filename);
initrd_size = get_image_size(initrd_filename, NULL);
if (initrd_size < 0) {
error_report("could not load initial ram disk '%s'",
initrd_filename);
@ -514,7 +514,8 @@ static void machine_HP_common_init_tail(MachineState *machine, PCIBus *pci_bus,
exit(1);
}
load_image_targphys(initrd_filename, initrd_base, initrd_size);
load_image_targphys(initrd_filename, initrd_base, initrd_size,
NULL);
cpu[0]->env.initrd_base = initrd_base;
cpu[0]->env.initrd_end = initrd_base + initrd_size;
}

2
hw/i386/multiboot.c
View file

@ -337,7 +337,7 @@ int load_multiboot(X86MachineState *x86ms,
*next_space = '\0';
}
mb_debug("multiboot loading module: %s", one_file);
mb_mod_length = get_image_size(one_file);
mb_mod_length = get_image_size(one_file, NULL);
if (mb_mod_length < 0) {
error_report("Failed to open file '%s'", one_file);
exit(1);

4
hw/i386/x86-common.c
View file

@ -924,7 +924,7 @@ void x86_load_linux(X86MachineState *x86ms,
exit(1);
}
dtb_size = get_image_size(dtb_filename);
dtb_size = get_image_size(dtb_filename, NULL);
if (dtb_size <= 0) {
fprintf(stderr, "qemu: error reading dtb %s: %s\n",
dtb_filename, strerror(errno));
@ -1025,7 +1025,7 @@ void x86_bios_rom_init(X86MachineState *x86ms, const char *default_firmware,
bios_name = MACHINE(x86ms)->firmware ?: default_firmware;
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
if (filename) {
bios_size = get_image_size(filename);
bios_size = get_image_size(filename, NULL);
} else {
bios_size = -1;
}

2
hw/ipmi/ipmi_bmc_sim.c
View file

@ -2211,7 +2211,7 @@ static void ipmi_fru_init(IPMIFru *fru)
goto out;
}
fsize = get_image_size(fru->filename);
fsize = get_image_size(fru->filename, NULL);
if (fsize > 0) {
size = QEMU_ALIGN_UP(fsize, fru->areasize);
fru->data = g_malloc0(size);

5
hw/loongarch/boot.c
View file

@ -328,14 +328,13 @@ static int64_t load_kernel_info(struct loongarch_boot_info *info)
}
if (info->initrd_filename) {
ssize_t initrd_size = get_image_size(info->initrd_filename);
ssize_t initrd_size = get_image_size(info->initrd_filename, NULL);
if (initrd_size > 0) {
initrd_offset = ROUND_UP(kernel_high + 4 * kernel_size, 64 * KiB);
initrd_offset = alloc_initrd_memory(info, initrd_offset,
initrd_size);
initrd_size = load_image_targphys(info->initrd_filename,
initrd_offset, initrd_size);
initrd_offset, initrd_size, NULL);
}
if (initrd_size == -1) {

2
hw/m68k/an5206.c
View file

@ -82,7 +82,7 @@ static void an5206_init(MachineState *machine)
}
if (kernel_size < 0) {
kernel_size = load_image_targphys(kernel_filename, KERNEL_LOAD_ADDR,
ram_size - KERNEL_LOAD_ADDR);
ram_size - KERNEL_LOAD_ADDR, NULL);
entry = KERNEL_LOAD_ADDR;
}
if (kernel_size < 0) {

4
hw/m68k/mcf5208.c
View file

@ -351,7 +351,7 @@ static void mcf5208evb_init(MachineState *machine)
error_report("Could not find ROM image '%s'", machine->firmware);
exit(1);
}
if (load_image_targphys(fn, 0x0, ROM_SIZE) < 8) {
if (load_image_targphys(fn, 0x0, ROM_SIZE, NULL) < 8) {
error_report("Could not load ROM image '%s'", machine->firmware);
exit(1);
}
@ -380,7 +380,7 @@ static void mcf5208evb_init(MachineState *machine)
}
if (kernel_size < 0) {
kernel_size = load_image_targphys(kernel_filename, 0x40000000,
ram_size);
ram_size, NULL);
entry = 0x40000000;
}
if (kernel_size < 0) {

2
hw/m68k/next-cube.c
View file

@ -1325,7 +1325,7 @@ static void next_cube_init(MachineState *machine)
memory_region_init_alias(&m->rom2, NULL, "next.rom2", &m->rom, 0x0,
0x20000);
memory_region_add_subregion(sysmem, 0x0, &m->rom2);
if (load_image_targphys(bios_name, 0x01000000, 0x20000) < 8) {
if (load_image_targphys(bios_name, 0x01000000, 0x20000, NULL) < 8) {
if (!qtest_enabled()) {
error_report("Failed to load firmware '%s'.", bios_name);
}

7
hw/m68k/q800.c
View file

@ -629,7 +629,7 @@ static void q800_machine_init(MachineState *machine)
/* load initrd */
if (initrd_filename) {
initrd_size = get_image_size(initrd_filename);
initrd_size = get_image_size(initrd_filename, NULL);
if (initrd_size < 0) {
error_report("could not load initial ram disk '%s'",
initrd_filename);
@ -638,7 +638,7 @@ static void q800_machine_init(MachineState *machine)
initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK;
load_image_targphys(initrd_filename, initrd_base,
ram_size - initrd_base);
ram_size - initrd_base, NULL);
BOOTINFO2(param_ptr, BI_RAMDISK, initrd_base,
initrd_size);
} else {
@ -668,7 +668,8 @@ static void q800_machine_init(MachineState *machine)
/* Load MacROM binary */
if (filename) {
bios_size = load_image_targphys(filename, MACROM_ADDR, MACROM_SIZE);
bios_size = load_image_targphys(filename, MACROM_ADDR, MACROM_SIZE,
NULL);
g_free(filename);
} else {
bios_size = -1;

4
hw/m68k/virt.c
View file

@ -283,7 +283,7 @@ static void virt_init(MachineState *machine)
/* load initrd */
if (initrd_filename) {
initrd_size = get_image_size(initrd_filename);
initrd_size = get_image_size(initrd_filename, NULL);
if (initrd_size < 0) {
error_report("could not load initial ram disk '%s'",
initrd_filename);
@ -292,7 +292,7 @@ static void virt_init(MachineState *machine)
initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK;
load_image_targphys(initrd_filename, initrd_base,
ram_size - initrd_base);
ram_size - initrd_base, NULL);
BOOTINFO2(param_ptr, BI_RAMDISK, initrd_base,
initrd_size);
} else {

5
hw/microblaze/boot.c
View file

@ -170,7 +170,7 @@ void microblaze_load_kernel(MicroBlazeCPU *cpu, bool is_little_endian,
/* Not an ELF image nor an u-boot image, try a RAW image. */
if (kernel_size < 0) {
kernel_size = load_image_targphys(kernel_filename, ddr_base,
ramsize);
ramsize, NULL);
boot_info.bootstrap_pc = ddr_base;
high = (ddr_base + kernel_size + 3) & ~3;
}
@ -189,7 +189,8 @@ void microblaze_load_kernel(MicroBlazeCPU *cpu, bool is_little_endian,
if (initrd_size < 0) {
initrd_size = load_image_targphys(initrd_filename,
boot_info.initrd_start,
ramsize - initrd_offset);
ramsize - initrd_offset,
NULL);
}
if (initrd_size < 0) {
error_report("could not load initrd '%s'",

2
hw/mips/boston.c
View file

@ -778,7 +778,7 @@ static void boston_mach_init(MachineState *machine)
if (machine->firmware) {
fw_size = load_image_targphys(machine->firmware,
0x1fc00000, 4 * MiB);
0x1fc00000, 4 * MiB, NULL);
if (fw_size == -1) {
error_report("unable to load firmware image '%s'",
machine->firmware);

9
hw/mips/fuloong2e.c
View file

@ -118,7 +118,7 @@ static uint64_t load_kernel(MIPSCPU *cpu)
initrd_size = 0;
initrd_offset = 0;
if (loaderparams.initrd_filename) {
initrd_size = get_image_size(loaderparams.initrd_filename);
initrd_size = get_image_size(loaderparams.initrd_filename, NULL);
if (initrd_size > 0) {
initrd_offset = ROUND_UP(kernel_high, INITRD_PAGE_SIZE);
if (initrd_offset + initrd_size > loaderparams.ram_size) {
@ -127,8 +127,9 @@ static uint64_t load_kernel(MIPSCPU *cpu)
exit(1);
}
initrd_size = load_image_targphys(loaderparams.initrd_filename,
initrd_offset,
loaderparams.ram_size - initrd_offset);
initrd_offset,
loaderparams.ram_size - initrd_offset,
NULL);
}
if (initrd_size == (target_ulong) -1) {
error_report("could not load initial ram disk '%s'",
@ -264,7 +265,7 @@ static void mips_fuloong2e_init(MachineState *machine)
machine->firmware ?: FULOONG_BIOSNAME);
if (filename) {
bios_size = load_image_targphys(filename, 0x1fc00000LL,
BIOS_SIZE);
BIOS_SIZE, NULL);
g_free(filename);
} else {
bios_size = -1;

2
hw/mips/jazz.c
View file

@ -245,7 +245,7 @@ static void mips_jazz_init(MachineState *machine,
machine->firmware ?: bios_name);
if (filename) {
bios_size = load_image_targphys(filename, 0xfff00000LL,
MAGNUM_BIOS_SIZE);
MAGNUM_BIOS_SIZE, NULL);
g_free(filename);
} else {
bios_size = -1;

10
hw/mips/loongson3_virt.c
View file

@ -371,7 +371,7 @@ static uint64_t load_kernel(CPUMIPSState *env)
initrd_size = 0;
initrd_offset = 0;
if (loaderparams.initrd_filename) {
initrd_size = get_image_size(loaderparams.initrd_filename);
initrd_size = get_image_size(loaderparams.initrd_filename, NULL);
if (initrd_size > 0) {
initrd_offset = MAX(loader_memmap[LOADER_INITRD].base,
ROUND_UP(kernel_high, INITRD_PAGE_SIZE));
@ -383,8 +383,9 @@ static uint64_t load_kernel(CPUMIPSState *env)
}
initrd_size = load_image_targphys(loaderparams.initrd_filename,
initrd_offset,
loaderparams.ram_size - initrd_offset);
initrd_offset,
loaderparams.ram_size - initrd_offset,
NULL);
}
if (initrd_size == (target_ulong) -1) {
@ -650,7 +651,8 @@ static void mips_loongson3_virt_init(MachineState *machine)
if (filename) {
bios_size = load_image_targphys(filename,
virt_memmap[VIRT_BIOS_ROM].base,
virt_memmap[VIRT_BIOS_ROM].size);
virt_memmap[VIRT_BIOS_ROM].size,
NULL);
g_free(filename);
} else {
bios_size = -1;

9
hw/mips/malta.c
View file

@ -892,7 +892,7 @@ static uint64_t load_kernel(void)
initrd_size = 0;
initrd_offset = 0;
if (loaderparams.initrd_filename) {
initrd_size = get_image_size(loaderparams.initrd_filename);
initrd_size = get_image_size(loaderparams.initrd_filename, NULL);
if (initrd_size > 0) {
/*
* The kernel allocates the bootmap memory in the low memory after
@ -908,8 +908,9 @@ static uint64_t load_kernel(void)
exit(1);
}
initrd_size = load_image_targphys(loaderparams.initrd_filename,
initrd_offset,
loaderparams.ram_size - initrd_offset);
initrd_offset,
loaderparams.ram_size - initrd_offset,
NULL);
}
if (initrd_size == (target_ulong) -1) {
error_report("could not load initial ram disk '%s'",
@ -1176,7 +1177,7 @@ void mips_malta_init(MachineState *machine)
machine->firmware ?: bios_name);
if (filename) {
bios_size = load_image_targphys(filename, FLASH_ADDRESS,
BIOS_SIZE);
BIOS_SIZE, NULL);
g_free(filename);
} else {
bios_size = -1;

1
hw/net/fsl_etsec/etsec.h
View file

@ -130,7 +130,6 @@ struct eTSEC {
/* Whether we should flush the rx queue when buffer becomes available. */
bool need_flush;
};
typedef struct eTSEC eTSEC;
#define TYPE_ETSEC_COMMON "eTSEC"
OBJECT_DECLARE_SIMPLE_TYPE(eTSEC, ETSEC_COMMON)

9
hw/net/virtio-net.c
View file

@ -986,7 +986,7 @@ static void virtio_net_set_features(VirtIODevice *vdev,
virtio_has_feature_ex(vdev->guest_features_ex,
VIRTIO_NET_F_CTRL_VLAN)) {
bool vlan = virtio_has_feature_ex(features, VIRTIO_NET_F_CTRL_VLAN);
memset(n->vlans, vlan ? 0 : 0xff, MAX_VLAN >> 3);
memset(n->vlans, vlan ? 0 : 0xff, sizeof(n->vlans));
}
if (virtio_has_feature_ex(features, VIRTIO_NET_F_STANDBY)) {
@ -3600,7 +3600,8 @@ static const VMStateDescription vmstate_virtio_net_device = {
* buffer; hold onto your endiannesses; it's actually used as a bitmap
* but based on the uint.
*/
VMSTATE_BUFFER_POINTER_UNSAFE(vlans, VirtIONet, 0, MAX_VLAN >> 3),
VMSTATE_BUFFER_UNSAFE(vlans, VirtIONet, 0,
sizeof(typeof_field(VirtIONet, vlans))),
VMSTATE_WITH_TMP(VirtIONet, struct VirtIONetMigTmp,
vmstate_virtio_net_has_vnet),
VMSTATE_UINT8(mac_table.multi_overflow, VirtIONet),
@ -4018,8 +4019,7 @@ static void virtio_net_device_realize(DeviceState *dev, Error **errp)
n->mac_table.macs = g_malloc0(MAC_TABLE_ENTRIES * ETH_ALEN);
n->vlans = g_malloc0(MAX_VLAN >> 3);
memset(n->vlans, 0xff, MAX_VLAN >> 3);
memset(n->vlans, 0xff, sizeof(n->vlans));
nc = qemu_get_queue(n->nic);
nc->rxfilter_notify_enabled = 1;
@ -4068,7 +4068,6 @@ static void virtio_net_device_unrealize(DeviceState *dev)
n->netclient_type = NULL;
g_free(n->mac_table.macs);
g_free(n->vlans);
if (n->failover) {
qobject_unref(n->primary_opts);

2
hw/net/xen_nic.c
View file

@ -62,8 +62,6 @@ struct XenNetDev {
NICState *nic;
};
typedef struct XenNetDev XenNetDev;
#define TYPE_XEN_NET_DEVICE "xen-net-device"
OBJECT_DECLARE_SIMPLE_TYPE(XenNetDev, XEN_NET_DEVICE)

2
hw/nubus/nubus-device.c
View file

@ -68,7 +68,7 @@ static void nubus_device_realize(DeviceState *dev, Error **errp)
path = g_strdup(nd->romfile);
}
size = get_image_size(path);
size = get_image_size(path, NULL);
if (size < 0) {
error_setg(errp, "failed to find romfile \"%s\"", nd->romfile);
g_free(path);

2
hw/nvram/ds1225y.c
View file

@ -126,7 +126,7 @@ static void nvram_sysbus_realize(DeviceState *dev, Error **errp)
s->contents = g_malloc0(s->chip_size);
memory_region_init_io(&s->iomem, OBJECT(s), &nvram_ops, s,
memory_region_init_io(&s->iomem, OBJECT(dev), &nvram_ops, s,
"nvram", s->chip_size);
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem);

5
hw/openrisc/boot.c
View file

@ -44,7 +44,8 @@ hwaddr openrisc_load_kernel(ram_addr_t ram_size,
if (kernel_size < 0) {
kernel_size = load_image_targphys(kernel_filename,
KERNEL_LOAD_ADDR,
ram_size - KERNEL_LOAD_ADDR);
ram_size - KERNEL_LOAD_ADDR,
NULL);
high_addr = KERNEL_LOAD_ADDR + kernel_size;
}
@ -74,7 +75,7 @@ hwaddr openrisc_load_initrd(void *fdt, const char *filename,
size = load_ramdisk(filename, start, mem_size - start);
if (size < 0) {
size = load_image_targphys(filename, start, mem_size - start);
size = load_image_targphys(filename, start, mem_size - start, NULL);
if (size < 0) {
error_report("could not load ramdisk '%s'", filename);
exit(1);

7
hw/pci-host/bonito.c
View file

@ -230,7 +230,9 @@ struct PCIBonitoState {
MemoryRegion bonito_localio;
};
typedef struct PCIBonitoState PCIBonitoState;
#define TYPE_PCI_BONITO "Bonito"
OBJECT_DECLARE_SIMPLE_TYPE(PCIBonitoState, PCI_BONITO)
struct BonitoState {
PCIHostState parent_obj;
@ -239,9 +241,6 @@ struct BonitoState {
MemoryRegion pci_mem;
};
#define TYPE_PCI_BONITO "Bonito"
OBJECT_DECLARE_SIMPLE_TYPE(PCIBonitoState, PCI_BONITO)
static void bonito_writel(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
{

105
hw/pci-host/raven.c
View file

@ -31,7 +31,6 @@
#include "hw/pci/pci_bus.h"
#include "hw/pci/pci_host.h"
#include "hw/qdev-properties.h"
#include "migration/vmstate.h"
#include "hw/intc/i8259.h"
#include "hw/irq.h"
#include "hw/or-irq.h"
@ -40,22 +39,13 @@
#define TYPE_RAVEN_PCI_DEVICE "raven"
#define TYPE_RAVEN_PCI_HOST_BRIDGE "raven-pcihost"
OBJECT_DECLARE_SIMPLE_TYPE(RavenPCIState, RAVEN_PCI_DEVICE)
OBJECT_DECLARE_SIMPLE_TYPE(PREPPCIState, RAVEN_PCI_HOST_BRIDGE)
struct RavenPCIState {
PCIDevice dev;
};
typedef struct PRePPCIState PREPPCIState;
DECLARE_INSTANCE_CHECKER(PREPPCIState, RAVEN_PCI_HOST_BRIDGE,
TYPE_RAVEN_PCI_HOST_BRIDGE)
struct PRePPCIState {
struct PREPPCIState {
PCIHostState parent_obj;
OrIRQState *or_irq;
qemu_irq pci_irqs[PCI_NUM_PINS];
PCIBus pci_bus;
AddressSpace pci_io_as;
MemoryRegion pci_io;
MemoryRegion pci_io_non_contiguous;
@ -65,7 +55,6 @@ struct PRePPCIState {
MemoryRegion bm_ram_alias;
MemoryRegion bm_pci_memory_alias;
AddressSpace bm_as;
RavenPCIState pci_dev;
int contiguous_map;
};
@ -241,8 +230,9 @@ static void raven_pcihost_realizefn(DeviceState *d, Error **errp)
qdev_init_gpio_in(d, raven_change_gpio, 1);
pci_bus_irqs(&s->pci_bus, raven_set_irq, s, PCI_NUM_PINS);
pci_bus_map_irqs(&s->pci_bus, raven_map_irq);
h->bus = pci_register_root_bus(d, NULL, raven_set_irq, raven_map_irq,
s, &s->pci_memory, &s->pci_io, 0, 4,
TYPE_PCI_BUS);
memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops, s,
"pci-conf-idx", 4);
@ -260,16 +250,16 @@ static void raven_pcihost_realizefn(DeviceState *d, Error **errp)
"pci-intack", 1);
memory_region_add_subregion(address_space_mem, 0xbffffff0, &s->pci_intack);
/* TODO Remove once realize propagates to child devices. */
qdev_realize(DEVICE(&s->pci_dev), BUS(&s->pci_bus), errp);
pci_create_simple(h->bus, PCI_DEVFN(0, 0), TYPE_RAVEN_PCI_DEVICE);
address_space_init(&s->bm_as, &s->bm, "raven-bm");
pci_setup_iommu(h->bus, &raven_iommu_ops, s);
}
static void raven_pcihost_initfn(Object *obj)
{
PCIHostState *h = PCI_HOST_BRIDGE(obj);
PREPPCIState *s = RAVEN_PCI_HOST_BRIDGE(obj);
MemoryRegion *address_space_mem = get_system_memory();
DeviceState *pci_dev;
memory_region_init(&s->pci_io, obj, "pci-io", 0x3f800000);
memory_region_init_io(&s->pci_io_non_contiguous, obj, &raven_io_ops, s,
@ -290,8 +280,6 @@ static void raven_pcihost_initfn(Object *obj)
memory_region_add_subregion_overlap(address_space_mem, PCI_IO_BASE_ADDR,
&s->pci_io_non_contiguous, 1);
memory_region_add_subregion(address_space_mem, 0xc0000000, &s->pci_memory);
pci_root_bus_init(&s->pci_bus, sizeof(s->pci_bus), DEVICE(obj), NULL,
&s->pci_memory, &s->pci_io, 0, TYPE_PCI_BUS);
/* Bus master address space */
memory_region_init(&s->bm, obj, "bm-raven", 4 * GiB);
@ -302,16 +290,15 @@ static void raven_pcihost_initfn(Object *obj)
get_system_memory(), 0, 0x80000000);
memory_region_add_subregion(&s->bm, 0 , &s->bm_pci_memory_alias);
memory_region_add_subregion(&s->bm, 0x80000000, &s->bm_ram_alias);
address_space_init(&s->bm_as, &s->bm, "raven-bm");
pci_setup_iommu(&s->pci_bus, &raven_iommu_ops, s);
}
h->bus = &s->pci_bus;
static void raven_pcihost_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
object_initialize(&s->pci_dev, sizeof(s->pci_dev), TYPE_RAVEN_PCI_DEVICE);
pci_dev = DEVICE(&s->pci_dev);
object_property_set_int(OBJECT(&s->pci_dev), "addr", PCI_DEVFN(0, 0),
NULL);
qdev_prop_set_bit(pci_dev, "multifunction", false);
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
dc->realize = raven_pcihost_realizefn;
dc->fw_name = "pci";
}
static void raven_realize(PCIDevice *d, Error **errp)
@ -321,16 +308,6 @@ static void raven_realize(PCIDevice *d, Error **errp)
d->config[PCI_CAPABILITY_LIST] = 0x00;
}
static const VMStateDescription vmstate_raven = {
.name = "raven",
.version_id = 0,
.minimum_version_id = 0,
.fields = (const VMStateField[]) {
VMSTATE_PCI_DEVICE(dev, RavenPCIState),
VMSTATE_END_OF_LIST()
},
};
static void raven_class_init(ObjectClass *klass, const void *data)
{
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
@ -342,7 +319,6 @@ static void raven_class_init(ObjectClass *klass, const void *data)
k->revision = 0x00;
k->class_id = PCI_CLASS_BRIDGE_HOST;
dc->desc = "PReP Host Bridge - Motorola Raven";
dc->vmsd = &vmstate_raven;
/*
* Reason: PCI-facing part of the host bridge, not usable without
* the host-facing part, which can't be device_add'ed, yet.
@ -350,38 +326,23 @@ static void raven_class_init(ObjectClass *klass, const void *data)
dc->user_creatable = false;
}
static const TypeInfo raven_info = {
.name = TYPE_RAVEN_PCI_DEVICE,
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(RavenPCIState),
.class_init = raven_class_init,
.interfaces = (const InterfaceInfo[]) {
{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
{ },
static const TypeInfo raven_types[] = {
{
.name = TYPE_RAVEN_PCI_HOST_BRIDGE,
.parent = TYPE_PCI_HOST_BRIDGE,
.instance_size = sizeof(PREPPCIState),
.instance_init = raven_pcihost_initfn,
.class_init = raven_pcihost_class_init,
},
{
.name = TYPE_RAVEN_PCI_DEVICE,
.parent = TYPE_PCI_DEVICE,
.class_init = raven_class_init,
.interfaces = (const InterfaceInfo[]) {
{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
{ },
},
},
};
static void raven_pcihost_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
dc->realize = raven_pcihost_realizefn;
dc->fw_name = "pci";
}
static const TypeInfo raven_pcihost_info = {
.name = TYPE_RAVEN_PCI_HOST_BRIDGE,
.parent = TYPE_PCI_HOST_BRIDGE,
.instance_size = sizeof(PREPPCIState),
.instance_init = raven_pcihost_initfn,
.class_init = raven_pcihost_class_init,
};
static void raven_register_types(void)
{
type_register_static(&raven_pcihost_info);
type_register_static(&raven_info);
}
type_init(raven_register_types)
DEFINE_TYPES(raven_types)

2
hw/pci/pci.c
View file

@ -2557,7 +2557,7 @@ static void pci_add_option_rom(PCIDevice *pdev, bool is_default_rom,
path = g_strdup(pdev->romfile);
}
size = get_image_size(path);
size = get_image_size(path, NULL);
if (size < 0) {
error_setg(errp, "failed to find romfile \"%s\"", pdev->romfile);
return;

13
hw/ppc/amigaone.c
View file

@ -324,11 +324,7 @@ static void amigaone_init(MachineState *machine)
error_report("Could not find firmware '%s'", machine->firmware);
exit(1);
}
sz = load_image_targphys(filename, PROM_ADDR, PROM_SIZE);
if (sz <= 0 || sz > PROM_SIZE) {
error_report("Could not load firmware '%s'", filename);
exit(1);
}
sz = load_image_targphys(filename, PROM_ADDR, PROM_SIZE, &error_fatal);
}
/* Articia S */
@ -413,12 +409,7 @@ static void amigaone_init(MachineState *machine)
loadaddr = ROUND_UP(loadaddr + 4 * MiB, 4 * KiB);
loadaddr = MAX(loadaddr, INITRD_MIN_ADDR);
sz = load_image_targphys(machine->initrd_filename, loadaddr,
bi->bd_info - loadaddr);
if (sz <= 0) {
error_report("Could not load initrd '%s'",
machine->initrd_filename);
exit(1);
}
bi->bd_info - loadaddr, &error_fatal);
bi->initrd_start = loadaddr;
bi->initrd_end = loadaddr + sz;
}

20
hw/ppc/e500.c
View file

@ -1226,14 +1226,8 @@ void ppce500_init(MachineState *machine)
if (machine->kernel_filename && !kernel_as_payload) {
kernel_base = cur_base;
kernel_size = load_image_targphys(machine->kernel_filename,
cur_base,
machine->ram_size - cur_base);
if (kernel_size < 0) {
error_report("could not load kernel '%s'",
machine->kernel_filename);
exit(1);
}
cur_base, machine->ram_size - cur_base,
&error_fatal);
cur_base += kernel_size;
}
@ -1241,14 +1235,8 @@ void ppce500_init(MachineState *machine)
if (machine->initrd_filename) {
initrd_base = (cur_base + INITRD_LOAD_PAD) & ~INITRD_PAD_MASK;
initrd_size = load_image_targphys(machine->initrd_filename, initrd_base,
machine->ram_size - initrd_base);
if (initrd_size < 0) {
error_report("could not load initial ram disk '%s'",
machine->initrd_filename);
exit(1);
}
machine->ram_size - initrd_base,
&error_fatal);
cur_base = initrd_base + initrd_size;
}

19
hw/ppc/mac_newworld.c
View file

@ -188,7 +188,8 @@ static void ppc_core99_init(MachineState *machine)
if (bios_size <= 0) {
/* or load binary ROM image */
bios_size = load_image_targphys(filename, PROM_BASE, PROM_SIZE);
bios_size = load_image_targphys(filename, PROM_BASE, PROM_SIZE,
&error_fatal);
}
g_free(filename);
}
@ -210,24 +211,16 @@ static void ppc_core99_init(MachineState *machine)
if (kernel_size < 0) {
kernel_size = load_image_targphys(machine->kernel_filename,
kernel_base,
machine->ram_size - kernel_base);
}
if (kernel_size < 0) {
error_report("could not load kernel '%s'",
machine->kernel_filename);
exit(1);
machine->ram_size - kernel_base,
&error_fatal);
}
/* load initrd */
if (machine->initrd_filename) {
initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
initrd_size = load_image_targphys(machine->initrd_filename,
initrd_base,
machine->ram_size - initrd_base);
if (initrd_size < 0) {
error_report("could not load initial ram disk '%s'",
machine->initrd_filename);
exit(1);
}
machine->ram_size - initrd_base,
&error_fatal);
cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
} else {
cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);

19
hw/ppc/mac_oldworld.c
View file

@ -143,7 +143,8 @@ static void ppc_heathrow_init(MachineState *machine)
if (bios_size <= 0) {
/* or if could not load ELF try loading a binary ROM image */
bios_size = load_image_targphys(filename, PROM_BASE, PROM_SIZE);
bios_size = load_image_targphys(filename, PROM_BASE, PROM_SIZE,
&error_fatal);
bios_addr = PROM_BASE;
}
g_free(filename);
@ -166,12 +167,8 @@ static void ppc_heathrow_init(MachineState *machine)
if (kernel_size < 0) {
kernel_size = load_image_targphys(machine->kernel_filename,
kernel_base,
machine->ram_size - kernel_base);
}
if (kernel_size < 0) {
error_report("could not load kernel '%s'",
machine->kernel_filename);
exit(1);
machine->ram_size - kernel_base,
&error_fatal);
}
/* load initrd */
if (machine->initrd_filename) {
@ -179,12 +176,8 @@ static void ppc_heathrow_init(MachineState *machine)
KERNEL_GAP);
initrd_size = load_image_targphys(machine->initrd_filename,
initrd_base,
machine->ram_size - initrd_base);
if (initrd_size < 0) {
error_report("could not load initial ram disk '%s'",
machine->initrd_filename);
exit(1);
}
machine->ram_size - initrd_base,
&error_fatal);
cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
} else {
cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);

1
hw/ppc/pef.c
View file

@ -19,7 +19,6 @@
#define TYPE_PEF_GUEST "pef-guest"
OBJECT_DECLARE_SIMPLE_TYPE(PefGuest, PEF_GUEST)
typedef struct PefGuest PefGuest;
typedef struct PefGuestClass PefGuestClass;
struct PefGuestClass {

10
hw/ppc/pegasos2.c
View file

@ -197,7 +197,8 @@ static void pegasos_init(MachineState *machine)
sz = load_elf(filename, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
ELFDATA2MSB, PPC_ELF_MACHINE, 0, 0);
if (sz <= 0) {
sz = load_image_targphys(filename, pm->vof ? 0 : prom_addr, PROM_SIZE);
sz = load_image_targphys(filename, pm->vof ? 0 : prom_addr, PROM_SIZE,
&error_fatal);
}
if (sz <= 0 || sz > PROM_SIZE) {
error_report("Could not load firmware '%s'", filename);
@ -301,12 +302,7 @@ static void pegasos_init(MachineState *machine)
pm->initrd_addr = ROUND_UP(pm->initrd_addr, 4);
pm->initrd_addr = MAX(pm->initrd_addr, INITRD_MIN_ADDR);
sz = load_image_targphys(machine->initrd_filename, pm->initrd_addr,
machine->ram_size - pm->initrd_addr);
if (sz <= 0) {
error_report("Could not load initrd '%s'",
machine->initrd_filename);
exit(1);
}
machine->ram_size - pm->initrd_addr, &error_fatal);
pm->initrd_size = sz;
}

27
hw/ppc/pnv.c
View file

@ -1009,7 +1009,6 @@ static void pnv_init(MachineState *machine)
PnvMachineClass *pmc = PNV_MACHINE_GET_CLASS(machine);
int max_smt_threads = pmc->max_smt_threads;
char *fw_filename;
long fw_size;
uint64_t chip_ram_start = 0;
int i;
char *chip_typename;
@ -1068,36 +1067,22 @@ static void pnv_init(MachineState *machine)
exit(1);
}
fw_size = load_image_targphys(fw_filename, pnv->fw_load_addr, FW_MAX_SIZE);
if (fw_size < 0) {
error_report("Could not load OPAL firmware '%s'", fw_filename);
exit(1);
}
load_image_targphys(fw_filename, pnv->fw_load_addr, FW_MAX_SIZE,
&error_fatal);
g_free(fw_filename);
/* load kernel */
if (machine->kernel_filename) {
long kernel_size;
kernel_size = load_image_targphys(machine->kernel_filename,
KERNEL_LOAD_ADDR, KERNEL_MAX_SIZE);
if (kernel_size < 0) {
error_report("Could not load kernel '%s'",
machine->kernel_filename);
exit(1);
}
load_image_targphys(machine->kernel_filename,
KERNEL_LOAD_ADDR, KERNEL_MAX_SIZE, &error_fatal);
}
/* load initrd */
if (machine->initrd_filename) {
pnv->initrd_base = INITRD_LOAD_ADDR;
pnv->initrd_size = load_image_targphys(machine->initrd_filename,
pnv->initrd_base, INITRD_MAX_SIZE);
if (pnv->initrd_size < 0) {
error_report("Could not load initial ram disk '%s'",
machine->initrd_filename);
exit(1);
}
pnv->initrd_base,
INITRD_MAX_SIZE, &error_fatal);
}
/* load dtb if passed */

9
hw/ppc/ppc440_bamboo.c
View file

@ -242,13 +242,8 @@ static void bamboo_init(MachineState *machine)
/* Load initrd. */
if (initrd_filename) {
initrd_size = load_image_targphys(initrd_filename, RAMDISK_ADDR,
machine->ram_size - RAMDISK_ADDR);
if (initrd_size < 0) {
error_report("could not load ram disk '%s' at %x",
initrd_filename, RAMDISK_ADDR);
exit(1);
}
machine->ram_size - RAMDISK_ADDR,
&error_fatal);
}
/* If we're loading a kernel directly, we must load the device tree too. */

19
hw/ppc/prep.c
View file

@ -280,7 +280,8 @@ static void ibm_40p_init(MachineState *machine)
bios_size = load_elf(filename, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
ELFDATA2MSB, PPC_ELF_MACHINE, 0, 0);
if (bios_size < 0) {
bios_size = load_image_targphys(filename, BIOS_ADDR, BIOS_SIZE);
bios_size = load_image_targphys(filename, BIOS_ADDR, BIOS_SIZE,
&error_fatal);
}
if (bios_size < 0 || bios_size > BIOS_SIZE) {
error_report("Could not load bios image '%s'", filename);
@ -379,12 +380,8 @@ static void ibm_40p_init(MachineState *machine)
kernel_base = KERNEL_LOAD_ADDR;
kernel_size = load_image_targphys(machine->kernel_filename,
kernel_base,
machine->ram_size - kernel_base);
if (kernel_size < 0) {
error_report("could not load kernel '%s'",
machine->kernel_filename);
exit(1);
}
machine->ram_size - kernel_base,
&error_fatal);
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
/* load initrd */
@ -392,12 +389,8 @@ static void ibm_40p_init(MachineState *machine)
initrd_base = INITRD_LOAD_ADDR;
initrd_size = load_image_targphys(machine->initrd_filename,
initrd_base,
machine->ram_size - initrd_base);
if (initrd_size < 0) {
error_report("could not load initial ram disk '%s'",
machine->initrd_filename);
exit(1);
}
machine->ram_size - initrd_base,
&error_fatal);
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
}

8
hw/ppc/sam460ex.c
View file

@ -494,12 +494,8 @@ static void sam460ex_init(MachineState *machine)
if (machine->initrd_filename) {
initrd_size = load_image_targphys(machine->initrd_filename,
RAMDISK_ADDR,
machine->ram_size - RAMDISK_ADDR);
if (initrd_size < 0) {
error_report("could not load ram disk '%s' at %x",
machine->initrd_filename, RAMDISK_ADDR);
exit(1);
}
machine->ram_size - RAMDISK_ADDR,
&error_fatal);
}
/* If we're loading a kernel directly, we must load the device tree too. */

17
hw/ppc/spapr.c
View file

@ -2854,11 +2854,7 @@ static void spapr_machine_init(MachineState *machine)
error_report("Could not find LPAR firmware '%s'", bios_name);
exit(1);
}
fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
if (fw_size <= 0) {
error_report("Could not load LPAR firmware '%s'", filename);
exit(1);
}
fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE, &error_fatal);
/*
* if Secure VM (PEF) support is configured, then initialize it
@ -3115,14 +3111,9 @@ static void spapr_machine_init(MachineState *machine)
spapr->initrd_base = (spapr->kernel_addr + spapr->kernel_size
+ 0x1ffff) & ~0xffff;
spapr->initrd_size = load_image_targphys(initrd_filename,
spapr->initrd_base,
load_limit
- spapr->initrd_base);
if (spapr->initrd_size < 0) {
error_report("could not load initial ram disk '%s'",
initrd_filename);
exit(1);
}
spapr->initrd_base,
load_limit - spapr->initrd_base,
&error_fatal);
}
}

11
hw/ppc/virtex_ml507.c
View file

@ -253,7 +253,7 @@ static void virtex_init(MachineState *machine)
/* If we failed loading ELF's try a raw image. */
kernel_size = load_image_targphys(kernel_filename,
boot_offset,
machine->ram_size);
machine->ram_size, &error_fatal);
boot_info.bootstrap_pc = boot_offset;
high = boot_info.bootstrap_pc + kernel_size + 8192;
}
@ -264,13 +264,8 @@ static void virtex_init(MachineState *machine)
if (machine->initrd_filename) {
initrd_base = high = ROUND_UP(high, 4);
initrd_size = load_image_targphys(machine->initrd_filename,
high, machine->ram_size - high);
if (initrd_size < 0) {
error_report("couldn't load ram disk '%s'",
machine->initrd_filename);
exit(1);
}
high, machine->ram_size - high,
&error_fatal);
high = ROUND_UP(high + initrd_size, 4);
}

49
hw/riscv/boot.c
View file

@ -74,8 +74,8 @@ void riscv_boot_info_init(RISCVBootInfo *info, RISCVHartArrayState *harts)
info->is_32bit = riscv_is_32bit(harts);
}
target_ulong riscv_calc_kernel_start_addr(RISCVBootInfo *info,
target_ulong firmware_end_addr) {
hwaddr riscv_calc_kernel_start_addr(RISCVBootInfo *info,
hwaddr firmware_end_addr) {
if (info->is_32bit) {
return QEMU_ALIGN_UP(firmware_end_addr, 4 * MiB);
} else {
@ -133,13 +133,13 @@ char *riscv_find_firmware(const char *firmware_filename,
return filename;
}
target_ulong riscv_find_and_load_firmware(MachineState *machine,
const char *default_machine_firmware,
hwaddr *firmware_load_addr,
symbol_fn_t sym_cb)
hwaddr riscv_find_and_load_firmware(MachineState *machine,
const char *default_machine_firmware,
hwaddr *firmware_load_addr,
symbol_fn_t sym_cb)
{
char *firmware_filename;
target_ulong firmware_end_addr = *firmware_load_addr;
hwaddr firmware_end_addr = *firmware_load_addr;
firmware_filename = riscv_find_firmware(machine->firmware,
default_machine_firmware);
@ -154,9 +154,9 @@ target_ulong riscv_find_and_load_firmware(MachineState *machine,
return firmware_end_addr;
}
target_ulong riscv_load_firmware(const char *firmware_filename,
hwaddr *firmware_load_addr,
symbol_fn_t sym_cb)
hwaddr riscv_load_firmware(const char *firmware_filename,
hwaddr *firmware_load_addr,
symbol_fn_t sym_cb)
{
uint64_t firmware_entry, firmware_end;
ssize_t firmware_size;
@ -172,7 +172,8 @@ target_ulong riscv_load_firmware(const char *firmware_filename,
firmware_size = load_image_targphys_as(firmware_filename,
*firmware_load_addr,
current_machine->ram_size, NULL);
current_machine->ram_size, NULL,
NULL);
if (firmware_size > 0) {
return *firmware_load_addr + firmware_size;
@ -207,7 +208,7 @@ static void riscv_load_initrd(MachineState *machine, RISCVBootInfo *info)
size = load_ramdisk(filename, start, mem_size - start);
if (size == -1) {
size = load_image_targphys(filename, start, mem_size - start);
size = load_image_targphys(filename, start, mem_size - start, NULL);
if (size == -1) {
error_report("could not load ramdisk '%s'", filename);
exit(1);
@ -262,7 +263,7 @@ void riscv_load_kernel(MachineState *machine,
}
kernel_size = load_image_targphys_as(kernel_filename, kernel_start_addr,
current_machine->ram_size, NULL);
current_machine->ram_size, NULL, NULL);
if (kernel_size > 0) {
info->kernel_size = kernel_size;
info->image_low_addr = kernel_start_addr;
@ -387,7 +388,8 @@ void riscv_rom_copy_firmware_info(MachineState *machine,
uint64_t kernel_entry)
{
struct fw_dynamic_info32 dinfo32;
struct fw_dynamic_info dinfo;
struct fw_dynamic_info64 dinfo64;
void *dinfo_ptr = NULL;
size_t dinfo_len;
if (riscv_is_32bit(harts)) {
@ -397,15 +399,17 @@ void riscv_rom_copy_firmware_info(MachineState *machine,
dinfo32.next_addr = cpu_to_le32(kernel_entry);
dinfo32.options = 0;
dinfo32.boot_hart = 0;
dinfo_ptr = &dinfo32;
dinfo_len = sizeof(dinfo32);
} else {
dinfo.magic = cpu_to_le64(FW_DYNAMIC_INFO_MAGIC_VALUE);
dinfo.version = cpu_to_le64(FW_DYNAMIC_INFO_VERSION);
dinfo.next_mode = cpu_to_le64(FW_DYNAMIC_INFO_NEXT_MODE_S);
dinfo.next_addr = cpu_to_le64(kernel_entry);
dinfo.options = 0;
dinfo.boot_hart = 0;
dinfo_len = sizeof(dinfo);
dinfo64.magic = cpu_to_le64(FW_DYNAMIC_INFO_MAGIC_VALUE);
dinfo64.version = cpu_to_le64(FW_DYNAMIC_INFO_VERSION);
dinfo64.next_mode = cpu_to_le64(FW_DYNAMIC_INFO_NEXT_MODE_S);
dinfo64.next_addr = cpu_to_le64(kernel_entry);
dinfo64.options = 0;
dinfo64.boot_hart = 0;
dinfo_ptr = &dinfo64;
dinfo_len = sizeof(dinfo64);
}
/**
@ -419,8 +423,7 @@ void riscv_rom_copy_firmware_info(MachineState *machine,
}
rom_add_blob_fixed_as("mrom.finfo",
riscv_is_32bit(harts) ?
(void *)&dinfo32 : (void *)&dinfo,
dinfo_ptr,
dinfo_len,
rom_base + reset_vec_size,
&address_space_memory);

2
hw/riscv/microchip_pfsoc.c
View file

@ -521,7 +521,7 @@ static void microchip_icicle_kit_machine_init(MachineState *machine)
uint64_t mem_low_size, mem_high_size;
hwaddr firmware_load_addr;
const char *firmware_name;
target_ulong firmware_end_addr, kernel_start_addr;
hwaddr firmware_end_addr, kernel_start_addr;
uint64_t kernel_entry;
uint64_t fdt_load_addr;
DriveInfo *dinfo = drive_get(IF_SD, 0, 0);

2
hw/riscv/sifive_u.c
View file

@ -515,7 +515,7 @@ static void sifive_u_machine_init(MachineState *machine)
MemoryRegion *system_memory = get_system_memory();
MemoryRegion *flash0 = g_new(MemoryRegion, 1);
hwaddr start_addr = memmap[SIFIVE_U_DEV_DRAM].base;
target_ulong firmware_end_addr, kernel_start_addr;
hwaddr firmware_end_addr, kernel_start_addr;
const char *firmware_name;
uint32_t start_addr_hi32 = 0x00000000;
uint32_t fdt_load_addr_hi32 = 0x00000000;

4
hw/riscv/spike.c
View file

@ -197,9 +197,9 @@ static void spike_board_init(MachineState *machine)
SpikeState *s = SPIKE_MACHINE(machine);
MemoryRegion *system_memory = get_system_memory();
MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
target_ulong firmware_end_addr = memmap[SPIKE_DRAM].base;
hwaddr firmware_end_addr = memmap[SPIKE_DRAM].base;
hwaddr firmware_load_addr = memmap[SPIKE_DRAM].base;
target_ulong kernel_start_addr;
hwaddr kernel_start_addr;
char *firmware_name;
uint64_t fdt_load_addr;
uint64_t kernel_entry;

2
hw/riscv/virt.c
View file

@ -1434,7 +1434,7 @@ static void virt_machine_done(Notifier *notifier, void *data)
machine_done);
MachineState *machine = MACHINE(s);
hwaddr start_addr = s->memmap[VIRT_DRAM].base;
target_ulong firmware_end_addr, kernel_start_addr;
hwaddr firmware_end_addr, kernel_start_addr;
const char *firmware_name = riscv_default_firmware_name(&s->soc[0]);
uint64_t fdt_load_addr;
uint64_t kernel_entry = 0;

2
hw/rx/rx-gdbsim.c
View file

@ -63,7 +63,7 @@ static void rx_load_image(RXCPU *cpu, const char *filename,
long kernel_size;
int i;
kernel_size = load_image_targphys(filename, start, size);
kernel_size = load_image_targphys(filename, start, size, NULL);
if (kernel_size < 0) {
fprintf(stderr, "qemu: could not load kernel '%s'\n", filename);
exit(1);

8
hw/s390x/ipl.c
View file

@ -169,7 +169,7 @@ static void s390_ipl_realize(DeviceState *dev, Error **errp)
} else {
/* Try to load non-ELF file */
bios_size = load_image_targphys(bios_filename, ZIPL_IMAGE_START,
4096);
4096, NULL);
ipl->bios_start_addr = ZIPL_IMAGE_START;
}
g_free(bios_filename);
@ -188,7 +188,8 @@ static void s390_ipl_realize(DeviceState *dev, Error **errp)
&pentry, NULL,
NULL, NULL, ELFDATA2MSB, EM_S390, 0, 0);
if (kernel_size < 0) {
kernel_size = load_image_targphys(ipl->kernel, 0, ms->ram_size);
kernel_size = load_image_targphys(ipl->kernel, 0, ms->ram_size,
NULL);
if (kernel_size < 0) {
error_setg(errp, "could not load kernel '%s'", ipl->kernel);
return;
@ -247,7 +248,8 @@ static void s390_ipl_realize(DeviceState *dev, Error **errp)
initrd_offset += 0x100000;
}
initrd_size = load_image_targphys(ipl->initrd, initrd_offset,
ms->ram_size - initrd_offset);
ms->ram_size - initrd_offset,
NULL);
if (initrd_size == -1) {
error_setg(errp, "could not load initrd '%s'", ipl->initrd);
return;

8
hw/sh4/r2d.c
View file

@ -329,8 +329,9 @@ static void r2d_init(MachineState *machine)
int kernel_size;
kernel_size = load_image_targphys(kernel_filename,
SDRAM_BASE + LINUX_LOAD_OFFSET,
INITRD_LOAD_OFFSET - LINUX_LOAD_OFFSET);
SDRAM_BASE + LINUX_LOAD_OFFSET,
INITRD_LOAD_OFFSET - LINUX_LOAD_OFFSET,
NULL);
if (kernel_size < 0) {
error_report("qemu: could not load kernel '%s'", kernel_filename);
exit(1);
@ -350,7 +351,8 @@ static void r2d_init(MachineState *machine)
initrd_size = load_image_targphys(initrd_filename,
SDRAM_BASE + INITRD_LOAD_OFFSET,
SDRAM_SIZE - INITRD_LOAD_OFFSET);
SDRAM_SIZE - INITRD_LOAD_OFFSET,
NULL);
if (initrd_size < 0) {
error_report("qemu: could not load initrd '%s'", initrd_filename);

2
hw/smbios/smbios.c
View file

@ -1340,7 +1340,7 @@ void smbios_entry_add(QemuOpts *opts, Error **errp)
return;
}
size = get_image_size(val);
size = get_image_size(val, NULL);
if (size == -1 || size < sizeof(struct smbios_structure_header)) {
error_setg(errp, "Cannot read SMBIOS file %s", val);
return;

4
hw/sparc/leon3.c
View file

@ -349,7 +349,7 @@ static void leon3_generic_hw_init(MachineState *machine)
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
if (filename) {
bios_size = get_image_size(filename);
bios_size = get_image_size(filename, NULL);
} else {
bios_size = -1;
}
@ -360,7 +360,7 @@ static void leon3_generic_hw_init(MachineState *machine)
}
if (bios_size > 0) {
ret = load_image_targphys(filename, LEON3_PROM_OFFSET, bios_size);
ret = load_image_targphys(filename, LEON3_PROM_OFFSET, bios_size, NULL);
if (ret < 0 || ret > prom_size) {
error_report("could not load prom '%s'", filename);
exit(1);

8
hw/sparc/sun4m.c
View file

@ -245,7 +245,8 @@ static unsigned long sun4m_load_kernel(const char *kernel_filename,
if (kernel_size < 0)
kernel_size = load_image_targphys(kernel_filename,
KERNEL_LOAD_ADDR,
RAM_size - KERNEL_LOAD_ADDR);
RAM_size - KERNEL_LOAD_ADDR,
NULL);
if (kernel_size < 0) {
error_report("could not load kernel '%s'", kernel_filename);
exit(1);
@ -256,7 +257,8 @@ static unsigned long sun4m_load_kernel(const char *kernel_filename,
if (initrd_filename) {
*initrd_size = load_image_targphys(initrd_filename,
INITRD_LOAD_ADDR,
RAM_size - INITRD_LOAD_ADDR);
RAM_size - INITRD_LOAD_ADDR,
NULL);
if ((int)*initrd_size < 0) {
error_report("could not load initial ram disk '%s'",
initrd_filename);
@ -700,7 +702,7 @@ static void prom_init(hwaddr addr, const char *bios_name)
translate_prom_address, &addr, NULL,
NULL, NULL, NULL, ELFDATA2MSB, EM_SPARC, 0, 0);
if (ret < 0 || ret > PROM_SIZE_MAX) {
ret = load_image_targphys(filename, addr, PROM_SIZE_MAX);
ret = load_image_targphys(filename, addr, PROM_SIZE_MAX, NULL);
}
g_free(filename);
} else {

7
hw/sparc64/sun4u.c
View file

@ -182,7 +182,8 @@ static uint64_t sun4u_load_kernel(const char *kernel_filename,
if (kernel_size < 0) {
kernel_size = load_image_targphys(kernel_filename,
KERNEL_LOAD_ADDR,
RAM_size - KERNEL_LOAD_ADDR);
RAM_size - KERNEL_LOAD_ADDR,
NULL);
}
if (kernel_size < 0) {
error_report("could not load kernel '%s'", kernel_filename);
@ -195,7 +196,7 @@ static uint64_t sun4u_load_kernel(const char *kernel_filename,
*initrd_size = load_image_targphys(initrd_filename,
*initrd_addr,
RAM_size - *initrd_addr);
RAM_size - *initrd_addr, NULL);
if ((int)*initrd_size < 0) {
error_report("could not load initial ram disk '%s'",
initrd_filename);
@ -437,7 +438,7 @@ static void prom_init(hwaddr addr, const char *bios_name)
ret = load_elf(filename, NULL, translate_prom_address, &addr,
NULL, NULL, NULL, NULL, ELFDATA2MSB, EM_SPARCV9, 0, 0);
if (ret < 0 || ret > PROM_SIZE_MAX) {
ret = load_image_targphys(filename, addr, PROM_SIZE_MAX);
ret = load_image_targphys(filename, addr, PROM_SIZE_MAX, NULL);
}
g_free(filename);
} else {

7
hw/usb/dev-mtp.c
View file

@ -123,11 +123,13 @@ typedef struct {
/* ----------------------------------------------------------------------- */
typedef struct MTPState MTPState;
typedef struct MTPControl MTPControl;
typedef struct MTPData MTPData;
typedef struct MTPObject MTPObject;
#define TYPE_USB_MTP "usb-mtp"
OBJECT_DECLARE_SIMPLE_TYPE(MTPState, USB_MTP)
enum {
EP_DATA_IN = 1,
EP_DATA_OUT,
@ -236,9 +238,6 @@ typedef struct {
/* string and other data follows */
} QEMU_PACKED ObjectInfo;
#define TYPE_USB_MTP "usb-mtp"
OBJECT_DECLARE_SIMPLE_TYPE(MTPState, USB_MTP)
#define QEMU_STORAGE_ID 0x00010001
#define MTP_FLAG_WRITABLE 0

7
hw/usb/dev-uas.c
View file

@ -109,10 +109,12 @@ typedef struct {
#define UAS_STREAM_BM_ATTR 4
#define UAS_MAX_STREAMS (1 << UAS_STREAM_BM_ATTR)
typedef struct UASDevice UASDevice;
typedef struct UASRequest UASRequest;
typedef struct UASStatus UASStatus;
#define TYPE_USB_UAS "usb-uas"
OBJECT_DECLARE_SIMPLE_TYPE(UASDevice, USB_UAS)
struct UASDevice {
USBDevice dev;
SCSIBus bus;
@ -133,9 +135,6 @@ struct UASDevice {
USBPacket *status3[UAS_MAX_STREAMS + 1];
};
#define TYPE_USB_UAS "usb-uas"
OBJECT_DECLARE_SIMPLE_TYPE(UASDevice, USB_UAS)
struct UASRequest {
uint16_t tag;
uint64_t lun;

3
hw/xtensa/xtfpga.c
View file

@ -381,7 +381,8 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine)
if (initrd_size < 0) {
initrd_size = load_image_targphys(initrd_filename,
cur_lowmem,
lowmem_end - cur_lowmem);
lowmem_end - cur_lowmem,
NULL);
}
if (initrd_size < 0) {
error_report("could not load initrd '%s'", initrd_filename);

1
include/hw/char/serial.h
View file

@ -77,7 +77,6 @@ struct SerialState {
QEMUTimer *modem_status_poll;
MemoryRegion io;
};
typedef struct SerialState SerialState;
extern const VMStateDescription vmstate_serial;
extern const MemoryRegionOps serial_io_ops;

1
include/hw/i386/intel_iommu.h
View file

@ -307,7 +307,6 @@ struct IntelIOMMUState {
bool buggy_eim; /* Force buggy EIM unless eim=off */
uint8_t aw_bits; /* Host/IOVA address width (in bits) */
bool dma_drain; /* Whether DMA r/w draining enabled */
bool dma_translation; /* Whether DMA translation supported */
bool pasid; /* Whether to support PASID */
bool fs1gp; /* First Stage 1-GByte Page Support */

6
include/hw/input/lasips2.h
View file

@ -32,7 +32,8 @@ struct LASIPS2PortDeviceClass {
DeviceRealize parent_realize;
};
typedef struct LASIPS2State LASIPS2State;
#define TYPE_LASIPS2 "lasips2"
OBJECT_DECLARE_SIMPLE_TYPE(LASIPS2State, LASIPS2)
struct LASIPS2Port {
DeviceState parent_obj;
@ -74,7 +75,4 @@ struct LASIPS2State {
qemu_irq irq;
};
#define TYPE_LASIPS2 "lasips2"
OBJECT_DECLARE_SIMPLE_TYPE(LASIPS2State, LASIPS2)
#endif /* HW_INPUT_LASIPS2_H */

2
include/hw/intc/loongarch_dintc.h
View file

@ -8,7 +8,7 @@
#include "qom/object.h"
#include "hw/sysbus.h"
#include "hw/loongarch/virt.h"
#include "system/memory.h"
#define NR_VECTORS 256

1
include/hw/intc/loongarch_extioi_common.h
View file

@ -10,6 +10,7 @@
#include "qom/object.h"
#include "hw/sysbus.h"
#include "hw/loongarch/virt.h"
#include "system/memory.h"
#define LS3A_INTC_IP 8
#define EXTIOI_IRQS (256)

1
include/hw/intc/loongarch_pch_msi.h
View file

@ -6,6 +6,7 @@
*/
#include "hw/sysbus.h"
#include "system/memory.h"
#define TYPE_LOONGARCH_PCH_MSI "loongarch_pch_msi"
OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHMSI, LOONGARCH_PCH_MSI)

1
include/hw/intc/loongarch_pic_common.h
View file

@ -9,6 +9,7 @@
#include "hw/loongarch/virt.h"
#include "hw/sysbus.h"
#include "system/memory.h"
#define PCH_PIC_INT_ID 0x00
#define PCH_PIC_INT_ID_VAL 0x7

1
include/hw/intc/loongson_ipi_common.h
View file

@ -11,6 +11,7 @@
#include "qom/object.h"
#include "hw/sysbus.h"
#include "exec/memattrs.h"
#include "system/memory.h"
#define IPI_MBX_NUM 4

8
include/hw/loader.h
View file

@ -1,6 +1,7 @@
#ifndef LOADER_H
#define LOADER_H
#include "hw/nvram/fw_cfg.h"
#include "qemu/typedefs.h"
/* loader.c */
/**
@ -10,7 +11,7 @@
* Returns the size of the image file on success, -1 otherwise.
* On error, errno is also set as appropriate.
*/
int64_t get_image_size(const char *filename);
int64_t get_image_size(const char *filename, Error **errp);
/**
* load_image_size: load an image file into specified buffer
* @filename: Path to the image file
@ -41,7 +42,8 @@ ssize_t load_image_size(const char *filename, void *addr, size_t size);
* Returns the size of the loaded image on success, -1 otherwise.
*/
ssize_t load_image_targphys_as(const char *filename,
hwaddr addr, uint64_t max_sz, AddressSpace *as);
hwaddr addr, uint64_t max_sz, AddressSpace *as,
Error **errp);
/**load_targphys_hex_as:
* @filename: Path to the .hex file
@ -61,7 +63,7 @@ ssize_t load_targphys_hex_as(const char *filename, hwaddr *entry,
* an AddressSpace.
*/
ssize_t load_image_targphys(const char *filename, hwaddr,
uint64_t max_sz);
uint64_t max_sz, Error **errp);
/**
* load_image_mr: load an image into a memory region

7
include/hw/misc/auxbus.h
View file

@ -29,13 +29,15 @@
#include "hw/qdev-core.h"
#include "qom/object.h"
typedef struct AUXSlave AUXSlave;
typedef enum AUXCommand AUXCommand;
typedef enum AUXReply AUXReply;
#define TYPE_AUXTOI2C "aux-to-i2c-bridge"
OBJECT_DECLARE_SIMPLE_TYPE(AUXTOI2CState, AUXTOI2C)
#define TYPE_AUX_SLAVE "aux-slave"
OBJECT_DECLARE_SIMPLE_TYPE(AUXSlave, AUX_SLAVE)
enum AUXCommand {
WRITE_I2C = 0,
READ_I2C = 1,
@ -73,9 +75,6 @@ struct AUXBus {
AddressSpace aux_addr_space;
};
#define TYPE_AUX_SLAVE "aux-slave"
OBJECT_DECLARE_SIMPLE_TYPE(AUXSlave, AUX_SLAVE)
struct AUXSlave {
/* < private > */
DeviceState parent_obj;

7
include/hw/misc/bcm2835_mphi.h
View file

@ -23,7 +23,8 @@
#define MPHI_MMIO_SIZE 0x1000
typedef struct BCM2835MphiState BCM2835MphiState;
#define TYPE_BCM2835_MPHI "bcm2835-mphi"
OBJECT_DECLARE_SIMPLE_TYPE(BCM2835MphiState, BCM2835_MPHI)
struct BCM2835MphiState {
SysBusDevice parent_obj;
@ -37,8 +38,4 @@ struct BCM2835MphiState {
uint32_t swirq;
};
#define TYPE_BCM2835_MPHI "bcm2835-mphi"
OBJECT_DECLARE_SIMPLE_TYPE(BCM2835MphiState, BCM2835_MPHI)
#endif

7
include/hw/misc/npcm7xx_pwm.h
View file

@ -35,8 +35,8 @@
* value of 100,000 the duty cycle for that PWM is 10%.
*/
#define NPCM7XX_PWM_MAX_DUTY 1000000
typedef struct NPCM7xxPWMState NPCM7xxPWMState;
#define TYPE_NPCM7XX_PWM "npcm7xx-pwm"
OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxPWMState, NPCM7XX_PWM)
/**
* struct NPCM7xxPWM - The state of a single PWM channel.
@ -100,7 +100,4 @@ struct NPCM7xxPWMState {
uint32_t piir;
};
#define TYPE_NPCM7XX_PWM "npcm7xx-pwm"
OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxPWMState, NPCM7XX_PWM)
#endif /* NPCM7XX_PWM_H */

6
include/hw/pci-host/pnv_phb3.h
View file

@ -14,7 +14,8 @@
#include "qom/object.h"
#include "hw/pci-host/pnv_phb.h"
typedef struct PnvPHB3 PnvPHB3;
#define TYPE_PNV_PHB3 "pnv-phb3"
OBJECT_DECLARE_SIMPLE_TYPE(PnvPHB3, PNV_PHB3)
/*
* PHB3 XICS Source for MSIs
@ -115,9 +116,6 @@ OBJECT_DECLARE_SIMPLE_TYPE(PnvPHB3RootBus, PNV_PHB3_ROOT_BUS)
/*
* PHB3 PCIe Host Bridge for PowerNV machines (POWER8)
*/
#define TYPE_PNV_PHB3 "pnv-phb3"
OBJECT_DECLARE_SIMPLE_TYPE(PnvPHB3, PNV_PHB3)
#define PNV_PHB3_NUM_M64 16
#define PNV_PHB3_NUM_REGS (0x1000 >> 3)
#define PNV_PHB3_NUM_LSI 8

8
include/hw/pci-host/pnv_phb4.h
View file

@ -17,8 +17,11 @@
#include "hw/ppc/xive.h"
#include "qom/object.h"
#define TYPE_PNV_PHB4 "pnv-phb4"
OBJECT_DECLARE_SIMPLE_TYPE(PnvPHB4, PNV_PHB4)
typedef struct PnvPhb4PecStack PnvPhb4PecStack;
typedef struct PnvPHB4 PnvPHB4;
/*
* We have one such address space wrapper per possible device under
@ -59,9 +62,6 @@ OBJECT_DECLARE_SIMPLE_TYPE(PnvPHB4RootBus, PNV_PHB4_ROOT_BUS)
/*
* PHB4 PCIe Host Bridge for PowerNV machines (POWER9)
*/
#define TYPE_PNV_PHB4 "pnv-phb4"
OBJECT_DECLARE_SIMPLE_TYPE(PnvPHB4, PNV_PHB4)
#define PNV_PHB4_MAX_LSIs 8
#define PNV_PHB4_MAX_INTs 4096
#define PNV_PHB4_MAX_MIST (PNV_PHB4_MAX_INTs >> 2)

7
include/hw/ppc/mac_dbdma.h
View file

@ -164,7 +164,9 @@ struct DBDMAState {
DBDMA_channel channels[DBDMA_CHANNELS];
QEMUBH *bh;
};
typedef struct DBDMAState DBDMAState;
#define TYPE_MAC_DBDMA "mac-dbdma"
OBJECT_DECLARE_SIMPLE_TYPE(DBDMAState, MAC_DBDMA)
/* Externally callable functions */
@ -173,7 +175,4 @@ void DBDMA_register_channel(void *dbdma, int nchan, qemu_irq irq,
void *opaque);
void DBDMA_kick(DBDMAState *dbdma);
#define TYPE_MAC_DBDMA "mac-dbdma"
OBJECT_DECLARE_SIMPLE_TYPE(DBDMAState, MAC_DBDMA)
#endif

3
include/hw/qdev-core.h
View file

@ -725,7 +725,8 @@ void qdev_connect_gpio_out_named(DeviceState *dev, const char *name, int n,
*
* Return: qemu_irq associated with GPIO or NULL if un-wired.
*/
qemu_irq qdev_get_gpio_out_connector(DeviceState *dev, const char *name, int n);
qemu_irq qdev_get_gpio_out_connector(const DeviceState *dev,
const char *name, int n);
/**
* qdev_intercept_gpio_out: Intercept an existing GPIO connection

18
include/hw/riscv/boot.h
View file

@ -43,18 +43,18 @@ bool riscv_is_32bit(RISCVHartArrayState *harts);
char *riscv_plic_hart_config_string(int hart_count);
void riscv_boot_info_init(RISCVBootInfo *info, RISCVHartArrayState *harts);
target_ulong riscv_calc_kernel_start_addr(RISCVBootInfo *info,
target_ulong firmware_end_addr);
target_ulong riscv_find_and_load_firmware(MachineState *machine,
const char *default_machine_firmware,
hwaddr *firmware_load_addr,
symbol_fn_t sym_cb);
hwaddr riscv_calc_kernel_start_addr(RISCVBootInfo *info,
hwaddr firmware_end_addr);
hwaddr riscv_find_and_load_firmware(MachineState *machine,
const char *default_machine_firmware,
hwaddr *firmware_load_addr,
symbol_fn_t sym_cb);
const char *riscv_default_firmware_name(RISCVHartArrayState *harts);
char *riscv_find_firmware(const char *firmware_filename,
const char *default_machine_firmware);
target_ulong riscv_load_firmware(const char *firmware_filename,
hwaddr *firmware_load_addr,
symbol_fn_t sym_cb);
hwaddr riscv_load_firmware(const char *firmware_filename,
hwaddr *firmware_load_addr,
symbol_fn_t sym_cb);
void riscv_load_kernel(MachineState *machine,
RISCVBootInfo *info,
target_ulong kernel_start_addr,

14
include/hw/riscv/boot_opensbi.h
View file

@ -29,17 +29,17 @@ enum sbi_scratch_options {
};
/** Representation dynamic info passed by previous booting stage */
struct fw_dynamic_info {
struct fw_dynamic_info64 {
/** Info magic */
target_long magic;
int64_t magic;
/** Info version */
target_long version;
int64_t version;
/** Next booting stage address */
target_long next_addr;
int64_t next_addr;
/** Next booting stage mode */
target_long next_mode;
int64_t next_mode;
/** Options for OpenSBI library */
target_long options;
int64_t options;
/**
* Preferred boot HART id
*
@ -55,7 +55,7 @@ struct fw_dynamic_info {
* stage can set it to -1UL which will force the FW_DYNAMIC firmware
* to use the relocation lottery mechanism.
*/
target_long boot_hart;
int64_t boot_hart;
};
/** Representation dynamic info passed by previous booting stage */

3
include/hw/riscv/iommu.h
View file

@ -24,18 +24,15 @@
#define TYPE_RISCV_IOMMU "riscv-iommu"
OBJECT_DECLARE_SIMPLE_TYPE(RISCVIOMMUState, RISCV_IOMMU)
typedef struct RISCVIOMMUState RISCVIOMMUState;
#define TYPE_RISCV_IOMMU_MEMORY_REGION "riscv-iommu-mr"
typedef struct RISCVIOMMUSpace RISCVIOMMUSpace;
#define TYPE_RISCV_IOMMU_PCI "riscv-iommu-pci"
OBJECT_DECLARE_SIMPLE_TYPE(RISCVIOMMUStatePci, RISCV_IOMMU_PCI)
typedef struct RISCVIOMMUStatePci RISCVIOMMUStatePci;
#define TYPE_RISCV_IOMMU_SYS "riscv-iommu-device"
OBJECT_DECLARE_SIMPLE_TYPE(RISCVIOMMUStateSys, RISCV_IOMMU_SYS)
typedef struct RISCVIOMMUStateSys RISCVIOMMUStateSys;
#define FDT_IRQ_TYPE_EDGE_LOW 1

7
include/hw/scsi/scsi.h
View file

@ -10,7 +10,9 @@
#define MAX_SCSI_DEVS 255
typedef struct SCSIBus SCSIBus;
#define TYPE_SCSI_BUS "SCSI"
OBJECT_DECLARE_SIMPLE_TYPE(SCSIBus, SCSI_BUS)
typedef struct SCSIBusInfo SCSIBusInfo;
typedef struct SCSIDevice SCSIDevice;
typedef struct SCSIRequest SCSIRequest;
@ -151,9 +153,6 @@ struct SCSIBusInfo {
void (*drained_end)(SCSIBus *bus);
};
#define TYPE_SCSI_BUS "SCSI"
OBJECT_DECLARE_SIMPLE_TYPE(SCSIBus, SCSI_BUS)
struct SCSIBus {
BusState qbus;
int busnr;

10
include/hw/sysbus.h
View file

@ -70,17 +70,17 @@ struct SysBusDevice {
typedef void FindSysbusDeviceFunc(SysBusDevice *sbdev, void *opaque);
void sysbus_init_mmio(SysBusDevice *dev, MemoryRegion *memory);
MemoryRegion *sysbus_mmio_get_region(SysBusDevice *dev, int n);
MemoryRegion *sysbus_mmio_get_region(const SysBusDevice *dev, int n);
void sysbus_init_irq(SysBusDevice *dev, qemu_irq *p);
void sysbus_pass_irq(SysBusDevice *dev, SysBusDevice *target);
void sysbus_init_ioports(SysBusDevice *dev, uint32_t ioport, uint32_t size);
bool sysbus_has_irq(SysBusDevice *dev, int n);
bool sysbus_has_mmio(SysBusDevice *dev, unsigned int n);
bool sysbus_has_irq(const SysBusDevice *dev, int n);
bool sysbus_has_mmio(const SysBusDevice *dev, unsigned int n);
void sysbus_connect_irq(SysBusDevice *dev, int n, qemu_irq irq);
bool sysbus_is_irq_connected(SysBusDevice *dev, int n);
qemu_irq sysbus_get_connected_irq(SysBusDevice *dev, int n);
bool sysbus_is_irq_connected(const SysBusDevice *dev, int n);
qemu_irq sysbus_get_connected_irq(const SysBusDevice *dev, int n);
void sysbus_mmio_map(SysBusDevice *dev, int n, hwaddr addr);
int sysbus_mmio_map_name(SysBusDevice *dev, const char*name, hwaddr addr);
void sysbus_mmio_map_overlap(SysBusDevice *dev, int n, hwaddr addr,

1
include/hw/uefi/var-service.h
View file

@ -9,6 +9,7 @@
#include "qemu/uuid.h"
#include "qemu/queue.h"
#include "system/memory.h"
#include "hw/uefi/var-service-edk2.h"
#define MAX_BUFFER_SIZE (64 * 1024)

5
include/hw/vfio/vfio-container-legacy.h
View file

@ -12,7 +12,8 @@
#include "hw/vfio/vfio-container.h"
#include "hw/vfio/vfio-cpr.h"
typedef struct VFIOLegacyContainer VFIOLegacyContainer;
OBJECT_DECLARE_SIMPLE_TYPE(VFIOLegacyContainer, VFIO_IOMMU_LEGACY);
typedef struct VFIODevice VFIODevice;
typedef struct VFIOGroup {
@ -35,6 +36,4 @@ struct VFIOLegacyContainer {
VFIOContainerCPR cpr;
};
OBJECT_DECLARE_SIMPLE_TYPE(VFIOLegacyContainer, VFIO_IOMMU_LEGACY);
#endif /* HW_VFIO_CONTAINER_LEGACY_H */

2
include/hw/virtio/virtio-net.h
View file

@ -202,7 +202,7 @@ struct VirtIONet {
uint8_t uni_overflow;
uint8_t *macs;
} mac_table;
uint32_t *vlans;
uint32_t vlans[MAX_VLAN];
virtio_net_conf net_conf;
NICConf nic_conf;
DeviceState *qdev;

5
include/hw/virtio/virtio-serial.h
View file

@ -29,7 +29,8 @@ struct virtio_serial_conf {
OBJECT_DECLARE_TYPE(VirtIOSerialPort, VirtIOSerialPortClass,
VIRTIO_SERIAL_PORT)
typedef struct VirtIOSerial VirtIOSerial;
#define TYPE_VIRTIO_SERIAL "virtio-serial-device"
OBJECT_DECLARE_SIMPLE_TYPE(VirtIOSerial, VIRTIO_SERIAL)
#define TYPE_VIRTIO_SERIAL_BUS "virtio-serial-bus"
OBJECT_DECLARE_SIMPLE_TYPE(VirtIOSerialBus, VIRTIO_SERIAL_BUS)
@ -221,7 +222,5 @@ size_t virtio_serial_guest_ready(VirtIOSerialPort *port);
*/
void virtio_serial_throttle_port(VirtIOSerialPort *port, bool throttle);
#define TYPE_VIRTIO_SERIAL "virtio-serial-device"
OBJECT_DECLARE_SIMPLE_TYPE(VirtIOSerial, VIRTIO_SERIAL)
#endif

9
include/migration/vmstate.h
View file

@ -727,15 +727,6 @@ extern const VMStateInfo vmstate_info_qlist;
.offset = offsetof(_state, _field), \
}
#define VMSTATE_BUFFER_POINTER_UNSAFE(_field, _state, _version, _size) { \
.name = (stringify(_field)), \
.version_id = (_version), \
.size = (_size), \
.info = &vmstate_info_buffer, \
.flags = VMS_BUFFER|VMS_POINTER, \
.offset = offsetof(_state, _field), \
}
/* Allocate a temporary of type 'tmp_type', set tmp->parent to _state
* and execute the vmsd on the temporary. Note that we're working with
* the whole of _state here, not a field within it.

7
include/net/can_emu.h
View file

@ -85,7 +85,9 @@ typedef struct qemu_can_filter {
#define QEMU_CAN_INV_FILTER 0x20000000U
typedef struct CanBusClientState CanBusClientState;
typedef struct CanBusState CanBusState;
#define TYPE_CAN_BUS "can-bus"
OBJECT_DECLARE_SIMPLE_TYPE(CanBusState, CAN_BUS)
typedef struct CanBusClientInfo {
bool (*can_receive)(CanBusClientState *);
@ -105,9 +107,6 @@ struct CanBusClientState {
bool fd_mode;
};
#define TYPE_CAN_BUS "can-bus"
OBJECT_DECLARE_SIMPLE_TYPE(CanBusState, CAN_BUS)
int can_bus_filter_match(struct qemu_can_filter *filter, qemu_canid_t can_id);
int can_bus_insert_client(CanBusState *bus, CanBusClientState *client);

2
system/device_tree.c
View file

@ -83,7 +83,7 @@ void *load_device_tree(const char *filename_path, int *sizep)
void *fdt = NULL;
*sizep = 0;
dt_size = get_image_size(filename_path);
dt_size = get_image_size(filename_path, NULL);
if (dt_size < 0) {
error_report("Unable to get size of device tree file '%s'",
filename_path);

7
target/hppa/fpu_helper.c
View file

@ -94,7 +94,8 @@ static void update_fr0_op(CPUHPPAState *env, uintptr_t ra)
{
uint32_t soft_exp = get_float_exception_flags(&env->fp_status);
uint32_t hard_exp = 0;
uint32_t shadow = env->fr0_shadow & 0x3ffffff;
uint32_t shadow = env->fr0_shadow;
uint32_t to_flag = 0;
uint32_t fr1 = 0;
if (likely(soft_exp == 0)) {
@ -122,6 +123,10 @@ static void update_fr0_op(CPUHPPAState *env, uintptr_t ra)
fr1 |= hard_exp << (R_FPSR_FLAGS_SHIFT - R_FPSR_ENABLES_SHIFT);
}
}
/* Set the Flag bits for every exception that was not enabled */
to_flag = hard_exp & ~shadow;
shadow |= to_flag << (R_FPSR_FLAGS_SHIFT - R_FPSR_ENABLES_SHIFT);
env->fr0_shadow = shadow;
env->fr[0] = (uint64_t)shadow << 32 | fr1;