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target/arm/hvf: Hardcode Apple MIDR

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Hardcode MIDR because Apple deliberately doesn't expose
a divergent MIDR across systems.

Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Mohamed Mediouni 2025-10-28 06:41:50 +01:00 • committed by Peter Maydell
parent feee55d36a
commit bddf353ab1
1 changed files with 12 additions and 1 deletions
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13
target/arm/hvf/hvf.c
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@ -763,6 +763,7 @@ static bool hvf_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
hv_vcpu_t fd;
hv_return_t r = HV_SUCCESS;
hv_vcpu_exit_t *exit;
uint64_t t;
int i;
ahcf->dtb_compatible = "arm,armv8";
@ -781,9 +782,19 @@ static bool hvf_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
for (i = 0; i < ARRAY_SIZE(regs); i++) {
r |= hv_vcpu_get_sys_reg(fd, regs[i].reg, regs[i].val);
}
r |= hv_vcpu_get_sys_reg(fd, HV_SYS_REG_MIDR_EL1, &ahcf->midr);
r |= hv_vcpu_destroy(fd);
/*
* Hardcode MIDR because Apple deliberately doesn't expose a divergent
* MIDR across systems.
*/
t = FIELD_DP64(0, MIDR_EL1, IMPLEMENTER, 0x61); /* Apple */
t = FIELD_DP64(t, MIDR_EL1, ARCHITECTURE, 0xf); /* v7 or later */
t = FIELD_DP64(t, MIDR_EL1, PARTNUM, 0);
t = FIELD_DP64(t, MIDR_EL1, VARIANT, 0);
t = FIELD_DP64(t, MIDR_EL1, REVISION, 0);
ahcf->midr = t;
clamp_id_aa64mmfr0_parange_to_ipa_size(&host_isar);
/*