system/physmem: Pass address space argument to cpu_flush_icache_range()

Rename cpu_flush_icache_range() as address_space_flush_icache_range(),
passing an address space by argument. The single caller, rom_reset(),
already operates on an address space. Use it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20251002084203.63899-7-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2025-09-29 15:40:33 +02:00
parent ec1eb357cb
commit c2cac27dba
4 changed files with 5 additions and 6 deletions

View file

@ -1242,7 +1242,7 @@ static void rom_reset(void *unused)
* that the instruction cache for that new region is clear, so that the
* CPU definitely fetches its instructions from the just written data.
*/
cpu_flush_icache_range(rom->addr, rom->datasize);
address_space_flush_icache_range(rom->as, rom->addr, rom->datasize);
trace_loader_write_rom(rom->name, rom->addr, rom->datasize, rom->isrom);
}

View file

@ -156,8 +156,6 @@ void cpu_physical_memory_unmap(void *buffer, hwaddr len,
*/
void qemu_flush_coalesced_mmio_buffer(void);
void cpu_flush_icache_range(hwaddr start, hwaddr len);
typedef int (RAMBlockIterFunc)(RAMBlock *rb, void *opaque);
int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque);

View file

@ -2995,6 +2995,8 @@ void address_space_cache_invalidate(MemoryRegionCache *cache,
*/
void address_space_cache_destroy(MemoryRegionCache *cache);
void address_space_flush_icache_range(AddressSpace *as, hwaddr addr, hwaddr len);
/* address_space_get_iotlb_entry: translate an address into an IOTLB
* entry. Should be called from an RCU critical section.
*/

View file

@ -3212,7 +3212,7 @@ MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr,
return MEMTX_OK;
}
void cpu_flush_icache_range(hwaddr addr, hwaddr len)
void address_space_flush_icache_range(AddressSpace *as, hwaddr addr, hwaddr len)
{
/*
* This function should do the same thing as an icache flush that was
@ -3227,8 +3227,7 @@ void cpu_flush_icache_range(hwaddr addr, hwaddr len)
RCU_READ_LOCK_GUARD();
while (len > 0) {
hwaddr addr1, l = len;
MemoryRegion *mr = address_space_translate(&address_space_memory,
addr, &addr1, &l, true,
MemoryRegion *mr = address_space_translate(as, addr, &addr1, &l, true,
MEMTXATTRS_UNSPECIFIED);
if (!memory_region_supports_direct_access(mr)) {