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target/mips: call plugin trap callbacks

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We recently introduced API for registering callbacks for trap related
events as well as the corresponding hook functions. Due to differences
between architectures, the latter need to be called from target specific
code.

This change places hooks for MIPS targets. We consider the exceptions
NMI and EXT_INTERRUPT to be asynchronous interrupts rather than
exceptions.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Julian Ganz <neither@nut.email>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251027110344.2289945-20-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
This commit is contained in:
Julian Ganz 2025-10-27 11:03:26 +00:00 • committed by Alex Bennée
parent cd6ee56222
commit c3d7005a6c
1 changed files with 11 additions and 0 deletions
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11
target/mips/tcg/system/tlb_helper.c
View file

@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
#include "qemu/bitops.h"
#include "qemu/plugin.h"
#include "cpu.h"
#include "internal.h"
@ -1034,6 +1035,7 @@ void mips_cpu_do_interrupt(CPUState *cs)
bool update_badinstr = 0;
target_ulong offset;
int cause = -1;
uint64_t last_pc = env->active_tc.PC;
if (qemu_loglevel_mask(CPU_LOG_INT)
&& cs->exception_index != EXCP_EXT_INTERRUPT) {
@ -1052,6 +1054,7 @@ void mips_cpu_do_interrupt(CPUState *cs)
cs->exception_index = EXCP_NONE;
mips_semihosting(env);
env->active_tc.PC += env->error_code;
qemu_plugin_vcpu_hostcall_cb(cs, last_pc);
return;
case EXCP_DSS:
env->CP0_Debug |= 1 << CP0DB_DSS;
@ -1336,6 +1339,14 @@ void mips_cpu_do_interrupt(CPUState *cs)
env->CP0_Status, env->CP0_Cause, env->CP0_BadVAddr,
env->CP0_DEPC);
}
switch (cs->exception_index) {
case EXCP_NMI:
case EXCP_EXT_INTERRUPT:
qemu_plugin_vcpu_interrupt_cb(cs, last_pc);
break;
default:
qemu_plugin_vcpu_exception_cb(cs, last_pc);
}
cs->exception_index = EXCP_NONE;
}