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target/arm: Fix VSTR helper store alignment checks

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This patch adds alignment checks in the store operations in the VSTR
instruction.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1154
Signed-off-by: William Kosasih <kosasihwilliam4@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250703085604.154449-6-kosasihwilliam4@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
William Kosasih 2025-07-03 18:25:58 +09:30 • committed by Peter Maydell
parent 56249f3e6c
commit c8bde49179
1 changed files with 10 additions and 8 deletions
Download patch file Download diff file Expand all files Collapse all files

18
target/arm/tcg/mve_helper.c
View file

@ -172,15 +172,17 @@ static void mve_advance_vpt(CPUARMState *env)
mve_advance_vpt(env); \
}
#define DO_VSTR(OP, MSIZE, STTYPE, ESIZE, TYPE) \
#define DO_VSTR(OP, MFLAG, MSIZE, STTYPE, ESIZE, TYPE) \
void HELPER(mve_##OP)(CPUARMState *env, void *vd, uint32_t addr) \
{ \
TYPE *d = vd; \
uint16_t mask = mve_element_mask(env); \
unsigned b, e; \
int mmu_idx = arm_to_core_mmu_idx(arm_mmu_idx(env)); \
MemOpIdx oi = make_memop_idx(MFLAG | MO_ALIGN, mmu_idx); \
for (b = 0, e = 0; b < 16; b += ESIZE, e++) { \
if (mask & (1 << b)) { \
cpu_##STTYPE##_data_ra(env, addr, d[H##ESIZE(e)], GETPC()); \
cpu_##STTYPE##_mmu(env, addr, d[H##ESIZE(e)], oi, GETPC()); \
} \
addr += MSIZE; \
} \
@ -191,9 +193,9 @@ DO_VLDR(vldrb, MO_UB, 1, uint8_t, ldb, 1, uint8_t)
DO_VLDR(vldrh, MO_TEUW, 2, uint16_t, ldw, 2, uint16_t)
DO_VLDR(vldrw, MO_TEUL, 4, uint32_t, ldl, 4, uint32_t)
DO_VSTR(vstrb, 1, stb, 1, uint8_t)
DO_VSTR(vstrh, 2, stw, 2, uint16_t)
DO_VSTR(vstrw, 4, stl, 4, uint32_t)
DO_VSTR(vstrb, MO_UB, 1, stb, 1, uint8_t)
DO_VSTR(vstrh, MO_TEUW, 2, stw, 2, uint16_t)
DO_VSTR(vstrw, MO_TEUL, 4, stl, 4, uint32_t)
DO_VLDR(vldrb_sh, MO_SB, 1, int8_t, ldb, 2, int16_t)
DO_VLDR(vldrb_sw, MO_SB, 1, int8_t, ldb, 4, int32_t)
@ -202,9 +204,9 @@ DO_VLDR(vldrb_uw, MO_UB, 1, uint8_t, ldb, 4, uint32_t)
DO_VLDR(vldrh_sw, MO_TESW, 2, int16_t, ldw, 4, int32_t)
DO_VLDR(vldrh_uw, MO_TEUW, 2, uint16_t, ldw, 4, uint32_t)
DO_VSTR(vstrb_h, 1, stb, 2, int16_t)
DO_VSTR(vstrb_w, 1, stb, 4, int32_t)
DO_VSTR(vstrh_w, 2, stw, 4, int32_t)
DO_VSTR(vstrb_h, MO_UB, 1, stb, 2, int16_t)
DO_VSTR(vstrb_w, MO_UB, 1, stb, 4, int32_t)
DO_VSTR(vstrh_w, MO_TEUW, 2, stw, 4, int32_t)
#undef DO_VLDR
#undef DO_VSTR