target/arm: Implement dirtybit check for PIE

Both S1PIE and S2PIE have a bit to make software tracking
of dirty pages easier.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20251008215613.300150-13-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2025-10-08 14:55:12 -07:00 committed by Peter Maydell
parent 9190d68e83
commit cfd363ca4c
3 changed files with 26 additions and 3 deletions

View file

@ -752,6 +752,7 @@ struct ARMMMUFaultInfo {
bool s1ptw;
bool s1ns;
bool ea;
bool dirtybit; /* FEAT_S1PIE, FEAT_S2PIE */
};
/**

View file

@ -2343,6 +2343,22 @@ static bool get_phys_addr_lpae(CPUARMState *env, S1Translate *ptw,
goto do_fault;
}
/* S1PIE and S2PIE both have a bit for software dirty page tracking. */
if (access_type == MMU_DATA_STORE && param.pie) {
/*
* For S1PIE, bit 7 is nDirty and both HA and HD are checked.
* For S2PIE, bit 7 is Dirty and only HD is checked.
*/
bool bit7 = extract64(attrs, 7, 1);
if (regime_is_stage2(mmu_idx)
? !bit7 && !param.hd
: bit7 && !(param.ha && param.hd)) {
fi->type = ARMFault_Permission;
fi->dirtybit = true;
goto do_fault;
}
}
/* If FEAT_HAFDBS has made changes, update the PTE. */
if (new_descriptor != descriptor) {
new_descriptor = arm_casq_ptw(env, descriptor, new_descriptor, ptw, fi);

View file

@ -24,13 +24,13 @@ bool arm_s1_regime_using_lpae_format(CPUARMState *env, ARMMMUIdx mmu_idx)
return regime_using_lpae_format(env, mmu_idx);
}
static inline uint32_t merge_syn_data_abort(uint32_t template_syn,
static inline uint64_t merge_syn_data_abort(uint32_t template_syn,
ARMMMUFaultInfo *fi,
unsigned int target_el,
bool same_el, bool is_write,
int fsc)
{
uint32_t syn;
uint64_t syn;
/*
* ISV is only set for stage-2 data aborts routed to EL2 and
@ -75,6 +75,10 @@ static inline uint32_t merge_syn_data_abort(uint32_t template_syn,
/* Merge the runtime syndrome with the template syndrome. */
syn |= template_syn;
}
/* Form ISS2 at the top of the syndrome. */
syn |= (uint64_t)fi->dirtybit << 37;
return syn;
}
@ -176,7 +180,9 @@ void arm_deliver_fault(ARMCPU *cpu, vaddr addr,
int target_el = exception_target_el(env);
int current_el = arm_current_el(env);
bool same_el;
uint32_t syn, exc, fsr, fsc;
uint32_t exc, fsr, fsc;
uint64_t syn;
/*
* We know this must be a data or insn abort, and that
* env->exception.syndrome contains the template syndrome set