Misc HW & accelerators patch queue
- Use async exit in debugexit model (Thomas) - Fixed bug reading xlnx_dpdma descriptor (Peter) - Initialise plugin state before vCPU/thread creation (Alex) - Few sprintf() calls removed (Richard & Philippe) - Few deprecated QMP events removed (Philippe) - Housekeeping in Xen (Edgar & Philippe) - Split USB HID/HUB & update MAINTAINERS (Gerd) -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmZe5FMACgkQ4+MsLN6t wN5QghAAl1j5++wKcJaWoribnhxYctcBPhg3eEAwg2qVRbx5tz7HwYw8jYp+qB47 abAtE3WOUg+Z+NaBi0bTj8Ns0wrBTZy0toJrQb+k5M9CzJJIFSURcFV2J40ORld8 VHNKmzNN+ZscxAW3fSFruJlGLaskwB0bk9VF0cYSip2Y+xjbPlJZ8dlffX/HAvwB Ul4gJW04FT3k6KoeJASNiAMm7mPW9iP4kY7rKz+j+NWydAfl8yPzxFwW6J6U2npi Hvmy1519W74cftZSqxkBETtbw1YVKyT6QEA9HjJOjc05E6UYnxoR13taEzLNaDHA B7Xhp6IUYZGRD1bt85WZCP5t5yUINLgmzJU2OQnv9dfU1HdSkk0FQiBr0Iif3tCI /2cQumkGI4etXX77oVIwkioo0ZTvEggDNsN1eKHIY7yIE5etqXduPwnTfwHFI3lv Nj18MGF0cftbYDEbUwNUnN5U6+msW3Si6hQaUxpUWXy7Idkl9pBiWjv1OpBg9PqX YIuw9/USs7i8yZkh0/q8UcZxdzB3LF+LxjVVVoTVD6t+KbRSkJSOJm7hfqCKuXbC lEmtLt+aH/pdZ2Banug1Ayen2L7s0czRHQWC++DfNQve1xEUkSFp5VE0mxsr+6Rp 18/dSGo++Nh52jUt2QFEv9LyAAQCKxg72I9DW9sB7uC004+ub84= =xcID -----END PGP SIGNATURE----- Merge tag 'hw-misc-accel-20240604' of https://github.com/philmd/qemu into staging Misc HW & accelerators patch queue - Use async exit in debugexit model (Thomas) - Fixed bug reading xlnx_dpdma descriptor (Peter) - Initialise plugin state before vCPU/thread creation (Alex) - Few sprintf() calls removed (Richard & Philippe) - Few deprecated QMP events removed (Philippe) - Housekeeping in Xen (Edgar & Philippe) - Split USB HID/HUB & update MAINTAINERS (Gerd) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmZe5FMACgkQ4+MsLN6t # wN5QghAAl1j5++wKcJaWoribnhxYctcBPhg3eEAwg2qVRbx5tz7HwYw8jYp+qB47 # abAtE3WOUg+Z+NaBi0bTj8Ns0wrBTZy0toJrQb+k5M9CzJJIFSURcFV2J40ORld8 # VHNKmzNN+ZscxAW3fSFruJlGLaskwB0bk9VF0cYSip2Y+xjbPlJZ8dlffX/HAvwB # Ul4gJW04FT3k6KoeJASNiAMm7mPW9iP4kY7rKz+j+NWydAfl8yPzxFwW6J6U2npi # Hvmy1519W74cftZSqxkBETtbw1YVKyT6QEA9HjJOjc05E6UYnxoR13taEzLNaDHA # B7Xhp6IUYZGRD1bt85WZCP5t5yUINLgmzJU2OQnv9dfU1HdSkk0FQiBr0Iif3tCI # /2cQumkGI4etXX77oVIwkioo0ZTvEggDNsN1eKHIY7yIE5etqXduPwnTfwHFI3lv # Nj18MGF0cftbYDEbUwNUnN5U6+msW3Si6hQaUxpUWXy7Idkl9pBiWjv1OpBg9PqX # YIuw9/USs7i8yZkh0/q8UcZxdzB3LF+LxjVVVoTVD6t+KbRSkJSOJm7hfqCKuXbC # lEmtLt+aH/pdZ2Banug1Ayen2L7s0czRHQWC++DfNQve1xEUkSFp5VE0mxsr+6Rp # 18/dSGo++Nh52jUt2QFEv9LyAAQCKxg72I9DW9sB7uC004+ub84= # =xcID # -----END PGP SIGNATURE----- # gpg: Signature made Tue 04 Jun 2024 04:54:27 AM CDT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] * tag 'hw-misc-accel-20240604' of https://github.com/philmd/qemu: (32 commits) usb: add config options for the hub and hid devices qga: Remove deprecated 'blacklist' argument / config key trace: Remove deprecated 'vcpu' field from QMP trace events hw/acpi: Remove the deprecated QAPI MEM_UNPLUG_ERROR event hw/dma/xlnx_dpdma: Read descriptor into buffer, not into pointer-to-buffer hw/misc/debugexit: use runstate API instead of plain exit() hw/xen: Register framebuffer backend via xen_backend_init() hw/xen: Make XenDevOps structures const hw/xen: Constify xenstore_be::XenDevOps hw/xen: Constify XenLegacyDevice::XenDevOps physmem: Replace check for RAMBlock offset 0 with xen_mr_is_memory physmem: Always pass offset + addr to xen_map_cache xen: Add xen_mr_is_memory() core/cpu-common: initialise plugin state before thread creation plugins: remove special casing for cpu->realized cpu-target: don't set cpu->thread_id to bogus value cpu: move Qemu[Thread|Cond] setup into common code hw/core: expand on the alignment of CPUState accel/kvm: Fix two lines with hard-coded tabs accel/tcg: Move common declarations to 'internal-common.h' ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
commit
d16cab541a
53 changed files with 216 additions and 265 deletions
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@ -1000,7 +1000,7 @@ print_indexed (int basereg,
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/* Generate the text for the index register.
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Where this will be output is not yet determined. */
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sprintf (buf, "%s:%c%s",
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snprintf(buf, sizeof(buf), "%s:%c%s",
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reg_names[(word >> 12) & 0xf],
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(word & 0x800) ? 'l' : 'w',
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scales[(word >> 9) & 3]);
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@ -600,7 +600,8 @@ static char *
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get_field (long instr, long mask, unsigned short low)
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{
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char tmpstr[25];
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sprintf(tmpstr, "%s%d", register_prefix, (int)((instr & mask) >> low));
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snprintf(tmpstr, sizeof(tmpstr), "%s%d", register_prefix,
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(int)((instr & mask) >> low));
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return(strdup(tmpstr));
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}
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@ -608,7 +609,8 @@ static char *
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get_field_imm (long instr)
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{
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char tmpstr[25];
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sprintf(tmpstr, "%d", (short)((instr & IMM_MASK) >> IMM_LOW));
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snprintf(tmpstr, sizeof(tmpstr), "%d",
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(short)((instr & IMM_MASK) >> IMM_LOW));
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return(strdup(tmpstr));
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}
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@ -616,7 +618,8 @@ static char *
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get_field_imm5 (long instr)
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{
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char tmpstr[25];
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sprintf(tmpstr, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW));
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snprintf(tmpstr, sizeof(tmpstr), "%d",
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(short)((instr & IMM5_MASK) >> IMM_LOW));
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return(strdup(tmpstr));
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}
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@ -624,7 +627,8 @@ static char *
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get_field_rfsl (long instr)
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{
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char tmpstr[25];
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sprintf(tmpstr, "%s%d", fsl_register_prefix, (short)((instr & RFSL_MASK) >> IMM_LOW));
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snprintf(tmpstr, sizeof(tmpstr), "%s%d", fsl_register_prefix,
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(short)((instr & RFSL_MASK) >> IMM_LOW));
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return(strdup(tmpstr));
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}
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@ -632,7 +636,8 @@ static char *
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get_field_imm15 (long instr)
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{
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char tmpstr[25];
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sprintf(tmpstr, "%d", (short)((instr & IMM15_MASK) >> IMM_LOW));
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snprintf(tmpstr, sizeof(tmpstr), "%d",
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(short)((instr & IMM15_MASK) >> IMM_LOW));
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return(strdup(tmpstr));
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}
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@ -641,7 +646,8 @@ static char *
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get_field_unsigned_imm (long instr)
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{
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char tmpstr[25];
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sprintf(tmpstr, "%d", (int)((instr & IMM_MASK) >> IMM_LOW));
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snprintf(tmpstr, sizeof(tmpstr), "%d",
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(int)((instr & IMM_MASK) >> IMM_LOW));
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return(strdup(tmpstr));
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}
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#endif
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@ -653,7 +659,8 @@ get_field_unsigned_imm (long instr)
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{
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char tmpstr[25];
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sprintf(tmpstr, "%s%s", register_prefix, (((instr & IMM_MASK) >> IMM_LOW) & REG_MSR_MASK) == 0 ? "pc" : "msr");
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snprintf(tmpstr, sizeof(tmpstr), "%s%s", register_prefix,
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(((instr & IMM_MASK) >> IMM_LOW) & REG_MSR_MASK) == 0 ? "pc" : "msr");
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return(strdup(tmpstr));
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}
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@ -709,7 +716,7 @@ get_field_special(long instr, const struct op_code_struct *op)
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default :
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{
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if ( ((((instr & IMM_MASK) >> IMM_LOW) ^ op->immval_mask) & 0xE000) == REG_PVR_MASK) {
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sprintf(tmpstr, "%s%u", pvr_register_prefix,
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snprintf(tmpstr, sizeof(tmpstr), "%s%u", pvr_register_prefix,
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(unsigned short)(((instr & IMM_MASK) >> IMM_LOW) ^
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op->immval_mask) ^ REG_PVR_MASK);
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return(strdup(tmpstr));
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@ -720,7 +727,7 @@ get_field_special(long instr, const struct op_code_struct *op)
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break;
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}
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sprintf(tmpstr, "%s%s", register_prefix, spr);
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snprintf(tmpstr, sizeof(tmpstr), "%s%s", register_prefix, spr);
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return(strdup(tmpstr));
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}
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