From d585386a0f3023736785e49cbd1e40569e8a2a73 Mon Sep 17 00:00:00 2001 From: Jonas Bewig Date: Sun, 3 May 2026 23:40:28 +0200 Subject: [PATCH] CR16C: Add missing cbit/sbit flag side effect Co-authored-by: fridtjof --- target/cr16c/translate.c | 6 +- tests/tcg/cr16c/test08-bitops.S | 161 ++++++++++++++++++++++++++++++++ 2 files changed, 165 insertions(+), 2 deletions(-) diff --git a/target/cr16c/translate.c b/target/cr16c/translate.c index 142f0ff4b1..f61499b725 100644 --- a/target/cr16c/translate.c +++ b/target/cr16c/translate.c @@ -1078,13 +1078,15 @@ static bool trans_LSHD_rp(DisasContext *ctx, arg_LSHD_rp *a) { static void gen_CBIT(TCGv_i32 addr, uint8_t pos, uint8_t width) { uint32_t mask = ~(1 << pos); MemOp memop = width == 2 ? MO_UW : MO_UB; - tcg_gen_atomic_and_fetch_i32(tcg_temp_new_i32(), addr, tcg_constant_i32(mask), 0, memop); + tcg_gen_atomic_fetch_and_i32(f_f, addr, tcg_constant_i32(mask), 0, memop); + tcg_gen_shri_i32(f_f, f_f, pos); } static void gen_SBIT(TCGv_i32 addr, uint8_t pos, uint8_t width) { uint32_t mask = 1 << pos; MemOp memop = width == 2 ? MO_UW : MO_UB; - tcg_gen_atomic_or_fetch_i32(tcg_temp_new_i32(), addr, tcg_constant_i32(mask), 0, memop); + tcg_gen_atomic_fetch_or_i32(f_f, addr, tcg_constant_i32(mask), 0, memop); + tcg_gen_shri_i32(f_f, f_f, pos); } static bool gen_TBIT_mem(TCGv_i32 addr, uint8_t pos, uint8_t width) { diff --git a/tests/tcg/cr16c/test08-bitops.S b/tests/tcg/cr16c/test08-bitops.S index 4ab2ba025f..0df3cc6df2 100644 --- a/tests/tcg/cr16c/test08-bitops.S +++ b/tests/tcg/cr16c/test08-bitops.S @@ -15,58 +15,100 @@ _start: movd $0xF000, (r12) movd $2, (r1,r0) cbitb $1, [r12]0xFF1(r1,r0) + EXPECT_COND fs EXPECTM 0x0401, 0xFFF3 + cbitb $1, [r12]0xFF3(r1,r0) + EXPECT_COND fc + EXPECTM 0x0605, 0xFFF5 RESET /*** CBITB reg disp20 ***/ movw $2, r1 cbitb $1, 0xFFF1(r1) + EXPECT_COND fs EXPECTM 0x0401, 0xFFF3 + cbitb $1, 0xFFF3(r1) + EXPECT_COND fc + EXPECTM 0x0605, 0xFFF5 RESET /*** CBITB rp disp0 ***/ movd $0xFFF5, (r1,r0) cbitb $0, 0(r1,r0) + EXPECT_COND fs EXPECTM 0x0604, 0xFFF5 + movd $0xFFF5, (r3,r2) + cbitb $3, 0(r3,r2) + EXPECT_COND fc + EXPECTM 0x0807, 0xFFF7 RESET /*** CBITB rp disp16 ***/ movd $0xFFF3, (r1,r0) cbitb $3, 0x5(r1,r0) + EXPECT_COND fs EXPECTM 0x0900, 0xFFF8 + cbitb $0, 0x3(r1,r0) + EXPECT_COND fc + EXPECTM 0x0706, 0xFFF6 RESET /*** CBITB rp disp20 ***/ + storb $0x06, 0x1FFF6 + storb $0x07, 0x1FFF7 storb $0x08, 0x1FFF8 storb $0x09, 0x1FFF9 movd $0xFFF3, (r1,r0) cbitb $3, 0x10005(r1,r0) + EXPECT_COND fs EXPECTM 0x0900, 0x1FFF8 + movd $0xFFF1, (r3,r2) + cbitb $0, 0x10003(r1,r0) + EXPECT_COND fc + EXPECTM 0x0706, 0x1FFF6 RESET /*** CBITB rrp disp20 ***/ movd $1, (r12) movd $2, (r1,r0) cbitb $2, [r12]0xFFF1(r1,r0) + EXPECT_COND fs EXPECTM 0x0500, 0xFFF4 + cbitb $0, [r12]0xFFF3(r1,r0) + EXPECT_COND fc + EXPECTM 0x0706, 0xFFF6 RESET /*** CBITB abs20 ***/ cbitb $1, 0xFFF7 + EXPECT_COND fs EXPECTM 0x0805, 0xFFF7 + cbitb $1, 0xFFF5 + EXPECT_COND fc + EXPECTM 0x0605, 0xFFF5 RESET /*** CBITB abs20 rel ***/ movd $0xFFF4, (r13) cbitb $0, [r13]1 + EXPECT_COND fs EXPECTM 0x0604, 0xFFF5 + cbitb $3, [r13]3 + EXPECT_COND fc + EXPECTM 0x0807, 0xFFF7 RESET /*** CBITB abs24 ***/ + storb $0x06, 0x10FFF6 + storb $0x07, 0x10FFF7 storb $0x08, 0x10FFF8 storb $0x09, 0x10FFF9 cbitb $3, 0x10FFF8 + EXPECT_COND fs EXPECTM 0x0900, 0x10FFF8 + cbitb $0, 0x10FFF6 + EXPECT_COND fc + EXPECTM 0x0706, 0x10FFF6 RESET /*** 16 BIT ***/ @@ -75,58 +117,99 @@ _start: movd $0xF000, (r12) movd $2, (r1,r0) cbitw $10, [r12]0xFF1(r1,r0) + EXPECT_COND fs EXPECTM 0x0003, 0xFFF3 + cbitw $11, [r12]0xFF3(r1,r0) + EXPECT_COND fc + EXPECTM 0x0605, 0xFFF5 RESET /*** CBITW reg disp20 ***/ movw $2, r1 cbitw $10, 0xFFF1(r1) + EXPECT_COND fs EXPECTM 0x0003, 0xFFF3 + cbitw $11, 0xFFF3(r1) + EXPECT_COND fc + EXPECTM 0x0605, 0xFFF5 RESET /*** CBITW rp disp0 ***/ movd $0xFFF5, (r1,r0) cbitw $9, 0(r1,r0) + EXPECT_COND fs EXPECTM 0x0405, 0xFFF5 + movd $0xFFF7, (r3,r2) + cbitw $8, 0(r3,r2) + EXPECT_COND fc + EXPECTM 0x0807, 0xFFF7 RESET /*** CBITW rp disp16 ***/ movd $0xFFF3, (r1,r0) cbitw $8, 0x5(r1,r0) + EXPECT_COND fs EXPECTM 0x0808, 0xFFF8 + cbitw $11, 0x3(r1,r0) + EXPECT_COND fc + EXPECTM 0x0706, 0xFFF6 RESET /*** CBITW rp disp20 ***/ + storb $0x06, 0x1FFF6 + storb $0x07, 0x1FFF7 storb $0x08, 0x1FFF8 storb $0x09, 0x1FFF9 movd $0xFFF3, (r1,r0) cbitw $8, 0x10005(r1,r0) + EXPECT_COND fs EXPECTM 0x0808, 0x1FFF8 + cbitw $11, 0x10003(r1,r0) + EXPECT_COND fc + EXPECTM 0x0706, 0x1FFF6 RESET /*** CBITW rrp disp20 ***/ movd $1, (r12) movd $2, (r1,r0) cbitw $10, [r12]0xFFF1(r1,r0) + EXPECT_COND fs EXPECTM 0x0104, 0xFFF4 + cbitw $11, [r12]0xFFF3(r1,r0) + EXPECT_COND fc + EXPECTM 0x0706, 0xFFF6 RESET /*** CBITW abs20 ***/ cbitw $11, 0xFFF7 + EXPECT_COND fs EXPECTM 0x0007, 0xFFF7 + cbitw $8, 0xFFF5 + EXPECT_COND fc + EXPECTM 0x0605, 0xFFF5 RESET /*** CBITW abs20 rel ***/ movd $0xFFF4, (r13) cbitw $9, [r13]1 + EXPECT_COND fs EXPECTM 0x0405, 0xFFF5 + cbitw $10, [r13]3 + EXPECT_COND fc + EXPECTM 0x0807, 0xFFF7 RESET /*** CBITW abs24 ***/ + storb $0x06, 0x10FFF8 + storb $0x07, 0x10FFF9 storb $0x08, 0x10FFF8 storb $0x09, 0x10FFF9 cbitw $8, 0x10FFF8 + EXPECT_COND fs EXPECTM 0x0808, 0x10FFF8 + cbitw $11, 0x10FFF6 + EXPECT_COND fc + EXPECTM 0x0706, 0x10FFF6 RESET @@ -137,25 +220,42 @@ _start: movd $0xF000, (r12) movd $2, (r1,r0) sbitb $2, [r12]0xFF1(r1,r0) + EXPECT_COND fc EXPECTM 0x0407, 0xFFF3 + sbitb $0, [r12]0xFF3(r1,r0) + EXPECT_COND fs + EXPECTM 0x0605, 0xFFF5 RESET /*** SBITB reg disp20 ***/ movw $2, r1 sbitb $2, 0xFFF1(r1) + EXPECT_COND fc EXPECTM 0x0407, 0xFFF3 + sbitb $2, 0xFFF3(r1) + EXPECT_COND fs + EXPECTM 0x0605, 0xFFF5 RESET /*** SBITB rp disp0 ***/ movd $0xFFF5, (r1,r0) sbitb $3, 0(r1,r0) + EXPECT_COND fc EXPECTM 0x060D, 0xFFF5 + movd $0xFFF7, (r3,r2) + sbitb $2, 0(r3,r2) + EXPECT_COND fs + EXPECTM 0x0807, 0xFFF7 RESET /*** SBITB rp disp16 ***/ movd $0xFFF3, (r1,r0) sbitb $1, 0x5(r1,r0) + EXPECT_COND fc EXPECTM 0x090A, 0xFFF8 + sbitb $1, 0x3(r1,r0) + EXPECT_COND fs + EXPECTM 0x0706, 0xFFF6 RESET /*** SBITB rp disp20 ***/ @@ -163,32 +263,52 @@ _start: storb $0x09, 0x1FFF9 movd $0xFFF3, (r1,r0) sbitb $1, 0x10005(r1,r0) + EXPECT_COND fc EXPECTM 0x090A, 0x1FFF8 + sbitb $1, 0x10003(r1,r0) + EXPECT_COND fs + EXPECTM 0x0706, 0x1FFF6 RESET /*** SBITB rrp disp20 ***/ movd $1, (r12) movd $2, (r1,r0) sbitb $0, [r12]0xFFF1(r1,r0) + EXPECT_COND fc EXPECTM 0x0505, 0xFFF4 + sbitb $1, [r12]0xFFF3(r1,r0) + EXPECT_COND fs + EXPECTM 0x0706, 0xFFF6 RESET /*** SBITB abs20 ***/ sbitb $3, 0xFFF7 + EXPECT_COND fc EXPECTM 0x080F, 0xFFF7 + sbitb $0, 0xFFF5 + EXPECT_COND fs + EXPECTM 0x0605, 0xFFF5 RESET /*** SBITB abs20 rel ***/ movd $0xFFF4, (r13) sbitb $1, [r13]1 + EXPECT_COND fc EXPECTM 0x0607, 0xFFF5 + sbitb $2, [r13]3 + EXPECT_COND fs + EXPECTM 0x0807, 0xFFF7 RESET /*** SBITB abs24 ***/ storb $0x08, 0x10FFF8 storb $0x09, 0x10FFF9 sbitb $2, 0x10FFF8 + EXPECT_COND fc EXPECTM 0x090C, 0x10FFF8 + sbitb $1, 0x10FFF6 + EXPECT_COND fs + EXPECTM 0x0706, 0x10FFF6 RESET /*** 16 BIT ***/ @@ -197,58 +317,99 @@ _start: movd $0xF000, (r12) movd $2, (r1,r0) sbitw $9, [r12]0xFF1(r1,r0) + EXPECT_COND fc EXPECTM 0x0603, 0xFFF3 + sbitw $9, [r12]0xFF3(r1,r0) + EXPECT_COND fs + EXPECTM 0x0605, 0xFFF5 RESET /*** SBITW reg disp20 ***/ movw $2, r1 sbitw $9, 0xFFF1(r1) + EXPECT_COND fc EXPECTM 0x0603, 0xFFF3 + sbitw $9, 0xFFF3(r1) + EXPECT_COND fs + EXPECTM 0x0605, 0xFFF5 RESET /*** SBITW rp disp0 ***/ movd $0xFFF5, (r1,r0) sbitw $8, 0(r1,r0) + EXPECT_COND fc EXPECTM 0x0705, 0xFFF5 + movd $0xFFF3, (r3,r2) + sbitw $10, 0(r3,r2) + EXPECT_COND fs + EXPECTM 0x0403, 0xFFF3 RESET /*** SBITW rp disp16 ***/ movd $0xFFF3, (r1,r0) sbitw $9, 0x5(r1,r0) + EXPECT_COND fc EXPECTM 0x0B08, 0xFFF8 + sbitw $9, 0x3(r1,r0) + EXPECT_COND fs + EXPECTM 0x0706, 0xFFF6 RESET /*** SBITW rp disp20 ***/ + storb $0x06, 0x1FFF6 + storb $0x07, 0x1FFF7 storb $0x08, 0x1FFF8 storb $0x09, 0x1FFF9 movd $0xFFF3, (r1,r0) sbitw $10, 0x10005(r1,r0) + EXPECT_COND fc EXPECTM 0x0D08, 0x1FFF8 + sbitw $10, 0x10003(r1,r0) + EXPECT_COND fs + EXPECTM 0x0706, 0x1FFF6 RESET /*** SBITW rrp disp20 ***/ movd $1, (r12) movd $2, (r1,r0) sbitw $11, [r12]0xFFF1(r1,r0) + EXPECT_COND fc EXPECTM 0x0D04, 0xFFF4 + sbitw $10, [r12]0xFFF3(r1,r0) + EXPECT_COND fs + EXPECTM 0x0706, 0xFFF6 RESET /*** SBITW abs20 ***/ sbitw $9, 0xFFF7 + EXPECT_COND fc EXPECTM 0x0A07, 0xFFF7 + sbitw $9, 0xFFF5 + EXPECT_COND fs + EXPECTM 0x0605, 0xFFF5 RESET /*** SBITW abs20 rel ***/ movd $0xFFF4, (r13) sbitw $11, [r13]1 + EXPECT_COND fc EXPECTM 0x0E05, 0xFFF5 + sbitw $11, [r13]3 + EXPECT_COND fs + EXPECTM 0x0807, 0xFFF7 RESET /*** SBITW abs24 ***/ + storb $0x06, 0x10FFF6 + storb $0x07, 0x10FFF7 storb $0x08, 0x10FFF8 storb $0x09, 0x10FFF9 sbitw $9, 0x10FFF8 + EXPECT_COND fc EXPECTM 0x0B08, 0x10FFF8 + sbitw $9, 0x10FFF6 + EXPECT_COND fs + EXPECTM 0x0706, 0x10FFF6 RESET