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amd_iommu: HATDis/HATS=11 support

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Add a way to disable DMA translation support in AMD IOMMU by
allowing to set IVHD HATDis to 1, and exposing HATS (Host Address
Translation Size) as Reserved value.

Signed-off-by: Joao Martins <joao.m.martins@oracle.com>
Signed-off-by: Alejandro Jimenez <alejandro.j.jimenez@oracle.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <20250919213515.917111-23-alejandro.j.jimenez@oracle.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Joao Martins 2025-09-19 21:35:15 +00:00 • committed by Michael S. Tsirkin
parent b6b49c2cd6
commit d9ec848fb5
3 changed files with 25 additions and 1 deletions
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6
hw/i386/acpi-build.c
View file

@ -1863,7 +1863,11 @@ build_amd_iommu(GArray *table_data, BIOSLinker *linker, const char *oem_id,
/* IOMMU info */
build_append_int_noprefix(table_data, 0, 2);
/* IOMMU Attributes */
build_append_int_noprefix(table_data, 0, 4);
if (!s->iommu.dma_translation) {
build_append_int_noprefix(table_data, (1UL << 0) /* HATDis */, 4);
} else {
build_append_int_noprefix(table_data, 0, 4);
}
/* EFR Register Image */
build_append_int_noprefix(table_data,
amdvi_extended_feature_register(s),

19
hw/i386/amd_iommu.c
View file

@ -107,6 +107,9 @@ uint64_t amdvi_extended_feature_register(AMDVIState *s)
if (s->xtsup) {
feature |= AMDVI_FEATURE_XT;
}
if (!s->iommu.dma_translation) {
feature |= AMDVI_HATS_MODE_RESERVED;
}
return feature;
}
@ -472,6 +475,9 @@ static inline uint64_t amdvi_get_perms(uint64_t entry)
static bool amdvi_validate_dte(AMDVIState *s, uint16_t devid,
uint64_t *dte)
{
uint64_t root;
if ((dte[0] & AMDVI_DTE_QUAD0_RESERVED) ||
(dte[1] & AMDVI_DTE_QUAD1_RESERVED) ||
(dte[2] & AMDVI_DTE_QUAD2_RESERVED) ||
@ -482,6 +488,19 @@ static bool amdvi_validate_dte(AMDVIState *s, uint16_t devid,
return false;
}
/*
* 1 = Host Address Translation is not supported. Value in MMIO Offset
* 0030h[HATS] is not meaningful. A non-zero host page table root pointer
* in the DTE would result in an ILLEGAL_DEV_TABLE_ENTRY event.
*/
root = (dte[0] & AMDVI_DEV_PT_ROOT_MASK) >> 12;
if (root && !s->iommu.dma_translation) {
amdvi_log_illegaldevtab_error(s, devid,
s->devtab +
devid * AMDVI_DEVTAB_ENTRY_SIZE, 0);
return false;
}
return true;
}

1
hw/i386/amd_iommu.h
View file

@ -177,6 +177,7 @@
/* AMDVI paging mode */
#define AMDVI_GATS_MODE (2ULL << 12)
#define AMDVI_HATS_MODE (2ULL << 10)
#define AMDVI_HATS_MODE_RESERVED (3ULL << 10)
/* Page Table format */