x86 queue, 2016-10-17
-----BEGIN PGP SIGNATURE----- iQIcBAABCAAGBQJYBQ+LAAoJECgHk2+YTcWmaF0QAISVeb39vJyyXNhxXsy1Y5iM WSYA8Dym0TWCXTd7Fq7Ck4VS9ZC7hAREKNSBs2hgVPutecL56iB/IjWrB0AyFAMK u5y4H1pI6l9TiH+6GcDWwQjthM/0v2pEHzQ2udLWBSpKJGjDPTSQIafZUgrW2uu0 J/Drxg17FJ6KixqCg3FemPBXucbuU1PSW2qEWIgVElwj843j3d/Wc5l1wNb24irN jnOcvJd9WQsuT2fUDXezrCRVQle92tHR1cHtu5bZvC1aMFbGuHfSA4pm7pXw3l5N 8H0fhrCoj6JGKRY/pzHGmLgwMTWJL4qASxr6sEKkMAyu59DdjQ0+U8EhOwoAHYhp gSrNgpwPKRr2OKrSUJXil7w1cQ+hsokgEo44SDEgsV4k9Rgbz8VVVct+LwOxwfwW l9sC9L5ONheFODfB3rgVFiyAbspYxzwOvGZ29VoeMyb4CS1CUBrsvka8DledFi+m By26W6IMtXBa4NZoYqp49zHqUZ5Wu62I32LCaWDKscUQfaEJKrf1DtFQ9FlWhy5F 4NeSzTo4eAp3WPRDscbvXIyEJfYqzf7gs8KQA9QD+aTceDOIPiZeMz6oMokFukE8 Lt1fWzzppFJ6ZyPLO1YI/T91fOskl45r8b3T242fovOKGAlujkunpRcTAYaybN5C qUv5Qrq6ZujcRecupLfE =KM/h -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into staging x86 queue, 2016-10-17 # gpg: Signature made Mon 17 Oct 2016 18:51:07 BST # gpg: using RSA key 0x2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/x86-pull-request: (21 commits) target-i386: Don't use cpu->migratable when filtering features target-i386: Return runnability information on query-cpu-definitions target-i386: x86_cpu_load_features() function target-i386: Unset cannot_destroy_with_object_finalize_yet target-i386/kvm: cache the return value of kvm_enable_x2apic() intel_iommu: reject broken EIM intel_iommu: add OnOffAuto intr_eim as "eim" property intel_iommu: redo configuraton check in realize intel_iommu: pass whole remapped addresses to apic apic: add send_msi() to APICCommonClass apic: add global apic_get_class() target-i386: Move warning code outside x86_cpu_filter_features() qmp: Add runnability information to query-cpu-definitions target-i386: xsave: Add FP and SSE bits to x86_ext_save_areas target-i386: Register properties for feature aliases manually target-i386: Remove underscores from feat_names arrays target-i386: Make plus_features/minus_features QOM-based target-i386: Register aliases for feature names with underscores target-i386: Disable VME by default with TCG target-i386: List CPU models using subclass list ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
e8ddc2eae5
15 changed files with 527 additions and 224 deletions
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@ -3,6 +3,7 @@
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#include "qapi/qmp/qlist.h"
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#include "qapi/qmp/qdict.h"
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#include "qapi/qmp/qint.h"
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#include "qapi/qmp/qbool.h"
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#include "libqtest.h"
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static char *get_cpu0_qom_path(void)
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@ -34,6 +35,15 @@ static QObject *qom_get(const char *path, const char *prop)
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return ret;
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}
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static bool qom_get_bool(const char *path, const char *prop)
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{
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QBool *value = qobject_to_qbool(qom_get(path, prop));
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bool b = qbool_get_bool(value);
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QDECREF(value);
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return b;
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}
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typedef struct CpuidTestArgs {
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const char *cmdline;
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const char *property;
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@ -66,10 +76,44 @@ static void add_cpuid_test(const char *name, const char *cmdline,
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qtest_add_data_func(name, args, test_cpuid_prop);
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}
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static void test_plus_minus(void)
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{
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char *path;
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/* Rules:
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* 1)"-foo" overrides "+foo"
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* 2) "[+-]foo" overrides "foo=..."
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* 3) Old feature names with underscores (e.g. "sse4_2")
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* should keep working
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*
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* Note: rules 1 and 2 are planned to be removed soon, but we
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* need to keep compatibility for a while until we start
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* warning users about it.
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*/
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qtest_start("-cpu pentium,-fpu,+fpu,-mce,mce=on,+cx8,cx8=off,+sse4_1,sse4_2=on");
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path = get_cpu0_qom_path();
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g_assert_false(qom_get_bool(path, "fpu"));
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g_assert_false(qom_get_bool(path, "mce"));
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g_assert_true(qom_get_bool(path, "cx8"));
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/* Test both the original and the alias feature names: */
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g_assert_true(qom_get_bool(path, "sse4-1"));
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g_assert_true(qom_get_bool(path, "sse4.1"));
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g_assert_true(qom_get_bool(path, "sse4-2"));
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g_assert_true(qom_get_bool(path, "sse4.2"));
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qtest_end();
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g_free(path);
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}
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int main(int argc, char **argv)
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{
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g_test_init(&argc, &argv, NULL);
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qtest_add_func("x86/cpuid/parsing-plus-minus", test_plus_minus);
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/* Original level values for CPU models: */
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add_cpuid_test("x86/cpuid/phenom/level",
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"-cpu phenom", "level", 5);
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