ppc patch queue 2018-08-21
Here's my first ppc & spapr pull request for qemu-3.1. This contains
a bunch of things that have accumulated while 3.0 was in freeze.
Highlights are:
* SLOF firmware update
* A number of floating point cleanups from Richard Henderson and
Yasmin Beatriz
* A new model for assigning irq numbers on spapr, this is an
important preliminary step towards implementing the POWER9
"XIVE" interrupt controller
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Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-3.1-20180821' into staging
ppc patch queue 2018-08-21
Here's my first ppc & spapr pull request for qemu-3.1. This contains
a bunch of things that have accumulated while 3.0 was in freeze.
Highlights are:
* SLOF firmware update
* A number of floating point cleanups from Richard Henderson and
Yasmin Beatriz
* A new model for assigning irq numbers on spapr, this is an
important preliminary step towards implementing the POWER9
"XIVE" interrupt controller
# gpg: Signature made Tue 21 Aug 2018 05:32:44 BST
# gpg: using RSA key 6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
# gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>"
# gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
# gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>"
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392
* remotes/dgibson/tags/ppc-for-3.1-20180821: (26 commits)
ppc: add DBCR based debugging
spapr_pci: factorize the use of SPAPR_MACHINE_GET_CLASS()
mac_newworld: don't use legacy fw_cfg_init_mem() function
mac_oldworld: don't use legacy fw_cfg_init_mem() function
40p: don't use legacy fw_cfg_init_mem() function
qemu-doc: mark ppc/prep machine as deprecated
hw/ppc: deprecate the machine type 'prep', replaced by '40p'
spapr: introduce a IRQ controller backend to the machine
hw/ppc/ppc405_uc: Convert away from old_mmio
hw/ppc/ppc_boards: Don't use old_mmio for ref405ep_fpga
hw/ppc/prep: Remove ifdeffed-out stub of XCSR code
spapr: introduce a fixed IRQ number space
spapr: Add a pseries-3.1 machine type
target/ppc: simplify bcdadd/sub functions
xics: don't include "target/ppc/cpu-qom.h" in "hw/ppc/xics.h"
vfio/spapr: Allow backing bigger guest IOMMU pages with smaller physical pages
target/ppc: bcdsub fix sign when result is zero
target/ppc: Use non-arithmetic conversions for fp load/store
target/ppc: Honor fpscr_ze semantics and tidy fre, fresqrt
target/ppc: Tidy helper_fsqrt
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
commit
ee135aa042
31 changed files with 953 additions and 743 deletions
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@ -4,10 +4,10 @@
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#include "qemu/units.h"
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#include "sysemu/dma.h"
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#include "hw/boards.h"
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#include "hw/ppc/xics.h"
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#include "hw/ppc/spapr_drc.h"
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#include "hw/mem/pc-dimm.h"
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#include "hw/ppc/spapr_ovec.h"
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#include "hw/ppc/spapr_irq.h"
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struct VIOsPAPRBus;
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struct sPAPRPHBState;
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@ -15,6 +15,7 @@ struct sPAPRNVRAM;
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typedef struct sPAPREventLogEntry sPAPREventLogEntry;
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typedef struct sPAPREventSource sPAPREventSource;
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typedef struct sPAPRPendingHPT sPAPRPendingHPT;
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typedef struct ICSState ICSState;
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#define HPTE64_V_HPTE_DIRTY 0x0000000000000040ULL
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#define SPAPR_ENTRY_POINT 0x100
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@ -101,12 +102,15 @@ struct sPAPRMachineClass {
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bool dr_lmb_enabled; /* enable dynamic-reconfig/hotplug of LMBs */
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bool use_ohci_by_default; /* use USB-OHCI instead of XHCI */
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bool pre_2_10_has_unused_icps;
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bool legacy_irq_allocation;
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void (*phb_placement)(sPAPRMachineState *spapr, uint32_t index,
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uint64_t *buid, hwaddr *pio,
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hwaddr *mmio32, hwaddr *mmio64,
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unsigned n_dma, uint32_t *liobns, Error **errp);
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sPAPRResizeHPT resize_hpt_default;
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sPAPRCapabilities default_caps;
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sPAPRIrq *irq;
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};
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/**
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@ -167,6 +171,8 @@ struct sPAPRMachineState {
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char *kvm_type;
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const char *icp_type;
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int32_t irq_map_nr;
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unsigned long *irq_map;
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bool cmd_line_caps[SPAPR_CAP_NUM];
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sPAPRCapabilities def, eff, mig;
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@ -775,14 +781,6 @@ int spapr_get_vcpu_id(PowerPCCPU *cpu);
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void spapr_set_vcpu_id(PowerPCCPU *cpu, int cpu_index, Error **errp);
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PowerPCCPU *spapr_find_cpu(int vcpu_id);
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int spapr_irq_find(sPAPRMachineState *spapr, int num, bool align,
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Error **errp);
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#define spapr_irq_findone(spapr, errp) spapr_irq_find(spapr, 1, false, errp)
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int spapr_irq_claim(sPAPRMachineState *spapr, int irq, bool lsi, Error **errp);
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void spapr_irq_free(sPAPRMachineState *spapr, int irq, int num);
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qemu_irq spapr_qirq(sPAPRMachineState *spapr, int irq);
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int spapr_caps_pre_load(void *opaque);
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int spapr_caps_pre_save(void *opaque);
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54
include/hw/ppc/spapr_irq.h
Normal file
54
include/hw/ppc/spapr_irq.h
Normal file
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@ -0,0 +1,54 @@
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/*
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* QEMU PowerPC sPAPR IRQ backend definitions
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*
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* Copyright (c) 2018, IBM Corporation.
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*
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* This code is licensed under the GPL version 2 or later. See the
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* COPYING file in the top-level directory.
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*/
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#ifndef HW_SPAPR_IRQ_H
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#define HW_SPAPR_IRQ_H
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/*
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* IRQ range offsets per device type
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*/
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#define SPAPR_IRQ_EPOW 0x1000 /* XICS_IRQ_BASE offset */
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#define SPAPR_IRQ_HOTPLUG 0x1001
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#define SPAPR_IRQ_VIO 0x1100 /* 256 VIO devices */
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#define SPAPR_IRQ_PCI_LSI 0x1200 /* 32+ PHBs devices */
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#define SPAPR_IRQ_MSI 0x1300 /* Offset of the dynamic range covered
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* by the bitmap allocator */
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typedef struct sPAPRMachineState sPAPRMachineState;
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void spapr_irq_msi_init(sPAPRMachineState *spapr, uint32_t nr_msis);
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int spapr_irq_msi_alloc(sPAPRMachineState *spapr, uint32_t num, bool align,
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Error **errp);
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void spapr_irq_msi_free(sPAPRMachineState *spapr, int irq, uint32_t num);
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void spapr_irq_msi_reset(sPAPRMachineState *spapr);
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typedef struct sPAPRIrq {
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uint32_t nr_irqs;
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void (*init)(sPAPRMachineState *spapr, Error **errp);
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int (*claim)(sPAPRMachineState *spapr, int irq, bool lsi, Error **errp);
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void (*free)(sPAPRMachineState *spapr, int irq, int num);
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qemu_irq (*qirq)(sPAPRMachineState *spapr, int irq);
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void (*print_info)(sPAPRMachineState *spapr, Monitor *mon);
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} sPAPRIrq;
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extern sPAPRIrq spapr_irq_xics;
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int spapr_irq_claim(sPAPRMachineState *spapr, int irq, bool lsi, Error **errp);
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void spapr_irq_free(sPAPRMachineState *spapr, int irq, int num);
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qemu_irq spapr_qirq(sPAPRMachineState *spapr, int irq);
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/*
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* XICS legacy routines
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*/
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int spapr_irq_find(sPAPRMachineState *spapr, int num, bool align, Error **errp);
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#define spapr_irq_findone(spapr, errp) spapr_irq_find(spapr, 1, false, errp)
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#endif
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@ -29,7 +29,6 @@
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#define XICS_H
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#include "hw/qdev.h"
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#include "target/ppc/cpu-qom.h"
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#define XICS_IPI 0x2
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#define XICS_BUID 0x1
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@ -73,6 +73,7 @@ typedef struct VFIOContainer {
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unsigned iommu_type;
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int error;
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bool initialized;
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unsigned long pgsizes;
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/*
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* This assumes the host IOMMU can support only a single
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* contiguous IOVA window. We may need to generalize that in
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