linux-user: Add strace for rseq
build/qemu-riscv64 -cpu rv64,v=on -d strace build/tests/tcg/riscv64-linux-user/test-vstart-overflow 1118081 riscv_hwprobe(0xffffbc038200,1,0,0,0,0) = 0 1118081 brk(NULL) = 0x0000000000085000 1118081 brk(0x0000000000085b00) = 0x0000000000085b00 1118081 set_tid_address(0x850f0) = 1118081 1118081 set_robust_list(0x85100,24) = -1 errno=38 (Function not implemented) 1118081 rseq(0x857c0,32,0,0xf1401073) = -1 errno=38 (Function not implemented) Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250826060341.1118670-1-joel@jms.id.au>
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@ -1719,3 +1719,6 @@
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#ifdef TARGET_NR_riscv_hwprobe
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{ TARGET_NR_riscv_hwprobe, "riscv_hwprobe" , "%s(%p,%d,%d,%d,%d,%d)", NULL, NULL },
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#endif
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#ifdef TARGET_NR_rseq
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{ TARGET_NR_rseq, "rseq" , "%s(%p,%u,%d,%#x)", NULL, NULL },
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#endif
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