hw/arm/aspeed: Split Supermicro X11 machine into a separate source file for maintainability
This commit moves the Supermicro X11 BMC machine implementation out of aspeed.c into a new standalone file aspeed_ast2400_supermicrox11.c and removes its dependency on the Palmetto platform’s I²C initialization. This refactor continues the modularization effort for Aspeed platform support, ensuring that each board’s configuration resides in its own dedicated source file. By duplicating and renaming the palmetto_bmc_i2c_init() logic into supermicrox11_bmc_i2c_init(), this change removes unwanted coupling between the two board definitions. Key updates include: - Moved SUPERMICROX11_BMC_HW_STRAP1 macro definition into a new file. - Moved aspeed_machine_supermicrox11_bmc_class_init() and type registration into a new file. - Added a dedicated supermicrox11_bmc_i2c_init() function (copied and renamed from Palmetto’s version). - Added the new file aspeed_ast2400_supermicrox11.c to the build system (meson.build). - Removed all Supermicro X11–specific code and macros from aspeed.c. No functional changes. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-16-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
This commit is contained in:
Jamin Lin
Cédric Le Goater
parent
7f162fe291
commit
f919ccc7e0
3 changed files with 82 additions and 37 deletions
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@ -57,20 +57,6 @@ static struct arm_boot_info aspeed_board_binfo = {
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SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
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SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
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/* TODO: Find the actual hardware value */
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#define SUPERMICROX11_BMC_HW_STRAP1 ( \
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SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \
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SCU_AST2400_HW_STRAP_DRAM_CONFIG(2) | \
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SCU_AST2400_HW_STRAP_ACPI_DIS | \
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SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \
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SCU_HW_STRAP_VGA_CLASS_CODE | \
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SCU_HW_STRAP_LPC_RESET_PIN | \
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SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \
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SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \
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SCU_HW_STRAP_SPI_WIDTH | \
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SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
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SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
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/* AST2600 evb hardware value */
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#define AST2600_EVB_HW_STRAP1 0x000000C0
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#define AST2600_EVB_HW_STRAP2 0x00000003
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@ -1073,24 +1059,6 @@ static void aspeed_machine_palmetto_class_init(ObjectClass *oc,
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aspeed_machine_class_init_cpus_defaults(mc);
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};
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static void aspeed_machine_supermicrox11_bmc_class_init(ObjectClass *oc,
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const void *data)
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{
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MachineClass *mc = MACHINE_CLASS(oc);
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AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
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mc->desc = "Supermicro X11 BMC (ARM926EJ-S)";
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amc->soc_name = "ast2400-a1";
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amc->hw_strap1 = SUPERMICROX11_BMC_HW_STRAP1;
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amc->fmc_model = "mx25l25635e";
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amc->spi_model = "mx25l25635e";
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amc->num_cs = 1;
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amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
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amc->i2c_init = palmetto_bmc_i2c_init;
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mc->default_ram_size = 256 * MiB;
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aspeed_machine_class_init_cpus_defaults(mc);
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}
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static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc,
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const void *data)
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{
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@ -1441,11 +1409,6 @@ static const TypeInfo aspeed_machine_types[] = {
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.parent = TYPE_ASPEED_MACHINE,
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.class_init = aspeed_machine_palmetto_class_init,
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.interfaces = arm_machine_interfaces,
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}, {
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.name = MACHINE_TYPE_NAME("supermicrox11-bmc"),
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.parent = TYPE_ASPEED_MACHINE,
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.class_init = aspeed_machine_supermicrox11_bmc_class_init,
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.interfaces = arm_machine_interfaces,
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}, {
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.name = MACHINE_TYPE_NAME("ast2600-evb"),
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.parent = TYPE_ASPEED_MACHINE,
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81
hw/arm/aspeed_ast2400_supermicrox11.c
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81
hw/arm/aspeed_ast2400_supermicrox11.c
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@ -0,0 +1,81 @@
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/*
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* Supermicro X11
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*
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* Copyright 2016 IBM Corp.
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "hw/arm/machines-qom.h"
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#include "hw/arm/aspeed.h"
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#include "hw/arm/aspeed_soc.h"
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#include "hw/i2c/smbus_eeprom.h"
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/* TODO: Find the actual hardware value */
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#define SUPERMICROX11_BMC_HW_STRAP1 ( \
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SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \
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SCU_AST2400_HW_STRAP_DRAM_CONFIG(2) | \
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SCU_AST2400_HW_STRAP_ACPI_DIS | \
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SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \
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SCU_HW_STRAP_VGA_CLASS_CODE | \
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SCU_HW_STRAP_LPC_RESET_PIN | \
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SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \
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SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \
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SCU_HW_STRAP_SPI_WIDTH | \
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SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
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SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
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static void supermicrox11_bmc_i2c_init(AspeedMachineState *bmc)
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{
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AspeedSoCState *soc = bmc->soc;
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DeviceState *dev;
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uint8_t *eeprom_buf = g_malloc0(32 * 1024);
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/*
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* The palmetto platform expects a ds3231 RTC but a ds1338 is
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* enough to provide basic RTC features. Alarms will be missing
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*/
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i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0), "ds1338", 0x68);
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smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50,
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eeprom_buf);
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/* add a TMP423 temperature sensor */
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dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2),
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"tmp423", 0x4c));
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object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
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object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
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object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
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object_property_set_int(OBJECT(dev), "temperature3", 110000, &error_abort);
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}
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static void aspeed_machine_supermicrox11_bmc_class_init(ObjectClass *oc,
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const void *data)
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{
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MachineClass *mc = MACHINE_CLASS(oc);
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AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
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mc->desc = "Supermicro X11 BMC (ARM926EJ-S)";
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amc->soc_name = "ast2400-a1";
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amc->hw_strap1 = SUPERMICROX11_BMC_HW_STRAP1;
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amc->fmc_model = "mx25l25635e";
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amc->spi_model = "mx25l25635e";
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amc->num_cs = 1;
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amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
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amc->i2c_init = supermicrox11_bmc_i2c_init;
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mc->default_ram_size = 256 * MiB;
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aspeed_machine_class_init_cpus_defaults(mc);
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}
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static const TypeInfo aspeed_ast2400_supermicrox11_types[] = {
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{
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.name = MACHINE_TYPE_NAME("supermicrox11-bmc"),
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.parent = TYPE_ASPEED_MACHINE,
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.class_init = aspeed_machine_supermicrox11_bmc_class_init,
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.interfaces = arm_machine_interfaces,
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}
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};
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DEFINE_TYPES(aspeed_ast2400_supermicrox11_types)
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@ -45,6 +45,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
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'aspeed_soc_common.c',
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'aspeed_ast2400.c',
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'aspeed_ast2400_quanta-q71l.c',
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'aspeed_ast2400_supermicrox11.c',
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'aspeed_ast2500_evb.c',
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'aspeed_ast2500_fp5280g2.c',
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'aspeed_ast2500_g220a.c',
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