diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index ecc7272e67..3a5071a384 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -14,19 +14,11 @@ #include "hw/arm/boot.h" #include "hw/arm/aspeed.h" #include "hw/arm/aspeed_soc.h" -#include "hw/arm/aspeed_eeprom.h" #include "hw/arm/machines-qom.h" #include "hw/block/flash.h" -#include "hw/i2c/i2c_mux_pca954x.h" -#include "hw/i2c/smbus_eeprom.h" #include "hw/gpio/pca9552.h" #include "hw/gpio/pca9554.h" -#include "hw/nvram/eeprom_at24c.h" -#include "hw/sensor/tmp105.h" -#include "hw/misc/led.h" -#include "hw/qdev-properties.h" #include "system/block-backend.h" -#include "system/reset.h" #include "qemu/error-report.h" #include "qemu/units.h" #include "hw/qdev-clock.h" @@ -36,178 +28,6 @@ static struct arm_boot_info aspeed_board_binfo = { .board_id = -1, /* device-tree-only board */ }; -struct AspeedMachineState { - /* Private */ - MachineState parent_obj; - /* Public */ - - AspeedSoCState *soc; - MemoryRegion boot_rom; - bool mmio_exec; - uint32_t uart_chosen; - char *fmc_model; - char *spi_model; - uint32_t hw_strap1; -}; - -/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */ -#if HOST_LONG_BITS == 32 -#define ASPEED_RAM_SIZE(sz) MIN((sz), 1 * GiB) -#else -#define ASPEED_RAM_SIZE(sz) (sz) -#endif - -/* Palmetto hardware value: 0x120CE416 */ -#define PALMETTO_BMC_HW_STRAP1 ( \ - SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) | \ - SCU_AST2400_HW_STRAP_DRAM_CONFIG(2 /* DDR3 with CL=6, CWL=5 */) | \ - SCU_AST2400_HW_STRAP_ACPI_DIS | \ - SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \ - SCU_HW_STRAP_VGA_CLASS_CODE | \ - SCU_HW_STRAP_LPC_RESET_PIN | \ - SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \ - SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \ - SCU_HW_STRAP_SPI_WIDTH | \ - SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ - SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT)) - -/* TODO: Find the actual hardware value */ -#define SUPERMICROX11_BMC_HW_STRAP1 ( \ - SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \ - SCU_AST2400_HW_STRAP_DRAM_CONFIG(2) | \ - SCU_AST2400_HW_STRAP_ACPI_DIS | \ - SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \ - SCU_HW_STRAP_VGA_CLASS_CODE | \ - SCU_HW_STRAP_LPC_RESET_PIN | \ - SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \ - SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \ - SCU_HW_STRAP_SPI_WIDTH | \ - SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ - SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT)) - -/* TODO: Find the actual hardware value */ -#define SUPERMICRO_X11SPI_BMC_HW_STRAP1 ( \ - AST2500_HW_STRAP1_DEFAULTS | \ - SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ - SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ - SCU_AST2500_HW_STRAP_UART_DEBUG | \ - SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ - SCU_HW_STRAP_SPI_WIDTH | \ - SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN)) - -/* AST2500 evb hardware value: 0xF100C2E6 */ -#define AST2500_EVB_HW_STRAP1 (( \ - AST2500_HW_STRAP1_DEFAULTS | \ - SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ - SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ - SCU_AST2500_HW_STRAP_UART_DEBUG | \ - SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ - SCU_HW_STRAP_MAC1_RGMII | \ - SCU_HW_STRAP_MAC0_RGMII) & \ - ~SCU_HW_STRAP_2ND_BOOT_WDT) - -/* Romulus hardware value: 0xF10AD206 */ -#define ROMULUS_BMC_HW_STRAP1 ( \ - AST2500_HW_STRAP1_DEFAULTS | \ - SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ - SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ - SCU_AST2500_HW_STRAP_UART_DEBUG | \ - SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ - SCU_AST2500_HW_STRAP_ACPI_ENABLE | \ - SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER)) - -/* Sonorapass hardware value: 0xF100D216 */ -#define SONORAPASS_BMC_HW_STRAP1 ( \ - SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ - SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ - SCU_AST2500_HW_STRAP_UART_DEBUG | \ - SCU_AST2500_HW_STRAP_RESERVED28 | \ - SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ - SCU_HW_STRAP_VGA_CLASS_CODE | \ - SCU_HW_STRAP_LPC_RESET_PIN | \ - SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \ - SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \ - SCU_HW_STRAP_VGA_BIOS_ROM | \ - SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ - SCU_AST2500_HW_STRAP_RESERVED1) - -#define G220A_BMC_HW_STRAP1 ( \ - SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ - SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ - SCU_AST2500_HW_STRAP_UART_DEBUG | \ - SCU_AST2500_HW_STRAP_RESERVED28 | \ - SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ - SCU_HW_STRAP_2ND_BOOT_WDT | \ - SCU_HW_STRAP_VGA_CLASS_CODE | \ - SCU_HW_STRAP_LPC_RESET_PIN | \ - SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \ - SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \ - SCU_HW_STRAP_VGA_SIZE_SET(VGA_64M_DRAM) | \ - SCU_AST2500_HW_STRAP_RESERVED1) - -/* FP5280G2 hardware value: 0XF100D286 */ -#define FP5280G2_BMC_HW_STRAP1 ( \ - SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ - SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ - SCU_AST2500_HW_STRAP_UART_DEBUG | \ - SCU_AST2500_HW_STRAP_RESERVED28 | \ - SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ - SCU_HW_STRAP_VGA_CLASS_CODE | \ - SCU_HW_STRAP_LPC_RESET_PIN | \ - SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \ - SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \ - SCU_HW_STRAP_MAC1_RGMII | \ - SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ - SCU_AST2500_HW_STRAP_RESERVED1) - -/* Witherspoon hardware value: 0xF10AD216 (but use romulus definition) */ -#define WITHERSPOON_BMC_HW_STRAP1 ROMULUS_BMC_HW_STRAP1 - -/* Quanta-Q71l hardware value */ -#define QUANTA_Q71L_BMC_HW_STRAP1 ( \ - SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \ - SCU_AST2400_HW_STRAP_DRAM_CONFIG(2/* DDR3 with CL=6, CWL=5 */) | \ - SCU_AST2400_HW_STRAP_ACPI_DIS | \ - SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_24M_IN) | \ - SCU_HW_STRAP_VGA_CLASS_CODE | \ - SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_PASS_THROUGH) | \ - SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \ - SCU_HW_STRAP_SPI_WIDTH | \ - SCU_HW_STRAP_VGA_SIZE_SET(VGA_8M_DRAM) | \ - SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT)) - -/* AST2600 evb hardware value */ -#define AST2600_EVB_HW_STRAP1 0x000000C0 -#define AST2600_EVB_HW_STRAP2 0x00000003 - -#ifdef TARGET_AARCH64 -/* AST2700 evb hardware value */ -/* SCU HW Strap1 */ -#define AST2700_EVB_HW_STRAP1 0x00000800 -/* SCUIO HW Strap1 */ -#define AST2700_EVB_HW_STRAP2 0x00000700 -#endif - -/* Rainier hardware value: (QEMU prototype) */ -#define RAINIER_BMC_HW_STRAP1 (0x00422016 | SCU_AST2600_HW_STRAP_BOOT_SRC_EMMC) -#define RAINIER_BMC_HW_STRAP2 0x80000848 - -/* Fuji hardware value */ -#define FUJI_BMC_HW_STRAP1 0x00000000 -#define FUJI_BMC_HW_STRAP2 0x00000000 - -/* Bletchley hardware value */ -#define BLETCHLEY_BMC_HW_STRAP1 0x00002000 -#define BLETCHLEY_BMC_HW_STRAP2 0x00000801 - -/* GB200NVL hardware value */ -#define GB200NVL_BMC_HW_STRAP1 AST2600_EVB_HW_STRAP1 -#define GB200NVL_BMC_HW_STRAP2 AST2600_EVB_HW_STRAP2 - -/* Qualcomm DC-SCM hardware value */ -#define QCOM_DC_SCM_V1_BMC_HW_STRAP1 0x00000000 -#define QCOM_DC_SCM_V1_BMC_HW_STRAP2 0x00000041 - #define AST_SMP_MAILBOX_BASE 0x1e6e2180 #define AST_SMP_MBOX_FIELD_ENTRY (AST_SMP_MAILBOX_BASE + 0x0) #define AST_SMP_MBOX_FIELD_GOSIGN (AST_SMP_MAILBOX_BASE + 0x4) @@ -293,7 +113,7 @@ static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo, bool emmc, &error_fatal); } -static void connect_serial_hds_to_uarts(AspeedMachineState *bmc) +void aspeed_connect_serial_hds_to_uarts(AspeedMachineState *bmc) { AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(bmc); AspeedSoCState *s = bmc->soc; @@ -364,7 +184,7 @@ static void aspeed_machine_init(MachineState *machine) object_property_set_int(OBJECT(bmc->soc), "hw-prot-key", ASPEED_SCU_PROT_KEY, &error_abort); } - connect_serial_hds_to_uarts(bmc); + aspeed_connect_serial_hds_to_uarts(bmc); qdev_realize(DEVICE(bmc->soc), NULL, &error_abort); if (defaults_enabled()) { @@ -431,827 +251,18 @@ static void aspeed_machine_init(MachineState *machine) arm_load_kernel(ARM_CPU(first_cpu), machine, &aspeed_board_binfo); } -static void palmetto_bmc_i2c_init(AspeedMachineState *bmc) -{ - AspeedSoCState *soc = bmc->soc; - DeviceState *dev; - uint8_t *eeprom_buf = g_malloc0(32 * 1024); - - /* - * The palmetto platform expects a ds3231 RTC but a ds1338 is - * enough to provide basic RTC features. Alarms will be missing - */ - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0), "ds1338", 0x68); - - smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50, - eeprom_buf); - - /* add a TMP423 temperature sensor */ - dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), - "tmp423", 0x4c)); - object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort); - object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort); - object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort); - object_property_set_int(OBJECT(dev), "temperature3", 110000, &error_abort); -} - -static void quanta_q71l_bmc_i2c_init(AspeedMachineState *bmc) -{ - AspeedSoCState *soc = bmc->soc; - - /* - * The quanta-q71l platform expects tmp75s which are compatible with - * tmp105s. - */ - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4c); - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4e); - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4f); - - /* TODO: i2c-1: Add baseboard FRU eeprom@54 24c64 */ - /* TODO: i2c-1: Add Frontpanel FRU eeprom@57 24c64 */ - /* TODO: Add Memory Riser i2c mux and eeproms. */ - - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "pca9546", 0x74); - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "pca9548", 0x77); - - /* TODO: i2c-3: Add BIOS FRU eeprom@56 24c64 */ - - /* i2c-7 */ - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "pca9546", 0x70); - /* - i2c@0: pmbus@59 */ - /* - i2c@1: pmbus@58 */ - /* - i2c@2: pmbus@58 */ - /* - i2c@3: pmbus@59 */ - - /* TODO: i2c-7: Add PDB FRU eeprom@52 */ - /* TODO: i2c-8: Add BMC FRU eeprom@50 */ -} - -static void ast2500_evb_i2c_init(AspeedMachineState *bmc) -{ - AspeedSoCState *soc = bmc->soc; - uint8_t *eeprom_buf = g_malloc0(8 * 1024); - - smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 3), 0x50, - eeprom_buf); - - /* The AST2500 EVB expects a LM75 but a TMP105 is compatible */ - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), - TYPE_TMP105, 0x4d); -} - -static void ast2600_evb_i2c_init(AspeedMachineState *bmc) -{ - AspeedSoCState *soc = bmc->soc; - uint8_t *eeprom_buf = g_malloc0(8 * 1024); - - smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 7), 0x50, - eeprom_buf); - - /* LM75 is compatible with TMP105 driver */ - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), - TYPE_TMP105, 0x4d); -} - -static void yosemitev2_bmc_i2c_init(AspeedMachineState *bmc) -{ - AspeedSoCState *soc = bmc->soc; - - at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 4), 0x51, 128 * KiB); - at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 8), 0x51, 128 * KiB, - yosemitev2_bmc_fruid, yosemitev2_bmc_fruid_len); - /* TMP421 */ - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "tmp421", 0x1f); - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp421", 0x4e); - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp421", 0x4f); - -} - -static void romulus_bmc_i2c_init(AspeedMachineState *bmc) -{ - AspeedSoCState *soc = bmc->soc; - - /* - * The romulus board expects Epson RX8900 I2C RTC but a ds1338 is - * good enough - */ - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "ds1338", 0x32); -} - -static void tiogapass_bmc_i2c_init(AspeedMachineState *bmc) -{ - AspeedSoCState *soc = bmc->soc; - - at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 4), 0x54, 128 * KiB); - at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 6), 0x54, 128 * KiB, - tiogapass_bmc_fruid, tiogapass_bmc_fruid_len); - /* TMP421 */ - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), "tmp421", 0x1f); - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp421", 0x4f); - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp421", 0x4e); -} - -static void create_pca9552(AspeedSoCState *soc, int bus_id, int addr) +void aspeed_create_pca9552(AspeedSoCState *soc, int bus_id, int addr) { i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, bus_id), TYPE_PCA9552, addr); } -static I2CSlave *create_pca9554(AspeedSoCState *soc, int bus_id, int addr) +I2CSlave *aspeed_create_pca9554(AspeedSoCState *soc, int bus_id, int addr) { return i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, bus_id), TYPE_PCA9554, addr); } -static void sonorapass_bmc_i2c_init(AspeedMachineState *bmc) -{ - AspeedSoCState *soc = bmc->soc; - - /* bus 2 : */ - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "tmp105", 0x48); - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "tmp105", 0x49); - /* bus 2 : pca9546 @ 0x73 */ - - /* bus 3 : pca9548 @ 0x70 */ - - /* bus 4 : */ - uint8_t *eeprom4_54 = g_malloc0(8 * 1024); - smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 4), 0x54, - eeprom4_54); - /* PCA9539 @ 0x76, but PCA9552 is compatible */ - create_pca9552(soc, 4, 0x76); - /* PCA9539 @ 0x77, but PCA9552 is compatible */ - create_pca9552(soc, 4, 0x77); - - /* bus 6 : */ - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp105", 0x48); - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp105", 0x49); - /* bus 6 : pca9546 @ 0x73 */ - - /* bus 8 : */ - uint8_t *eeprom8_56 = g_malloc0(8 * 1024); - smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 8), 0x56, - eeprom8_56); - create_pca9552(soc, 8, 0x60); - create_pca9552(soc, 8, 0x61); - /* bus 8 : adc128d818 @ 0x1d */ - /* bus 8 : adc128d818 @ 0x1f */ - - /* - * bus 13 : pca9548 @ 0x71 - * - channel 3: - * - tmm421 @ 0x4c - * - tmp421 @ 0x4e - * - tmp421 @ 0x4f - */ - -} - -static void witherspoon_bmc_i2c_init(AspeedMachineState *bmc) -{ - static const struct { - unsigned gpio_id; - LEDColor color; - const char *description; - bool gpio_polarity; - } pca1_leds[] = { - {13, LED_COLOR_GREEN, "front-fault-4", GPIO_POLARITY_ACTIVE_LOW}, - {14, LED_COLOR_GREEN, "front-power-3", GPIO_POLARITY_ACTIVE_LOW}, - {15, LED_COLOR_GREEN, "front-id-5", GPIO_POLARITY_ACTIVE_LOW}, - }; - AspeedSoCState *soc = bmc->soc; - uint8_t *eeprom_buf = g_malloc0(8 * 1024); - DeviceState *dev; - LEDState *led; - - /* Bus 3: TODO bmp280@77 */ - dev = DEVICE(i2c_slave_new(TYPE_PCA9552, 0x60)); - qdev_prop_set_string(dev, "description", "pca1"); - i2c_slave_realize_and_unref(I2C_SLAVE(dev), - aspeed_i2c_get_bus(&soc->i2c, 3), - &error_fatal); - - for (size_t i = 0; i < ARRAY_SIZE(pca1_leds); i++) { - led = led_create_simple(OBJECT(bmc), - pca1_leds[i].gpio_polarity, - pca1_leds[i].color, - pca1_leds[i].description); - qdev_connect_gpio_out(dev, pca1_leds[i].gpio_id, - qdev_get_gpio_in(DEVICE(led), 0)); - } - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3), "dps310", 0x76); - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3), "max31785", 0x52); - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), "tmp423", 0x4c); - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), "tmp423", 0x4c); - - /* The Witherspoon expects a TMP275 but a TMP105 is compatible */ - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), TYPE_TMP105, - 0x4a); - - /* - * The witherspoon board expects Epson RX8900 I2C RTC but a ds1338 is - * good enough - */ - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "ds1338", 0x32); - - smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 11), 0x51, - eeprom_buf); - dev = DEVICE(i2c_slave_new(TYPE_PCA9552, 0x60)); - qdev_prop_set_string(dev, "description", "pca0"); - i2c_slave_realize_and_unref(I2C_SLAVE(dev), - aspeed_i2c_get_bus(&soc->i2c, 11), - &error_fatal); - /* Bus 11: TODO ucd90160@64 */ -} - -static void g220a_bmc_i2c_init(AspeedMachineState *bmc) -{ - AspeedSoCState *soc = bmc->soc; - DeviceState *dev; - - dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3), - "emc1413", 0x4c)); - object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort); - object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort); - object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort); - - dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 12), - "emc1413", 0x4c)); - object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort); - object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort); - object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort); - - dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 13), - "emc1413", 0x4c)); - object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort); - object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort); - object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort); - - static uint8_t eeprom_buf[2 * 1024] = { - 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0xfe, - 0x01, 0x06, 0x00, 0xc9, 0x42, 0x79, 0x74, 0x65, - 0x64, 0x61, 0x6e, 0x63, 0x65, 0xc5, 0x47, 0x32, - 0x32, 0x30, 0x41, 0xc4, 0x41, 0x41, 0x42, 0x42, - 0xc4, 0x43, 0x43, 0x44, 0x44, 0xc4, 0x45, 0x45, - 0x46, 0x46, 0xc4, 0x48, 0x48, 0x47, 0x47, 0xc1, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa7, - }; - smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 4), 0x57, - eeprom_buf); -} - -static void fp5280g2_bmc_i2c_init(AspeedMachineState *bmc) -{ - AspeedSoCState *soc = bmc->soc; - I2CSlave *i2c_mux; - - /* The at24c256 */ - at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 1), 0x50, 32768); - - /* The fp5280g2 expects a TMP112 but a TMP105 is compatible */ - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), TYPE_TMP105, - 0x48); - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), TYPE_TMP105, - 0x49); - - i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), - "pca9546", 0x70); - /* It expects a TMP112 but a TMP105 is compatible */ - i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 0), TYPE_TMP105, - 0x4a); - - /* It expects a ds3232 but a ds1338 is good enough */ - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), "ds1338", 0x68); - - /* It expects a pca9555 but a pca9552 is compatible */ - create_pca9552(soc, 8, 0x30); -} - -static void rainier_bmc_i2c_init(AspeedMachineState *bmc) -{ - AspeedSoCState *soc = bmc->soc; - I2CSlave *i2c_mux; - - at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 0), 0x51, 32 * KiB); - - create_pca9552(soc, 3, 0x61); - - /* The rainier expects a TMP275 but a TMP105 is compatible */ - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105, - 0x48); - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105, - 0x49); - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105, - 0x4a); - i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), - "pca9546", 0x70); - at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB); - at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB); - at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 2), 0x52, 64 * KiB); - create_pca9552(soc, 4, 0x60); - - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), TYPE_TMP105, - 0x48); - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), TYPE_TMP105, - 0x49); - create_pca9552(soc, 5, 0x60); - create_pca9552(soc, 5, 0x61); - i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), - "pca9546", 0x70); - at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB); - at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB); - - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105, - 0x48); - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105, - 0x4a); - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105, - 0x4b); - i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), - "pca9546", 0x70); - at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB); - at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB); - at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 2), 0x50, 64 * KiB); - at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 3), 0x51, 64 * KiB); - - create_pca9552(soc, 7, 0x30); - create_pca9552(soc, 7, 0x31); - create_pca9552(soc, 7, 0x32); - create_pca9552(soc, 7, 0x33); - create_pca9552(soc, 7, 0x60); - create_pca9552(soc, 7, 0x61); - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "dps310", 0x76); - /* Bus 7: TODO si7021-a20@20 */ - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), TYPE_TMP105, - 0x48); - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "max31785", 0x52); - at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 7), 0x50, 64 * KiB); - at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 7), 0x51, 64 * KiB); - - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), TYPE_TMP105, - 0x48); - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), TYPE_TMP105, - 0x4a); - at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 8), 0x50, - 64 * KiB, rainier_bb_fruid, rainier_bb_fruid_len); - at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 8), 0x51, - 64 * KiB, rainier_bmc_fruid, rainier_bmc_fruid_len); - create_pca9552(soc, 8, 0x60); - create_pca9552(soc, 8, 0x61); - /* Bus 8: ucd90320@11 */ - /* Bus 8: ucd90320@b */ - /* Bus 8: ucd90320@c */ - - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp423", 0x4c); - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp423", 0x4d); - at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 9), 0x50, 128 * KiB); - - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 10), "tmp423", 0x4c); - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 10), "tmp423", 0x4d); - at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 10), 0x50, 128 * KiB); - - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), TYPE_TMP105, - 0x48); - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), TYPE_TMP105, - 0x49); - i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), - "pca9546", 0x70); - at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB); - at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB); - create_pca9552(soc, 11, 0x60); - - - at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 13), 0x50, 64 * KiB); - create_pca9552(soc, 13, 0x60); - - at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 14), 0x50, 64 * KiB); - create_pca9552(soc, 14, 0x60); - - at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 15), 0x50, 64 * KiB); - create_pca9552(soc, 15, 0x60); -} - -static void get_pca9548_channels(I2CBus *bus, uint8_t mux_addr, - I2CBus **channels) -{ - I2CSlave *mux = i2c_slave_create_simple(bus, "pca9548", mux_addr); - for (int i = 0; i < 8; i++) { - channels[i] = pca954x_i2c_get_bus(mux, i); - } -} - -#define TYPE_LM75 TYPE_TMP105 -#define TYPE_TMP75 TYPE_TMP105 -#define TYPE_TMP422 "tmp422" - -static void fuji_bmc_i2c_init(AspeedMachineState *bmc) -{ - AspeedSoCState *soc = bmc->soc; - I2CBus *i2c[144] = {}; - - for (int i = 0; i < 16; i++) { - i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i); - } - I2CBus *i2c180 = i2c[2]; - I2CBus *i2c480 = i2c[8]; - I2CBus *i2c600 = i2c[11]; - - get_pca9548_channels(i2c180, 0x70, &i2c[16]); - get_pca9548_channels(i2c480, 0x70, &i2c[24]); - /* NOTE: The device tree skips [32, 40) in the alias numbering */ - get_pca9548_channels(i2c600, 0x77, &i2c[40]); - get_pca9548_channels(i2c[24], 0x71, &i2c[48]); - get_pca9548_channels(i2c[25], 0x72, &i2c[56]); - get_pca9548_channels(i2c[26], 0x76, &i2c[64]); - get_pca9548_channels(i2c[27], 0x76, &i2c[72]); - for (int i = 0; i < 8; i++) { - get_pca9548_channels(i2c[40 + i], 0x76, &i2c[80 + i * 8]); - } - - i2c_slave_create_simple(i2c[17], TYPE_LM75, 0x4c); - i2c_slave_create_simple(i2c[17], TYPE_LM75, 0x4d); - - /* - * EEPROM 24c64 size is 64Kbits or 8 Kbytes - * 24c02 size is 2Kbits or 256 bytes - */ - at24c_eeprom_init(i2c[19], 0x52, 8 * KiB); - at24c_eeprom_init(i2c[20], 0x50, 256); - at24c_eeprom_init(i2c[22], 0x52, 256); - - i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x48); - i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x49); - i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x4a); - i2c_slave_create_simple(i2c[3], TYPE_TMP422, 0x4c); - - at24c_eeprom_init(i2c[8], 0x51, 8 * KiB); - i2c_slave_create_simple(i2c[8], TYPE_LM75, 0x4a); - - i2c_slave_create_simple(i2c[50], TYPE_LM75, 0x4c); - at24c_eeprom_init(i2c[50], 0x52, 8 * KiB); - i2c_slave_create_simple(i2c[51], TYPE_TMP75, 0x48); - i2c_slave_create_simple(i2c[52], TYPE_TMP75, 0x49); - - i2c_slave_create_simple(i2c[59], TYPE_TMP75, 0x48); - i2c_slave_create_simple(i2c[60], TYPE_TMP75, 0x49); - - at24c_eeprom_init(i2c[65], 0x53, 8 * KiB); - i2c_slave_create_simple(i2c[66], TYPE_TMP75, 0x49); - i2c_slave_create_simple(i2c[66], TYPE_TMP75, 0x48); - at24c_eeprom_init(i2c[68], 0x52, 8 * KiB); - at24c_eeprom_init(i2c[69], 0x52, 8 * KiB); - at24c_eeprom_init(i2c[70], 0x52, 8 * KiB); - at24c_eeprom_init(i2c[71], 0x52, 8 * KiB); - - at24c_eeprom_init(i2c[73], 0x53, 8 * KiB); - i2c_slave_create_simple(i2c[74], TYPE_TMP75, 0x49); - i2c_slave_create_simple(i2c[74], TYPE_TMP75, 0x48); - at24c_eeprom_init(i2c[76], 0x52, 8 * KiB); - at24c_eeprom_init(i2c[77], 0x52, 8 * KiB); - at24c_eeprom_init(i2c[78], 0x52, 8 * KiB); - at24c_eeprom_init(i2c[79], 0x52, 8 * KiB); - at24c_eeprom_init(i2c[28], 0x50, 256); - - for (int i = 0; i < 8; i++) { - at24c_eeprom_init(i2c[81 + i * 8], 0x56, 64 * KiB); - i2c_slave_create_simple(i2c[82 + i * 8], TYPE_TMP75, 0x48); - i2c_slave_create_simple(i2c[83 + i * 8], TYPE_TMP75, 0x4b); - i2c_slave_create_simple(i2c[84 + i * 8], TYPE_TMP75, 0x4a); - } -} - -#define TYPE_TMP421 "tmp421" -#define TYPE_DS1338 "ds1338" - -/* Catalina hardware value */ -#define CATALINA_BMC_HW_STRAP1 0x00002002 -#define CATALINA_BMC_HW_STRAP2 0x00000800 - -#define CATALINA_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB) - -static void catalina_bmc_i2c_init(AspeedMachineState *bmc) -{ - /* Reference from v6.16-rc2 aspeed-bmc-facebook-catalina.dts */ - - AspeedSoCState *soc = bmc->soc; - I2CBus *i2c[16] = {}; - I2CSlave *i2c_mux; - - /* busses 0-15 are all used. */ - for (int i = 0; i < ARRAY_SIZE(i2c); i++) { - i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i); - } - - /* &i2c0 */ - /* i2c-mux@71 (PCA9546) on i2c0 */ - i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x71); - - /* i2c-mux@72 (PCA9546) on i2c0 */ - i2c_mux = i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x72); - - /* i2c0mux1ch1 */ - /* io_expander7 - pca9535@20 */ - i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 1), - TYPE_PCA9552, 0x20); - /* eeprom@50 */ - at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x50, 8 * KiB); - - /* i2c-mux@73 (PCA9546) on i2c0 */ - i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x73); - - /* i2c-mux@75 (PCA9546) on i2c0 */ - i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x75); - - /* i2c-mux@76 (PCA9546) on i2c0 */ - i2c_mux = i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x76); - - /* i2c0mux4ch1 */ - /* io_expander8 - pca9535@21 */ - i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 1), - TYPE_PCA9552, 0x21); - /* eeprom@50 */ - at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x50, 8 * KiB); - - /* i2c-mux@77 (PCA9546) on i2c0 */ - i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x77); - - - /* &i2c1 */ - /* i2c-mux@70 (PCA9548) on i2c1 */ - i2c_mux = i2c_slave_create_simple(i2c[1], TYPE_PCA9548, 0x70); - /* i2c1mux0ch0 */ - /* ina238@41 - no model */ - /* ina238@42 - no model */ - /* ina238@44 - no model */ - /* i2c1mux0ch1 */ - /* ina238@41 - no model */ - /* ina238@43 - no model */ - /* i2c1mux0ch4 */ - /* ltc4287@42 - no model */ - /* ltc4287@43 - no model */ - - /* i2c1mux0ch5 */ - /* eeprom@54 */ - at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 5), 0x54, 8 * KiB); - /* tpm75@4f */ - i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 5), TYPE_TMP75, 0x4f); - - /* i2c1mux0ch6 */ - /* io_expander5 - pca9554@27 */ - i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 6), - TYPE_PCA9554, 0x27); - /* io_expander6 - pca9555@25 */ - i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 6), - TYPE_PCA9552, 0x25); - /* eeprom@51 */ - at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 6), 0x51, 8 * KiB); - - /* i2c1mux0ch7 */ - /* eeprom@53 */ - at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 7), 0x53, 8 * KiB); - /* temperature-sensor@4b - tmp75 */ - i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 7), TYPE_TMP75, 0x4b); - - /* &i2c2 */ - /* io_expander0 - pca9555@20 */ - i2c_slave_create_simple(i2c[2], TYPE_PCA9552, 0x20); - /* io_expander0 - pca9555@21 */ - i2c_slave_create_simple(i2c[2], TYPE_PCA9552, 0x21); - /* io_expander0 - pca9555@27 */ - i2c_slave_create_simple(i2c[2], TYPE_PCA9552, 0x27); - /* eeprom@50 */ - at24c_eeprom_init(i2c[2], 0x50, 8 * KiB); - /* eeprom@51 */ - at24c_eeprom_init(i2c[2], 0x51, 8 * KiB); - - /* &i2c5 */ - /* i2c-mux@70 (PCA9548) on i2c5 */ - i2c_mux = i2c_slave_create_simple(i2c[5], TYPE_PCA9548, 0x70); - /* i2c5mux0ch6 */ - /* eeprom@52 */ - at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 6), 0x52, 8 * KiB); - /* i2c5mux0ch7 */ - /* ina230@40 - no model */ - /* ina230@41 - no model */ - /* ina230@44 - no model */ - /* ina230@45 - no model */ - - /* &i2c6 */ - /* io_expander3 - pca9555@21 */ - i2c_slave_create_simple(i2c[6], TYPE_PCA9552, 0x21); - /* rtc@6f - nct3018y */ - i2c_slave_create_simple(i2c[6], TYPE_DS1338, 0x6f); - - /* &i2c9 */ - /* io_expander4 - pca9555@4f */ - i2c_slave_create_simple(i2c[9], TYPE_PCA9552, 0x4f); - /* temperature-sensor@4b - tpm75 */ - i2c_slave_create_simple(i2c[9], TYPE_TMP75, 0x4b); - /* eeprom@50 */ - at24c_eeprom_init(i2c[9], 0x50, 8 * KiB); - /* eeprom@56 */ - at24c_eeprom_init(i2c[9], 0x56, 8 * KiB); - - /* &i2c10 */ - /* temperature-sensor@1f - tpm421 */ - i2c_slave_create_simple(i2c[10], TYPE_TMP421, 0x1f); - /* eeprom@50 */ - at24c_eeprom_init(i2c[10], 0x50, 8 * KiB); - - /* &i2c11 */ - /* ssif-bmc@10 - no model */ - - /* &i2c12 */ - /* eeprom@50 */ - at24c_eeprom_init(i2c[12], 0x50, 8 * KiB); - - /* &i2c13 */ - /* eeprom@50 */ - at24c_eeprom_init(i2c[13], 0x50, 8 * KiB); - /* eeprom@54 */ - at24c_eeprom_init(i2c[13], 0x54, 256); - /* eeprom@55 */ - at24c_eeprom_init(i2c[13], 0x55, 256); - /* eeprom@57 */ - at24c_eeprom_init(i2c[13], 0x57, 256); - - /* &i2c14 */ - /* io_expander9 - pca9555@10 */ - i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x10); - /* io_expander10 - pca9555@11 */ - i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x11); - /* io_expander11 - pca9555@12 */ - i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x12); - /* io_expander12 - pca9555@13 */ - i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x13); - /* io_expander13 - pca9555@14 */ - i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x14); - /* io_expander14 - pca9555@15 */ - i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x15); - - /* &i2c15 */ - /* temperature-sensor@1f - tmp421 */ - i2c_slave_create_simple(i2c[15], TYPE_TMP421, 0x1f); - /* eeprom@52 */ - at24c_eeprom_init(i2c[15], 0x52, 8 * KiB); -} - -static void bletchley_bmc_i2c_init(AspeedMachineState *bmc) -{ - AspeedSoCState *soc = bmc->soc; - I2CBus *i2c[13] = {}; - for (int i = 0; i < 13; i++) { - if ((i == 8) || (i == 11)) { - continue; - } - i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i); - } - - /* Bus 0 - 5 all have the same config. */ - for (int i = 0; i < 6; i++) { - /* Missing model: ti,ina230 @ 0x45 */ - /* Missing model: mps,mp5023 @ 0x40 */ - i2c_slave_create_simple(i2c[i], TYPE_TMP421, 0x4f); - /* Missing model: nxp,pca9539 @ 0x76, but PCA9552 works enough */ - i2c_slave_create_simple(i2c[i], TYPE_PCA9552, 0x76); - i2c_slave_create_simple(i2c[i], TYPE_PCA9552, 0x67); - /* Missing model: fsc,fusb302 @ 0x22 */ - } - - /* Bus 6 */ - at24c_eeprom_init(i2c[6], 0x56, 65536); - /* Missing model: nxp,pcf85263 @ 0x51 , but ds1338 works enough */ - i2c_slave_create_simple(i2c[6], "ds1338", 0x51); - - - /* Bus 7 */ - at24c_eeprom_init(i2c[7], 0x54, 65536); - - /* Bus 9 */ - i2c_slave_create_simple(i2c[9], TYPE_TMP421, 0x4f); - - /* Bus 10 */ - i2c_slave_create_simple(i2c[10], TYPE_TMP421, 0x4f); - /* Missing model: ti,hdc1080 @ 0x40 */ - i2c_slave_create_simple(i2c[10], TYPE_PCA9552, 0x67); - - /* Bus 12 */ - /* Missing model: adi,adm1278 @ 0x11 */ - i2c_slave_create_simple(i2c[12], TYPE_TMP421, 0x4c); - i2c_slave_create_simple(i2c[12], TYPE_TMP421, 0x4d); - i2c_slave_create_simple(i2c[12], TYPE_PCA9552, 0x67); -} - - -static void gb200nvl_bmc_i2c_init(AspeedMachineState *bmc) -{ - AspeedSoCState *soc = bmc->soc; - I2CBus *i2c[15] = {}; - DeviceState *dev; - for (int i = 0; i < sizeof(i2c) / sizeof(i2c[0]); i++) { - if ((i == 11) || (i == 12) || (i == 13)) { - continue; - } - i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i); - } - - /* Bus 5 Expander */ - create_pca9554(soc, 4, 0x21); - - /* Mux I2c Expanders */ - i2c_slave_create_simple(i2c[5], "pca9546", 0x71); - i2c_slave_create_simple(i2c[5], "pca9546", 0x72); - i2c_slave_create_simple(i2c[5], "pca9546", 0x73); - i2c_slave_create_simple(i2c[5], "pca9546", 0x75); - i2c_slave_create_simple(i2c[5], "pca9546", 0x76); - i2c_slave_create_simple(i2c[5], "pca9546", 0x77); - - /* Bus 10 */ - dev = DEVICE(create_pca9554(soc, 9, 0x20)); - - /* Set FPGA_READY */ - object_property_set_str(OBJECT(dev), "pin1", "high", &error_fatal); - - create_pca9554(soc, 9, 0x21); - at24c_eeprom_init(i2c[9], 0x50, 64 * KiB); - at24c_eeprom_init(i2c[9], 0x51, 64 * KiB); - - /* Bus 11 */ - at24c_eeprom_init_rom(i2c[10], 0x50, 256, gb200nvl_bmc_fruid, - gb200nvl_bmc_fruid_len); -} - -static void fby35_i2c_init(AspeedMachineState *bmc) -{ - AspeedSoCState *soc = bmc->soc; - I2CBus *i2c[16]; - - for (int i = 0; i < 16; i++) { - i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i); - } - - i2c_slave_create_simple(i2c[2], TYPE_LM75, 0x4f); - i2c_slave_create_simple(i2c[8], TYPE_TMP421, 0x1f); - /* Hotswap controller is actually supposed to be mp5920 or ltc4282. */ - i2c_slave_create_simple(i2c[11], "adm1272", 0x44); - i2c_slave_create_simple(i2c[12], TYPE_LM75, 0x4e); - i2c_slave_create_simple(i2c[12], TYPE_LM75, 0x4f); - - at24c_eeprom_init(i2c[4], 0x51, 128 * KiB); - at24c_eeprom_init(i2c[6], 0x51, 128 * KiB); - at24c_eeprom_init_rom(i2c[8], 0x50, 32 * KiB, fby35_nic_fruid, - fby35_nic_fruid_len); - at24c_eeprom_init_rom(i2c[11], 0x51, 128 * KiB, fby35_bb_fruid, - fby35_bb_fruid_len); - at24c_eeprom_init_rom(i2c[11], 0x54, 128 * KiB, fby35_bmc_fruid, - fby35_bmc_fruid_len); - - /* - * TODO: There is a multi-master i2c connection to an AST1030 MiniBMC on - * buses 0, 1, 2, 3, and 9. Source address 0x10, target address 0x20 on - * each. - */ -} - -static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState *bmc) -{ - AspeedSoCState *soc = bmc->soc; - - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 15), "tmp105", 0x4d); -} - -static void qcom_dc_scm_firework_i2c_init(AspeedMachineState *bmc) -{ - AspeedSoCState *soc = bmc->soc; - I2CSlave *therm_mux, *cpuvr_mux; - - /* Create the generic DC-SCM hardware */ - qcom_dc_scm_bmc_i2c_init(bmc); - - /* Now create the Firework specific hardware */ - - /* I2C7 CPUVR MUX */ - cpuvr_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), - "pca9546", 0x70); - i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 0), "pca9548", 0x72); - i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 1), "pca9548", 0x72); - i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 2), "pca9548", 0x72); - i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 3), "pca9548", 0x72); - - /* I2C8 Thermal Diodes*/ - therm_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), - "pca9548", 0x70); - i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 0), TYPE_LM75, 0x4C); - i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 1), TYPE_LM75, 0x4C); - i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 2), TYPE_LM75, 0x48); - i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 3), TYPE_LM75, 0x48); - i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 4), TYPE_LM75, 0x48); - - /* I2C9 Fan Controller (MAX31785) */ - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "max31785", 0x52); - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "max31785", 0x54); -} - static bool aspeed_get_mmio_exec(Object *obj, Error **errp) { return ASPEED_MACHINE(obj)->mmio_exec; @@ -1353,7 +364,7 @@ static void aspeed_machine_class_props_init(ObjectClass *oc) "Change the SPI Flash model"); } -static void aspeed_machine_class_init_cpus_defaults(MachineClass *mc) +void aspeed_machine_class_init_cpus_defaults(MachineClass *mc) { AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(mc); AspeedSoCClass *sc = ASPEED_SOC_CLASS(object_class_by_name(amc->soc_name)); @@ -1383,7 +394,7 @@ static void aspeed_machine_ast2600_set_boot_from_emmc(Object *obj, bool value, } } -static void aspeed_machine_ast2600_class_emmc_init(ObjectClass *oc) +void aspeed_machine_ast2600_class_emmc_init(ObjectClass *oc) { object_class_property_add_bool(oc, "boot-emmc", aspeed_machine_ast2600_get_boot_from_emmc, @@ -1408,685 +419,8 @@ static void aspeed_machine_class_init(ObjectClass *oc, const void *data) aspeed_machine_class_props_init(oc); } -static void aspeed_machine_palmetto_class_init(ObjectClass *oc, - const void *data) -{ - MachineClass *mc = MACHINE_CLASS(oc); - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); - - mc->desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)"; - amc->soc_name = "ast2400-a1"; - amc->hw_strap1 = PALMETTO_BMC_HW_STRAP1; - amc->fmc_model = "n25q256a"; - amc->spi_model = "mx25l25635f"; - amc->num_cs = 1; - amc->i2c_init = palmetto_bmc_i2c_init; - mc->default_ram_size = 256 * MiB; - aspeed_machine_class_init_cpus_defaults(mc); -}; - -static void aspeed_machine_quanta_q71l_class_init(ObjectClass *oc, - const void *data) -{ - MachineClass *mc = MACHINE_CLASS(oc); - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); - - mc->desc = "Quanta-Q71l BMC (ARM926EJ-S)"; - amc->soc_name = "ast2400-a1"; - amc->hw_strap1 = QUANTA_Q71L_BMC_HW_STRAP1; - amc->fmc_model = "n25q256a"; - amc->spi_model = "mx25l25635e"; - amc->num_cs = 1; - amc->i2c_init = quanta_q71l_bmc_i2c_init; - mc->default_ram_size = 128 * MiB; - aspeed_machine_class_init_cpus_defaults(mc); -} - -static void aspeed_machine_supermicrox11_bmc_class_init(ObjectClass *oc, - const void *data) -{ - MachineClass *mc = MACHINE_CLASS(oc); - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); - - mc->desc = "Supermicro X11 BMC (ARM926EJ-S)"; - amc->soc_name = "ast2400-a1"; - amc->hw_strap1 = SUPERMICROX11_BMC_HW_STRAP1; - amc->fmc_model = "mx25l25635e"; - amc->spi_model = "mx25l25635e"; - amc->num_cs = 1; - amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; - amc->i2c_init = palmetto_bmc_i2c_init; - mc->default_ram_size = 256 * MiB; - aspeed_machine_class_init_cpus_defaults(mc); -} - -static void aspeed_machine_supermicro_x11spi_bmc_class_init(ObjectClass *oc, - const void *data) -{ - MachineClass *mc = MACHINE_CLASS(oc); - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); - - mc->desc = "Supermicro X11 SPI BMC (ARM1176)"; - amc->soc_name = "ast2500-a1"; - amc->hw_strap1 = SUPERMICRO_X11SPI_BMC_HW_STRAP1; - amc->fmc_model = "mx25l25635e"; - amc->spi_model = "mx25l25635e"; - amc->num_cs = 1; - amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; - amc->i2c_init = palmetto_bmc_i2c_init; - mc->default_ram_size = 512 * MiB; - aspeed_machine_class_init_cpus_defaults(mc); -} - -static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc, - const void *data) -{ - MachineClass *mc = MACHINE_CLASS(oc); - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); - - mc->desc = "Aspeed AST2500 EVB (ARM1176)"; - amc->soc_name = "ast2500-a1"; - amc->hw_strap1 = AST2500_EVB_HW_STRAP1; - amc->fmc_model = "mx25l25635e"; - amc->spi_model = "mx25l25635f"; - amc->num_cs = 1; - amc->i2c_init = ast2500_evb_i2c_init; - mc->default_ram_size = 512 * MiB; - aspeed_machine_class_init_cpus_defaults(mc); -}; - -static void aspeed_machine_yosemitev2_class_init(ObjectClass *oc, - const void *data) -{ - MachineClass *mc = MACHINE_CLASS(oc); - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); - - mc->desc = "Facebook YosemiteV2 BMC (ARM1176)"; - amc->soc_name = "ast2500-a1"; - amc->hw_strap1 = AST2500_EVB_HW_STRAP1; - amc->hw_strap2 = 0; - amc->fmc_model = "n25q256a"; - amc->spi_model = "mx25l25635e"; - amc->num_cs = 2; - amc->i2c_init = yosemitev2_bmc_i2c_init; - mc->default_ram_size = 512 * MiB; - aspeed_machine_class_init_cpus_defaults(mc); -}; - -static void aspeed_machine_romulus_class_init(ObjectClass *oc, - const void *data) -{ - MachineClass *mc = MACHINE_CLASS(oc); - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); - - mc->desc = "OpenPOWER Romulus BMC (ARM1176)"; - amc->soc_name = "ast2500-a1"; - amc->hw_strap1 = ROMULUS_BMC_HW_STRAP1; - amc->fmc_model = "n25q256a"; - amc->spi_model = "mx66l1g45g"; - amc->num_cs = 2; - amc->i2c_init = romulus_bmc_i2c_init; - mc->default_ram_size = 512 * MiB; - aspeed_machine_class_init_cpus_defaults(mc); -}; - -static void aspeed_machine_tiogapass_class_init(ObjectClass *oc, - const void *data) -{ - MachineClass *mc = MACHINE_CLASS(oc); - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); - - mc->desc = "Facebook Tiogapass BMC (ARM1176)"; - amc->soc_name = "ast2500-a1"; - amc->hw_strap1 = AST2500_EVB_HW_STRAP1; - amc->hw_strap2 = 0; - amc->fmc_model = "n25q256a"; - amc->spi_model = "mx25l25635e"; - amc->num_cs = 2; - amc->i2c_init = tiogapass_bmc_i2c_init; - mc->default_ram_size = 1 * GiB; - aspeed_machine_class_init_cpus_defaults(mc); -}; - -static void aspeed_machine_sonorapass_class_init(ObjectClass *oc, - const void *data) -{ - MachineClass *mc = MACHINE_CLASS(oc); - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); - - mc->desc = "OCP SonoraPass BMC (ARM1176)"; - mc->deprecation_reason = "use 'ast2500-evb' instead"; - amc->soc_name = "ast2500-a1"; - amc->hw_strap1 = SONORAPASS_BMC_HW_STRAP1; - amc->fmc_model = "mx66l1g45g"; - amc->spi_model = "mx66l1g45g"; - amc->num_cs = 2; - amc->i2c_init = sonorapass_bmc_i2c_init; - mc->default_ram_size = 512 * MiB; - aspeed_machine_class_init_cpus_defaults(mc); -}; - -static void aspeed_machine_witherspoon_class_init(ObjectClass *oc, - const void *data) -{ - MachineClass *mc = MACHINE_CLASS(oc); - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); - - mc->desc = "OpenPOWER Witherspoon BMC (ARM1176)"; - amc->soc_name = "ast2500-a1"; - amc->hw_strap1 = WITHERSPOON_BMC_HW_STRAP1; - amc->fmc_model = "mx25l25635f"; - amc->spi_model = "mx66l1g45g"; - amc->num_cs = 2; - amc->i2c_init = witherspoon_bmc_i2c_init; - mc->default_ram_size = 512 * MiB; - aspeed_machine_class_init_cpus_defaults(mc); -}; - -static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc, - const void *data) -{ - MachineClass *mc = MACHINE_CLASS(oc); - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); - - mc->desc = "Aspeed AST2600 EVB (Cortex-A7)"; - amc->soc_name = "ast2600-a3"; - amc->hw_strap1 = AST2600_EVB_HW_STRAP1; - amc->hw_strap2 = AST2600_EVB_HW_STRAP2; - amc->fmc_model = "w25q512jv"; - amc->spi_model = "w25q512jv"; - amc->num_cs = 1; - amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON | - ASPEED_MAC3_ON; - amc->sdhci_wp_inverted = true; - amc->i2c_init = ast2600_evb_i2c_init; - mc->default_ram_size = 1 * GiB; - aspeed_machine_class_init_cpus_defaults(mc); - aspeed_machine_ast2600_class_emmc_init(oc); -}; - -static void aspeed_machine_g220a_class_init(ObjectClass *oc, const void *data) -{ - MachineClass *mc = MACHINE_CLASS(oc); - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); - - mc->desc = "Bytedance G220A BMC (ARM1176)"; - amc->soc_name = "ast2500-a1"; - amc->hw_strap1 = G220A_BMC_HW_STRAP1; - amc->fmc_model = "n25q512a"; - amc->spi_model = "mx25l25635e"; - amc->num_cs = 2; - amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; - amc->i2c_init = g220a_bmc_i2c_init; - mc->default_ram_size = 1024 * MiB; - aspeed_machine_class_init_cpus_defaults(mc); -}; - -static void aspeed_machine_fp5280g2_class_init(ObjectClass *oc, - const void *data) -{ - MachineClass *mc = MACHINE_CLASS(oc); - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); - - mc->desc = "Inspur FP5280G2 BMC (ARM1176)"; - mc->deprecation_reason = "use 'ast2500-evb' instead"; - amc->soc_name = "ast2500-a1"; - amc->hw_strap1 = FP5280G2_BMC_HW_STRAP1; - amc->fmc_model = "n25q512a"; - amc->spi_model = "mx25l25635e"; - amc->num_cs = 2; - amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; - amc->i2c_init = fp5280g2_bmc_i2c_init; - mc->default_ram_size = 512 * MiB; - aspeed_machine_class_init_cpus_defaults(mc); -}; - -static void aspeed_machine_rainier_class_init(ObjectClass *oc, const void *data) -{ - MachineClass *mc = MACHINE_CLASS(oc); - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); - - mc->desc = "IBM Rainier BMC (Cortex-A7)"; - amc->soc_name = "ast2600-a3"; - amc->hw_strap1 = RAINIER_BMC_HW_STRAP1; - amc->hw_strap2 = RAINIER_BMC_HW_STRAP2; - amc->fmc_model = "mx66l1g45g"; - amc->spi_model = "mx66l1g45g"; - amc->num_cs = 2; - amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON; - amc->i2c_init = rainier_bmc_i2c_init; - mc->default_ram_size = 1 * GiB; - aspeed_machine_class_init_cpus_defaults(mc); - aspeed_machine_ast2600_class_emmc_init(oc); -}; - -#define FUJI_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB) - -static void aspeed_machine_fuji_class_init(ObjectClass *oc, const void *data) -{ - MachineClass *mc = MACHINE_CLASS(oc); - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); - - mc->desc = "Facebook Fuji BMC (Cortex-A7)"; - amc->soc_name = "ast2600-a3"; - amc->hw_strap1 = FUJI_BMC_HW_STRAP1; - amc->hw_strap2 = FUJI_BMC_HW_STRAP2; - amc->fmc_model = "mx66l1g45g"; - amc->spi_model = "mx66l1g45g"; - amc->num_cs = 2; - amc->macs_mask = ASPEED_MAC3_ON; - amc->i2c_init = fuji_bmc_i2c_init; - amc->uart_default = ASPEED_DEV_UART1; - mc->default_ram_size = FUJI_BMC_RAM_SIZE; - aspeed_machine_class_init_cpus_defaults(mc); -}; - -#define BLETCHLEY_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB) - -static void aspeed_machine_bletchley_class_init(ObjectClass *oc, - const void *data) -{ - MachineClass *mc = MACHINE_CLASS(oc); - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); - - mc->desc = "Facebook Bletchley BMC (Cortex-A7)"; - amc->soc_name = "ast2600-a3"; - amc->hw_strap1 = BLETCHLEY_BMC_HW_STRAP1; - amc->hw_strap2 = BLETCHLEY_BMC_HW_STRAP2; - amc->fmc_model = "w25q01jvq"; - amc->spi_model = NULL; - amc->num_cs = 2; - amc->macs_mask = ASPEED_MAC2_ON; - amc->i2c_init = bletchley_bmc_i2c_init; - mc->default_ram_size = BLETCHLEY_BMC_RAM_SIZE; - aspeed_machine_class_init_cpus_defaults(mc); -} - -static void aspeed_machine_catalina_class_init(ObjectClass *oc, - const void *data) -{ - MachineClass *mc = MACHINE_CLASS(oc); - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); - - mc->desc = "Facebook Catalina BMC (Cortex-A7)"; - amc->soc_name = "ast2600-a3"; - amc->hw_strap1 = CATALINA_BMC_HW_STRAP1; - amc->hw_strap2 = CATALINA_BMC_HW_STRAP2; - amc->fmc_model = "w25q01jvq"; - amc->spi_model = NULL; - amc->num_cs = 2; - amc->macs_mask = ASPEED_MAC2_ON; - amc->i2c_init = catalina_bmc_i2c_init; - mc->default_ram_size = CATALINA_BMC_RAM_SIZE; - aspeed_machine_class_init_cpus_defaults(mc); - aspeed_machine_ast2600_class_emmc_init(oc); -} - -#define GB200NVL_BMC_RAM_SIZE ASPEED_RAM_SIZE(1 * GiB) - -static void aspeed_machine_gb200nvl_class_init(ObjectClass *oc, - const void *data) -{ - MachineClass *mc = MACHINE_CLASS(oc); - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); - - mc->desc = "Nvidia GB200NVL BMC (Cortex-A7)"; - amc->soc_name = "ast2600-a3"; - amc->hw_strap1 = GB200NVL_BMC_HW_STRAP1; - amc->hw_strap2 = GB200NVL_BMC_HW_STRAP2; - amc->fmc_model = "mx66u51235f"; - amc->spi_model = "mx66u51235f"; - amc->num_cs = 2; - - amc->spi2_model = "mx66u51235f"; - amc->num_cs2 = 1; - amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; - amc->i2c_init = gb200nvl_bmc_i2c_init; - mc->default_ram_size = GB200NVL_BMC_RAM_SIZE; - aspeed_machine_class_init_cpus_defaults(mc); - aspeed_machine_ast2600_class_emmc_init(oc); -} - -static void fby35_reset(MachineState *state, ResetType type) -{ - AspeedMachineState *bmc = ASPEED_MACHINE(state); - AspeedGPIOState *gpio = &bmc->soc->gpio; - - qemu_devices_reset(type); - - /* Board ID: 7 (Class-1, 4 slots) */ - object_property_set_bool(OBJECT(gpio), "gpioV4", true, &error_fatal); - object_property_set_bool(OBJECT(gpio), "gpioV5", true, &error_fatal); - object_property_set_bool(OBJECT(gpio), "gpioV6", true, &error_fatal); - object_property_set_bool(OBJECT(gpio), "gpioV7", false, &error_fatal); - - /* Slot presence pins, inverse polarity. (False means present) */ - object_property_set_bool(OBJECT(gpio), "gpioH4", false, &error_fatal); - object_property_set_bool(OBJECT(gpio), "gpioH5", true, &error_fatal); - object_property_set_bool(OBJECT(gpio), "gpioH6", true, &error_fatal); - object_property_set_bool(OBJECT(gpio), "gpioH7", true, &error_fatal); - - /* Slot 12v power pins, normal polarity. (True means powered-on) */ - object_property_set_bool(OBJECT(gpio), "gpioB2", true, &error_fatal); - object_property_set_bool(OBJECT(gpio), "gpioB3", false, &error_fatal); - object_property_set_bool(OBJECT(gpio), "gpioB4", false, &error_fatal); - object_property_set_bool(OBJECT(gpio), "gpioB5", false, &error_fatal); -} - -static void aspeed_machine_fby35_class_init(ObjectClass *oc, const void *data) -{ - MachineClass *mc = MACHINE_CLASS(oc); - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); - - mc->desc = "Facebook fby35 BMC (Cortex-A7)"; - mc->reset = fby35_reset; - amc->fmc_model = "mx66l1g45g"; - amc->num_cs = 2; - amc->macs_mask = ASPEED_MAC3_ON; - amc->i2c_init = fby35_i2c_init; - /* FIXME: Replace this macro with something more general */ - mc->default_ram_size = FUJI_BMC_RAM_SIZE; - aspeed_machine_class_init_cpus_defaults(mc); -} - -#define AST1030_INTERNAL_FLASH_SIZE (1024 * 1024) -/* Main SYSCLK frequency in Hz (200MHz) */ -#define SYSCLK_FRQ 200000000ULL - -static void aspeed_minibmc_machine_init(MachineState *machine) -{ - AspeedMachineState *bmc = ASPEED_MACHINE(machine); - AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine); - Clock *sysclk; - - sysclk = clock_new(OBJECT(machine), "SYSCLK"); - clock_set_hz(sysclk, SYSCLK_FRQ); - - bmc->soc = ASPEED_SOC(object_new(amc->soc_name)); - object_property_add_child(OBJECT(machine), "soc", OBJECT(bmc->soc)); - object_unref(OBJECT(bmc->soc)); - qdev_connect_clock_in(DEVICE(bmc->soc), "sysclk", sysclk); - - object_property_set_link(OBJECT(bmc->soc), "memory", - OBJECT(get_system_memory()), &error_abort); - connect_serial_hds_to_uarts(bmc); - qdev_realize(DEVICE(bmc->soc), NULL, &error_abort); - - if (defaults_enabled()) { - aspeed_board_init_flashes(&bmc->soc->fmc, - bmc->fmc_model ? bmc->fmc_model : amc->fmc_model, - amc->num_cs, - 0); - - aspeed_board_init_flashes(&bmc->soc->spi[0], - bmc->spi_model ? bmc->spi_model : amc->spi_model, - amc->num_cs, amc->num_cs); - - aspeed_board_init_flashes(&bmc->soc->spi[1], - bmc->spi_model ? bmc->spi_model : amc->spi_model, - amc->num_cs, (amc->num_cs * 2)); - } - - if (amc->i2c_init) { - amc->i2c_init(bmc); - } - - armv7m_load_kernel(ARM_CPU(first_cpu), - machine->kernel_filename, - 0, - AST1030_INTERNAL_FLASH_SIZE); -} - -static void ast1030_evb_i2c_init(AspeedMachineState *bmc) -{ - AspeedSoCState *soc = bmc->soc; - - /* U10 24C08 connects to SDA/SCL Group 1 by default */ - uint8_t *eeprom_buf = g_malloc0(32 * 1024); - smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50, eeprom_buf); - - /* U11 LM75 connects to SDA/SCL Group 2 by default */ - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4d); -} - -static void aspeed_minibmc_machine_ast1030_evb_class_init(ObjectClass *oc, - const void *data) -{ - MachineClass *mc = MACHINE_CLASS(oc); - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); - - mc->desc = "Aspeed AST1030 MiniBMC (Cortex-M4)"; - amc->soc_name = "ast1030-a1"; - amc->hw_strap1 = 0; - amc->hw_strap2 = 0; - mc->init = aspeed_minibmc_machine_init; - amc->i2c_init = ast1030_evb_i2c_init; - mc->default_ram_size = 0; - amc->fmc_model = "w25q80bl"; - amc->spi_model = "w25q256"; - amc->num_cs = 2; - amc->macs_mask = 0; - aspeed_machine_class_init_cpus_defaults(mc); -} - -#ifdef TARGET_AARCH64 -static void ast2700_evb_i2c_init(AspeedMachineState *bmc) -{ - AspeedSoCState *soc = bmc->soc; - - /* LM75 is compatible with TMP105 driver */ - i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0), - TYPE_TMP105, 0x4d); -} - -static void aspeed_machine_ast2700a0_evb_class_init(ObjectClass *oc, - const void *data) -{ - MachineClass *mc = MACHINE_CLASS(oc); - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); - - mc->desc = "Aspeed AST2700 A0 EVB (Cortex-A35)"; - amc->soc_name = "ast2700-a0"; - amc->hw_strap1 = AST2700_EVB_HW_STRAP1; - amc->hw_strap2 = AST2700_EVB_HW_STRAP2; - amc->fmc_model = "w25q01jvq"; - amc->spi_model = "w25q512jv"; - amc->num_cs = 2; - amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON; - amc->uart_default = ASPEED_DEV_UART12; - amc->i2c_init = ast2700_evb_i2c_init; - amc->vbootrom = true; - mc->default_ram_size = 1 * GiB; - aspeed_machine_class_init_cpus_defaults(mc); -} - -static void aspeed_machine_ast2700a1_evb_class_init(ObjectClass *oc, - const void *data) -{ - MachineClass *mc = MACHINE_CLASS(oc); - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); - - mc->alias = "ast2700-evb"; - mc->desc = "Aspeed AST2700 A1 EVB (Cortex-A35)"; - amc->soc_name = "ast2700-a1"; - amc->hw_strap1 = AST2700_EVB_HW_STRAP1; - amc->hw_strap2 = AST2700_EVB_HW_STRAP2; - amc->fmc_model = "w25q01jvq"; - amc->spi_model = "w25q512jv"; - amc->num_cs = 2; - amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON; - amc->uart_default = ASPEED_DEV_UART12; - amc->i2c_init = ast2700_evb_i2c_init; - amc->vbootrom = true; - mc->default_ram_size = 1 * GiB; - aspeed_machine_class_init_cpus_defaults(mc); -} -#endif - -static void aspeed_machine_qcom_dc_scm_v1_class_init(ObjectClass *oc, - const void *data) -{ - MachineClass *mc = MACHINE_CLASS(oc); - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); - - mc->desc = "Qualcomm DC-SCM V1 BMC (Cortex A7)"; - mc->deprecation_reason = "use 'ast2600-evb' instead"; - amc->soc_name = "ast2600-a3"; - amc->hw_strap1 = QCOM_DC_SCM_V1_BMC_HW_STRAP1; - amc->hw_strap2 = QCOM_DC_SCM_V1_BMC_HW_STRAP2; - amc->fmc_model = "n25q512a"; - amc->spi_model = "n25q512a"; - amc->num_cs = 2; - amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON; - amc->i2c_init = qcom_dc_scm_bmc_i2c_init; - mc->default_ram_size = 1 * GiB; - aspeed_machine_class_init_cpus_defaults(mc); -}; - -static void aspeed_machine_qcom_firework_class_init(ObjectClass *oc, - const void *data) -{ - MachineClass *mc = MACHINE_CLASS(oc); - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); - - mc->desc = "Qualcomm DC-SCM V1/Firework BMC (Cortex A7)"; - mc->deprecation_reason = "use 'ast2600-evb' instead"; - amc->soc_name = "ast2600-a3"; - amc->hw_strap1 = QCOM_DC_SCM_V1_BMC_HW_STRAP1; - amc->hw_strap2 = QCOM_DC_SCM_V1_BMC_HW_STRAP2; - amc->fmc_model = "n25q512a"; - amc->spi_model = "n25q512a"; - amc->num_cs = 2; - amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON; - amc->i2c_init = qcom_dc_scm_firework_i2c_init; - mc->default_ram_size = 1 * GiB; - aspeed_machine_class_init_cpus_defaults(mc); -}; - static const TypeInfo aspeed_machine_types[] = { { - .name = MACHINE_TYPE_NAME("palmetto-bmc"), - .parent = TYPE_ASPEED_MACHINE, - .class_init = aspeed_machine_palmetto_class_init, - .interfaces = arm_machine_interfaces, - }, { - .name = MACHINE_TYPE_NAME("supermicrox11-bmc"), - .parent = TYPE_ASPEED_MACHINE, - .class_init = aspeed_machine_supermicrox11_bmc_class_init, - .interfaces = arm_machine_interfaces, - }, { - .name = MACHINE_TYPE_NAME("supermicro-x11spi-bmc"), - .parent = TYPE_ASPEED_MACHINE, - .class_init = aspeed_machine_supermicro_x11spi_bmc_class_init, - .interfaces = arm_machine_interfaces, - }, { - .name = MACHINE_TYPE_NAME("ast2500-evb"), - .parent = TYPE_ASPEED_MACHINE, - .class_init = aspeed_machine_ast2500_evb_class_init, - .interfaces = arm_machine_interfaces, - }, { - .name = MACHINE_TYPE_NAME("romulus-bmc"), - .parent = TYPE_ASPEED_MACHINE, - .class_init = aspeed_machine_romulus_class_init, - .interfaces = arm_machine_interfaces, - }, { - .name = MACHINE_TYPE_NAME("sonorapass-bmc"), - .parent = TYPE_ASPEED_MACHINE, - .class_init = aspeed_machine_sonorapass_class_init, - .interfaces = arm_machine_interfaces, - }, { - .name = MACHINE_TYPE_NAME("witherspoon-bmc"), - .parent = TYPE_ASPEED_MACHINE, - .class_init = aspeed_machine_witherspoon_class_init, - .interfaces = arm_machine_interfaces, - }, { - .name = MACHINE_TYPE_NAME("ast2600-evb"), - .parent = TYPE_ASPEED_MACHINE, - .class_init = aspeed_machine_ast2600_evb_class_init, - .interfaces = arm_machine_interfaces, - }, { - .name = MACHINE_TYPE_NAME("yosemitev2-bmc"), - .parent = TYPE_ASPEED_MACHINE, - .class_init = aspeed_machine_yosemitev2_class_init, - .interfaces = arm_machine_interfaces, - }, { - .name = MACHINE_TYPE_NAME("tiogapass-bmc"), - .parent = TYPE_ASPEED_MACHINE, - .class_init = aspeed_machine_tiogapass_class_init, - .interfaces = arm_machine_interfaces, - }, { - .name = MACHINE_TYPE_NAME("g220a-bmc"), - .parent = TYPE_ASPEED_MACHINE, - .class_init = aspeed_machine_g220a_class_init, - .interfaces = arm_machine_interfaces, - }, { - .name = MACHINE_TYPE_NAME("qcom-dc-scm-v1-bmc"), - .parent = TYPE_ASPEED_MACHINE, - .class_init = aspeed_machine_qcom_dc_scm_v1_class_init, - .interfaces = arm_machine_interfaces, - }, { - .name = MACHINE_TYPE_NAME("qcom-firework-bmc"), - .parent = TYPE_ASPEED_MACHINE, - .class_init = aspeed_machine_qcom_firework_class_init, - .interfaces = arm_machine_interfaces, - }, { - .name = MACHINE_TYPE_NAME("fp5280g2-bmc"), - .parent = TYPE_ASPEED_MACHINE, - .class_init = aspeed_machine_fp5280g2_class_init, - .interfaces = arm_machine_interfaces, - }, { - .name = MACHINE_TYPE_NAME("quanta-q71l-bmc"), - .parent = TYPE_ASPEED_MACHINE, - .class_init = aspeed_machine_quanta_q71l_class_init, - .interfaces = arm_machine_interfaces, - }, { - .name = MACHINE_TYPE_NAME("rainier-bmc"), - .parent = TYPE_ASPEED_MACHINE, - .class_init = aspeed_machine_rainier_class_init, - .interfaces = arm_machine_interfaces, - }, { - .name = MACHINE_TYPE_NAME("fuji-bmc"), - .parent = TYPE_ASPEED_MACHINE, - .class_init = aspeed_machine_fuji_class_init, - .interfaces = arm_machine_interfaces, - }, { - .name = MACHINE_TYPE_NAME("bletchley-bmc"), - .parent = TYPE_ASPEED_MACHINE, - .class_init = aspeed_machine_bletchley_class_init, - .interfaces = arm_machine_interfaces, - }, { - .name = MACHINE_TYPE_NAME("gb200nvl-bmc"), - .parent = TYPE_ASPEED_MACHINE, - .class_init = aspeed_machine_gb200nvl_class_init, - .interfaces = arm_machine_interfaces, - }, { - .name = MACHINE_TYPE_NAME("catalina-bmc"), - .parent = TYPE_ASPEED_MACHINE, - .class_init = aspeed_machine_catalina_class_init, - .interfaces = arm_machine_interfaces, - }, { - .name = MACHINE_TYPE_NAME("fby35-bmc"), - .parent = MACHINE_TYPE_NAME("ast2600-evb"), - .class_init = aspeed_machine_fby35_class_init, - .interfaces = arm_machine_interfaces, - }, { - .name = MACHINE_TYPE_NAME("ast1030-evb"), - .parent = TYPE_ASPEED_MACHINE, - .class_init = aspeed_minibmc_machine_ast1030_evb_class_init, - .interfaces = arm_machine_interfaces, -#ifdef TARGET_AARCH64 - }, { - .name = MACHINE_TYPE_NAME("ast2700a0-evb"), - .parent = TYPE_ASPEED_MACHINE, - .class_init = aspeed_machine_ast2700a0_evb_class_init, - .interfaces = aarch64_machine_interfaces, - }, { - .name = MACHINE_TYPE_NAME("ast2700a1-evb"), - .parent = TYPE_ASPEED_MACHINE, - .class_init = aspeed_machine_ast2700a1_evb_class_init, - .interfaces = aarch64_machine_interfaces, -#endif - }, { .name = TYPE_ASPEED_MACHINE, .parent = TYPE_MACHINE, .instance_size = sizeof(AspeedMachineState), diff --git a/hw/arm/aspeed_ast10x0_evb.c b/hw/arm/aspeed_ast10x0_evb.c new file mode 100644 index 0000000000..7af2a77865 --- /dev/null +++ b/hw/arm/aspeed_ast10x0_evb.c @@ -0,0 +1,108 @@ +/* + * ASPEED AST10x0 EVB + * + * Copyright 2016 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/boot.h" +#include "hw/arm/machines-qom.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" +#include "hw/qdev-clock.h" +#include "system/system.h" +#include "hw/i2c/smbus_eeprom.h" + +#define AST1030_INTERNAL_FLASH_SIZE (1024 * 1024) +/* Main SYSCLK frequency in Hz (200MHz) */ +#define SYSCLK_FRQ 200000000ULL + +static void aspeed_minibmc_machine_init(MachineState *machine) +{ + AspeedMachineState *bmc = ASPEED_MACHINE(machine); + AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine); + Clock *sysclk; + + sysclk = clock_new(OBJECT(machine), "SYSCLK"); + clock_set_hz(sysclk, SYSCLK_FRQ); + + bmc->soc = ASPEED_SOC(object_new(amc->soc_name)); + object_property_add_child(OBJECT(machine), "soc", OBJECT(bmc->soc)); + object_unref(OBJECT(bmc->soc)); + qdev_connect_clock_in(DEVICE(bmc->soc), "sysclk", sysclk); + + object_property_set_link(OBJECT(bmc->soc), "memory", + OBJECT(get_system_memory()), &error_abort); + aspeed_connect_serial_hds_to_uarts(bmc); + qdev_realize(DEVICE(bmc->soc), NULL, &error_abort); + + if (defaults_enabled()) { + aspeed_board_init_flashes(&bmc->soc->fmc, + bmc->fmc_model ? bmc->fmc_model : amc->fmc_model, + amc->num_cs, + 0); + + aspeed_board_init_flashes(&bmc->soc->spi[0], + bmc->spi_model ? bmc->spi_model : amc->spi_model, + amc->num_cs, amc->num_cs); + + aspeed_board_init_flashes(&bmc->soc->spi[1], + bmc->spi_model ? bmc->spi_model : amc->spi_model, + amc->num_cs, (amc->num_cs * 2)); + } + + if (amc->i2c_init) { + amc->i2c_init(bmc); + } + + armv7m_load_kernel(ARM_CPU(first_cpu), + machine->kernel_filename, + 0, + AST1030_INTERNAL_FLASH_SIZE); +} + +static void ast1030_evb_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc = bmc->soc; + + /* U10 24C08 connects to SDA/SCL Group 1 by default */ + uint8_t *eeprom_buf = g_malloc0(32 * 1024); + smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50, eeprom_buf); + + /* U11 LM75 connects to SDA/SCL Group 2 by default */ + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4d); +} + +static void aspeed_minibmc_machine_ast1030_evb_class_init(ObjectClass *oc, + const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "Aspeed AST1030 MiniBMC (Cortex-M4)"; + amc->soc_name = "ast1030-a1"; + amc->hw_strap1 = 0; + amc->hw_strap2 = 0; + mc->init = aspeed_minibmc_machine_init; + amc->i2c_init = ast1030_evb_i2c_init; + mc->default_ram_size = 0; + amc->fmc_model = "w25q80bl"; + amc->spi_model = "w25q256"; + amc->num_cs = 2; + amc->macs_mask = 0; + aspeed_machine_class_init_cpus_defaults(mc); +} + +static const TypeInfo aspeed_ast10x0_evb_types[] = { + { + .name = MACHINE_TYPE_NAME("ast1030-evb"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_minibmc_machine_ast1030_evb_class_init, + .interfaces = arm_machine_interfaces, + } +}; + +DEFINE_TYPES(aspeed_ast10x0_evb_types) diff --git a/hw/arm/aspeed_ast2400_palmetto.c b/hw/arm/aspeed_ast2400_palmetto.c new file mode 100644 index 0000000000..776aa43a45 --- /dev/null +++ b/hw/arm/aspeed_ast2400_palmetto.c @@ -0,0 +1,80 @@ +/* + * OpenPOWER Palmetto + * + * Copyright 2016 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/machines-qom.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" +#include "hw/i2c/smbus_eeprom.h" + +/* Palmetto hardware value: 0x120CE416 */ +#define PALMETTO_BMC_HW_STRAP1 ( \ + SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) | \ + SCU_AST2400_HW_STRAP_DRAM_CONFIG(2 /* DDR3 with CL=6, CWL=5 */) | \ + SCU_AST2400_HW_STRAP_ACPI_DIS | \ + SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \ + SCU_HW_STRAP_VGA_CLASS_CODE | \ + SCU_HW_STRAP_LPC_RESET_PIN | \ + SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \ + SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \ + SCU_HW_STRAP_SPI_WIDTH | \ + SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ + SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT)) + +static void palmetto_bmc_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc = bmc->soc; + DeviceState *dev; + uint8_t *eeprom_buf = g_malloc0(32 * 1024); + + /* + * The palmetto platform expects a ds3231 RTC but a ds1338 is + * enough to provide basic RTC features. Alarms will be missing + */ + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0), "ds1338", 0x68); + + smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50, + eeprom_buf); + + /* add a TMP423 temperature sensor */ + dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), + "tmp423", 0x4c)); + object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort); + object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort); + object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort); + object_property_set_int(OBJECT(dev), "temperature3", 110000, &error_abort); +} + +static void aspeed_machine_palmetto_class_init(ObjectClass *oc, + const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)"; + amc->soc_name = "ast2400-a1"; + amc->hw_strap1 = PALMETTO_BMC_HW_STRAP1; + amc->fmc_model = "n25q256a"; + amc->spi_model = "mx25l25635f"; + amc->num_cs = 1; + amc->i2c_init = palmetto_bmc_i2c_init; + mc->default_ram_size = 256 * MiB; + aspeed_machine_class_init_cpus_defaults(mc); +}; + +static const TypeInfo aspeed_ast2400_palmetto_types[] = { + { + .name = MACHINE_TYPE_NAME("palmetto-bmc"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_palmetto_class_init, + .interfaces = arm_machine_interfaces, + } +}; + +DEFINE_TYPES(aspeed_ast2400_palmetto_types) diff --git a/hw/arm/aspeed_ast2400_quanta-q71l.c b/hw/arm/aspeed_ast2400_quanta-q71l.c new file mode 100644 index 0000000000..42ad2a2303 --- /dev/null +++ b/hw/arm/aspeed_ast2400_quanta-q71l.c @@ -0,0 +1,86 @@ +/* + * Quanta Q71l + * + * Copyright 2016 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/machines-qom.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" + +/* Quanta-Q71l hardware value */ +#define QUANTA_Q71L_BMC_HW_STRAP1 ( \ + SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \ + SCU_AST2400_HW_STRAP_DRAM_CONFIG(2/* DDR3 with CL=6, CWL=5 */) | \ + SCU_AST2400_HW_STRAP_ACPI_DIS | \ + SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_24M_IN) | \ + SCU_HW_STRAP_VGA_CLASS_CODE | \ + SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_PASS_THROUGH) | \ + SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \ + SCU_HW_STRAP_SPI_WIDTH | \ + SCU_HW_STRAP_VGA_SIZE_SET(VGA_8M_DRAM) | \ + SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT)) + +static void quanta_q71l_bmc_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc = bmc->soc; + + /* + * The quanta-q71l platform expects tmp75s which are compatible with + * tmp105s. + */ + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4c); + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4e); + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4f); + + /* TODO: i2c-1: Add baseboard FRU eeprom@54 24c64 */ + /* TODO: i2c-1: Add Frontpanel FRU eeprom@57 24c64 */ + /* TODO: Add Memory Riser i2c mux and eeproms. */ + + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "pca9546", 0x74); + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "pca9548", 0x77); + + /* TODO: i2c-3: Add BIOS FRU eeprom@56 24c64 */ + + /* i2c-7 */ + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "pca9546", 0x70); + /* - i2c@0: pmbus@59 */ + /* - i2c@1: pmbus@58 */ + /* - i2c@2: pmbus@58 */ + /* - i2c@3: pmbus@59 */ + + /* TODO: i2c-7: Add PDB FRU eeprom@52 */ + /* TODO: i2c-8: Add BMC FRU eeprom@50 */ +} + +static void aspeed_machine_quanta_q71l_class_init(ObjectClass *oc, + const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "Quanta-Q71l BMC (ARM926EJ-S)"; + amc->soc_name = "ast2400-a1"; + amc->hw_strap1 = QUANTA_Q71L_BMC_HW_STRAP1; + amc->fmc_model = "n25q256a"; + amc->spi_model = "mx25l25635e"; + amc->num_cs = 1; + amc->i2c_init = quanta_q71l_bmc_i2c_init; + mc->default_ram_size = 128 * MiB; + aspeed_machine_class_init_cpus_defaults(mc); +} + +static const TypeInfo aspeed_ast2400_quanta_q71l_types[] = { + { + .name = MACHINE_TYPE_NAME("quanta-q71l-bmc"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_quanta_q71l_class_init, + .interfaces = arm_machine_interfaces, + } +}; + +DEFINE_TYPES(aspeed_ast2400_quanta_q71l_types) diff --git a/hw/arm/aspeed_ast2400_supermicrox11.c b/hw/arm/aspeed_ast2400_supermicrox11.c new file mode 100644 index 0000000000..88cdb01fc7 --- /dev/null +++ b/hw/arm/aspeed_ast2400_supermicrox11.c @@ -0,0 +1,81 @@ +/* + * Supermicro X11 + * + * Copyright 2016 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/machines-qom.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" +#include "hw/i2c/smbus_eeprom.h" + +/* TODO: Find the actual hardware value */ +#define SUPERMICROX11_BMC_HW_STRAP1 ( \ + SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \ + SCU_AST2400_HW_STRAP_DRAM_CONFIG(2) | \ + SCU_AST2400_HW_STRAP_ACPI_DIS | \ + SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \ + SCU_HW_STRAP_VGA_CLASS_CODE | \ + SCU_HW_STRAP_LPC_RESET_PIN | \ + SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \ + SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \ + SCU_HW_STRAP_SPI_WIDTH | \ + SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ + SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT)) + +static void supermicrox11_bmc_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc = bmc->soc; + DeviceState *dev; + uint8_t *eeprom_buf = g_malloc0(32 * 1024); + + /* + * The palmetto platform expects a ds3231 RTC but a ds1338 is + * enough to provide basic RTC features. Alarms will be missing + */ + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0), "ds1338", 0x68); + + smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50, + eeprom_buf); + + /* add a TMP423 temperature sensor */ + dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), + "tmp423", 0x4c)); + object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort); + object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort); + object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort); + object_property_set_int(OBJECT(dev), "temperature3", 110000, &error_abort); +} + +static void aspeed_machine_supermicrox11_bmc_class_init(ObjectClass *oc, + const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "Supermicro X11 BMC (ARM926EJ-S)"; + amc->soc_name = "ast2400-a1"; + amc->hw_strap1 = SUPERMICROX11_BMC_HW_STRAP1; + amc->fmc_model = "mx25l25635e"; + amc->spi_model = "mx25l25635e"; + amc->num_cs = 1; + amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; + amc->i2c_init = supermicrox11_bmc_i2c_init; + mc->default_ram_size = 256 * MiB; + aspeed_machine_class_init_cpus_defaults(mc); +} + +static const TypeInfo aspeed_ast2400_supermicrox11_types[] = { + { + .name = MACHINE_TYPE_NAME("supermicrox11-bmc"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_supermicrox11_bmc_class_init, + .interfaces = arm_machine_interfaces, + } +}; + +DEFINE_TYPES(aspeed_ast2400_supermicrox11_types) diff --git a/hw/arm/aspeed_ast2500_evb.c b/hw/arm/aspeed_ast2500_evb.c new file mode 100644 index 0000000000..8b5cb67be9 --- /dev/null +++ b/hw/arm/aspeed_ast2500_evb.c @@ -0,0 +1,67 @@ +/* + * ASPEED AST2500 EVB + * + * Copyright 2016 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/machines-qom.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" +#include "hw/i2c/smbus_eeprom.h" +#include "hw/sensor/tmp105.h" + +/* AST2500 evb hardware value: 0xF100C2E6 */ +#define AST2500_EVB_HW_STRAP1 (( \ + AST2500_HW_STRAP1_DEFAULTS | \ + SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ + SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ + SCU_AST2500_HW_STRAP_UART_DEBUG | \ + SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ + SCU_HW_STRAP_MAC1_RGMII | \ + SCU_HW_STRAP_MAC0_RGMII) & \ + ~SCU_HW_STRAP_2ND_BOOT_WDT) + +static void ast2500_evb_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc = bmc->soc; + uint8_t *eeprom_buf = g_malloc0(8 * 1024); + + smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 3), 0x50, + eeprom_buf); + + /* The AST2500 EVB expects a LM75 but a TMP105 is compatible */ + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), + TYPE_TMP105, 0x4d); +} + +static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc, + const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "Aspeed AST2500 EVB (ARM1176)"; + amc->soc_name = "ast2500-a1"; + amc->hw_strap1 = AST2500_EVB_HW_STRAP1; + amc->fmc_model = "mx25l25635e"; + amc->spi_model = "mx25l25635f"; + amc->num_cs = 1; + amc->i2c_init = ast2500_evb_i2c_init; + mc->default_ram_size = 512 * MiB; + aspeed_machine_class_init_cpus_defaults(mc); +}; + +static const TypeInfo aspeed_ast2500_evb_types[] = { + { + .name = MACHINE_TYPE_NAME("ast2500-evb"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_ast2500_evb_class_init, + .interfaces = arm_machine_interfaces, + } +}; + +DEFINE_TYPES(aspeed_ast2500_evb_types) diff --git a/hw/arm/aspeed_ast2500_fp5280g2.c b/hw/arm/aspeed_ast2500_fp5280g2.c new file mode 100644 index 0000000000..858e038871 --- /dev/null +++ b/hw/arm/aspeed_ast2500_fp5280g2.c @@ -0,0 +1,88 @@ +/* + * Inspur FP5280G2 + * + * Copyright 2016 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/machines-qom.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" +#include "hw/nvram/eeprom_at24c.h" +#include "hw/i2c/i2c_mux_pca954x.h" +#include "hw/sensor/tmp105.h" + +/* FP5280G2 hardware value: 0XF100D286 */ +#define FP5280G2_BMC_HW_STRAP1 ( \ + SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ + SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ + SCU_AST2500_HW_STRAP_UART_DEBUG | \ + SCU_AST2500_HW_STRAP_RESERVED28 | \ + SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ + SCU_HW_STRAP_VGA_CLASS_CODE | \ + SCU_HW_STRAP_LPC_RESET_PIN | \ + SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \ + SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \ + SCU_HW_STRAP_MAC1_RGMII | \ + SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ + SCU_AST2500_HW_STRAP_RESERVED1) + +static void fp5280g2_bmc_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc = bmc->soc; + I2CSlave *i2c_mux; + + /* The at24c256 */ + at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 1), 0x50, 32768); + + /* The fp5280g2 expects a TMP112 but a TMP105 is compatible */ + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), TYPE_TMP105, + 0x48); + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), TYPE_TMP105, + 0x49); + + i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), + "pca9546", 0x70); + /* It expects a TMP112 but a TMP105 is compatible */ + i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 0), TYPE_TMP105, + 0x4a); + + /* It expects a ds3232 but a ds1338 is good enough */ + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), "ds1338", 0x68); + + /* It expects a pca9555 but a pca9552 is compatible */ + aspeed_create_pca9552(soc, 8, 0x30); +} + +static void aspeed_machine_fp5280g2_class_init(ObjectClass *oc, + const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "Inspur FP5280G2 BMC (ARM1176)"; + mc->deprecation_reason = "use 'ast2500-evb' instead"; + amc->soc_name = "ast2500-a1"; + amc->hw_strap1 = FP5280G2_BMC_HW_STRAP1; + amc->fmc_model = "n25q512a"; + amc->spi_model = "mx25l25635e"; + amc->num_cs = 2; + amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; + amc->i2c_init = fp5280g2_bmc_i2c_init; + mc->default_ram_size = 512 * MiB; + aspeed_machine_class_init_cpus_defaults(mc); +}; + +static const TypeInfo aspeed_ast2500_fp5280g2_types[] = { + { + .name = MACHINE_TYPE_NAME("fp5280g2-bmc"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_fp5280g2_class_init, + .interfaces = arm_machine_interfaces, + } +}; + +DEFINE_TYPES(aspeed_ast2500_fp5280g2_types) diff --git a/hw/arm/aspeed_ast2500_g220a.c b/hw/arm/aspeed_ast2500_g220a.c new file mode 100644 index 0000000000..3f979a78e5 --- /dev/null +++ b/hw/arm/aspeed_ast2500_g220a.c @@ -0,0 +1,92 @@ +/* + * Bytedance G220A + * + * Copyright 2016 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/machines-qom.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" +#include "hw/i2c/smbus_eeprom.h" + +#define G220A_BMC_HW_STRAP1 ( \ + SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ + SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ + SCU_AST2500_HW_STRAP_UART_DEBUG | \ + SCU_AST2500_HW_STRAP_RESERVED28 | \ + SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ + SCU_HW_STRAP_2ND_BOOT_WDT | \ + SCU_HW_STRAP_VGA_CLASS_CODE | \ + SCU_HW_STRAP_LPC_RESET_PIN | \ + SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \ + SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \ + SCU_HW_STRAP_VGA_SIZE_SET(VGA_64M_DRAM) | \ + SCU_AST2500_HW_STRAP_RESERVED1) + +static void g220a_bmc_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc = bmc->soc; + DeviceState *dev; + + dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3), + "emc1413", 0x4c)); + object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort); + object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort); + object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort); + + dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 12), + "emc1413", 0x4c)); + object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort); + object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort); + object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort); + + dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 13), + "emc1413", 0x4c)); + object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort); + object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort); + object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort); + + static uint8_t eeprom_buf[2 * 1024] = { + 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0xfe, + 0x01, 0x06, 0x00, 0xc9, 0x42, 0x79, 0x74, 0x65, + 0x64, 0x61, 0x6e, 0x63, 0x65, 0xc5, 0x47, 0x32, + 0x32, 0x30, 0x41, 0xc4, 0x41, 0x41, 0x42, 0x42, + 0xc4, 0x43, 0x43, 0x44, 0x44, 0xc4, 0x45, 0x45, + 0x46, 0x46, 0xc4, 0x48, 0x48, 0x47, 0x47, 0xc1, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa7, + }; + smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 4), 0x57, + eeprom_buf); +} + +static void aspeed_machine_g220a_class_init(ObjectClass *oc, const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "Bytedance G220A BMC (ARM1176)"; + amc->soc_name = "ast2500-a1"; + amc->hw_strap1 = G220A_BMC_HW_STRAP1; + amc->fmc_model = "n25q512a"; + amc->spi_model = "mx25l25635e"; + amc->num_cs = 2; + amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; + amc->i2c_init = g220a_bmc_i2c_init; + mc->default_ram_size = 1024 * MiB; + aspeed_machine_class_init_cpus_defaults(mc); +}; + +static const TypeInfo aspeed_ast2500_g220a_types[] = { + { + .name = MACHINE_TYPE_NAME("g220a-bmc"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_g220a_class_init, + .interfaces = arm_machine_interfaces, + } +}; + +DEFINE_TYPES(aspeed_ast2500_g220a_types) diff --git a/hw/arm/aspeed_ast2500_romulus.c b/hw/arm/aspeed_ast2500_romulus.c new file mode 100644 index 0000000000..91b660e74b --- /dev/null +++ b/hw/arm/aspeed_ast2500_romulus.c @@ -0,0 +1,62 @@ +/* + * OpenPOWER Romulus + * + * Copyright 2016 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/machines-qom.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" + +/* Romulus hardware value: 0xF10AD206 */ +#define ROMULUS_BMC_HW_STRAP1 ( \ + AST2500_HW_STRAP1_DEFAULTS | \ + SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ + SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ + SCU_AST2500_HW_STRAP_UART_DEBUG | \ + SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ + SCU_AST2500_HW_STRAP_ACPI_ENABLE | \ + SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER)) + +static void romulus_bmc_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc = bmc->soc; + + /* + * The romulus board expects Epson RX8900 I2C RTC but a ds1338 is + * good enough + */ + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "ds1338", 0x32); +} + +static void aspeed_machine_romulus_class_init(ObjectClass *oc, + const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "OpenPOWER Romulus BMC (ARM1176)"; + amc->soc_name = "ast2500-a1"; + amc->hw_strap1 = ROMULUS_BMC_HW_STRAP1; + amc->fmc_model = "n25q256a"; + amc->spi_model = "mx66l1g45g"; + amc->num_cs = 2; + amc->i2c_init = romulus_bmc_i2c_init; + mc->default_ram_size = 512 * MiB; + aspeed_machine_class_init_cpus_defaults(mc); +}; + +static const TypeInfo aspeed_ast2500_romulus_types[] = { + { + .name = MACHINE_TYPE_NAME("romulus-bmc"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_romulus_class_init, + .interfaces = arm_machine_interfaces, + } +}; + +DEFINE_TYPES(aspeed_ast2500_romulus_types) diff --git a/hw/arm/aspeed_ast2500_sonorapass.c b/hw/arm/aspeed_ast2500_sonorapass.c new file mode 100644 index 0000000000..84de4f56b3 --- /dev/null +++ b/hw/arm/aspeed_ast2500_sonorapass.c @@ -0,0 +1,102 @@ +/* + * OCP SonoraPass + * + * Copyright 2016 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/machines-qom.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" +#include "hw/i2c/smbus_eeprom.h" + +/* Sonorapass hardware value: 0xF100D216 */ +#define SONORAPASS_BMC_HW_STRAP1 ( \ + SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ + SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ + SCU_AST2500_HW_STRAP_UART_DEBUG | \ + SCU_AST2500_HW_STRAP_RESERVED28 | \ + SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ + SCU_HW_STRAP_VGA_CLASS_CODE | \ + SCU_HW_STRAP_LPC_RESET_PIN | \ + SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \ + SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \ + SCU_HW_STRAP_VGA_BIOS_ROM | \ + SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ + SCU_AST2500_HW_STRAP_RESERVED1) + +static void sonorapass_bmc_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc = bmc->soc; + + /* bus 2 : */ + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "tmp105", 0x48); + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "tmp105", 0x49); + /* bus 2 : pca9546 @ 0x73 */ + + /* bus 3 : pca9548 @ 0x70 */ + + /* bus 4 : */ + uint8_t *eeprom4_54 = g_malloc0(8 * 1024); + smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 4), 0x54, + eeprom4_54); + /* PCA9539 @ 0x76, but PCA9552 is compatible */ + aspeed_create_pca9552(soc, 4, 0x76); + /* PCA9539 @ 0x77, but PCA9552 is compatible */ + aspeed_create_pca9552(soc, 4, 0x77); + + /* bus 6 : */ + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp105", 0x48); + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp105", 0x49); + /* bus 6 : pca9546 @ 0x73 */ + + /* bus 8 : */ + uint8_t *eeprom8_56 = g_malloc0(8 * 1024); + smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 8), 0x56, + eeprom8_56); + aspeed_create_pca9552(soc, 8, 0x60); + aspeed_create_pca9552(soc, 8, 0x61); + /* bus 8 : adc128d818 @ 0x1d */ + /* bus 8 : adc128d818 @ 0x1f */ + + /* + * bus 13 : pca9548 @ 0x71 + * - channel 3: + * - tmm421 @ 0x4c + * - tmp421 @ 0x4e + * - tmp421 @ 0x4f + */ + +} + +static void aspeed_machine_sonorapass_class_init(ObjectClass *oc, + const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "OCP SonoraPass BMC (ARM1176)"; + mc->deprecation_reason = "use 'ast2500-evb' instead"; + amc->soc_name = "ast2500-a1"; + amc->hw_strap1 = SONORAPASS_BMC_HW_STRAP1; + amc->fmc_model = "mx66l1g45g"; + amc->spi_model = "mx66l1g45g"; + amc->num_cs = 2; + amc->i2c_init = sonorapass_bmc_i2c_init; + mc->default_ram_size = 512 * MiB; + aspeed_machine_class_init_cpus_defaults(mc); +}; + +static const TypeInfo aspeed_ast2500_sonorapass_types[] = { + { + .name = MACHINE_TYPE_NAME("sonorapass-bmc"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_sonorapass_class_init, + .interfaces = arm_machine_interfaces, + } +}; + +DEFINE_TYPES(aspeed_ast2500_sonorapass_types) diff --git a/hw/arm/aspeed_ast2500_supermicro-x11spi.c b/hw/arm/aspeed_ast2500_supermicro-x11spi.c new file mode 100644 index 0000000000..a2450aa962 --- /dev/null +++ b/hw/arm/aspeed_ast2500_supermicro-x11spi.c @@ -0,0 +1,77 @@ +/* + * Supermicro X11 SPI + * + * Copyright 2016 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/machines-qom.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" +#include "hw/i2c/smbus_eeprom.h" + +/* TODO: Find the actual hardware value */ +#define SUPERMICRO_X11SPI_BMC_HW_STRAP1 ( \ + AST2500_HW_STRAP1_DEFAULTS | \ + SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ + SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ + SCU_AST2500_HW_STRAP_UART_DEBUG | \ + SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ + SCU_HW_STRAP_SPI_WIDTH | \ + SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN)) + +static void supermicro_x11spi_bmc_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc = bmc->soc; + DeviceState *dev; + uint8_t *eeprom_buf = g_malloc0(32 * 1024); + + /* + * The palmetto platform expects a ds3231 RTC but a ds1338 is + * enough to provide basic RTC features. Alarms will be missing + */ + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0), "ds1338", 0x68); + + smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50, + eeprom_buf); + + /* add a TMP423 temperature sensor */ + dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), + "tmp423", 0x4c)); + object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort); + object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort); + object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort); + object_property_set_int(OBJECT(dev), "temperature3", 110000, &error_abort); +} + +static void aspeed_machine_supermicro_x11spi_bmc_class_init(ObjectClass *oc, + const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "Supermicro X11 SPI BMC (ARM1176)"; + amc->soc_name = "ast2500-a1"; + amc->hw_strap1 = SUPERMICRO_X11SPI_BMC_HW_STRAP1; + amc->fmc_model = "mx25l25635e"; + amc->spi_model = "mx25l25635e"; + amc->num_cs = 1; + amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; + amc->i2c_init = supermicro_x11spi_bmc_i2c_init; + mc->default_ram_size = 512 * MiB; + aspeed_machine_class_init_cpus_defaults(mc); +} + +static const TypeInfo aspeed_ast2500_supermicro_x11spi_types[] = { + { + .name = MACHINE_TYPE_NAME("supermicro-x11spi-bmc"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_supermicro_x11spi_bmc_class_init, + .interfaces = arm_machine_interfaces, + } +}; + +DEFINE_TYPES(aspeed_ast2500_supermicro_x11spi_types) diff --git a/hw/arm/aspeed_ast2500_tiogapass.c b/hw/arm/aspeed_ast2500_tiogapass.c new file mode 100644 index 0000000000..186dbc1da3 --- /dev/null +++ b/hw/arm/aspeed_ast2500_tiogapass.c @@ -0,0 +1,90 @@ +/* + * Facebook Tiogapass + * + * Copyright 2016 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/machines-qom.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" +#include "hw/nvram/eeprom_at24c.h" + +/* value: 0xF100C2E6 */ +#define TIOGAPASS_BMC_HW_STRAP1 (( \ + AST2500_HW_STRAP1_DEFAULTS | \ + SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ + SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ + SCU_AST2500_HW_STRAP_UART_DEBUG | \ + SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ + SCU_HW_STRAP_MAC1_RGMII | \ + SCU_HW_STRAP_MAC0_RGMII) & \ + ~SCU_HW_STRAP_2ND_BOOT_WDT) + +/* Tiogapass BMC FRU */ +static const uint8_t tiogapass_bmc_fruid[] = { + 0x01, 0x00, 0x00, 0x01, 0x0d, 0x00, 0x00, 0xf1, 0x01, 0x0c, 0x00, 0x36, + 0xe6, 0xd0, 0xc6, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x42, 0x4d, + 0x43, 0x20, 0x53, 0x74, 0x6f, 0x72, 0x61, 0x67, 0x65, 0x20, 0x4d, 0x6f, + 0x64, 0x75, 0x6c, 0x65, 0xcd, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, + 0x30, 0xc9, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc1, 0x39, 0x01, 0x0c, 0x00, 0xc6, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x54, 0x69, 0x6f, 0x67, 0x61, + 0x20, 0x50, 0x61, 0x73, 0x73, 0x20, 0x53, 0x69, 0x6e, 0x67, 0x6c, 0x65, + 0x32, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0xc4, 0x58, 0x58, 0x58, 0x32, 0xcd, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc7, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, 0x30, 0xc9, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc8, 0x43, 0x6f, + 0x6e, 0x66, 0x69, 0x67, 0x20, 0x41, 0xc1, 0x45, +}; + +static const size_t tiogapass_bmc_fruid_len = sizeof(tiogapass_bmc_fruid); + +static void tiogapass_bmc_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc = bmc->soc; + + at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 4), 0x54, 128 * KiB); + at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 6), 0x54, 128 * KiB, + tiogapass_bmc_fruid, tiogapass_bmc_fruid_len); + /* TMP421 */ + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), "tmp421", 0x1f); + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp421", 0x4f); + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp421", 0x4e); +} + +static void aspeed_machine_tiogapass_class_init(ObjectClass *oc, + const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "Facebook Tiogapass BMC (ARM1176)"; + amc->soc_name = "ast2500-a1"; + amc->hw_strap1 = TIOGAPASS_BMC_HW_STRAP1; + amc->hw_strap2 = 0; + amc->fmc_model = "n25q256a"; + amc->spi_model = "mx25l25635e"; + amc->num_cs = 2; + amc->i2c_init = tiogapass_bmc_i2c_init; + mc->default_ram_size = 1 * GiB; + aspeed_machine_class_init_cpus_defaults(mc); +}; + +static const TypeInfo aspeed_ast2500_tiogapass_types[] = { + { + .name = MACHINE_TYPE_NAME("tiogapass-bmc"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_tiogapass_class_init, + .interfaces = arm_machine_interfaces, + } +}; + +DEFINE_TYPES(aspeed_ast2500_tiogapass_types) diff --git a/hw/arm/aspeed_ast2500_witherspoon.c b/hw/arm/aspeed_ast2500_witherspoon.c new file mode 100644 index 0000000000..28d437fec0 --- /dev/null +++ b/hw/arm/aspeed_ast2500_witherspoon.c @@ -0,0 +1,112 @@ +/* + * OpenPOWER Witherspoon + * + * Copyright 2016 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/machines-qom.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" +#include "hw/misc/led.h" +#include "hw/sensor/tmp105.h" +#include "hw/i2c/smbus_eeprom.h" +#include "hw/gpio/pca9552.h" + +/* Witherspoon hardware value: 0xF10AD216 */ +#define WITHERSPOON_BMC_HW_STRAP1 ( \ + AST2500_HW_STRAP1_DEFAULTS | \ + SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ + SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ + SCU_AST2500_HW_STRAP_UART_DEBUG | \ + SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ + SCU_AST2500_HW_STRAP_ACPI_ENABLE | \ + SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER)) + +static void witherspoon_bmc_i2c_init(AspeedMachineState *bmc) +{ + static const struct { + unsigned gpio_id; + LEDColor color; + const char *description; + bool gpio_polarity; + } pca1_leds[] = { + {13, LED_COLOR_GREEN, "front-fault-4", GPIO_POLARITY_ACTIVE_LOW}, + {14, LED_COLOR_GREEN, "front-power-3", GPIO_POLARITY_ACTIVE_LOW}, + {15, LED_COLOR_GREEN, "front-id-5", GPIO_POLARITY_ACTIVE_LOW}, + }; + AspeedSoCState *soc = bmc->soc; + uint8_t *eeprom_buf = g_malloc0(8 * 1024); + DeviceState *dev; + LEDState *led; + + /* Bus 3: TODO bmp280@77 */ + dev = DEVICE(i2c_slave_new(TYPE_PCA9552, 0x60)); + qdev_prop_set_string(dev, "description", "pca1"); + i2c_slave_realize_and_unref(I2C_SLAVE(dev), + aspeed_i2c_get_bus(&soc->i2c, 3), + &error_fatal); + + for (size_t i = 0; i < ARRAY_SIZE(pca1_leds); i++) { + led = led_create_simple(OBJECT(bmc), + pca1_leds[i].gpio_polarity, + pca1_leds[i].color, + pca1_leds[i].description); + qdev_connect_gpio_out(dev, pca1_leds[i].gpio_id, + qdev_get_gpio_in(DEVICE(led), 0)); + } + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3), "dps310", 0x76); + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3), "max31785", 0x52); + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), "tmp423", 0x4c); + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), "tmp423", 0x4c); + + /* The Witherspoon expects a TMP275 but a TMP105 is compatible */ + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), TYPE_TMP105, + 0x4a); + + /* + * The witherspoon board expects Epson RX8900 I2C RTC but a ds1338 is + * good enough + */ + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "ds1338", 0x32); + + smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 11), 0x51, + eeprom_buf); + dev = DEVICE(i2c_slave_new(TYPE_PCA9552, 0x60)); + qdev_prop_set_string(dev, "description", "pca0"); + i2c_slave_realize_and_unref(I2C_SLAVE(dev), + aspeed_i2c_get_bus(&soc->i2c, 11), + &error_fatal); + /* Bus 11: TODO ucd90160@64 */ +} + +static void aspeed_machine_witherspoon_class_init(ObjectClass *oc, + const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "OpenPOWER Witherspoon BMC (ARM1176)"; + amc->soc_name = "ast2500-a1"; + amc->hw_strap1 = WITHERSPOON_BMC_HW_STRAP1; + amc->fmc_model = "mx25l25635f"; + amc->spi_model = "mx66l1g45g"; + amc->num_cs = 2; + amc->i2c_init = witherspoon_bmc_i2c_init; + mc->default_ram_size = 512 * MiB; + aspeed_machine_class_init_cpus_defaults(mc); +}; + +static const TypeInfo aspeed_ast2500_witherspoon_types[] = { + { + .name = MACHINE_TYPE_NAME("witherspoon-bmc"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_witherspoon_class_init, + .interfaces = arm_machine_interfaces, + } +}; + +DEFINE_TYPES(aspeed_ast2500_witherspoon_types) diff --git a/hw/arm/aspeed_ast2500_yosemitev2.c b/hw/arm/aspeed_ast2500_yosemitev2.c new file mode 100644 index 0000000000..eaa75bcccb --- /dev/null +++ b/hw/arm/aspeed_ast2500_yosemitev2.c @@ -0,0 +1,91 @@ +/* + * Facebook YosemiteV2 + * + * Copyright 2016 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/machines-qom.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" +#include "hw/nvram/eeprom_at24c.h" + +/* value: 0xF100C2E6 */ +#define YOSEMITEV2_BMC_HW_STRAP1 (( \ + AST2500_HW_STRAP1_DEFAULTS | \ + SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ + SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ + SCU_AST2500_HW_STRAP_UART_DEBUG | \ + SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ + SCU_HW_STRAP_MAC1_RGMII | \ + SCU_HW_STRAP_MAC0_RGMII) & \ + ~SCU_HW_STRAP_2ND_BOOT_WDT) + +/* Yosemite V2 BMC FRU */ +static const uint8_t yosemitev2_bmc_fruid[] = { + 0x01, 0x00, 0x00, 0x01, 0x0d, 0x00, 0x00, 0xf1, 0x01, 0x0c, 0x00, 0x36, + 0xe6, 0xd0, 0xc6, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x42, 0x61, + 0x73, 0x65, 0x62, 0x6f, 0x61, 0x72, 0x64, 0x20, 0x4d, 0x50, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xcd, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, + 0x30, 0xc9, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc1, 0x39, 0x01, 0x0c, 0x00, 0xc6, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x59, 0x6f, 0x73, 0x65, 0x6d, + 0x69, 0x74, 0x65, 0x20, 0x56, 0x32, 0x20, 0x4d, 0x50, 0x00, 0x00, 0x00, + 0x00, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0xc4, 0x45, 0x56, 0x54, 0x32, 0xcd, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc7, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, 0x30, 0xc9, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc8, 0x43, 0x6f, + 0x6e, 0x66, 0x69, 0x67, 0x20, 0x41, 0xc1, 0x45, +}; + +static const size_t yosemitev2_bmc_fruid_len = sizeof(yosemitev2_bmc_fruid); + +static void yosemitev2_bmc_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc = bmc->soc; + + at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 4), 0x51, 128 * KiB); + at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 8), 0x51, 128 * KiB, + yosemitev2_bmc_fruid, yosemitev2_bmc_fruid_len); + /* TMP421 */ + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "tmp421", 0x1f); + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp421", 0x4e); + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp421", 0x4f); + +} + +static void aspeed_machine_yosemitev2_class_init(ObjectClass *oc, + const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "Facebook YosemiteV2 BMC (ARM1176)"; + amc->soc_name = "ast2500-a1"; + amc->hw_strap1 = YOSEMITEV2_BMC_HW_STRAP1; + amc->hw_strap2 = 0; + amc->fmc_model = "n25q256a"; + amc->spi_model = "mx25l25635e"; + amc->num_cs = 2; + amc->i2c_init = yosemitev2_bmc_i2c_init; + mc->default_ram_size = 512 * MiB; + aspeed_machine_class_init_cpus_defaults(mc); +}; + +static const TypeInfo aspeed_ast2500_yosemitev2_types[] = { + { + .name = MACHINE_TYPE_NAME("yosemitev2-bmc"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_yosemitev2_class_init, + .interfaces = arm_machine_interfaces, + } +}; + +DEFINE_TYPES(aspeed_ast2500_yosemitev2_types) diff --git a/hw/arm/aspeed_ast2600_bletchley.c b/hw/arm/aspeed_ast2600_bletchley.c new file mode 100644 index 0000000000..b7e84db143 --- /dev/null +++ b/hw/arm/aspeed_ast2600_bletchley.c @@ -0,0 +1,97 @@ +/* + * Facebook Bletchley + * + * Copyright 2016 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/machines-qom.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" +#include "hw/gpio/pca9552.h" +#include "hw/nvram/eeprom_at24c.h" + +#define TYPE_TMP421 "tmp421" +/* Bletchley hardware value */ +#define BLETCHLEY_BMC_HW_STRAP1 0x00002000 +#define BLETCHLEY_BMC_HW_STRAP2 0x00000801 +#define BLETCHLEY_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB) + +static void bletchley_bmc_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc = bmc->soc; + I2CBus *i2c[13] = {}; + for (int i = 0; i < 13; i++) { + if ((i == 8) || (i == 11)) { + continue; + } + i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i); + } + + /* Bus 0 - 5 all have the same config. */ + for (int i = 0; i < 6; i++) { + /* Missing model: ti,ina230 @ 0x45 */ + /* Missing model: mps,mp5023 @ 0x40 */ + i2c_slave_create_simple(i2c[i], TYPE_TMP421, 0x4f); + /* Missing model: nxp,pca9539 @ 0x76, but PCA9552 works enough */ + i2c_slave_create_simple(i2c[i], TYPE_PCA9552, 0x76); + i2c_slave_create_simple(i2c[i], TYPE_PCA9552, 0x67); + /* Missing model: fsc,fusb302 @ 0x22 */ + } + + /* Bus 6 */ + at24c_eeprom_init(i2c[6], 0x56, 65536); + /* Missing model: nxp,pcf85263 @ 0x51 , but ds1338 works enough */ + i2c_slave_create_simple(i2c[6], "ds1338", 0x51); + + + /* Bus 7 */ + at24c_eeprom_init(i2c[7], 0x54, 65536); + + /* Bus 9 */ + i2c_slave_create_simple(i2c[9], TYPE_TMP421, 0x4f); + + /* Bus 10 */ + i2c_slave_create_simple(i2c[10], TYPE_TMP421, 0x4f); + /* Missing model: ti,hdc1080 @ 0x40 */ + i2c_slave_create_simple(i2c[10], TYPE_PCA9552, 0x67); + + /* Bus 12 */ + /* Missing model: adi,adm1278 @ 0x11 */ + i2c_slave_create_simple(i2c[12], TYPE_TMP421, 0x4c); + i2c_slave_create_simple(i2c[12], TYPE_TMP421, 0x4d); + i2c_slave_create_simple(i2c[12], TYPE_PCA9552, 0x67); +} + +static void aspeed_machine_bletchley_class_init(ObjectClass *oc, + const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "Facebook Bletchley BMC (Cortex-A7)"; + amc->soc_name = "ast2600-a3"; + amc->hw_strap1 = BLETCHLEY_BMC_HW_STRAP1; + amc->hw_strap2 = BLETCHLEY_BMC_HW_STRAP2; + amc->fmc_model = "w25q01jvq"; + amc->spi_model = NULL; + amc->num_cs = 2; + amc->macs_mask = ASPEED_MAC2_ON; + amc->i2c_init = bletchley_bmc_i2c_init; + mc->default_ram_size = BLETCHLEY_BMC_RAM_SIZE; + aspeed_machine_class_init_cpus_defaults(mc); +} + +static const TypeInfo aspeed_ast2600_bletchley_types[] = { + { + .name = MACHINE_TYPE_NAME("bletchley-bmc"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_bletchley_class_init, + .interfaces = arm_machine_interfaces, + } +}; + +DEFINE_TYPES(aspeed_ast2600_bletchley_types) diff --git a/hw/arm/aspeed_ast2600_catalina.c b/hw/arm/aspeed_ast2600_catalina.c new file mode 100644 index 0000000000..91977a4d3c --- /dev/null +++ b/hw/arm/aspeed_ast2600_catalina.c @@ -0,0 +1,225 @@ +/* + * Facebook Catalina + * + * Copyright 2016 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/machines-qom.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" +#include "hw/i2c/i2c_mux_pca954x.h" +#include "hw/gpio/pca9552.h" +#include "hw/gpio/pca9554.h" +#include "hw/nvram/eeprom_at24c.h" +#include "hw/sensor/tmp105.h" + +/* Catalina hardware value */ +#define CATALINA_BMC_HW_STRAP1 0x00002002 +#define CATALINA_BMC_HW_STRAP2 0x00000800 +#define CATALINA_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB) + +#define TYPE_TMP75 TYPE_TMP105 +#define TYPE_TMP421 "tmp421" +#define TYPE_DS1338 "ds1338" + +static void catalina_bmc_i2c_init(AspeedMachineState *bmc) +{ + /* Reference from v6.16-rc2 aspeed-bmc-facebook-catalina.dts */ + + AspeedSoCState *soc = bmc->soc; + I2CBus *i2c[16] = {}; + I2CSlave *i2c_mux; + + /* busses 0-15 are all used. */ + for (int i = 0; i < ARRAY_SIZE(i2c); i++) { + i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i); + } + + /* &i2c0 */ + /* i2c-mux@71 (PCA9546) on i2c0 */ + i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x71); + + /* i2c-mux@72 (PCA9546) on i2c0 */ + i2c_mux = i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x72); + + /* i2c0mux1ch1 */ + /* io_expander7 - pca9535@20 */ + i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 1), + TYPE_PCA9552, 0x20); + /* eeprom@50 */ + at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x50, 8 * KiB); + + /* i2c-mux@73 (PCA9546) on i2c0 */ + i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x73); + + /* i2c-mux@75 (PCA9546) on i2c0 */ + i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x75); + + /* i2c-mux@76 (PCA9546) on i2c0 */ + i2c_mux = i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x76); + + /* i2c0mux4ch1 */ + /* io_expander8 - pca9535@21 */ + i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 1), + TYPE_PCA9552, 0x21); + /* eeprom@50 */ + at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x50, 8 * KiB); + + /* i2c-mux@77 (PCA9546) on i2c0 */ + i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x77); + + + /* &i2c1 */ + /* i2c-mux@70 (PCA9548) on i2c1 */ + i2c_mux = i2c_slave_create_simple(i2c[1], TYPE_PCA9548, 0x70); + /* i2c1mux0ch0 */ + /* ina238@41 - no model */ + /* ina238@42 - no model */ + /* ina238@44 - no model */ + /* i2c1mux0ch1 */ + /* ina238@41 - no model */ + /* ina238@43 - no model */ + /* i2c1mux0ch4 */ + /* ltc4287@42 - no model */ + /* ltc4287@43 - no model */ + + /* i2c1mux0ch5 */ + /* eeprom@54 */ + at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 5), 0x54, 8 * KiB); + /* tpm75@4f */ + i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 5), TYPE_TMP75, 0x4f); + + /* i2c1mux0ch6 */ + /* io_expander5 - pca9554@27 */ + i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 6), + TYPE_PCA9554, 0x27); + /* io_expander6 - pca9555@25 */ + i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 6), + TYPE_PCA9552, 0x25); + /* eeprom@51 */ + at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 6), 0x51, 8 * KiB); + + /* i2c1mux0ch7 */ + /* eeprom@53 */ + at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 7), 0x53, 8 * KiB); + /* temperature-sensor@4b - tmp75 */ + i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 7), TYPE_TMP75, 0x4b); + + /* &i2c2 */ + /* io_expander0 - pca9555@20 */ + i2c_slave_create_simple(i2c[2], TYPE_PCA9552, 0x20); + /* io_expander0 - pca9555@21 */ + i2c_slave_create_simple(i2c[2], TYPE_PCA9552, 0x21); + /* io_expander0 - pca9555@27 */ + i2c_slave_create_simple(i2c[2], TYPE_PCA9552, 0x27); + /* eeprom@50 */ + at24c_eeprom_init(i2c[2], 0x50, 8 * KiB); + /* eeprom@51 */ + at24c_eeprom_init(i2c[2], 0x51, 8 * KiB); + + /* &i2c5 */ + /* i2c-mux@70 (PCA9548) on i2c5 */ + i2c_mux = i2c_slave_create_simple(i2c[5], TYPE_PCA9548, 0x70); + /* i2c5mux0ch6 */ + /* eeprom@52 */ + at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 6), 0x52, 8 * KiB); + /* i2c5mux0ch7 */ + /* ina230@40 - no model */ + /* ina230@41 - no model */ + /* ina230@44 - no model */ + /* ina230@45 - no model */ + + /* &i2c6 */ + /* io_expander3 - pca9555@21 */ + i2c_slave_create_simple(i2c[6], TYPE_PCA9552, 0x21); + /* rtc@6f - nct3018y */ + i2c_slave_create_simple(i2c[6], TYPE_DS1338, 0x6f); + + /* &i2c9 */ + /* io_expander4 - pca9555@4f */ + i2c_slave_create_simple(i2c[9], TYPE_PCA9552, 0x4f); + /* temperature-sensor@4b - tpm75 */ + i2c_slave_create_simple(i2c[9], TYPE_TMP75, 0x4b); + /* eeprom@50 */ + at24c_eeprom_init(i2c[9], 0x50, 8 * KiB); + /* eeprom@56 */ + at24c_eeprom_init(i2c[9], 0x56, 8 * KiB); + + /* &i2c10 */ + /* temperature-sensor@1f - tpm421 */ + i2c_slave_create_simple(i2c[10], TYPE_TMP421, 0x1f); + /* eeprom@50 */ + at24c_eeprom_init(i2c[10], 0x50, 8 * KiB); + + /* &i2c11 */ + /* ssif-bmc@10 - no model */ + + /* &i2c12 */ + /* eeprom@50 */ + at24c_eeprom_init(i2c[12], 0x50, 8 * KiB); + + /* &i2c13 */ + /* eeprom@50 */ + at24c_eeprom_init(i2c[13], 0x50, 8 * KiB); + /* eeprom@54 */ + at24c_eeprom_init(i2c[13], 0x54, 256); + /* eeprom@55 */ + at24c_eeprom_init(i2c[13], 0x55, 256); + /* eeprom@57 */ + at24c_eeprom_init(i2c[13], 0x57, 256); + + /* &i2c14 */ + /* io_expander9 - pca9555@10 */ + i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x10); + /* io_expander10 - pca9555@11 */ + i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x11); + /* io_expander11 - pca9555@12 */ + i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x12); + /* io_expander12 - pca9555@13 */ + i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x13); + /* io_expander13 - pca9555@14 */ + i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x14); + /* io_expander14 - pca9555@15 */ + i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x15); + + /* &i2c15 */ + /* temperature-sensor@1f - tmp421 */ + i2c_slave_create_simple(i2c[15], TYPE_TMP421, 0x1f); + /* eeprom@52 */ + at24c_eeprom_init(i2c[15], 0x52, 8 * KiB); +} + +static void aspeed_machine_catalina_class_init(ObjectClass *oc, + const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "Facebook Catalina BMC (Cortex-A7)"; + amc->soc_name = "ast2600-a3"; + amc->hw_strap1 = CATALINA_BMC_HW_STRAP1; + amc->hw_strap2 = CATALINA_BMC_HW_STRAP2; + amc->fmc_model = "w25q01jvq"; + amc->spi_model = NULL; + amc->num_cs = 2; + amc->macs_mask = ASPEED_MAC2_ON; + amc->i2c_init = catalina_bmc_i2c_init; + mc->default_ram_size = CATALINA_BMC_RAM_SIZE; + aspeed_machine_class_init_cpus_defaults(mc); + aspeed_machine_ast2600_class_emmc_init(oc); +} + +static const TypeInfo aspeed_ast2600_catalina_types[] = { + { + .name = MACHINE_TYPE_NAME("catalina-bmc"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_catalina_class_init, + .interfaces = arm_machine_interfaces, + } +}; + +DEFINE_TYPES(aspeed_ast2600_catalina_types) diff --git a/hw/arm/aspeed_ast2600_evb.c b/hw/arm/aspeed_ast2600_evb.c new file mode 100644 index 0000000000..c43d2687c1 --- /dev/null +++ b/hw/arm/aspeed_ast2600_evb.c @@ -0,0 +1,65 @@ +/* + * ASPEED AST2600 EVB + * + * Copyright 2016 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/machines-qom.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" +#include "hw/i2c/smbus_eeprom.h" +#include "hw/sensor/tmp105.h" + +/* AST2600 evb hardware value */ +#define AST2600_EVB_HW_STRAP1 0x000000C0 +#define AST2600_EVB_HW_STRAP2 0x00000003 + +static void ast2600_evb_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc = bmc->soc; + uint8_t *eeprom_buf = g_malloc0(8 * 1024); + + smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 7), 0x50, + eeprom_buf); + + /* LM75 is compatible with TMP105 driver */ + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), + TYPE_TMP105, 0x4d); +} + +static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc, + const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "Aspeed AST2600 EVB (Cortex-A7)"; + amc->soc_name = "ast2600-a3"; + amc->hw_strap1 = AST2600_EVB_HW_STRAP1; + amc->hw_strap2 = AST2600_EVB_HW_STRAP2; + amc->fmc_model = "w25q512jv"; + amc->spi_model = "w25q512jv"; + amc->num_cs = 1; + amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON | + ASPEED_MAC3_ON; + amc->sdhci_wp_inverted = true; + amc->i2c_init = ast2600_evb_i2c_init; + mc->default_ram_size = 1 * GiB; + aspeed_machine_class_init_cpus_defaults(mc); + aspeed_machine_ast2600_class_emmc_init(oc); +}; + +static const TypeInfo aspeed_ast2600_evb_types[] = { + { + .name = MACHINE_TYPE_NAME("ast2600-evb"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_ast2600_evb_class_init, + .interfaces = arm_machine_interfaces, + } +}; + +DEFINE_TYPES(aspeed_ast2600_evb_types) diff --git a/hw/arm/aspeed_ast2600_fby35.c b/hw/arm/aspeed_ast2600_fby35.c new file mode 100644 index 0000000000..f624427070 --- /dev/null +++ b/hw/arm/aspeed_ast2600_fby35.c @@ -0,0 +1,178 @@ +/* + * Facebook fby35 + * + * Copyright 2016 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/machines-qom.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" +#include "hw/nvram/eeprom_at24c.h" +#include "hw/sensor/tmp105.h" +#include "system/reset.h" + +#define TYPE_LM75 TYPE_TMP105 +#define TYPE_TMP421 "tmp421" +#define FBY35_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB) + +static const uint8_t fby35_nic_fruid[] = { + 0x01, 0x00, 0x00, 0x01, 0x0f, 0x20, 0x00, 0xcf, 0x01, 0x0e, 0x19, 0xd7, + 0x5e, 0xcf, 0xc8, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xdd, + 0x4d, 0x65, 0x6c, 0x6c, 0x61, 0x6e, 0x6f, 0x78, 0x20, 0x43, 0x6f, 0x6e, + 0x6e, 0x65, 0x63, 0x74, 0x58, 0x2d, 0x36, 0x20, 0x44, 0x58, 0x20, 0x4f, + 0x43, 0x50, 0x33, 0x2e, 0x30, 0xd8, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd5, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0xcc, 0x46, 0x52, 0x55, 0x20, 0x56, 0x65, 0x72, + 0x20, 0x30, 0x2e, 0x30, 0x32, 0xc0, 0xc0, 0xc0, 0xc1, 0x00, 0x00, 0x2f, + 0x01, 0x11, 0x19, 0xc8, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, + 0xdd, 0x4d, 0x65, 0x6c, 0x6c, 0x61, 0x6e, 0x6f, 0x78, 0x20, 0x43, 0x6f, + 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x58, 0x2d, 0x36, 0x20, 0x44, 0x58, 0x20, + 0x4f, 0x43, 0x50, 0x33, 0x2e, 0x30, 0xd5, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0xd3, 0x41, 0x39, 0x20, 0x20, 0x20, 0x20, 0x20, + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, + 0xd8, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0xc0, 0xc0, 0xc0, 0xc0, 0xcd, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, + 0x74, 0x58, 0x2d, 0x36, 0x20, 0x44, 0x58, 0xc1, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0xdb, 0xc0, 0x82, 0x30, 0x15, 0x79, 0x7f, 0xa6, 0x00, + 0x01, 0x18, 0x0b, 0xff, 0x08, 0x00, 0xff, 0xff, 0x64, 0x00, 0x00, 0x00, + 0x00, 0x03, 0x20, 0x01, 0xff, 0xff, 0x04, 0x46, 0x00, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0x01, 0x81, 0x09, 0x15, 0xb3, 0x10, 0x1d, 0x00, + 0x24, 0x15, 0xb3, 0x00, 0x02, 0xeb, 0x8a, 0x95, 0x5c, +}; +static const size_t fby35_nic_fruid_len = sizeof(fby35_nic_fruid); + +static const uint8_t fby35_bb_fruid[] = { + 0x01, 0x00, 0x01, 0x03, 0x10, 0x00, 0x00, 0xeb, 0x01, 0x02, 0x17, 0xc3, + 0x4e, 0x2f, 0x41, 0xc3, 0x4e, 0x2f, 0x41, 0xc1, 0x00, 0x00, 0x00, 0x23, + 0x01, 0x0d, 0x00, 0xb6, 0xd2, 0xd0, 0xc6, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0xd5, 0x4d, 0x61, 0x6e, 0x61, 0x67, 0x65, 0x6d, 0x65, 0x6e, 0x74, + 0x20, 0x42, 0x6f, 0x61, 0x72, 0x64, 0x20, 0x77, 0x42, 0x4d, 0x43, 0xcd, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, 0x30, 0xc9, 0x58, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa8, 0x01, 0x0c, 0x00, 0xc6, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x59, 0x6f, 0x73, 0x65, 0x6d, + 0x69, 0x74, 0x65, 0x20, 0x56, 0x33, 0x2e, 0x35, 0x20, 0x45, 0x56, 0x54, + 0x32, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0xc4, 0x45, 0x56, 0x54, 0x32, 0xcd, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc7, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, 0x30, 0xc9, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x4e, 0x2f, + 0x41, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43, +}; +static const size_t fby35_bb_fruid_len = sizeof(fby35_bb_fruid); + +static const uint8_t fby35_bmc_fruid[] = { + 0x01, 0x00, 0x00, 0x01, 0x0d, 0x00, 0x00, 0xf1, 0x01, 0x0c, 0x00, 0x36, + 0xe6, 0xd0, 0xc6, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x42, 0x4d, + 0x43, 0x20, 0x53, 0x74, 0x6f, 0x72, 0x61, 0x67, 0x65, 0x20, 0x4d, 0x6f, + 0x64, 0x75, 0x6c, 0x65, 0xcd, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, + 0x30, 0xc9, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc1, 0x39, 0x01, 0x0c, 0x00, 0xc6, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x59, 0x6f, 0x73, 0x65, 0x6d, + 0x69, 0x74, 0x65, 0x20, 0x56, 0x33, 0x2e, 0x35, 0x20, 0x45, 0x56, 0x54, + 0x32, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0xc4, 0x45, 0x56, 0x54, 0x32, 0xcd, 0x58, 0x58, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc7, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, 0x30, 0xc9, + 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc8, 0x43, 0x6f, + 0x6e, 0x66, 0x69, 0x67, 0x20, 0x41, 0xc1, 0x45, +}; +static const size_t fby35_bmc_fruid_len = sizeof(fby35_bmc_fruid); + +static void fby35_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc = bmc->soc; + I2CBus *i2c[16]; + + for (int i = 0; i < 16; i++) { + i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i); + } + + i2c_slave_create_simple(i2c[2], TYPE_LM75, 0x4f); + i2c_slave_create_simple(i2c[8], TYPE_TMP421, 0x1f); + /* Hotswap controller is actually supposed to be mp5920 or ltc4282. */ + i2c_slave_create_simple(i2c[11], "adm1272", 0x44); + i2c_slave_create_simple(i2c[12], TYPE_LM75, 0x4e); + i2c_slave_create_simple(i2c[12], TYPE_LM75, 0x4f); + + at24c_eeprom_init(i2c[4], 0x51, 128 * KiB); + at24c_eeprom_init(i2c[6], 0x51, 128 * KiB); + at24c_eeprom_init_rom(i2c[8], 0x50, 32 * KiB, fby35_nic_fruid, + fby35_nic_fruid_len); + at24c_eeprom_init_rom(i2c[11], 0x51, 128 * KiB, fby35_bb_fruid, + fby35_bb_fruid_len); + at24c_eeprom_init_rom(i2c[11], 0x54, 128 * KiB, fby35_bmc_fruid, + fby35_bmc_fruid_len); + + /* + * TODO: There is a multi-master i2c connection to an AST1030 MiniBMC on + * buses 0, 1, 2, 3, and 9. Source address 0x10, target address 0x20 on + * each. + */ +} + +static void fby35_reset(MachineState *state, ResetType type) +{ + AspeedMachineState *bmc = ASPEED_MACHINE(state); + AspeedGPIOState *gpio = &bmc->soc->gpio; + + qemu_devices_reset(type); + + /* Board ID: 7 (Class-1, 4 slots) */ + object_property_set_bool(OBJECT(gpio), "gpioV4", true, &error_fatal); + object_property_set_bool(OBJECT(gpio), "gpioV5", true, &error_fatal); + object_property_set_bool(OBJECT(gpio), "gpioV6", true, &error_fatal); + object_property_set_bool(OBJECT(gpio), "gpioV7", false, &error_fatal); + + /* Slot presence pins, inverse polarity. (False means present) */ + object_property_set_bool(OBJECT(gpio), "gpioH4", false, &error_fatal); + object_property_set_bool(OBJECT(gpio), "gpioH5", true, &error_fatal); + object_property_set_bool(OBJECT(gpio), "gpioH6", true, &error_fatal); + object_property_set_bool(OBJECT(gpio), "gpioH7", true, &error_fatal); + + /* Slot 12v power pins, normal polarity. (True means powered-on) */ + object_property_set_bool(OBJECT(gpio), "gpioB2", true, &error_fatal); + object_property_set_bool(OBJECT(gpio), "gpioB3", false, &error_fatal); + object_property_set_bool(OBJECT(gpio), "gpioB4", false, &error_fatal); + object_property_set_bool(OBJECT(gpio), "gpioB5", false, &error_fatal); +} + +static void aspeed_machine_fby35_class_init(ObjectClass *oc, const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "Facebook fby35 BMC (Cortex-A7)"; + mc->reset = fby35_reset; + amc->fmc_model = "mx66l1g45g"; + amc->num_cs = 2; + amc->macs_mask = ASPEED_MAC3_ON; + amc->i2c_init = fby35_i2c_init; + mc->default_ram_size = FBY35_BMC_RAM_SIZE; + aspeed_machine_class_init_cpus_defaults(mc); +} + +static const TypeInfo aspeed_ast2600_fby35_types[] = { + { + .name = MACHINE_TYPE_NAME("fby35-bmc"), + .parent = MACHINE_TYPE_NAME("ast2600-evb"), + .class_init = aspeed_machine_fby35_class_init, + .interfaces = arm_machine_interfaces, + } +}; + +DEFINE_TYPES(aspeed_ast2600_fby35_types) diff --git a/hw/arm/aspeed_ast2600_fuji.c b/hw/arm/aspeed_ast2600_fuji.c new file mode 100644 index 0000000000..37db252e27 --- /dev/null +++ b/hw/arm/aspeed_ast2600_fuji.c @@ -0,0 +1,140 @@ +/* + * Facebook Fuji + * + * Copyright 2016 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/machines-qom.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" +#include "hw/i2c/i2c_mux_pca954x.h" +#include "hw/sensor/tmp105.h" +#include "hw/nvram/eeprom_at24c.h" + +#define TYPE_LM75 TYPE_TMP105 +#define TYPE_TMP75 TYPE_TMP105 +#define TYPE_TMP422 "tmp422" + +/* Fuji hardware value */ +#define FUJI_BMC_HW_STRAP1 0x00000000 +#define FUJI_BMC_HW_STRAP2 0x00000000 +#define FUJI_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB) + +static void get_pca9548_channels(I2CBus *bus, uint8_t mux_addr, + I2CBus **channels) +{ + I2CSlave *mux = i2c_slave_create_simple(bus, "pca9548", mux_addr); + for (int i = 0; i < 8; i++) { + channels[i] = pca954x_i2c_get_bus(mux, i); + } +} + +static void fuji_bmc_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc = bmc->soc; + I2CBus *i2c[144] = {}; + + for (int i = 0; i < 16; i++) { + i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i); + } + I2CBus *i2c180 = i2c[2]; + I2CBus *i2c480 = i2c[8]; + I2CBus *i2c600 = i2c[11]; + + get_pca9548_channels(i2c180, 0x70, &i2c[16]); + get_pca9548_channels(i2c480, 0x70, &i2c[24]); + /* NOTE: The device tree skips [32, 40) in the alias numbering */ + get_pca9548_channels(i2c600, 0x77, &i2c[40]); + get_pca9548_channels(i2c[24], 0x71, &i2c[48]); + get_pca9548_channels(i2c[25], 0x72, &i2c[56]); + get_pca9548_channels(i2c[26], 0x76, &i2c[64]); + get_pca9548_channels(i2c[27], 0x76, &i2c[72]); + for (int i = 0; i < 8; i++) { + get_pca9548_channels(i2c[40 + i], 0x76, &i2c[80 + i * 8]); + } + + i2c_slave_create_simple(i2c[17], TYPE_LM75, 0x4c); + i2c_slave_create_simple(i2c[17], TYPE_LM75, 0x4d); + + /* + * EEPROM 24c64 size is 64Kbits or 8 Kbytes + * 24c02 size is 2Kbits or 256 bytes + */ + at24c_eeprom_init(i2c[19], 0x52, 8 * KiB); + at24c_eeprom_init(i2c[20], 0x50, 256); + at24c_eeprom_init(i2c[22], 0x52, 256); + + i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x48); + i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x49); + i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x4a); + i2c_slave_create_simple(i2c[3], TYPE_TMP422, 0x4c); + + at24c_eeprom_init(i2c[8], 0x51, 8 * KiB); + i2c_slave_create_simple(i2c[8], TYPE_LM75, 0x4a); + + i2c_slave_create_simple(i2c[50], TYPE_LM75, 0x4c); + at24c_eeprom_init(i2c[50], 0x52, 8 * KiB); + i2c_slave_create_simple(i2c[51], TYPE_TMP75, 0x48); + i2c_slave_create_simple(i2c[52], TYPE_TMP75, 0x49); + + i2c_slave_create_simple(i2c[59], TYPE_TMP75, 0x48); + i2c_slave_create_simple(i2c[60], TYPE_TMP75, 0x49); + + at24c_eeprom_init(i2c[65], 0x53, 8 * KiB); + i2c_slave_create_simple(i2c[66], TYPE_TMP75, 0x49); + i2c_slave_create_simple(i2c[66], TYPE_TMP75, 0x48); + at24c_eeprom_init(i2c[68], 0x52, 8 * KiB); + at24c_eeprom_init(i2c[69], 0x52, 8 * KiB); + at24c_eeprom_init(i2c[70], 0x52, 8 * KiB); + at24c_eeprom_init(i2c[71], 0x52, 8 * KiB); + + at24c_eeprom_init(i2c[73], 0x53, 8 * KiB); + i2c_slave_create_simple(i2c[74], TYPE_TMP75, 0x49); + i2c_slave_create_simple(i2c[74], TYPE_TMP75, 0x48); + at24c_eeprom_init(i2c[76], 0x52, 8 * KiB); + at24c_eeprom_init(i2c[77], 0x52, 8 * KiB); + at24c_eeprom_init(i2c[78], 0x52, 8 * KiB); + at24c_eeprom_init(i2c[79], 0x52, 8 * KiB); + at24c_eeprom_init(i2c[28], 0x50, 256); + + for (int i = 0; i < 8; i++) { + at24c_eeprom_init(i2c[81 + i * 8], 0x56, 64 * KiB); + i2c_slave_create_simple(i2c[82 + i * 8], TYPE_TMP75, 0x48); + i2c_slave_create_simple(i2c[83 + i * 8], TYPE_TMP75, 0x4b); + i2c_slave_create_simple(i2c[84 + i * 8], TYPE_TMP75, 0x4a); + } +} + +static void aspeed_machine_fuji_class_init(ObjectClass *oc, const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "Facebook Fuji BMC (Cortex-A7)"; + amc->soc_name = "ast2600-a3"; + amc->hw_strap1 = FUJI_BMC_HW_STRAP1; + amc->hw_strap2 = FUJI_BMC_HW_STRAP2; + amc->fmc_model = "mx66l1g45g"; + amc->spi_model = "mx66l1g45g"; + amc->num_cs = 2; + amc->macs_mask = ASPEED_MAC3_ON; + amc->i2c_init = fuji_bmc_i2c_init; + amc->uart_default = ASPEED_DEV_UART1; + mc->default_ram_size = FUJI_BMC_RAM_SIZE; + aspeed_machine_class_init_cpus_defaults(mc); +}; + +static const TypeInfo aspeed_ast2600_fuji_types[] = { + { + .name = MACHINE_TYPE_NAME("fuji-bmc"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_fuji_class_init, + .interfaces = arm_machine_interfaces, + } +}; + +DEFINE_TYPES(aspeed_ast2600_fuji_types) diff --git a/hw/arm/aspeed_ast2600_gb200nvl.c b/hw/arm/aspeed_ast2600_gb200nvl.c new file mode 100644 index 0000000000..ad9a10110b --- /dev/null +++ b/hw/arm/aspeed_ast2600_gb200nvl.c @@ -0,0 +1,111 @@ +/* + * Nvidia GB200NVL + * + * Copyright 2016 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/machines-qom.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" +#include "hw/nvram/eeprom_at24c.h" + +/* GB200NVL hardware value */ +#define GB200NVL_BMC_HW_STRAP1 0x000000C0 +#define GB200NVL_BMC_HW_STRAP2 0x00000003 +#define GB200NVL_BMC_RAM_SIZE ASPEED_RAM_SIZE(1 * GiB) + +static const uint8_t gb200nvl_bmc_fruid[] = { + 0x01, 0x00, 0x00, 0x01, 0x0b, 0x00, 0x00, 0xf3, 0x01, 0x0a, 0x19, 0x1f, + 0x0f, 0xe6, 0xc6, 0x4e, 0x56, 0x49, 0x44, 0x49, 0x41, 0xc5, 0x50, 0x33, + 0x38, 0x30, 0x39, 0xcd, 0x31, 0x35, 0x38, 0x33, 0x33, 0x32, 0x34, 0x38, + 0x30, 0x30, 0x31, 0x35, 0x30, 0xd2, 0x36, 0x39, 0x39, 0x2d, 0x31, 0x33, + 0x38, 0x30, 0x39, 0x2d, 0x30, 0x34, 0x30, 0x34, 0x2d, 0x36, 0x30, 0x30, + 0xc0, 0x01, 0x01, 0xd6, 0x4d, 0x41, 0x43, 0x3a, 0x20, 0x33, 0x43, 0x3a, + 0x36, 0x44, 0x3a, 0x36, 0x36, 0x3a, 0x31, 0x34, 0x3a, 0x43, 0x38, 0x3a, + 0x37, 0x41, 0xc1, 0x3b, 0x01, 0x09, 0x19, 0xc6, 0x4e, 0x56, 0x49, 0x44, + 0x49, 0x41, 0xc9, 0x50, 0x33, 0x38, 0x30, 0x39, 0x2d, 0x42, 0x4d, 0x43, + 0xd2, 0x36, 0x39, 0x39, 0x2d, 0x31, 0x33, 0x38, 0x30, 0x39, 0x2d, 0x30, + 0x34, 0x30, 0x34, 0x2d, 0x36, 0x30, 0x30, 0xc4, 0x41, 0x45, 0x2e, 0x31, + 0xcd, 0x31, 0x35, 0x38, 0x33, 0x33, 0x32, 0x34, 0x38, 0x30, 0x30, 0x31, + 0x35, 0x30, 0xc0, 0xc4, 0x76, 0x30, 0x2e, 0x31, 0xc1, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0xb4, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff + +}; +static const size_t gb200nvl_bmc_fruid_len = sizeof(gb200nvl_bmc_fruid); + +static void gb200nvl_bmc_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc = bmc->soc; + I2CBus *i2c[15] = {}; + DeviceState *dev; + for (int i = 0; i < sizeof(i2c) / sizeof(i2c[0]); i++) { + if ((i == 11) || (i == 12) || (i == 13)) { + continue; + } + i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i); + } + + /* Bus 5 Expander */ + aspeed_create_pca9554(soc, 4, 0x21); + + /* Mux I2c Expanders */ + i2c_slave_create_simple(i2c[5], "pca9546", 0x71); + i2c_slave_create_simple(i2c[5], "pca9546", 0x72); + i2c_slave_create_simple(i2c[5], "pca9546", 0x73); + i2c_slave_create_simple(i2c[5], "pca9546", 0x75); + i2c_slave_create_simple(i2c[5], "pca9546", 0x76); + i2c_slave_create_simple(i2c[5], "pca9546", 0x77); + + /* Bus 10 */ + dev = DEVICE(aspeed_create_pca9554(soc, 9, 0x20)); + + /* Set FPGA_READY */ + object_property_set_str(OBJECT(dev), "pin1", "high", &error_fatal); + + aspeed_create_pca9554(soc, 9, 0x21); + at24c_eeprom_init(i2c[9], 0x50, 64 * KiB); + at24c_eeprom_init(i2c[9], 0x51, 64 * KiB); + + /* Bus 11 */ + at24c_eeprom_init_rom(i2c[10], 0x50, 256, gb200nvl_bmc_fruid, + gb200nvl_bmc_fruid_len); +} + +static void aspeed_machine_gb200nvl_class_init(ObjectClass *oc, + const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "Nvidia GB200NVL BMC (Cortex-A7)"; + amc->soc_name = "ast2600-a3"; + amc->hw_strap1 = GB200NVL_BMC_HW_STRAP1; + amc->hw_strap2 = GB200NVL_BMC_HW_STRAP2; + amc->fmc_model = "mx66u51235f"; + amc->spi_model = "mx66u51235f"; + amc->num_cs = 2; + + amc->spi2_model = "mx66u51235f"; + amc->num_cs2 = 1; + amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; + amc->i2c_init = gb200nvl_bmc_i2c_init; + mc->default_ram_size = GB200NVL_BMC_RAM_SIZE; + aspeed_machine_class_init_cpus_defaults(mc); + aspeed_machine_ast2600_class_emmc_init(oc); +} + +static const TypeInfo aspeed_ast2600_gb200nvl_types[] = { + { + .name = MACHINE_TYPE_NAME("gb200nvl-bmc"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_gb200nvl_class_init, + .interfaces = arm_machine_interfaces, + } +}; + +DEFINE_TYPES(aspeed_ast2600_gb200nvl_types) diff --git a/hw/arm/aspeed_ast2600_qcom-dc-scm-v1.c b/hw/arm/aspeed_ast2600_qcom-dc-scm-v1.c new file mode 100644 index 0000000000..bbdeb60236 --- /dev/null +++ b/hw/arm/aspeed_ast2600_qcom-dc-scm-v1.c @@ -0,0 +1,55 @@ +/* + * Qualcomm DC-SCM V1 + * + * Copyright 2016 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/machines-qom.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" + +/* Qualcomm DC-SCM hardware value */ +#define QCOM_DC_SCM_V1_BMC_HW_STRAP1 0x00000000 +#define QCOM_DC_SCM_V1_BMC_HW_STRAP2 0x00000041 + +static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc = bmc->soc; + + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 15), "tmp105", 0x4d); +} + +static void aspeed_machine_qcom_dc_scm_v1_class_init(ObjectClass *oc, + const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "Qualcomm DC-SCM V1 BMC (Cortex A7)"; + mc->deprecation_reason = "use 'ast2600-evb' instead"; + amc->soc_name = "ast2600-a3"; + amc->hw_strap1 = QCOM_DC_SCM_V1_BMC_HW_STRAP1; + amc->hw_strap2 = QCOM_DC_SCM_V1_BMC_HW_STRAP2; + amc->fmc_model = "n25q512a"; + amc->spi_model = "n25q512a"; + amc->num_cs = 2; + amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON; + amc->i2c_init = qcom_dc_scm_bmc_i2c_init; + mc->default_ram_size = 1 * GiB; + aspeed_machine_class_init_cpus_defaults(mc); +}; + +static const TypeInfo aspeed_ast2600_qcom_dc_scm_v1_types[] = { + { + .name = MACHINE_TYPE_NAME("qcom-dc-scm-v1-bmc"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_qcom_dc_scm_v1_class_init, + .interfaces = arm_machine_interfaces, + } +}; + +DEFINE_TYPES(aspeed_ast2600_qcom_dc_scm_v1_types) diff --git a/hw/arm/aspeed_ast2600_qcom-firework.c b/hw/arm/aspeed_ast2600_qcom-firework.c new file mode 100644 index 0000000000..a4dbe6eea8 --- /dev/null +++ b/hw/arm/aspeed_ast2600_qcom-firework.c @@ -0,0 +1,91 @@ +/* + * Qualcomm DC-SCM V1/Firework + * + * Copyright 2016 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/machines-qom.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" +#include "hw/i2c/i2c_mux_pca954x.h" +#include "hw/sensor/tmp105.h" + +/* Qualcomm DC-SCM Firework hardware value */ +#define QCOM_DC_SCM_FIREWORK_BMC_HW_STRAP1 0x00000000 +#define QCOM_DC_SCM_FIREWORK_BMC_HW_STRAP2 0x00000041 + +#define TYPE_LM75 TYPE_TMP105 + +static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc = bmc->soc; + + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 15), "tmp105", 0x4d); +} + +static void qcom_dc_scm_firework_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc = bmc->soc; + I2CSlave *therm_mux, *cpuvr_mux; + + /* Create the generic DC-SCM hardware */ + qcom_dc_scm_bmc_i2c_init(bmc); + + /* Now create the Firework specific hardware */ + + /* I2C7 CPUVR MUX */ + cpuvr_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), + "pca9546", 0x70); + i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 0), "pca9548", 0x72); + i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 1), "pca9548", 0x72); + i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 2), "pca9548", 0x72); + i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 3), "pca9548", 0x72); + + /* I2C8 Thermal Diodes*/ + therm_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), + "pca9548", 0x70); + i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 0), TYPE_LM75, 0x4C); + i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 1), TYPE_LM75, 0x4C); + i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 2), TYPE_LM75, 0x48); + i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 3), TYPE_LM75, 0x48); + i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 4), TYPE_LM75, 0x48); + + /* I2C9 Fan Controller (MAX31785) */ + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "max31785", 0x52); + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "max31785", 0x54); +} + +static void aspeed_machine_qcom_firework_class_init(ObjectClass *oc, + const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "Qualcomm DC-SCM V1/Firework BMC (Cortex A7)"; + mc->deprecation_reason = "use 'ast2600-evb' instead"; + amc->soc_name = "ast2600-a3"; + amc->hw_strap1 = QCOM_DC_SCM_FIREWORK_BMC_HW_STRAP1; + amc->hw_strap2 = QCOM_DC_SCM_FIREWORK_BMC_HW_STRAP2; + amc->fmc_model = "n25q512a"; + amc->spi_model = "n25q512a"; + amc->num_cs = 2; + amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON; + amc->i2c_init = qcom_dc_scm_firework_i2c_init; + mc->default_ram_size = 1 * GiB; + aspeed_machine_class_init_cpus_defaults(mc); +}; + +static const TypeInfo aspeed_ast2600_qcom_firework_types[] = { + { + .name = MACHINE_TYPE_NAME("qcom-firework-bmc"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_qcom_firework_class_init, + .interfaces = arm_machine_interfaces, + } +}; + +DEFINE_TYPES(aspeed_ast2600_qcom_firework_types) diff --git a/hw/arm/aspeed_ast2600_rainier.c b/hw/arm/aspeed_ast2600_rainier.c new file mode 100644 index 0000000000..8f0a412ddc --- /dev/null +++ b/hw/arm/aspeed_ast2600_rainier.c @@ -0,0 +1,198 @@ +/* + * IBM Rainier + * + * Copyright 2016 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/machines-qom.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" +#include "hw/nvram/eeprom_at24c.h" +#include "hw/i2c/i2c_mux_pca954x.h" +#include "hw/sensor/tmp105.h" + +/* Rainier hardware value: (QEMU prototype) */ +#define RAINIER_BMC_HW_STRAP1 (0x00422016 | SCU_AST2600_HW_STRAP_BOOT_SRC_EMMC) +#define RAINIER_BMC_HW_STRAP2 0x80000848 + +static const uint8_t rainier_bb_fruid[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x84, + 0x28, 0x00, 0x52, 0x54, 0x04, 0x56, 0x48, 0x44, 0x52, 0x56, 0x44, 0x02, + 0x01, 0x00, 0x50, 0x54, 0x0e, 0x56, 0x54, 0x4f, 0x43, 0x00, 0x00, 0x37, + 0x00, 0x4a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x46, 0x08, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x00, 0x52, 0x54, + 0x04, 0x56, 0x54, 0x4f, 0x43, 0x50, 0x54, 0x38, 0x56, 0x49, 0x4e, 0x49, + 0x00, 0x00, 0x81, 0x00, 0x3a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x56, 0x53, + 0x59, 0x53, 0x00, 0x00, 0xbb, 0x00, 0x27, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x56, 0x43, 0x45, 0x4e, 0x00, 0x00, 0xe2, 0x00, 0x27, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x56, 0x53, 0x42, 0x50, 0x00, 0x00, 0x09, 0x01, 0x19, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x50, 0x46, 0x01, 0x00, 0x00, 0x00, 0x36, 0x00, + 0x52, 0x54, 0x04, 0x56, 0x49, 0x4e, 0x49, 0x44, 0x52, 0x04, 0x44, 0x45, + 0x53, 0x43, 0x48, 0x57, 0x02, 0x30, 0x31, 0x43, 0x43, 0x04, 0x33, 0x34, + 0x35, 0x36, 0x46, 0x4e, 0x04, 0x46, 0x52, 0x34, 0x39, 0x53, 0x4e, 0x04, + 0x53, 0x52, 0x31, 0x32, 0x50, 0x4e, 0x04, 0x50, 0x52, 0x39, 0x39, 0x50, + 0x46, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23, 0x00, 0x52, 0x54, + 0x04, 0x56, 0x53, 0x59, 0x53, 0x53, 0x45, 0x07, 0x49, 0x42, 0x4d, 0x53, + 0x59, 0x53, 0x31, 0x54, 0x4d, 0x08, 0x32, 0x32, 0x32, 0x32, 0x2d, 0x32, + 0x32, 0x32, 0x50, 0x46, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23, + 0x00, 0x52, 0x54, 0x04, 0x56, 0x43, 0x45, 0x4e, 0x53, 0x45, 0x07, 0x31, + 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x46, 0x43, 0x08, 0x31, 0x31, 0x31, + 0x31, 0x2d, 0x31, 0x31, 0x31, 0x50, 0x46, 0x04, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x15, 0x00, 0x52, 0x54, 0x04, 0x56, 0x53, 0x42, 0x50, 0x49, + 0x4d, 0x04, 0x50, 0x00, 0x10, 0x01, 0x50, 0x46, 0x04, 0x00, 0x00, 0x00, + 0x00, 0x00, +}; +static const size_t rainier_bb_fruid_len = sizeof(rainier_bb_fruid); + +/* Rainier BMC FRU */ +static const uint8_t rainier_bmc_fruid[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x84, + 0x28, 0x00, 0x52, 0x54, 0x04, 0x56, 0x48, 0x44, 0x52, 0x56, 0x44, 0x02, + 0x01, 0x00, 0x50, 0x54, 0x0e, 0x56, 0x54, 0x4f, 0x43, 0x00, 0x00, 0x37, + 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x46, 0x08, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, 0x00, 0x52, 0x54, + 0x04, 0x56, 0x54, 0x4f, 0x43, 0x50, 0x54, 0x0e, 0x56, 0x49, 0x4e, 0x49, + 0x00, 0x00, 0x57, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x46, + 0x01, 0x00, 0x00, 0x00, 0x1a, 0x00, 0x52, 0x54, 0x04, 0x56, 0x49, 0x4e, + 0x49, 0x44, 0x52, 0x04, 0x44, 0x45, 0x53, 0x43, 0x48, 0x57, 0x02, 0x30, + 0x31, 0x50, 0x46, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, +}; +static const size_t rainier_bmc_fruid_len = sizeof(rainier_bmc_fruid); + +static void rainier_bmc_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc = bmc->soc; + I2CSlave *i2c_mux; + + at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 0), 0x51, 32 * KiB); + + aspeed_create_pca9552(soc, 3, 0x61); + + /* The rainier expects a TMP275 but a TMP105 is compatible */ + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105, + 0x48); + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105, + 0x49); + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105, + 0x4a); + i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), + "pca9546", 0x70); + at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB); + at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB); + at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 2), 0x52, 64 * KiB); + aspeed_create_pca9552(soc, 4, 0x60); + + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), TYPE_TMP105, + 0x48); + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), TYPE_TMP105, + 0x49); + aspeed_create_pca9552(soc, 5, 0x60); + aspeed_create_pca9552(soc, 5, 0x61); + i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), + "pca9546", 0x70); + at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB); + at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB); + + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105, + 0x48); + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105, + 0x4a); + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105, + 0x4b); + i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), + "pca9546", 0x70); + at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB); + at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB); + at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 2), 0x50, 64 * KiB); + at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 3), 0x51, 64 * KiB); + + aspeed_create_pca9552(soc, 7, 0x30); + aspeed_create_pca9552(soc, 7, 0x31); + aspeed_create_pca9552(soc, 7, 0x32); + aspeed_create_pca9552(soc, 7, 0x33); + aspeed_create_pca9552(soc, 7, 0x60); + aspeed_create_pca9552(soc, 7, 0x61); + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "dps310", 0x76); + /* Bus 7: TODO si7021-a20@20 */ + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), TYPE_TMP105, + 0x48); + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "max31785", 0x52); + at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 7), 0x50, 64 * KiB); + at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 7), 0x51, 64 * KiB); + + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), TYPE_TMP105, + 0x48); + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), TYPE_TMP105, + 0x4a); + at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 8), 0x50, + 64 * KiB, rainier_bb_fruid, rainier_bb_fruid_len); + at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 8), 0x51, + 64 * KiB, rainier_bmc_fruid, rainier_bmc_fruid_len); + aspeed_create_pca9552(soc, 8, 0x60); + aspeed_create_pca9552(soc, 8, 0x61); + /* Bus 8: ucd90320@11 */ + /* Bus 8: ucd90320@b */ + /* Bus 8: ucd90320@c */ + + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp423", 0x4c); + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp423", 0x4d); + at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 9), 0x50, 128 * KiB); + + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 10), "tmp423", 0x4c); + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 10), "tmp423", 0x4d); + at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 10), 0x50, 128 * KiB); + + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), TYPE_TMP105, + 0x48); + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), TYPE_TMP105, + 0x49); + i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), + "pca9546", 0x70); + at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB); + at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB); + aspeed_create_pca9552(soc, 11, 0x60); + + + at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 13), 0x50, 64 * KiB); + aspeed_create_pca9552(soc, 13, 0x60); + + at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 14), 0x50, 64 * KiB); + aspeed_create_pca9552(soc, 14, 0x60); + + at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 15), 0x50, 64 * KiB); + aspeed_create_pca9552(soc, 15, 0x60); +} + +static void aspeed_machine_rainier_class_init(ObjectClass *oc, const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "IBM Rainier BMC (Cortex-A7)"; + amc->soc_name = "ast2600-a3"; + amc->hw_strap1 = RAINIER_BMC_HW_STRAP1; + amc->hw_strap2 = RAINIER_BMC_HW_STRAP2; + amc->fmc_model = "mx66l1g45g"; + amc->spi_model = "mx66l1g45g"; + amc->num_cs = 2; + amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON; + amc->i2c_init = rainier_bmc_i2c_init; + mc->default_ram_size = 1 * GiB; + aspeed_machine_class_init_cpus_defaults(mc); + aspeed_machine_ast2600_class_emmc_init(oc); +}; + +static const TypeInfo aspeed_ast2600_rainier_types[] = { + { + .name = MACHINE_TYPE_NAME("rainier-bmc"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_rainier_class_init, + .interfaces = arm_machine_interfaces, + } +}; + +DEFINE_TYPES(aspeed_ast2600_rainier_types) diff --git a/hw/arm/aspeed_ast27x0_evb.c b/hw/arm/aspeed_ast27x0_evb.c new file mode 100644 index 0000000000..0c4e9cd9cd --- /dev/null +++ b/hw/arm/aspeed_ast27x0_evb.c @@ -0,0 +1,88 @@ +/* + * ASPEED AST27x0 EVB + * + * Copyright 2016 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/machines-qom.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" +#include "hw/sensor/tmp105.h" + +/* AST2700 evb hardware value */ +/* SCU HW Strap1 */ +#define AST2700_EVB_HW_STRAP1 0x00000800 +/* SCUIO HW Strap1 */ +#define AST2700_EVB_HW_STRAP2 0x00000700 + +static void ast2700_evb_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc = bmc->soc; + + /* LM75 is compatible with TMP105 driver */ + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0), + TYPE_TMP105, 0x4d); +} + +static void aspeed_machine_ast2700a0_evb_class_init(ObjectClass *oc, + const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "Aspeed AST2700 A0 EVB (Cortex-A35)"; + amc->soc_name = "ast2700-a0"; + amc->hw_strap1 = AST2700_EVB_HW_STRAP1; + amc->hw_strap2 = AST2700_EVB_HW_STRAP2; + amc->fmc_model = "w25q01jvq"; + amc->spi_model = "w25q512jv"; + amc->num_cs = 2; + amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON; + amc->uart_default = ASPEED_DEV_UART12; + amc->i2c_init = ast2700_evb_i2c_init; + amc->vbootrom = true; + mc->default_ram_size = 1 * GiB; + aspeed_machine_class_init_cpus_defaults(mc); +} + +static void aspeed_machine_ast2700a1_evb_class_init(ObjectClass *oc, + const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->alias = "ast2700-evb"; + mc->desc = "Aspeed AST2700 A1 EVB (Cortex-A35)"; + amc->soc_name = "ast2700-a1"; + amc->hw_strap1 = AST2700_EVB_HW_STRAP1; + amc->hw_strap2 = AST2700_EVB_HW_STRAP2; + amc->fmc_model = "w25q01jvq"; + amc->spi_model = "w25q512jv"; + amc->num_cs = 2; + amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON; + amc->uart_default = ASPEED_DEV_UART12; + amc->i2c_init = ast2700_evb_i2c_init; + amc->vbootrom = true; + mc->default_ram_size = 1 * GiB; + aspeed_machine_class_init_cpus_defaults(mc); +} + +static const TypeInfo aspeed_ast27x0_evb_types[] = { + { + .name = MACHINE_TYPE_NAME("ast2700a0-evb"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_ast2700a0_evb_class_init, + .interfaces = aarch64_machine_interfaces, + }, { + .name = MACHINE_TYPE_NAME("ast2700a1-evb"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_ast2700a1_evb_class_init, + .interfaces = aarch64_machine_interfaces, + } +}; + +DEFINE_TYPES(aspeed_ast27x0_evb_types) diff --git a/hw/arm/aspeed_eeprom.c b/hw/arm/aspeed_eeprom.c deleted file mode 100644 index 8bbbdec834..0000000000 --- a/hw/arm/aspeed_eeprom.c +++ /dev/null @@ -1,192 +0,0 @@ -/* - * Copyright (c) Meta Platforms, Inc. and affiliates. - * - * SPDX-License-Identifier: GPL-2.0-only - */ - -#include "qemu/osdep.h" -#include "aspeed_eeprom.h" - -/* Tiogapass BMC FRU */ -const uint8_t tiogapass_bmc_fruid[] = { - 0x01, 0x00, 0x00, 0x01, 0x0d, 0x00, 0x00, 0xf1, 0x01, 0x0c, 0x00, 0x36, - 0xe6, 0xd0, 0xc6, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x42, 0x4d, - 0x43, 0x20, 0x53, 0x74, 0x6f, 0x72, 0x61, 0x67, 0x65, 0x20, 0x4d, 0x6f, - 0x64, 0x75, 0x6c, 0x65, 0xcd, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, - 0x30, 0xc9, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc1, 0x39, 0x01, 0x0c, 0x00, 0xc6, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x54, 0x69, 0x6f, 0x67, 0x61, - 0x20, 0x50, 0x61, 0x73, 0x73, 0x20, 0x53, 0x69, 0x6e, 0x67, 0x6c, 0x65, - 0x32, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0xc4, 0x58, 0x58, 0x58, 0x32, 0xcd, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc7, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, 0x30, 0xc9, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc8, 0x43, 0x6f, - 0x6e, 0x66, 0x69, 0x67, 0x20, 0x41, 0xc1, 0x45, -}; - -const uint8_t fby35_nic_fruid[] = { - 0x01, 0x00, 0x00, 0x01, 0x0f, 0x20, 0x00, 0xcf, 0x01, 0x0e, 0x19, 0xd7, - 0x5e, 0xcf, 0xc8, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xdd, - 0x4d, 0x65, 0x6c, 0x6c, 0x61, 0x6e, 0x6f, 0x78, 0x20, 0x43, 0x6f, 0x6e, - 0x6e, 0x65, 0x63, 0x74, 0x58, 0x2d, 0x36, 0x20, 0x44, 0x58, 0x20, 0x4f, - 0x43, 0x50, 0x33, 0x2e, 0x30, 0xd8, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd5, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0xcc, 0x46, 0x52, 0x55, 0x20, 0x56, 0x65, 0x72, - 0x20, 0x30, 0x2e, 0x30, 0x32, 0xc0, 0xc0, 0xc0, 0xc1, 0x00, 0x00, 0x2f, - 0x01, 0x11, 0x19, 0xc8, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, - 0xdd, 0x4d, 0x65, 0x6c, 0x6c, 0x61, 0x6e, 0x6f, 0x78, 0x20, 0x43, 0x6f, - 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x58, 0x2d, 0x36, 0x20, 0x44, 0x58, 0x20, - 0x4f, 0x43, 0x50, 0x33, 0x2e, 0x30, 0xd5, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0xd3, 0x41, 0x39, 0x20, 0x20, 0x20, 0x20, 0x20, - 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, - 0xd8, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0xc0, 0xc0, 0xc0, 0xc0, 0xcd, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, - 0x74, 0x58, 0x2d, 0x36, 0x20, 0x44, 0x58, 0xc1, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0xdb, 0xc0, 0x82, 0x30, 0x15, 0x79, 0x7f, 0xa6, 0x00, - 0x01, 0x18, 0x0b, 0xff, 0x08, 0x00, 0xff, 0xff, 0x64, 0x00, 0x00, 0x00, - 0x00, 0x03, 0x20, 0x01, 0xff, 0xff, 0x04, 0x46, 0x00, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0x01, 0x81, 0x09, 0x15, 0xb3, 0x10, 0x1d, 0x00, - 0x24, 0x15, 0xb3, 0x00, 0x02, 0xeb, 0x8a, 0x95, 0x5c, -}; - -const uint8_t fby35_bb_fruid[] = { - 0x01, 0x00, 0x01, 0x03, 0x10, 0x00, 0x00, 0xeb, 0x01, 0x02, 0x17, 0xc3, - 0x4e, 0x2f, 0x41, 0xc3, 0x4e, 0x2f, 0x41, 0xc1, 0x00, 0x00, 0x00, 0x23, - 0x01, 0x0d, 0x00, 0xb6, 0xd2, 0xd0, 0xc6, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0xd5, 0x4d, 0x61, 0x6e, 0x61, 0x67, 0x65, 0x6d, 0x65, 0x6e, 0x74, - 0x20, 0x42, 0x6f, 0x61, 0x72, 0x64, 0x20, 0x77, 0x42, 0x4d, 0x43, 0xcd, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, 0x30, 0xc9, 0x58, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa8, 0x01, 0x0c, 0x00, 0xc6, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x59, 0x6f, 0x73, 0x65, 0x6d, - 0x69, 0x74, 0x65, 0x20, 0x56, 0x33, 0x2e, 0x35, 0x20, 0x45, 0x56, 0x54, - 0x32, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0xc4, 0x45, 0x56, 0x54, 0x32, 0xcd, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc7, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, 0x30, 0xc9, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x4e, 0x2f, - 0x41, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43, -}; - -const uint8_t fby35_bmc_fruid[] = { - 0x01, 0x00, 0x00, 0x01, 0x0d, 0x00, 0x00, 0xf1, 0x01, 0x0c, 0x00, 0x36, - 0xe6, 0xd0, 0xc6, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x42, 0x4d, - 0x43, 0x20, 0x53, 0x74, 0x6f, 0x72, 0x61, 0x67, 0x65, 0x20, 0x4d, 0x6f, - 0x64, 0x75, 0x6c, 0x65, 0xcd, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, - 0x30, 0xc9, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc1, 0x39, 0x01, 0x0c, 0x00, 0xc6, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x59, 0x6f, 0x73, 0x65, 0x6d, - 0x69, 0x74, 0x65, 0x20, 0x56, 0x33, 0x2e, 0x35, 0x20, 0x45, 0x56, 0x54, - 0x32, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0xc4, 0x45, 0x56, 0x54, 0x32, 0xcd, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc7, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, 0x30, 0xc9, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc8, 0x43, 0x6f, - 0x6e, 0x66, 0x69, 0x67, 0x20, 0x41, 0xc1, 0x45, -}; - -/* Yosemite V2 BMC FRU */ -const uint8_t yosemitev2_bmc_fruid[] = { - 0x01, 0x00, 0x00, 0x01, 0x0d, 0x00, 0x00, 0xf1, 0x01, 0x0c, 0x00, 0x36, - 0xe6, 0xd0, 0xc6, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x42, 0x61, - 0x73, 0x65, 0x62, 0x6f, 0x61, 0x72, 0x64, 0x20, 0x4d, 0x50, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xcd, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, - 0x30, 0xc9, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc1, 0x39, 0x01, 0x0c, 0x00, 0xc6, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x59, 0x6f, 0x73, 0x65, 0x6d, - 0x69, 0x74, 0x65, 0x20, 0x56, 0x32, 0x20, 0x4d, 0x50, 0x00, 0x00, 0x00, - 0x00, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0xc4, 0x45, 0x56, 0x54, 0x32, 0xcd, 0x58, 0x58, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc7, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, 0x30, 0xc9, - 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc8, 0x43, 0x6f, - 0x6e, 0x66, 0x69, 0x67, 0x20, 0x41, 0xc1, 0x45, -}; - -const uint8_t rainier_bb_fruid[] = { - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x84, - 0x28, 0x00, 0x52, 0x54, 0x04, 0x56, 0x48, 0x44, 0x52, 0x56, 0x44, 0x02, - 0x01, 0x00, 0x50, 0x54, 0x0e, 0x56, 0x54, 0x4f, 0x43, 0x00, 0x00, 0x37, - 0x00, 0x4a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x46, 0x08, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x00, 0x52, 0x54, - 0x04, 0x56, 0x54, 0x4f, 0x43, 0x50, 0x54, 0x38, 0x56, 0x49, 0x4e, 0x49, - 0x00, 0x00, 0x81, 0x00, 0x3a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x56, 0x53, - 0x59, 0x53, 0x00, 0x00, 0xbb, 0x00, 0x27, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x56, 0x43, 0x45, 0x4e, 0x00, 0x00, 0xe2, 0x00, 0x27, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x56, 0x53, 0x42, 0x50, 0x00, 0x00, 0x09, 0x01, 0x19, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x50, 0x46, 0x01, 0x00, 0x00, 0x00, 0x36, 0x00, - 0x52, 0x54, 0x04, 0x56, 0x49, 0x4e, 0x49, 0x44, 0x52, 0x04, 0x44, 0x45, - 0x53, 0x43, 0x48, 0x57, 0x02, 0x30, 0x31, 0x43, 0x43, 0x04, 0x33, 0x34, - 0x35, 0x36, 0x46, 0x4e, 0x04, 0x46, 0x52, 0x34, 0x39, 0x53, 0x4e, 0x04, - 0x53, 0x52, 0x31, 0x32, 0x50, 0x4e, 0x04, 0x50, 0x52, 0x39, 0x39, 0x50, - 0x46, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23, 0x00, 0x52, 0x54, - 0x04, 0x56, 0x53, 0x59, 0x53, 0x53, 0x45, 0x07, 0x49, 0x42, 0x4d, 0x53, - 0x59, 0x53, 0x31, 0x54, 0x4d, 0x08, 0x32, 0x32, 0x32, 0x32, 0x2d, 0x32, - 0x32, 0x32, 0x50, 0x46, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23, - 0x00, 0x52, 0x54, 0x04, 0x56, 0x43, 0x45, 0x4e, 0x53, 0x45, 0x07, 0x31, - 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x46, 0x43, 0x08, 0x31, 0x31, 0x31, - 0x31, 0x2d, 0x31, 0x31, 0x31, 0x50, 0x46, 0x04, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x15, 0x00, 0x52, 0x54, 0x04, 0x56, 0x53, 0x42, 0x50, 0x49, - 0x4d, 0x04, 0x50, 0x00, 0x10, 0x01, 0x50, 0x46, 0x04, 0x00, 0x00, 0x00, - 0x00, 0x00, -}; - -/* Rainier BMC FRU */ -const uint8_t rainier_bmc_fruid[] = { - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x84, - 0x28, 0x00, 0x52, 0x54, 0x04, 0x56, 0x48, 0x44, 0x52, 0x56, 0x44, 0x02, - 0x01, 0x00, 0x50, 0x54, 0x0e, 0x56, 0x54, 0x4f, 0x43, 0x00, 0x00, 0x37, - 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x46, 0x08, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, 0x00, 0x52, 0x54, - 0x04, 0x56, 0x54, 0x4f, 0x43, 0x50, 0x54, 0x0e, 0x56, 0x49, 0x4e, 0x49, - 0x00, 0x00, 0x57, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x46, - 0x01, 0x00, 0x00, 0x00, 0x1a, 0x00, 0x52, 0x54, 0x04, 0x56, 0x49, 0x4e, - 0x49, 0x44, 0x52, 0x04, 0x44, 0x45, 0x53, 0x43, 0x48, 0x57, 0x02, 0x30, - 0x31, 0x50, 0x46, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, -}; - -const uint8_t gb200nvl_bmc_fruid[] = { - 0x01, 0x00, 0x00, 0x01, 0x0b, 0x00, 0x00, 0xf3, 0x01, 0x0a, 0x19, 0x1f, - 0x0f, 0xe6, 0xc6, 0x4e, 0x56, 0x49, 0x44, 0x49, 0x41, 0xc5, 0x50, 0x33, - 0x38, 0x30, 0x39, 0xcd, 0x31, 0x35, 0x38, 0x33, 0x33, 0x32, 0x34, 0x38, - 0x30, 0x30, 0x31, 0x35, 0x30, 0xd2, 0x36, 0x39, 0x39, 0x2d, 0x31, 0x33, - 0x38, 0x30, 0x39, 0x2d, 0x30, 0x34, 0x30, 0x34, 0x2d, 0x36, 0x30, 0x30, - 0xc0, 0x01, 0x01, 0xd6, 0x4d, 0x41, 0x43, 0x3a, 0x20, 0x33, 0x43, 0x3a, - 0x36, 0x44, 0x3a, 0x36, 0x36, 0x3a, 0x31, 0x34, 0x3a, 0x43, 0x38, 0x3a, - 0x37, 0x41, 0xc1, 0x3b, 0x01, 0x09, 0x19, 0xc6, 0x4e, 0x56, 0x49, 0x44, - 0x49, 0x41, 0xc9, 0x50, 0x33, 0x38, 0x30, 0x39, 0x2d, 0x42, 0x4d, 0x43, - 0xd2, 0x36, 0x39, 0x39, 0x2d, 0x31, 0x33, 0x38, 0x30, 0x39, 0x2d, 0x30, - 0x34, 0x30, 0x34, 0x2d, 0x36, 0x30, 0x30, 0xc4, 0x41, 0x45, 0x2e, 0x31, - 0xcd, 0x31, 0x35, 0x38, 0x33, 0x33, 0x32, 0x34, 0x38, 0x30, 0x30, 0x31, - 0x35, 0x30, 0xc0, 0xc4, 0x76, 0x30, 0x2e, 0x31, 0xc1, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0xb4, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff - -}; - -const size_t tiogapass_bmc_fruid_len = sizeof(tiogapass_bmc_fruid); -const size_t fby35_nic_fruid_len = sizeof(fby35_nic_fruid); -const size_t fby35_bb_fruid_len = sizeof(fby35_bb_fruid); -const size_t fby35_bmc_fruid_len = sizeof(fby35_bmc_fruid); -const size_t yosemitev2_bmc_fruid_len = sizeof(yosemitev2_bmc_fruid); -const size_t rainier_bb_fruid_len = sizeof(rainier_bb_fruid); -const size_t rainier_bmc_fruid_len = sizeof(rainier_bmc_fruid); -const size_t gb200nvl_bmc_fruid_len = sizeof(gb200nvl_bmc_fruid); - diff --git a/hw/arm/aspeed_eeprom.h b/hw/arm/aspeed_eeprom.h deleted file mode 100644 index 3ed9bc1d9a..0000000000 --- a/hw/arm/aspeed_eeprom.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright (c) Meta Platforms, Inc. and affiliates. - * - * SPDX-License-Identifier: GPL-2.0-only - */ - -#ifndef ASPEED_EEPROM_H -#define ASPEED_EEPROM_H - - -extern const uint8_t tiogapass_bmc_fruid[]; -extern const size_t tiogapass_bmc_fruid_len; - -extern const uint8_t fby35_nic_fruid[]; -extern const uint8_t fby35_bb_fruid[]; -extern const uint8_t fby35_bmc_fruid[]; -extern const size_t fby35_nic_fruid_len; -extern const size_t fby35_bb_fruid_len; -extern const size_t fby35_bmc_fruid_len; - -extern const uint8_t yosemitev2_bmc_fruid[]; -extern const size_t yosemitev2_bmc_fruid_len; - -extern const uint8_t rainier_bb_fruid[]; -extern const size_t rainier_bb_fruid_len; -extern const uint8_t rainier_bmc_fruid[]; -extern const size_t rainier_bmc_fruid_len; - -extern const uint8_t gb200nvl_bmc_fruid[]; -extern const size_t gb200nvl_bmc_fruid_len; - -#endif diff --git a/hw/arm/meson.build b/hw/arm/meson.build index 61c66ee2d0..aeaf654790 100644 --- a/hw/arm/meson.build +++ b/hw/arm/meson.build @@ -44,12 +44,34 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files( 'aspeed.c', 'aspeed_soc_common.c', 'aspeed_ast2400.c', + 'aspeed_ast2400_palmetto.c', + 'aspeed_ast2400_quanta-q71l.c', + 'aspeed_ast2400_supermicrox11.c', + 'aspeed_ast2500_evb.c', + 'aspeed_ast2500_fp5280g2.c', + 'aspeed_ast2500_g220a.c', + 'aspeed_ast2500_romulus.c', + 'aspeed_ast2500_sonorapass.c', + 'aspeed_ast2500_supermicro-x11spi.c', + 'aspeed_ast2500_tiogapass.c', + 'aspeed_ast2500_witherspoon.c', + 'aspeed_ast2500_yosemitev2.c', 'aspeed_ast2600.c', + 'aspeed_ast2600_bletchley.c', + 'aspeed_ast2600_catalina.c', + 'aspeed_ast2600_evb.c', + 'aspeed_ast2600_fby35.c', + 'aspeed_ast2600_fuji.c', + 'aspeed_ast2600_gb200nvl.c', + 'aspeed_ast2600_qcom-dc-scm-v1.c', + 'aspeed_ast2600_qcom-firework.c', + 'aspeed_ast2600_rainier.c', 'aspeed_ast10x0.c', - 'aspeed_eeprom.c', + 'aspeed_ast10x0_evb.c', 'fby35.c')) arm_common_ss.add(when: ['CONFIG_ASPEED_SOC', 'TARGET_AARCH64'], if_true: files( 'aspeed_ast27x0.c', + 'aspeed_ast27x0_evb.c', 'aspeed_ast27x0-fc.c', 'aspeed_ast27x0-ssp.c', 'aspeed_ast27x0-tsp.c', diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h index 6c36455656..714bbd326c 100644 --- a/include/hw/arm/aspeed.h +++ b/include/hw/arm/aspeed.h @@ -11,6 +11,7 @@ #include "hw/boards.h" #include "qom/object.h" +#include "hw/arm/aspeed_soc.h" typedef struct AspeedMachineState AspeedMachineState; @@ -24,6 +25,24 @@ DECLARE_OBJ_CHECKERS(AspeedMachineState, AspeedMachineClass, #define ASPEED_MAC2_ON (1 << 2) #define ASPEED_MAC3_ON (1 << 3) +/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */ +#if HOST_LONG_BITS == 32 +#define ASPEED_RAM_SIZE(sz) MIN((sz), 1 * GiB) +#else +#define ASPEED_RAM_SIZE(sz) (sz) +#endif + +struct AspeedMachineState { + MachineState parent_obj; + + AspeedSoCState *soc; + MemoryRegion boot_rom; + bool mmio_exec; + uint32_t uart_chosen; + char *fmc_model; + char *spi_model; + uint32_t hw_strap1; +}; struct AspeedMachineClass { MachineClass parent_obj; @@ -45,5 +64,65 @@ struct AspeedMachineClass { bool vbootrom; }; +/* + * aspeed_machine_class_init_cpus_defaults: + * @mc: the #MachineClass to be initialized. + * + * Initialize the default CPU configuration for an Aspeed machine class. + * This function sets the default, minimum, and maximum CPU counts + * to match the number of CPUs defined in the associated SoC class, + * and copies its list of valid CPU types. + */ +void aspeed_machine_class_init_cpus_defaults(MachineClass *mc); + +/* + * aspeed_create_pca9552: + * @soc: pointer to the #AspeedSoCState. + * @bus_id: the I2C bus index to attach the device. + * @addr: the I2C address of the PCA9552 device. + * + * Create and attach a PCA9552 LED controller device to the specified I2C bus + * of the given Aspeed SoC. The device is instantiated using + * i2c_slave_create_simple() with the PCA9552 device type. + */ +void aspeed_create_pca9552(AspeedSoCState *soc, int bus_id, int addr); + +/* + * aspeed_create_pca9554: + * @soc: pointer to the #AspeedSoCState. + * @bus_id: the I2C bus index to attach the device. + * @addr: the I2C address of the PCA9554 device. + * + * Create and attach a PCA9554 I/O expander to the specified I2C bus + * of the given Aspeed SoC. The device is created via + * i2c_slave_create_simple() and returned as an #I2CSlave pointer. + * + * Returns: a pointer to the newly created #I2CSlave instance. + */ +I2CSlave *aspeed_create_pca9554(AspeedSoCState *soc, int bus_id, int addr); + +/* + * aspeed_machine_ast2600_class_emmc_init: + * @oc: the #ObjectClass to initialize. + * + * Initialize eMMC-related properties for the AST2600 Aspeed machine class. + * This function is typically invoked during class initialization to set up + * default configuration or attach eMMC-specific devices for AST2600 platforms. + */ +void aspeed_machine_ast2600_class_emmc_init(ObjectClass *oc); + +/* + * aspeed_connect_serial_hds_to_uarts: + * @bmc: pointer to the #AspeedMachineState. + * + * Connect host serial backends (character devices) to the UART interfaces + * of the Aspeed SoC used by the given BMC machine. + * + * The function assigns `serial_hd(0)` to the primary UART channel + * (either chosen via `bmc->uart_chosen` or the machine class default), + * and iteratively connects remaining serial ports to other available UARTs + * on the SoC based on their index. + */ +void aspeed_connect_serial_hds_to_uarts(AspeedMachineState *bmc); #endif