Commit graph

122988 commits

Author SHA1 Message Date
Pierrick Bouvier
a725f37102 target/arm/cpu: always define kvm related registers
This does not hurt, even if they are not used.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250325045915.994760-20-pierrick.bouvier@linaro.org>
2025-04-23 15:04:57 -07:00
Pierrick Bouvier
5a9d472d01 exec/poison: KVM_HAVE_MCE_INJECTION can now be poisoned
We prevent common code to use this define by mistake.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250325045915.994760-19-pierrick.bouvier@linaro.org>
2025-04-23 15:04:57 -07:00
Pierrick Bouvier
f1d2a8e953 accel/kvm: move KVM_HAVE_MCE_INJECTION define to kvm-all.c
This define is used only in accel/kvm/kvm-all.c, so we push directly the
definition there. Add more visibility to kvm_arch_on_sigbus_vcpu() to
allow removing this define from any header.

The architectures defining KVM_HAVE_MCE_INJECTION are i386, x86_64 and
aarch64.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250325045915.994760-18-pierrick.bouvier@linaro.org>
2025-04-23 15:04:57 -07:00
Pierrick Bouvier
0df783b2fb exec/cpu-all: remove this header
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250325045915.994760-16-pierrick.bouvier@linaro.org>
2025-04-23 15:04:57 -07:00
Pierrick Bouvier
d97c3b06de exec/cpu-all: transfer exec/cpu-common include to cpu.h headers
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250325045915.994760-15-pierrick.bouvier@linaro.org>
2025-04-23 15:04:57 -07:00
Pierrick Bouvier
9c2ff9cdc9 exec/cpu-all: remove exec/target_page include
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-23 15:04:57 -07:00
Pierrick Bouvier
e9659a4da2 exec/cpu-all: remove cpu include
Now we made sure important defines are included using their direct
path, we can remove cpu.h from cpu-all.h.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250325045915.994760-14-pierrick.bouvier@linaro.org>
2025-04-23 15:04:57 -07:00
Pierrick Bouvier
4fadca8d64 accel/tcg: fix missing includes for TARGET_HAS_PRECISE_SMC
We prepare to remove cpu.h from cpu-all.h, which will transitively
remove it from accel/tcg/tb-internal.h, and thus from most of tcg
compilation units.

Note: this was caught by a test regression for s390x-softmmu.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250325045915.994760-13-pierrick.bouvier@linaro.org>
2025-04-23 15:04:57 -07:00
Pierrick Bouvier
98c7c14698 accel/tcg: fix missing includes for TCG_GUEST_DEFAULT_MO
We prepare to remove cpu.h from cpu-all.h, which will transitively
remove it from accel/tcg/tb-internal.h, and thus from most of tcg
compilation units.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250325045915.994760-12-pierrick.bouvier@linaro.org>
2025-04-23 15:04:57 -07:00
Pierrick Bouvier
22a7c2f239 exec/cpu-all: remove exec/cpu-interrupt include
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250325045915.994760-8-pierrick.bouvier@linaro.org>
2025-04-23 15:04:57 -07:00
Pierrick Bouvier
4533af18b2 exec/cpu-all: remove tswap include
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250325045915.994760-7-pierrick.bouvier@linaro.org>
2025-04-23 15:04:57 -07:00
Pierrick Bouvier
e33865f048 exec/cpu-all: remove exec/page-protection include
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250325045915.994760-6-pierrick.bouvier@linaro.org>
2025-04-23 15:04:57 -07:00
Pierrick Bouvier
342e313d6c exec/cpu-all: remove system/memory include
We include this header where needed. When includes set already have
ifdef CONFIG_USER_ONLY, we add it here, else, we don't condition the
include.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250325045915.994760-5-pierrick.bouvier@linaro.org>
2025-04-23 15:04:57 -07:00
Pierrick Bouvier
8d535c312c include/exec/cpu-all: move compile time check for CPUArchState to cpu-target.c
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250325045915.994760-4-pierrick.bouvier@linaro.org>
2025-04-23 15:04:57 -07:00
Pierrick Bouvier
33d2cca32b exec/cpu-all: move cpu_copy to linux-user/qemu.h
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250325045915.994760-3-pierrick.bouvier@linaro.org>
2025-04-23 15:04:57 -07:00
Richard Henderson
d11bf649d5 page-vary: Restrict scope of TARGET_PAGE_BITS_MIN
The only place we really need to know the minimum is within
page-vary-target.c.  Rename the target/arm TARGET_PAGE_BITS_MIN
to TARGET_PAGE_BITS_LEGACY to emphasize what it really means.
Move the assertions related to minimum page size as well.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-23 15:04:57 -07:00
Richard Henderson
12eeb04ab4 page-vary: Move and rename qemu_target_page_bits_min
Rename to migration_legacy_page_bits, to make it clear that
we cannot change the value without causing a migration break.
Move to page-vary.h and page-vary-target.c.
Define via TARGET_PAGE_BITS if not TARGET_PAGE_BITS_VARY.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-23 15:04:57 -07:00
Richard Henderson
6effa87475 include/exec: Redefine tlb-flags with absolute values
Don't base the values on TARGET_PAGE_BITS_MIN, but do verify
that TLB_FLAGS_MASK does not overlap minimum page size.
All targets now have the same placement for these flags,
simplifying mmu management when we enable heterogeneous systems.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-23 15:04:57 -07:00
Richard Henderson
33646c72c7 accel/tcg: Split out tlb-bounds.h
The CPU_TLB_DYN_{MIN,MAX}_BITS definitions are not required
outside of cputlb.c and translate-all.c.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-23 15:04:57 -07:00
Richard Henderson
41fed3c992 accel/tcg: Build translator.c twice
Drop some unnecessary includes.  Change the offsetof expressions
to be based on CPUState instead of ArchCPU.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-23 15:04:57 -07:00
Philippe Mathieu-Daudé
42fec1bbf5 hw/core/cpu: Remove CPUClass::mmu_index()
All targets have been converted to TCGCPUOps::mmu_index(),
remove the now unused CPUClass::mmu_index().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-24-philmd@linaro.org>
2025-04-23 15:04:57 -07:00
Richard Henderson
43d6a56a05 target/hexagon: Implement TCGCPUOps.mmu_index
This hook is about to become mandatory.  Since hexagon
is still user-only, the implementation is trivial.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Brian Cain <brian.cain@oss.qualcomm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-23 15:04:57 -07:00
Philippe Mathieu-Daudé
befb31d349 target/xtensa: Restrict SoftMMU mmu_index() to TCG
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-23-philmd@linaro.org>
2025-04-23 15:04:57 -07:00
Philippe Mathieu-Daudé
46708ccec1 target/tricore: Restrict SoftMMU mmu_index() to TCG
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-22-philmd@linaro.org>
2025-04-23 15:04:57 -07:00
Philippe Mathieu-Daudé
f34769a536 target/sparc: Restrict SoftMMU mmu_index() to TCG
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-21-philmd@linaro.org>
2025-04-23 15:04:57 -07:00
Philippe Mathieu-Daudé
32a84b306f target/sh4: Restrict SoftMMU mmu_index() to TCG
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-20-philmd@linaro.org>
2025-04-23 15:04:57 -07:00
Philippe Mathieu-Daudé
96a786ed03 target/s390x: Restrict SoftMMU mmu_index() to TCG
Convert CPUClass::mmu_index() to TCGCPUOps::mmu_index(),
restricting s390x_cpu_mmu_index() to TCG #ifdef.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-19-philmd@linaro.org>
2025-04-23 15:04:57 -07:00
Philippe Mathieu-Daudé
f1a1c2b958 target/rx: Restrict SoftMMU mmu_index() to TCG
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-18-philmd@linaro.org>
2025-04-23 15:04:57 -07:00
Philippe Mathieu-Daudé
bf8dc33bbc target/riscv: Restrict SoftMMU mmu_index() to TCG
Move riscv_cpu_mmu_index() to the TCG-specific file,
convert CPUClass::mmu_index() to TCGCPUOps::mmu_index().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-17-philmd@linaro.org>
2025-04-23 15:04:57 -07:00
Philippe Mathieu-Daudé
853f9378a3 target/ppc: Restrict SoftMMU mmu_index() to TCG
Convert CPUClass::mmu_index() to TCGCPUOps::mmu_index(),
restricting ppc_cpu_mmu_index() to TCG #ifdef.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-16-philmd@linaro.org>
2025-04-23 15:04:57 -07:00
Philippe Mathieu-Daudé
a53066a9d6 target/openrisc: Restrict SoftMMU mmu_index() to TCG
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-15-philmd@linaro.org>
2025-04-23 15:04:57 -07:00
Philippe Mathieu-Daudé
a433b2194f target/mips: Restrict SoftMMU mmu_index() to TCG
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-14-philmd@linaro.org>
2025-04-23 15:04:57 -07:00
Philippe Mathieu-Daudé
2b08170ffe target/microblaze: Restrict SoftMMU mmu_index() to TCG
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-13-philmd@linaro.org>
2025-04-23 15:04:57 -07:00
Philippe Mathieu-Daudé
cc944932ec target/m68k: Restrict SoftMMU mmu_index() to TCG
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-12-philmd@linaro.org>
2025-04-23 15:04:57 -07:00
Philippe Mathieu-Daudé
3076af3441 target/loongarch: Restrict SoftMMU mmu_index() to TCG
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-11-philmd@linaro.org>
2025-04-23 15:04:57 -07:00
Philippe Mathieu-Daudé
8480f7c745 target/i386: Restrict SoftMMU mmu_index() to TCG
Move x86_cpu_mmu_index() to tcg-cpu.c, convert
CPUClass::mmu_index() to TCGCPUOps::mmu_index().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-10-philmd@linaro.org>
2025-04-23 15:04:57 -07:00
Philippe Mathieu-Daudé
611c34a745 target/i386: Restrict cpu_mmu_index_kernel() to TCG
Move cpu_mmu_index_kernel() to seg_helper.c.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-9-philmd@linaro.org>
2025-04-23 15:04:57 -07:00
Philippe Mathieu-Daudé
c8db986959 target/i386: Remove unused cpu_(ldub, stb)_kernel macros
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-8-philmd@linaro.org>
2025-04-23 15:04:57 -07:00
Philippe Mathieu-Daudé
7856232a93 target/hppa: Restrict SoftMMU mmu_index() to TCG
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-7-philmd@linaro.org>
2025-04-23 15:04:57 -07:00
Philippe Mathieu-Daudé
364f4633b7 target/avr: Restrict SoftMMU mmu_index() to TCG
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-6-philmd@linaro.org>
2025-04-23 15:04:57 -07:00
Philippe Mathieu-Daudé
61dc4d0da8 target/arm: Restrict SoftMMU mmu_index() to TCG
Move arm_cpu_mmu_index() within CONFIG_TCG #ifdef'ry,
convert CPUClass::mmu_index() to TCGCPUOps::mmu_index().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-5-philmd@linaro.org>
2025-04-23 15:04:57 -07:00
Philippe Mathieu-Daudé
6ea8bce7ee target/alpha: Restrict SoftMMU mmu_index() to TCG
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-4-philmd@linaro.org>
2025-04-23 15:04:57 -07:00
Philippe Mathieu-Daudé
17fa8b6f03 accel/tcg: Introduce TCGCPUOps::mmu_index() callback
We'll move CPUClass::mmu_index() to TCGCPUOps::mmu_index().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-3-philmd@linaro.org>
2025-04-23 15:04:57 -07:00
Philippe Mathieu-Daudé
6ca6310699 hw/core/cpu: Update CPUClass::mmu_index docstring
Since commits 32a8ea12fab..90b7022e698 (target: "Split out
TARGET_env_mmu_index"), target's memory_rw_debug() callbacks
use the target's TARGET_env_mmu_index(), not the generic
CPUClass::mmu_index() callback. Update the documentation.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-2-philmd@linaro.org>
2025-04-23 15:04:57 -07:00
Philippe Mathieu-Daudé
f3ad026e35 target/rx: Fix copy/paste typo (riscv -> rx)
Rename riscv_cpu_mmu_index() -> rx_cpu_mmu_index().

Fixes: ef5cc166da ("target/rx: Populate CPUClass.mmu_index")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401072052.25892-1-philmd@linaro.org>
2025-04-23 15:04:57 -07:00
Richard Henderson
7b18e3a727 accel/tcg: Remove cpu-all.h, exec-all.h from tb-internal.h
Not used by tb-internal.h, but add an include for
target_page.h in tb-maint.c.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-23 15:04:57 -07:00
Richard Henderson
b103cc6e74 accel/tcg: Remove page_protect
Merge the user-only page_protect function with the user-only
implementation of tb_lock_page0.  This avoids pulling
page-protection.h into tb-internal.h.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-23 15:04:57 -07:00
Richard Henderson
aa6f138aba accel/tcg: Move get_page_addr_code* declarations
Move the declarations from exec/exec-all.h to the
private accel/tcg/internal-common.h.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-23 15:04:57 -07:00
Richard Henderson
a456c72695 include/exec: Move tb_{,set_}page_addr[01] to translation-block.h
Move the accessor functions for TranslationBlock
into the header related to the structure.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-23 15:04:57 -07:00
Richard Henderson
24b5e0fdb5 include/exec: Move TLB_MMIO, TLB_DISCARD_WRITE to slow flags
Recover two bits from the inline flags.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-23 15:04:56 -07:00