Commit graph

3383 commits

Author SHA1 Message Date
Markus Armbruster
82b5e6cc30 tcg: Fix error reporting on mprotect() failure in tcg_region_init()
tcg_region_init() calls one of qemu_mprotect_rwx(),
qemu_mprotect_rw(), and mprotect(), then reports failure with
error_setg_errno(&error_fatal, errno, ...).

The use of &error_fatal is undesirable.  qapi/error.h advises:

 * Please don't error_setg(&error_fatal, ...), use error_report() and
 * exit(), because that's more obvious.

The use of errno is wrong.  qemu_mprotect_rwx() and qemu_mprotect_rw()
wrap around qemu_mprotect__osdep().  qemu_mprotect__osdep() calls
mprotect() on POSIX, VirtualProtect() on Windows, and reports failure
with error_report().  VirtualProtect() doesn't set errno.  mprotect()
does, but error_report() may clobber it.

Fix tcg_region_init() to report errors only when it calls mprotect(),
and rely on qemu_mprotect_rwx()'s and qemu_mprotect_rw()'s error
reporting otherwise.  Use error_report(), not error_setg().

Fixes: 22c6a9938f (tcg: Merge buffer protection and guard page protection)
Fixes: 6bc144237a (tcg: Use Error with alloc_code_gen_buffer)
Cc: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250923091000.3180122-3-armbru@redhat.com>
Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>
2025-09-30 14:43:53 +02:00
Richard Henderson
33ea495cd3 include/hw/core/cpu: Invert the indexing into CPUTLBDescFast
This array is within CPUNegativeOffsetState, which means the
last element of the array has an offset from env with the
smallest magnitude.  This can be encoded into fewer bits
when generating TCG fast path memory references.

When we changed the NB_MMU_MODES to be a global constant,
rather than a per-target value, we pessimized the code
generated for targets which use only a few mmu indexes.
By inverting the array index, we counteract that.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-09-23 16:55:32 -07:00
Richard Henderson
3c58ddc9d7 include/hw/core/cpu: Introduce cpu_tlb_fast
Encapsulate access to cpu->neg.tlb.f[] in a function.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-09-23 16:55:28 -07:00
WANG Rui
a50347a414 tcg/optimize: Fix folding of vector bitsel
It looks like a typo. When the false value (C) is the constant -1, the
correct fold should be: R = B | ~A

Reproducer (LoongArch64 assembly):

     .text
     .globl  _start
 _start:
     vldi    $vr1, 3073
     vldi    $vr2, 1023
     vbitsel.v       $vr0, $vr2, $vr1, $vr2
     vpickve2gr.d    $a1, $vr0, 1
     xori    $a0, $a1, 1
     li.w    $a7, 93
     syscall 0

Fixes: e58b977238 ("tcg/optimize: Optimize bitsel_vec")
Link: https://github.com/llvm/llvm-project/issues/159610
Signed-off-by: WANG Rui <wangrui@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250919124901.2756538-1-wangrui@loongson.cn>
2025-09-23 16:53:38 -07:00
Richard Henderson
cb25409792 tcg/i386: Use vgf2p8affineqb for MO_8 vector shifts
A constant matrix can describe the movement of the 8 bits,
so these shifts can be performed with one instruction.

Logic courtesy of Andi Kleen <ak@linux.intel.com>:
https://gcc.gnu.org/pipermail/gcc-patches/2025-August/691624.html

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-09-04 09:49:30 +02:00
Richard Henderson
6c76a1f687 tcg/i386: Add INDEX_op_x86_vgf2p8affineqb_vec
Add a backend-specific opcode for expanding the
GFNI vgf2p8affineqb instruction, which we can use
for expanding 8-bit immediate shifts and rotates.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-09-04 09:49:30 +02:00
Richard Henderson
ba8a86d67a tcg/i386: Use canonical operand ordering in expand_vec_sari
The optimizer prefers to have constants as the second operand,
so expand LT x,0 instead of GT 0,x.  This will not affect the
generated code at all.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-09-04 09:49:23 +02:00
Richard Henderson
26c41cc4a3 tcg/i386: Expand sari of bits-1 as pcmpgt
Expand arithmetic right shift of bits-1 as a comparison vs 0.

Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-09-04 09:49:23 +02:00
Richard Henderson
27ea28a0b3 tcg/arm: Fix tgen_deposit
When converting from tcg_out_deposit, the arguments were not
shuffled properly.

Cc: qemu-stable@nongnu.org
Fixes: cf4905c031 ("tcg: Convert deposit to TCGOutOpDeposit")
Reported-by: Michael Tokarev <mjt@tls.msk.ru>
Tested-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-09-04 09:48:08 +02:00
Richard Henderson
092ac2481a tcg: Add tcg_gen_atomic_{xchg,fetch_and,fetch_or}_i128
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20250815122653.701782-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-08-30 16:37:24 +01:00
Richard Henderson
2c047bdb77 tcg/optimize: Don't fold INDEX_op_and_vec to extract
There is no such thing as vector extract.

Fixes: 932522a9dd ("tcg/optimize: Fold and to extract during optimize")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3036
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Tested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2025-07-21 08:09:04 -07:00
Richard Henderson
c86da2b1dd tcg: Use uintptr_t in tcg_malloc implementation
Avoid ubsan failure with clang-20,
  tcg.h:715:19: runtime error: applying non-zero offset 64 to null pointer
by not using pointers.

Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-07-11 10:43:47 -06:00
Richard Henderson
0d0fc3f465 tcg: Fix constant propagation in tcg_reg_alloc_dup
The scalar constant must be replicated for dup.

Cc: qemu-stable@nongnu.org
Fixes: bab1671f0f ("tcg: Manually expand INDEX_op_dup_vec")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3002
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:56 -06:00
Richard Henderson
169d253e1f tcg/riscv: Fix typo in tgen_extract
Fix the direction of the shift, introduced when converting
the codebase to TCGOutOp* and small tgen_* helpers.

Fixes: 5a4d034f3c ("tcg: Convert extract to TCGOutOpExtract")
Reported-by: Andrea Bolognani <abologna@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Andrea Bolognani <abologna@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-06-30 07:42:38 -06:00
Richard Henderson
7630de24ba tcg/optimize: Simplify fold_eqv constant checks
Both cases are handled by fold_xor after conversion.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:38 -06:00
Richard Henderson
61617f715e tcg/optimize: Simplify fold_orc constant checks
If operand 2 is constant, then the computation of z_mask and a_mask
will produce the same results as the explicit check via fold_xi_to_i.
Shift the calls of fold_xx_to_i and fold_ix_to_not down below the
i2->is_const check.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:38 -06:00
Richard Henderson
3c75cb4d64 tcg/optimize: Simplify fold_andc constant checks
If operand 2 is constant, then the computation of z_mask and a_mask
will produce the same results as the explicit check via fold_xi_to_i.
Shift the calls of fold_xx_to_i and fold_ix_to_not down below the
i2->is_const check.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:38 -06:00
Richard Henderson
9ffa5420e9 tcg/optimize: Simplify fold_and constant checks
If operand 2 is constant, then the computation of z_mask
and a_mask will produce the same results as the explicit
checks via fold_xi_to_i and fold_xi_to_x.  Shift the call
of fold_xx_to_x down below the ti_is_const(t2) check.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:38 -06:00
Richard Henderson
932522a9dd tcg/optimize: Fold and to extract during optimize
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:38 -06:00
Richard Henderson
e532a39352 tcg/optimize: Use fold_and in do_constant_folding_cond[12]
When lowering tst comparisons, completely fold the and
opcode that we generate.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:38 -06:00
Richard Henderson
03329e3ce4 tcg/optimize: Build and use o_bits in fold_shift
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:38 -06:00
Richard Henderson
f4a818a08d tcg/optimize: Build and use o_bits in fold_sextract
This was the last use of fold_affected_mask,
now fully replaced by fold_masks_zosa.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:38 -06:00
Richard Henderson
08d676a46b tcg/optimize: Build and use o_bits in fold_movcond
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:38 -06:00
Richard Henderson
f78342472f tcg/optimize: Build and use o_bits in fold_extu
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:38 -06:00
Richard Henderson
de85257f14 tcg/optimize: Build and use o_bits in fold_exts
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:38 -06:00
Richard Henderson
83c47c3027 tcg/optimize: Build and use z_bits and o_bits in fold_extract2
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:38 -06:00
Richard Henderson
fcde7363d3 tcg/optimize: Build and use o_bits in fold_extract
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:37 -06:00
Richard Henderson
9d80b3c890 tcg/optimize: Build and use o_bits in fold_deposit
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:37 -06:00
Richard Henderson
e6e3733bf1 tcg/optimize: Build and use o_bits in fold_bswap
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:37 -06:00
Richard Henderson
787190e3f4 tcg/optimize: Build and use o_bits in fold_xor
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:37 -06:00
Richard Henderson
cc4033ee47 tcg/optimize: Build and use zero, one and affected bits in fold_orc
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:37 -06:00
Richard Henderson
84b399df9a tcg/optimize: Build and use one and affected bits in fold_or
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:37 -06:00
Richard Henderson
d89504b047 tcg/optimize: Build and use z_bits and o_bits in fold_not
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:37 -06:00
Richard Henderson
682d6d57ba tcg/optimize: Build and use z_bits and o_bits in fold_nor
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:37 -06:00
Richard Henderson
16559c3ecb tcg/optimize: Build and use z_bits and o_bits in fold_nand
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:37 -06:00
Richard Henderson
33fcebadd0 tcg/optimize: Build and use z_bits and o_bits in fold_eqv
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:37 -06:00
Richard Henderson
d4d441e3a1 tcg/optimize: Build and use o_bits in fold_andc
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:37 -06:00
Richard Henderson
1e2edf85cc tcg/optimize: Build and use o_bits in fold_and
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:37 -06:00
Richard Henderson
9e397cc0df tcg/optimize: Introduce fold_masks_zosa
Add a new function with an affected mask.  This will allow
folding to a constant to happen before folding to a copy,
without having to mind the ordering in all users.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:37 -06:00
Richard Henderson
56f15f67ea tcg/optimize: Add one's mask to TempOptInfo
Add o_mask mirroring z_mask, but for 1's instead of 0's.
Drop is_const and val fields, which now logically overlap.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:36 -06:00
Richard Henderson
c1fa1b30ec tcg/optimize: Introduce arg_const_val
Use arg_const_val instead of direct access to the TempOptInfo val
member.  Rename both val and is_const to catch all direct accesses.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-30 07:42:36 -06:00
Richard Henderson
aa1cc0d74d tcg: Split out tcg_gen_gvec_dup_imm_var
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-23 11:44:28 -07:00
Richard Henderson
4474051821 tcg: Split out tcg_gen_gvec_{add,sub}_var
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-23 11:44:28 -07:00
Richard Henderson
ebba58c44d tcg: Split out tcg_gen_gvec_mov_var
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-23 11:44:28 -07:00
Richard Henderson
465b21ffbe tcg: Split out tcg_gen_gvec_3_var
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-23 11:44:28 -07:00
Richard Henderson
7a74c13468 tcg: Split out tcg_gen_gvec_2_var
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-23 11:44:12 -07:00
Richard Henderson
872dab5b7e tcg: Add base arguments to check_overlap_[234]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-23 09:22:19 -07:00
Richard Henderson
ca09b6b5e5 tcg: Add dbase argument to expand_clr
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-23 09:19:14 -07:00
Richard Henderson
731422ebbd tcg: Add dbase argument to do_dup
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-23 09:17:01 -07:00
Richard Henderson
e14236b30b tcg: Add dbase argument to do_dup_store
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-06-23 09:01:41 -07:00