7f162fe291
This commit moves the Quanta-Q71L BMC machine implementation out of aspeed.c into a new standalone file aspeed_ast2400_quanta-q71l.c. This refactor continues the modularization effort for Aspeed platform support, placing each board’s logic in its own dedicated source file. It improves maintainability, readability, and simplifies future development for new platforms without cluttering aspeed.c Key updates include: - Moved QUANTA_Q71L_BMC_HW_STRAP1 macro definition into the new file. - Moved quanta_q71l_bmc_i2c_init() I²C initialization logic into the new file. - Moved aspeed_machine_quanta_q71l_class_init() and type registration. - Added aspeed_ast2400_quanta-q71l.c to the build system (meson.build). - Removed all Quanta-Q71L–specific code and macros from aspeed.c. No functional changes. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-15-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
86 lines
3.1 KiB
C
86 lines
3.1 KiB
C
/*
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* Quanta Q71l
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*
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* Copyright 2016 IBM Corp.
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "hw/arm/machines-qom.h"
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#include "hw/arm/aspeed.h"
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#include "hw/arm/aspeed_soc.h"
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/* Quanta-Q71l hardware value */
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#define QUANTA_Q71L_BMC_HW_STRAP1 ( \
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SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \
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SCU_AST2400_HW_STRAP_DRAM_CONFIG(2/* DDR3 with CL=6, CWL=5 */) | \
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SCU_AST2400_HW_STRAP_ACPI_DIS | \
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SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_24M_IN) | \
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SCU_HW_STRAP_VGA_CLASS_CODE | \
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SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_PASS_THROUGH) | \
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SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \
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SCU_HW_STRAP_SPI_WIDTH | \
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SCU_HW_STRAP_VGA_SIZE_SET(VGA_8M_DRAM) | \
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SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
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static void quanta_q71l_bmc_i2c_init(AspeedMachineState *bmc)
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{
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AspeedSoCState *soc = bmc->soc;
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/*
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* The quanta-q71l platform expects tmp75s which are compatible with
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* tmp105s.
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*/
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i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4c);
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i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4e);
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i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4f);
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/* TODO: i2c-1: Add baseboard FRU eeprom@54 24c64 */
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/* TODO: i2c-1: Add Frontpanel FRU eeprom@57 24c64 */
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/* TODO: Add Memory Riser i2c mux and eeproms. */
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i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "pca9546", 0x74);
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i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "pca9548", 0x77);
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/* TODO: i2c-3: Add BIOS FRU eeprom@56 24c64 */
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/* i2c-7 */
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i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "pca9546", 0x70);
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/* - i2c@0: pmbus@59 */
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/* - i2c@1: pmbus@58 */
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/* - i2c@2: pmbus@58 */
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/* - i2c@3: pmbus@59 */
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/* TODO: i2c-7: Add PDB FRU eeprom@52 */
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/* TODO: i2c-8: Add BMC FRU eeprom@50 */
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}
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static void aspeed_machine_quanta_q71l_class_init(ObjectClass *oc,
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const void *data)
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{
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MachineClass *mc = MACHINE_CLASS(oc);
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AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
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mc->desc = "Quanta-Q71l BMC (ARM926EJ-S)";
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amc->soc_name = "ast2400-a1";
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amc->hw_strap1 = QUANTA_Q71L_BMC_HW_STRAP1;
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amc->fmc_model = "n25q256a";
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amc->spi_model = "mx25l25635e";
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amc->num_cs = 1;
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amc->i2c_init = quanta_q71l_bmc_i2c_init;
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mc->default_ram_size = 128 * MiB;
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aspeed_machine_class_init_cpus_defaults(mc);
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}
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static const TypeInfo aspeed_ast2400_quanta_q71l_types[] = {
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{
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.name = MACHINE_TYPE_NAME("quanta-q71l-bmc"),
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.parent = TYPE_ASPEED_MACHINE,
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.class_init = aspeed_machine_quanta_q71l_class_init,
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.interfaces = arm_machine_interfaces,
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}
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};
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DEFINE_TYPES(aspeed_ast2400_quanta_q71l_types)
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