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qemu-cr16/target/i386
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Paolo Bonzini f48aaf926e target/i386/tcg: fix a few instructions that do not support VEX.L=1 
Match the contents of table 2-17 ("#UD Exception and VEX.L Field Encoding")
in the SDM, for instruction in exception class 5.  They were incorrectly
accepting 256-bit versions that do not exist.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
(cherry picked from commit 2eb8d9734355ed86e162dce2a3f265ffee4005ed)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2026-01-28 12:01:22 +03:00
..
emulate target/i386: emulate: Make sure fetch_instruction exist before calling it 2025-11-17 09:49:25 +01:00
hvf accel/hvf: Fix i386 HVF compilation failures 2025-12-01 21:21:16 +01:00
kvm target/i386: clear CPU_INTERRUPT_SIPI for all accelerators 2025-10-28 14:50:40 +01:00
mshv accel/mshv: use return value of handle_pio_str_read 2025-10-28 14:50:07 +01:00
nvmm accel/nvmm: Fix 'cpu' typo in nvmm_init_vcpu() 2026-01-18 20:29:45 +03:00
tcg target/i386/tcg: fix a few instructions that do not support VEX.L=1 2026-01-28 12:01:22 +03:00
whpx target/i386: clear CPU_INTERRUPT_SIPI for all accelerators 2025-10-28 14:50:40 +01:00
arch_dump.c include: Rename sysemu/ -> system/ 2024-12-20 17:44:56 +01:00
arch_memory_mapping.c target/i386/arch_memory_mapping: Use address_space_memory_is_io() 2025-10-07 03:37:04 +02:00
confidential-guest.c qom: Have class_init() take a const data argument 2025-04-25 17:00:41 +02:00
confidential-guest.h i386/cgs: Introduce x86_confidential_guest_check_features() 2025-05-28 19:35:55 +02:00
cpu-apic.c hw/i386/apic: Prefer APICCommonState over DeviceState 2025-10-21 20:16:47 +02:00
cpu-dump.c hw/i386/apic: Prefer APICCommonState over DeviceState 2025-10-21 20:16:47 +02:00
cpu-internal.h include: Rename sysemu/ -> system/ 2024-12-20 17:44:56 +01:00
cpu-param.h tcg: Remove the TCG_GUEST_DEFAULT_MO definition globally 2025-04-23 15:07:32 -07:00
cpu-qom.h target: Move ArchCPUClass definition to 'cpu.h' 2023-11-07 13:08:48 +01:00
cpu-system.c qapi: make most CPU commands unconditionally available 2025-05-28 18:55:50 +02:00
cpu.c igvm: add support for initial register state load in native mode 2025-11-03 07:38:53 +01:00
cpu.h igvm: add support for initial register state load in native mode 2025-11-03 07:38:53 +01:00
gdbstub.c target/i386/gdbstub: Expose orig_ax 2024-10-13 10:05:51 -07:00
helper.c i386/cpu: Prevent delivering SIPI during SMM in TCG mode 2025-10-14 11:03:58 +02:00
helper.h target/i386: optimize computation of ZF from CC_OP_DYNAMIC 2024-10-31 18:28:33 +01:00
host-cpu.c i386/cpu: Unify family, model and stepping calculation for x86 CPU 2025-07-12 15:28:21 +02:00
host-cpu.h i386/cpu: Cleanup host_cpu_max_instance_init() 2025-07-17 17:18:59 +02:00
igvm.c igvm: add support for initial register state load in native mode 2025-11-03 07:38:53 +01:00
Kconfig i386: select correct components for no-board build 2024-05-10 15:45:15 +02:00
machine.c target/i386: Add support for save/load of exception error code 2025-08-20 22:47:43 +02:00
meson.build igvm: add support for igvm memory map parameter in native mode 2025-11-03 07:38:53 +01:00
monitor.c target/i386/monitor: Replace legacy cpu_physical_memory_read() calls 2025-10-16 17:07:13 +02:00
ops_sse.h target/i386/tcg: mask addresses for VSIB 2026-01-16 14:28:56 +03:00
sev-system-stub.c qapi: make SEV commands unconditionally available 2025-05-28 18:54:16 +02:00
sev.c migration: Don't free the reason after calling migrate_add_blocker 2025-11-03 16:04:10 -05:00
sev.h i386/sev: Add implementation of CGS set_guest_policy() 2025-07-12 15:28:21 +02:00
svm.h target/i386: check intercept for XSETBV 2023-10-17 15:20:53 +02:00
trace-events target/i386/sev: Use size_t for object sizes 2024-06-28 19:26:54 +02:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
xsave_helper.c qemu: Declare all load/store helper in 'qemu/bswap.h' 2025-07-15 02:56:39 -04:00