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Richard Henderson 1188b07e60 * i386: fix migration issues in 10.1 
* target/i386/mshv: new accelerator
 * rust: use glib-sys-rs
 * rust: fixes for docker tests
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Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* i386: fix migration issues in 10.1
* target/i386/mshv: new accelerator
* rust: use glib-sys-rs
* rust: fixes for docker tests

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# gpg: Signature made Thu 09 Oct 2025 12:49:00 AM PDT
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [unknown]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (35 commits)
  rust: fix path to rust_root_crate.sh
  tests/docker: make --enable-rust overridable with EXTRA_CONFIGURE_OPTS
  MAINTAINERS: Add maintainers for mshv accelerator
  docs: Add mshv to documentation
  target/i386/mshv: Use preallocated page for hvcall
  qapi/accel: Allow to query mshv capabilities
  accel/mshv: Handle overlapping mem mappings
  target/i386/mshv: Implement mshv_vcpu_run()
  target/i386/mshv: Write MSRs to the hypervisor
  target/i386/mshv: Integrate x86 instruction decoder/emulator
  target/i386/mshv: Register MSRs with MSHV
  target/i386/mshv: Register CPUID entries with MSHV
  target/i386/mshv: Set local interrupt controller state
  target/i386/mshv: Implement mshv_arch_put_registers()
  target/i386/mshv: Implement mshv_get_special_regs()
  target/i386/mshv: Implement mshv_get_standard_regs()
  target/i386/mshv: Implement mshv_store_regs()
  target/i386/mshv: Add CPU create and remove logic
  accel/mshv: Add vCPU signal handling
  accel/mshv: Add vCPU creation and execution loop
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-10-09 07:59:01 -07:00
..
hvf accel: make all calls to qemu_process_cpu_events look the same 2025-09-17 19:00:56 +02:00
kvm system/physmem: Extract API out of 'system/ram_addr.h' header 2025-10-07 05:03:56 +02:00
mshv target/i386/mshv: Use preallocated page for hvcall 2025-10-08 19:17:31 +02:00
qtest accel: Extract AccelClass definition to 'accel/accel-ops.h' 2025-07-15 19:34:33 +02:00
stubs accel/mshv: Initialize VM partition 2025-10-08 19:17:30 +02:00
tcg system/physmem: Extract API out of 'system/ram_addr.h' header 2025-10-07 05:03:56 +02:00
xen accel: Extract AccelClass definition to 'accel/accel-ops.h' 2025-07-15 19:34:33 +02:00
accel-blocker.c include: Rename sysemu/ -> system/ 2024-12-20 17:44:56 +01:00
accel-common.c accel: Extract AccelClass definition to 'accel/accel-ops.h' 2025-07-15 19:34:33 +02:00
accel-internal.h accel: Include missing 'qemu/accel.h' header in accel-internal.h 2025-04-25 17:09:58 +02:00
accel-irq.c hw/intc: Generalize APIC helper names from kvm_* to accel_* 2025-10-08 19:17:29 +02:00
accel-qmp.c accel/system: Introduce @x-accel-stats QMP command 2025-07-15 19:34:33 +02:00
accel-system.c accel/system: Add 'info accel' on human monitor 2025-07-15 19:34:33 +02:00
accel-target.c accel: Move target-agnostic code from accel-target.c -> accel-common.c 2025-04-25 17:09:58 +02:00
accel-user.c accel: Implement accel_init_ops_interfaces() for both system/user mode 2025-04-25 17:09:58 +02:00
dummy-cpus.c accel: make all calls to qemu_process_cpu_events look the same 2025-09-17 19:00:56 +02:00
dummy-cpus.h accel/dummy: Extract 'dummy-cpus.h' header from 'system/cpus.h' 2025-07-04 14:43:46 +02:00
Kconfig accel: Add Meson and config support for MSHV accelerator 2025-10-08 19:17:27 +02:00
meson.build accel/mshv: Add accelerator skeleton 2025-10-08 19:17:29 +02:00