fridtjof/qemu-cr16
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions
qemu-cr16/target/arm
History
Peter Maydell 53ae2fdef1 target/arm: Don't set syndrome ISS for loads and stores with writeback 
The architecture requires that for faults on loads and stores which
do writeback, the syndrome information does not have the ISS
instruction syndrome information (i.e. ISV is 0).  We got this wrong
for the load and store instructions covered by disas_ldst_reg_imm9().
Calculate iss_valid correctly so that if the insn is a writeback one
it is false.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1057
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220715123323.1550983-1-peter.maydell@linaro.org
2022-07-18 13:20:14 +01:00
..
hvf Fix 'writeable' typos 2022-06-08 19:38:47 +01:00
a32-uncond.decode
a32.decode target/arm: Implement ESB instruction 2022-05-09 11:47:54 +01:00
arch_dump.c target/arm: Rename sve_zcr_len_for_el to sve_vqm1_for_el 2022-06-08 19:38:57 +01:00
arm-powerctl.c
arm-powerctl.h
arm_ldst.h
common-semi-target.h semihosting: Split out common-semi-target.h 2022-06-28 04:35:07 +05:30
cpregs.h target/arm: Move define_debug_regs() to debug_helper.c 2022-07-07 11:37:33 +01:00
cpu-param.h Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
cpu-qom.h
cpu.c target/arm: Store TCR_EL* registers as uint64_t 2022-07-18 13:20:13 +01:00
cpu.h target/arm: Honour VTCR_EL2 bits in Secure EL2 2022-07-18 13:20:14 +01:00
cpu64.c target/arm: Enable SME for -cpu max 2022-07-11 13:43:51 +01:00
cpu_tcg.c target/arm: Implement AArch32 DBGDEVID, DBGDEVID1, DBGDEVID2 2022-07-07 11:37:33 +01:00
crypto_helper.c
debug_helper.c target/arm: Store TCR_EL* registers as uint64_t 2022-07-18 13:20:13 +01:00
gdbstub.c Fix 'writeable' typos 2022-06-08 19:38:47 +01:00
gdbstub64.c target/arm: Rename sve_zcr_len_for_el to sve_vqm1_for_el 2022-06-08 19:38:57 +01:00
helper-a64.c
helper-a64.h
helper-mve.h
helper-sme.h target/arm: Implement SME integer outer product 2022-07-11 13:43:51 +01:00
helper-sve.h target/arm: Implement REVD 2022-07-11 13:43:51 +01:00
helper.c target/arm: Store TCR_EL* registers as uint64_t 2022-07-18 13:20:13 +01:00
helper.h target/arm: Implement SCLAMP, UCLAMP 2022-07-11 13:43:51 +01:00
hvf_arm.h
idau.h
internals.h target/arm: Honour VTCR_EL2 bits in Secure EL2 2022-07-18 13:20:14 +01:00
iwmmxt_helper.c
Kconfig
kvm-consts.h
kvm-stub.c
kvm.c
kvm64.c target/arm: Create ARMVQMap 2022-06-27 11:18:17 +01:00
kvm_arm.h target/arm: Use uint32_t instead of bitmap for sve vq's 2022-06-08 19:38:57 +01:00
m-nocp.decode
m_helper.c semihosting: Return void from do_common_semihosting 2022-06-28 04:35:07 +05:30
machine.c target/arm: Add the SME ZA storage to CPUARMState 2022-06-27 11:18:17 +01:00
meson.build target/arm: Trap non-streaming usage when Streaming SVE is active 2022-07-11 13:19:35 +01:00
monitor.c
mte_helper.c
mve.decode
mve_helper.c target/arm: Use expand_pred_b in mve_helper.c 2022-06-08 19:38:58 +01:00
neon-dp.decode
neon-ls.decode
neon-shared.decode
neon_helper.c
op_addsub.h
op_helper.c target/arm: Introduce helper_exception_with_syndrome 2022-06-10 14:32:34 +01:00
pauth_helper.c
psci.c
ptw.c target/arm: Store TCR_EL* registers as uint64_t 2022-07-18 13:20:13 +01:00
sme-fa64.decode target/arm: Mark LD1RO as non-streaming 2022-07-11 13:19:35 +01:00
sme.decode target/arm: Implement SME integer outer product 2022-07-11 13:43:51 +01:00
sme_helper.c target/arm: Implement SME integer outer product 2022-07-11 13:43:51 +01:00
sve.decode target/arm: Implement SCLAMP, UCLAMP 2022-07-11 13:43:51 +01:00
sve_helper.c target/arm: Implement REVD 2022-07-11 13:43:51 +01:00
sve_ldst_internal.h target/arm: Export sve contiguous ldst support functions 2022-06-08 19:38:58 +01:00
syndrome.h target/arm: Add syn_smetrap 2022-06-27 11:18:17 +01:00
t16.decode
t32.decode target/arm: Implement ESB instruction 2022-05-09 11:47:54 +01:00
tlb_helper.c target/arm: Fold regime_tcr() and regime_tcr_value() together 2022-07-18 13:20:13 +01:00
trace-events
trace.h
translate-a32.h Clean up header guards that don't match their file name 2022-05-11 16:49:06 +02:00
translate-a64.c target/arm: Don't set syndrome ISS for loads and stores with writeback 2022-07-18 13:20:14 +01:00
translate-a64.h target/arm: Export unpredicated ld/st from translate-sve.c 2022-07-11 13:19:35 +01:00
translate-m-nocp.c target/arm: Introduce gen_exception_insn 2022-06-10 14:32:32 +01:00
translate-mve.c target/arm: Introduce gen_exception_insn 2022-06-10 14:32:32 +01:00
translate-neon.c
translate-sme.c target/arm: Implement SME integer outer product 2022-07-11 13:43:51 +01:00
translate-sve.c target/arm: Implement SCLAMP, UCLAMP 2022-07-11 13:43:51 +01:00
translate-vfp.c target/arm: Trap non-streaming usage when Streaming SVE is active 2022-07-11 13:19:35 +01:00
translate.c target/arm: Trap non-streaming usage when Streaming SVE is active 2022-07-11 13:19:35 +01:00
translate.h target/arm: Implement SME MOVA 2022-07-11 13:19:35 +01:00
vec_helper.c target/arm: Implement SCLAMP, UCLAMP 2022-07-11 13:43:51 +01:00
vec_internal.h target/arm: Export bfdotadd from vec_helper.c 2022-06-08 19:38:58 +01:00
vfp-uncond.decode
vfp.decode
vfp_helper.c