Mateja Marjanovic 0df911fd7f target/mips: Improve performance of certain MSA instructions ... Eliminate loops for better performance. Following MSA instructions from "UNOP" group are affected: - NLZC.<B|H|W|D> - NLOC.<B|H|W|D> - PCNT.<B|H|W|D> Following MSA instructions from "BINOP" group are affected: - ADD_A.<B|H|W|D> - ADDS_A.<B|H|W|D> - ADDS_S.<B|H|W|D> - ADDS_U.<B|H|W|D> - ADDV.<B|H|W|D> - ASUB_S.<B|H|W|D> - ASUB_U.<B|H|W|D> - AVE_S.<B|H|W|D> - AVE_U.<B|H|W|D> - AVER_S.<B|H|W|D> - AVER_U.<B|H|W|D> - BCLR.<B|H|W|D> - BNEG.<B|H|W|D> - BSET.<B|H|W|D> - CEQ.<B|H|W|D> - CLE_S.<B|H|W|D> - CLE_U.<B|H|W|D> - CLT_S.<B|H|W|D> - CLT_U.<B|H|W|D> - DIV_S.<B|H|W|D> - DIV_U.<B|H|W|D> - DOTP_S.<B|H|W|D> - DOTP_U.<B|H|W|D> - HADD_S.<B|H|W|D> - HADD_U.<B|H|W|D> - HSUB_S.<B|H|W|D> - HSUB_U.<B|H|W|D> - MAX_A.<B|H|W|D> - MAX_S.<B|H|W|D> - MAX_U.<B|H|W|D> - MIN_A.<B|H|W|D> - MIN_S.<B|H|W|D> - MIN_U.<B|H|W|D> - MOD_S.<B|H|W|D> - MOD_U.<B|H|W|D> - MUL_Q.<B|H|W|D> - MULR_Q.<B|H|W|D> - MULV.<B|H|W|D> - SLL.<B|H|W|D> - SRA.<B|H|W|D> - SRAR.<B|H|W|D> - SRL.<B|H|W|D> - SRLR.<B|H|W|D> - SUBS_S.<B|H|W|D> - SUBS_U.<B|H|W|D> - SUBSUS_U.<B|H|W|D> - SUBSUU_S.<B|H|W|D> - SUBV.<B|H|W|D> Following MSA instructions from "TEROP" group are affected: - BINSL.<B|H|W|D> - BINSR.<B|H|W|D> - DPADD_S.<B|H|W|D> - DPADD_U.<B|H|W|D> - DPSUB_S.<B|H|W|D> - DPSUB_U.<B|H|W|D> - MADD_Q.<B|H|W|D> - MADDR_Q.<B|H|W|D> - MADDV.<B|H|W|D> - MSUB_Q.<B|H|W|D> - MSUBR_Q.<B|H|W|D> - MSUBV.<B|H|W|D> Additionally, following MSA instructionas are also affected: - ILVL.<B|H|W|D> - ILVR.<B|H|W|D> - ILVEV.<B|H|W|D> - ILVOD.<B|H|W|D> - PCKEV.<B|H|W|D> - PCKOD.<B|H|W|D> Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1551718283-4487-2-git-send-email-mateja.marjanovic@rt-rk.com>		2019-06-01 20:20:20 +02:00
..
cp0_timer.c	mips: introduce internal.h and cleanup cpu.h	2017-09-21 13:24:34 +01:00
cpu-qom.h	mips: MIPSCPU model subclasses	2017-09-21 13:25:30 +01:00
cpu.c	target/mips: Convert to CPUClass::tlb_fill	2019-05-10 11:12:50 -07:00
cpu.h	target/mips: realign comments to fix checkpatch warnings	2019-05-26 17:44:55 +02:00
dsp_helper.c	target/mips: Clean up dsp_helper.c	2019-06-01 20:20:20 +02:00
gdbstub.c	target/mips: Fix gdbstub to read/write 64 bit FP registers	2018-06-27 20:13:50 +02:00
helper.c	mips: Decide to map PAGE_EXEC in map_address	2019-05-26 17:33:24 +02:00
helper.h	Various testing updates	2019-05-28 17:38:32 +01:00
internal.h	target/mips: Convert to CPUClass::tlb_fill	2019-05-10 11:12:50 -07:00
kvm.c	mips: introduce internal.h and cleanup cpu.h	2017-09-21 13:24:34 +01:00
kvm_mips.h
lmi_helper.c	target/mips: Clean up lmi_helper.c	2019-06-01 20:20:20 +02:00
machine.c	target/mips: compare virtual addresses in LL/SC sequence	2019-02-14 17:47:28 +01:00
Makefile.objs	target/mips: only build mips-semi for softmmu	2019-05-28 10:28:51 +01:00
mips-defs.h	target/mips: Define a bit for MXU in insn_flags	2018-10-29 14:13:47 +01:00
mips-semi.c	target/mips: convert UHI_plog to use common semihosting code	2019-05-28 10:28:51 +01:00
msa_helper.c	target/mips: Improve performance of certain MSA instructions	2019-06-01 20:20:20 +02:00
op_helper.c	target/mips: Fix MSA instructions ST.<B|H|W|D> on big endian host	2019-05-26 17:32:52 +02:00
TODO
trace-events	trace-events: Shorten file names in comments	2019-03-22 16:18:07 +00:00
translate.c	target/mips: Add emulation of MMI instruction PCPYUD	2019-06-01 20:20:20 +02:00
translate_init.inc.c	target: Simplify how the TARGET_cpu_list() print	2019-04-18 22:18:59 +02:00