According to the 'MIPS MT Application-Specific Extension' manual:
If the VPE executing the instruction is not a Master VPE,
with the MVP bit of the VPEConf0 register set, the EVP bit
is unchanged by the instruction.
Modify the DVPE/EVPE opcodes to only update the MVPControl.EVP bit
if executed on a master VPE.
Cc: qemu-stable@nongnu.org
Reported-by: Hansni Bu
Buglink: https://bugs.launchpad.net/qemu/+bug/1926277
Fixes:
|
||
|---|---|---|
| .. | ||
| cp0_helper.c | ||
| lcsr_helper.c | ||
| meson.build | ||
| mips-semi.c | ||
| semihosting-stub.c | ||
| special_helper.c | ||
| tlb_helper.c | ||